From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/8] arm64: allow ID map to be extended to 52 bits
Date: Fri, 22 Dec 2017 15:42:09 +0000 [thread overview]
Message-ID: <e88df097-b7b6-6dcd-2873-3408ee0d810b@arm.com> (raw)
In-Reply-To: <20171222152307.11252-8-catalin.marinas@arm.com>
On 22/12/17 15:23, Catalin Marinas wrote:
> From: Kristina Martsenko <kristina.martsenko@arm.com>
>
> Currently, when using VA_BITS < 48, if the ID map text happens to be
> placed in physical memory above VA_BITS, we increase the VA size (up to
> 48) and create a new table level, in order to map in the ID map text.
> This is okay because the system always supports 48 bits of VA.
>
> This patch extends the code such that if the system supports 52 bits of
> VA, and the ID map text is placed that high up, then we increase the VA
> size accordingly, up to 52.
>
> One difference from the current implementation is that so far the
> condition of VA_BITS < 48 has meant that the top level table is always
> "full", with the maximum number of entries, and an extra table level is
> always needed. Now, when VA_BITS = 48 (and using 64k pages), the top
> level table is not full, and we simply need to increase the number of
> entries in it, instead of creating a new table level.
>
> Tested-by: Bob Picco <bob.picco@oracle.com>
> Reviewed-by: Bob Picco <bob.picco@oracle.com>
> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
> [catalin.marinas at arm.com: reduce arguments to __create_hyp_mappings()]
> [catalin.marinas at arm.com: reworked/renamed __cpu_uses_extended_idmap_level()]
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2017-12-22 15:42 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-22 15:22 [PATCH v2 0/8] arm64: 52-bit physical address support Catalin Marinas
2017-12-22 15:23 ` [PATCH v2 1/8] arm64: add kconfig symbol to configure physical address size Catalin Marinas
2017-12-22 15:30 ` Marc Zyngier
2017-12-22 15:23 ` [PATCH v2 2/8] arm64: limit PA size to supported range Catalin Marinas
2018-01-09 19:32 ` Kristina Martsenko
2017-12-22 15:23 ` [PATCH v2 3/8] arm64: handle 52-bit addresses in TTBR Catalin Marinas
2017-12-22 15:44 ` Suzuki K Poulose
2017-12-22 15:23 ` [PATCH v2 4/8] arm64: head.S: handle 52-bit PAs in PTEs in early page table setup Catalin Marinas
2017-12-22 15:34 ` Marc Zyngier
2017-12-22 15:23 ` [PATCH v2 5/8] arm64: don't open code page table entry creation Catalin Marinas
2017-12-22 15:40 ` Marc Zyngier
2017-12-22 15:58 ` Suzuki K Poulose
2017-12-22 15:23 ` [PATCH v2 6/8] arm64: handle 52-bit physical addresses in page table entries Catalin Marinas
2017-12-22 15:23 ` [PATCH v2 7/8] arm64: allow ID map to be extended to 52 bits Catalin Marinas
2017-12-22 15:42 ` Marc Zyngier [this message]
2017-12-22 16:34 ` Suzuki K Poulose
2017-12-22 16:57 ` Suzuki K Poulose
2018-01-09 19:31 ` Kristina Martsenko
2018-01-10 10:58 ` Suzuki K Poulose
2018-01-09 19:29 ` Kristina Martsenko
2018-01-12 11:48 ` Kristina Martsenko
2018-01-13 12:16 ` Marc Zyngier
2017-12-22 15:23 ` [PATCH v2 8/8] arm64: enable 52-bit physical address support Catalin Marinas
2017-12-22 15:43 ` Marc Zyngier
2017-12-22 16:22 ` Suzuki K Poulose
2018-01-09 19:33 ` [PATCH v2 0/8] arm64: " Kristina Martsenko
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