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From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will@kernel.org>, Jason Gunthorpe <jgg@nvidia.com>
Cc: catalin.marinas@arm.com, joro@8bytes.org, jpb@kernel.org,
	iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/2] iommu/arm-smmu-v3: Add HAFT support for SVA
Date: Mon, 27 Jul 2026 11:27:47 +0100	[thread overview]
Message-ID: <0a10a19d-690c-42ee-aedc-83906b9fd9e0@arm.com> (raw)
In-Reply-To: <amcTBlw16RKuZC8y@willie-the-truck>

On 27/07/2026 9:12 am, Will Deacon wrote:
> On Sun, Jul 26, 2026 at 01:10:19PM -0300, Jason Gunthorpe wrote:
>> On Sun, Jul 26, 2026 at 01:00:38PM +0100, Will Deacon wrote:
>>> On Sat, Jul 25, 2026 at 11:27:59AM -0300, Jason Gunthorpe wrote:
>>>> On Thu, Jul 23, 2026 at 03:19:44PM +0100, Robin Murphy wrote:
>>>>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>>>>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>>>>> @@ -102,6 +102,8 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target,
>>>>>   			target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HA);
>>>>>   		if (master->smmu->features & ARM_SMMU_FEAT_HD)
>>>>>   			target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HD);
>>>>> +		if (master->smmu->features & ARM_SMMU_FEAT_HAFT && system_supports_haft())
>>>>> +			target->data[1] |= cpu_to_le64(CTXDESC_CD_1_HAFT);
>>>>>   	} else {
>>>>>   		target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_EPD0);
>>>>
>>>> Based on the Sashiko remark and your note you should lift all the
>>>> HA/HD/HAFT bits outside this if (mm) block.
>>>>
>>>> AFAICT it is fine for HA/HD/HAFT to be set with EPD0, the HW won't
>>>> process any PTEs so they won't have any effect.
>>>
>>> I'm not sure about that. The spec says this about CD.HAFT:
>>
>> Sorry I see this was unclear
>>
>> I ment to move all *three* bits outside the if.
>>
>> There is no reason for EPD0 to also require setting any of those three
>> bits to zero, AFAICT.
> 
> Ah, gotcha! And even if we did want to get to that configuration, I
> guess you could set EPD0, then clear HAFT, then clear HA+HD?

Indeed, it also occurred to me on the way home on Friday that in this 
case we probably could get away with just setting HA/HD/HAFT 
consistently in all SVA CDs irrespective of the mm. Strictly, EPD0 only 
forbids *new* walks from using TTB0, so there might potentially be some 
outstanding PTE updates still made in the window between the config 
update and the TLBI at the end of arm_smmu_mm_release(), but that 
shouldn't be harmful.

Lemme spin a v3...

Cheers,
Robin.



      reply	other threads:[~2026-07-27 10:28 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-23 14:19 [PATCH v2 0/2] iommu/arm-smmu-v3: Fix SVA vs. HAFT issues Robin Murphy
2026-07-23 14:19 ` [PATCH v2 1/2] arm64: Add override for MMFR1.HAFDBS Robin Murphy
2026-07-23 14:19 ` [PATCH v2 2/2] iommu/arm-smmu-v3: Add HAFT support for SVA Robin Murphy
2026-07-25 14:27   ` Jason Gunthorpe
2026-07-26 12:00     ` Will Deacon
2026-07-26 16:08       ` Jason Gunthorpe
2026-07-26 16:10       ` Jason Gunthorpe
2026-07-27  8:12         ` Will Deacon
2026-07-27 10:27           ` Robin Murphy [this message]

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