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From: Stefan Klug <stefan.klug@ideasonboard.com>
To: Rui Wang <rui.wang@ideasonboard.com>,
	dafna@fastmail.com, heiko@sntech.de,
	laurent.pinchart@ideasonboard.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org, mchehab@kernel.org
Cc: libcamera-devel@lists.libcamera.org,
	Rui Wang <rui.wang@ideasonboard.com>
Subject: Re: [PATCH v1 1/1] media: rkisp1: Fix filter mode register configuration
Date: Tue, 02 Dec 2025 07:42:36 +0100	[thread overview]
Message-ID: <176465775606.135635.13034018447792643478@localhost> (raw)
In-Reply-To: <20251202015025.601549-2-rui.wang@ideasonboard.com>

Hi Rui,

Thank you for the patch.

Quoting Rui Wang (2025-12-02 02:50:25)
> The rkisp1_flt_config() function performs an initial direct write to
> RKISP1_CIF_ISP_FILT_MODE without including the RKISP1_CIF_ISP_FLT_ENA
> bit, which clears the filter enable bit in the hardware.

That sentence is a bit hard for me to understand. Maybe:

"The rkisp1_flt_config() function overwrites RKISP1_CIF_ISP_FILT_MODE
without preserving the RKISP1_CIF_ISP_FLT_ENA bit thereby unconditionally
disabling the hardware block on reconfiguration.

But as I'm no native speaker you could maybe wait for feedback from a
native speaker.

Functionality wise the change is correct.

Reviewed-by: Stefan Klug <stefan.klug@ideasonboard.com>

Best regards,
Stefan

> 
> The subsequent read/modify/write sequence then reads back the register
> with the enable bit already cleared and cannot restore it, resulting in
> the filter being inadvertently disabled.
> 
> Remove the redundant direct write. The read/modify/write sequence alone
> correctly preserves the existing enable bit state while updating the
> DNR mode and filter configuration bits.
> 
> Signed-off-by: Rui Wang <rui.wang@ideasonboard.com>
> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> index c9f88635224c..6442436a5e42 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> @@ -411,12 +411,6 @@ static void rkisp1_flt_config(struct rkisp1_params *params,
>         rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_LUM_WEIGHT,
>                      arg->lum_weight);
>  
> -       rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE,
> -                    (arg->mode ? RKISP1_CIF_ISP_FLT_MODE_DNR : 0) |
> -                    RKISP1_CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
> -                    RKISP1_CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
> -                    RKISP1_CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1));
> -
>         /* avoid to override the old enable value */
>         filt_mode = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE);
>         filt_mode &= RKISP1_CIF_ISP_FLT_ENA;
> -- 
> 2.43.0
>


  reply	other threads:[~2025-12-02  6:42 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-02  1:50 [PATCH v1 0/1] Fix filter mode register issue Rui Wang
2025-12-02  1:50 ` [PATCH v1 1/1] media: rkisp1: Fix filter mode register configuration Rui Wang
2025-12-02  6:42   ` Stefan Klug [this message]
2026-01-05 11:29     ` Kieran Bingham

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