[PATCH v1 0/1] Fix filter mode register issue

[PATCH v1 0/1] Fix filter mode register issue

[Rui Wang]

Hi,

This series contains a single patch that fixes an issue in the rkisp1
filter mode configuration logic.

The rkisp1_flt_config() function performs a direct write to the
FILT_MODE register before the read/modify/write update. This write
does not include the RKISP1_CIF_ISP_FLT_ENA bit, which clears the
enable bit in hardware. After that, the read/modify/write sequence
cannot restore the original enable state, causing the filter to be
disabled unintentionally.

The patch removes the redundant direct write. The remaining
read/modify/write sequence correctly updates the mode fields while
preserving the existing enable bit.

Please review.

Thanks,
Rui Wang

Rui Wang (1):
  media: rkisp1: Fix filter mode register configuration

 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 6 ------
 1 file changed, 6 deletions(-)

-- 
2.43.0

[PATCH v1 1/1] media: rkisp1: Fix filter mode register configuration

[Rui Wang]

The rkisp1_flt_config() function performs an initial direct write to
RKISP1_CIF_ISP_FILT_MODE without including the RKISP1_CIF_ISP_FLT_ENA
bit, which clears the filter enable bit in the hardware.

The subsequent read/modify/write sequence then reads back the register
with the enable bit already cleared and cannot restore it, resulting in
the filter being inadvertently disabled.

Remove the redundant direct write. The read/modify/write sequence alone
correctly preserves the existing enable bit state while updating the
DNR mode and filter configuration bits.

Signed-off-by: Rui Wang <rui.wang@ideasonboard.com>
---
 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index c9f88635224c..6442436a5e42 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -411,12 +411,6 @@ static void rkisp1_flt_config(struct rkisp1_params *params,
 	rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_LUM_WEIGHT,
 		     arg->lum_weight);
 
-	rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE,
-		     (arg->mode ? RKISP1_CIF_ISP_FLT_MODE_DNR : 0) |
-		     RKISP1_CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
-		     RKISP1_CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
-		     RKISP1_CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1));
-
 	/* avoid to override the old enable value */
 	filt_mode = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE);
 	filt_mode &= RKISP1_CIF_ISP_FLT_ENA;
-- 
2.43.0

Re: [PATCH v1 1/1] media: rkisp1: Fix filter mode register configuration

[Stefan Klug]

Hi Rui,

Thank you for the patch.

Quoting Rui Wang (2025-12-02 02:50:25)
> The rkisp1_flt_config() function performs an initial direct write to
> RKISP1_CIF_ISP_FILT_MODE without including the RKISP1_CIF_ISP_FLT_ENA
> bit, which clears the filter enable bit in the hardware.

That sentence is a bit hard for me to understand. Maybe:

"The rkisp1_flt_config() function overwrites RKISP1_CIF_ISP_FILT_MODE
without preserving the RKISP1_CIF_ISP_FLT_ENA bit thereby unconditionally
disabling the hardware block on reconfiguration.

But as I'm no native speaker you could maybe wait for feedback from a
native speaker.

Functionality wise the change is correct.

Reviewed-by: Stefan Klug <stefan.klug@ideasonboard.com>

Best regards,
Stefan

> 
> The subsequent read/modify/write sequence then reads back the register
> with the enable bit already cleared and cannot restore it, resulting in
> the filter being inadvertently disabled.
> 
> Remove the redundant direct write. The read/modify/write sequence alone
> correctly preserves the existing enable bit state while updating the
> DNR mode and filter configuration bits.
> 
> Signed-off-by: Rui Wang <rui.wang@ideasonboard.com>
> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> index c9f88635224c..6442436a5e42 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> @@ -411,12 +411,6 @@ static void rkisp1_flt_config(struct rkisp1_params *params,
>         rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_LUM_WEIGHT,
>                      arg->lum_weight);
>  
> -       rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE,
> -                    (arg->mode ? RKISP1_CIF_ISP_FLT_MODE_DNR : 0) |
> -                    RKISP1_CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
> -                    RKISP1_CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
> -                    RKISP1_CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1));
> -
>         /* avoid to override the old enable value */
>         filt_mode = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE);
>         filt_mode &= RKISP1_CIF_ISP_FLT_ENA;
> -- 
> 2.43.0
>

Re: [PATCH v1 1/1] media: rkisp1: Fix filter mode register configuration

[Kieran Bingham]

Quoting Stefan Klug (2025-12-02 06:42:36)
> Hi Rui,
> 
> Thank you for the patch.
> 
> Quoting Rui Wang (2025-12-02 02:50:25)
> > The rkisp1_flt_config() function performs an initial direct write to
> > RKISP1_CIF_ISP_FILT_MODE without including the RKISP1_CIF_ISP_FLT_ENA
> > bit, which clears the filter enable bit in the hardware.
> 
> That sentence is a bit hard for me to understand. Maybe:
> 
> "The rkisp1_flt_config() function overwrites RKISP1_CIF_ISP_FILT_MODE
> without preserving the RKISP1_CIF_ISP_FLT_ENA bit thereby unconditionally
> disabling the hardware block on reconfiguration.


Stefan's proposal sounds good here.


Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>

> 
> But as I'm no native speaker you could maybe wait for feedback from a
> native speaker.
> 
> Functionality wise the change is correct.
> 
> Reviewed-by: Stefan Klug <stefan.klug@ideasonboard.com>
> 
> Best regards,
> Stefan
> 
> > 
> > The subsequent read/modify/write sequence then reads back the register
> > with the enable bit already cleared and cannot restore it, resulting in
> > the filter being inadvertently disabled.
> > 
> > Remove the redundant direct write. The read/modify/write sequence alone
> > correctly preserves the existing enable bit state while updating the
> > DNR mode and filter configuration bits.
> > 
> > Signed-off-by: Rui Wang <rui.wang@ideasonboard.com>
> > ---
> >  drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 6 ------
> >  1 file changed, 6 deletions(-)
> > 
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> > index c9f88635224c..6442436a5e42 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> > @@ -411,12 +411,6 @@ static void rkisp1_flt_config(struct rkisp1_params *params,
> >         rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_LUM_WEIGHT,
> >                      arg->lum_weight);
> >  
> > -       rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE,
> > -                    (arg->mode ? RKISP1_CIF_ISP_FLT_MODE_DNR : 0) |
> > -                    RKISP1_CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
> > -                    RKISP1_CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
> > -                    RKISP1_CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1));
> > -
> >         /* avoid to override the old enable value */
> >         filt_mode = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE);
> >         filt_mode &= RKISP1_CIF_ISP_FLT_ENA;
> > -- 
> > 2.43.0
> >