[PATCH 0/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 and mmc1 to dtsi

[PATCH 0/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 and mmc1 to dtsi

[Joonas Kylmälä]

Hi,

This short patch series moves mmc0 and mmc1 pinctrl in H3 and H2+
boards' dts files to the dtsi file in order to make it easier to do
changes in the future to pinctrl attributes if required. This sort of
cleaning up of the dts files was discussed earlier in the email thread
with the subject "[linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t:
Move mmc1 pinctrl setting to dtsi file".

As this is my first patch submission I urge you to look through the
patches carefully. I have tested that after applying the patches the
Orange Pi Zero still boots and MMC0 works and also its detect pin. I
don't have any of the other devices to test this with.

These patches are prepared against the branch sunxi/dt-for-4.15.

Best regards,
Joonas Kylm?l?

Joonas Kylm?l? (2):
  ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 from dts to dtsi
  ARM: dts: sun8i: h3-h5: Move pinctrl of mmc1 from dts to dtsi

 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 4 ----
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 4 ----
 arch/arm/boot/dts/sun8i-h3-beelink-x2.dts         | 4 ----
 arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts     | 2 --
 arch/arm/boot/dts/sun8i-h3-nanopi.dtsi            | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         | 4 ----
 arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts      | 4 ----
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        | 2 --
 arch/arm/boot/dts/sunxi-h3-h5.dtsi                | 4 ++++
 11 files changed, 4 insertions(+), 30 deletions(-)

-- 
2.11.0

[PATCH 1/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 from dts to dtsi

[Joonas Kylmälä]

Most of the boards use the mmc0 pins and their attributes defined in
mmc0_pins_a and mmc0_cd_pin. Let's default to those by moving the
pinctrl attributes to the dtsi file. This makes it easier to modify
device trees in the future as there is only one place to change the
pinctrl attributes.

As a side effect this patch also adds the detect pin of Orange Pi
Zero's mmc0 under pinctrl as it should have been there right from the
beginning.

Signed-off-by: Joonas Kylm?l? <joonas.kylmala@iki.fi>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-beelink-x2.dts         | 2 --
 arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts     | 2 --
 arch/arm/boot/dts/sun8i-h3-nanopi.dtsi            | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts      | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        | 2 --
 arch/arm/boot/dts/sunxi-h3-h5.dtsi                | 2 ++
 10 files changed, 2 insertions(+), 18 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..7e6a93b49ffe 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -103,8 +103,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..a6a55c7acbf9 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -118,8 +118,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 10da56e86ab8..37ca09154e56 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -115,8 +115,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index 03ff6f8b93ff..6eea26e6f564 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -75,8 +75,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index 7646e331bd29..5357bf0500e5 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -97,8 +97,6 @@
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
 	cd-inverted;
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	status = "okay";
 	vmmc-supply = <&reg_vcc3v3>;
 };
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..c0e99a83105d 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -124,8 +124,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index a70a1daf4e2c..a492947c27ee 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -106,8 +106,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index a1c6ff6fd05d..de69fff45b48 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -98,8 +98,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index ea4e0029c0d4..9c736cb0acc8 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -120,8 +120,6 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d7a71e726a9f..56e7975242c8 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -103,6 +103,8 @@
 		mmc0: mmc at 1c0f000 {
 			/* compatible and clocks are in per SoC .dtsi file */
 			reg = <0x01c0f000 0x1000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 			resets = <&ccu RST_BUS_MMC0>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.11.0

[PATCH 2/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc1 from dts to dtsi

[Joonas Kylmälä]

Most of the boards use the mmc1 pins and their attributes defined in
mmc1_pins_a. Let's default to that by moving the pinctrl attributes to
the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.

Signed-off-by: Joonas Kylm?l? <joonas.kylmala@iki.fi>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-beelink-x2.dts         | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts      | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   | 2 --
 arch/arm/boot/dts/sunxi-h3-h5.dtsi                | 2 ++
 7 files changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 7e6a93b49ffe..49d18d5bc3e1 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -111,8 +111,6 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc_wifi>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index a6a55c7acbf9..f0023995d14e 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -126,8 +126,6 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	vqmmc-supply = <&reg_vcc3v3>;
 	mmc-pwrseq = <&wifi_pwrseq>;
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 37ca09154e56..de9e62bb46df 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -123,8 +123,6 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	non-removable;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index c0e99a83105d..e0c353fa4a1c 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -132,8 +132,6 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index a492947c27ee..00394d263d5a 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -114,8 +114,6 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	non-removable;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index 8b93f5c781a7..babf4cf1b2f6 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -54,8 +54,6 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	non-removable;
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 56e7975242c8..eee49a2615b3 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -116,6 +116,8 @@
 		mmc1: mmc at 1c10000 {
 			/* compatible and clocks are in per SoC .dtsi file */
 			reg = <0x01c10000 0x1000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc1_pins_a>;
 			resets = <&ccu RST_BUS_MMC1>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.11.0

[PATCH 1/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 from dts to dtsi

[Maxime Ripard]

On Sun, Oct 22, 2017 at 12:19:56PM +0300, Joonas Kylm?l? wrote:
> Most of the boards use the mmc0 pins and their attributes defined in
> mmc0_pins_a and mmc0_cd_pin. Let's default to those by moving the
> pinctrl attributes to the dtsi file. This makes it easier to modify
> device trees in the future as there is only one place to change the
> pinctrl attributes.
> 
> As a side effect this patch also adds the detect pin of Orange Pi
> Zero's mmc0 under pinctrl as it should have been there right from the
> beginning.

We're actually in the process of removing those gpio pinctrl
nodes. Could you make that while you're at it?

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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