From: Will Deacon <will.deacon@arm.com>
To: Julien Thierry <julien.thierry@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Jiri Olsa <jolsa@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>,
huawei.libin@huawei.com, guohanjun@huawei.com,
Namhyung Kim <namhyung@kernel.org>,
liwei391@huawei.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: perf: Do not write event type for cycle counter
Date: Wed, 3 Apr 2019 14:54:05 +0100 [thread overview]
Message-ID: <20190403135405.GB16611@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <2e42ec1f-cc16-d33b-5419-4407c1075d6a@arm.com>
On Wed, Apr 03, 2019 at 08:26:20AM +0100, Julien Thierry wrote:
> On 03/04/2019 04:10, Mark Rutland wrote:
> > On Tue, Apr 02, 2019 at 04:42:58PM +0100, Julien Thierry wrote:
> >> On 01/04/2019 09:02, Mark Rutland wrote:
> >>> On Thu, Mar 28, 2019 at 09:49:05AM +0000, Julien Thierry wrote:
> >> Now, I'm thinking what we need is to use a different mask than
> >> EVTYPE_MASK (one that excludes the event bits) when setting
> >> PMCCFILTR_EL0, but still do that when enabling an event using the cycle
> >> counter.
> >>
> >> Does that approach sound correct? Or am I missing something that would
> >> allow us to only set that upon reset?
> >
> > That sounds right to me!
> >
> > It would perhaps be nicer if we could configure event->hwc.config_base to be
> > the raw register value in all cases, but it looks like that's going to be more
> > painful than special-casing the cycle counter here.
> >
>
> Right, I'm gonna need to special case the cycle counter to adapt the
> event type writing to this patch[1]. But since this is not as
> critical/beneficial as I initially thought, I'll just incorporate the
> special-casing to the PMU interrupt as NMI series.
I'm confused as to what we're actually fixing here. PMCCFILTR_EL0 and
PMEVTYPER<n>_EL0 have the same layout, modulo some RES0 bits, so the
existing code should work fine afaict.
What's the problem?
Will
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next prev parent reply other threads:[~2019-04-03 13:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-28 9:49 [PATCH] arm64: perf: Do not write event type for cycle counter Julien Thierry
2019-04-01 8:02 ` Mark Rutland
2019-04-02 15:42 ` Julien Thierry
2019-04-03 3:10 ` Mark Rutland
2019-04-03 7:26 ` Julien Thierry
2019-04-03 13:54 ` Will Deacon [this message]
2019-04-03 14:09 ` Julien Thierry
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