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From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Russell King <linux@armlinux.org.uk>,
	Ingo Molnar <mingo@redhat.com>, Waiman Long <longman@redhat.com>,
	Will Deacon <will@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 6/6] ARM: Inline locking functions for !PREEMPTION
Date: Wed, 16 Oct 2019 00:04:21 +0200	[thread overview]
Message-ID: <20191015220420.lisfkqd4lfpiyd7h@flow> (raw)
In-Reply-To: <CAK8P3a2hYteGizk=--_Z1kE200_ORL52QEK5RBTMtXt5_UzmhA@mail.gmail.com>

On 2019-10-14 09:43:53 [+0200], Arnd Bergmann wrote:
> On Mon, Oct 14, 2019 at 12:14 AM Sebastian Andrzej Siewior
> <sebastian@breakpoint.cc> wrote:
> >
> > On non-preemptive kernels, the locking instruction is less than 64 bytes
> > and it makes sense to inline it. With PREEMPTION the kernel becomes very
> > big if the locks are inlined.
> >
> > Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> > ---
> 
> At the moment, we have two architectures selecting all 28 symbols
> and you are adding a third, all other architecture select none of them.
> 
> This tells me that the configurability has gone a little overboard. How about
> adding a shortcut ARCH_INLINE_ALL_SPINLOCKS that selects the 28
> symbols and using that for arm/arm64/s390?

Sounds reasonable. 

> Also, the output of 'size vmlinux' before and after the patch for
> multi_v7_defconfig would be useful to have in the changelog, as there
> are a couple of platforms that are particularly sensitive to object code
> size changes.

okay.

>       Arnd

Sebastian

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  parent reply	other threads:[~2019-10-15 22:04 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-13 22:13 [RFC PATCH 0/6 v2] Queued spinlocks/RW-locks for ARM Sebastian Andrzej Siewior
2019-10-13 22:13 ` [PATCH 1/6] sh: Move cmpxchg-xchg.h to asm-generic Sebastian Andrzej Siewior
2019-10-14  7:25   ` Arnd Bergmann
2019-10-15 22:31     ` [PATCH 1/6 v2] " Sebastian Andrzej Siewior
2019-10-13 22:13 ` [PATCH 2/6] ARM: cmpxchg: Define first cmpxchg() followed by xchg() Sebastian Andrzej Siewior
2019-10-13 22:13 ` [PATCH 3/6] ARM: Add xchg_{8|16}() on generic cmpxchg() on CPU_V6 Sebastian Andrzej Siewior
2019-10-13 22:13 ` [PATCH 4/6] ARM: Use qrwlock implementation Sebastian Andrzej Siewior
2019-10-13 22:13 ` [PATCH 5/6] ARM: Use qspinlock implementation Sebastian Andrzej Siewior
2019-10-13 22:13 ` [PATCH 6/6] ARM: Inline locking functions for !PREEMPTION Sebastian Andrzej Siewior
2019-10-14  7:43   ` Arnd Bergmann
2019-10-14 10:01     ` Arnd Bergmann
2019-10-15 22:30       ` Sebastian Andrzej Siewior
2019-10-15 22:37         ` Waiman Long
2019-10-15 22:47           ` Arnd Bergmann
2019-10-15 22:04     ` Sebastian Andrzej Siewior [this message]
2019-10-14  9:00 ` [RFC PATCH 0/6 v2] Queued spinlocks/RW-locks for ARM Arnd Bergmann
2019-10-16 15:57 ` Will Deacon
2019-10-16 17:45   ` Waiman Long
2019-10-16 18:33     ` Arnd Bergmann
2019-10-16 21:35     ` Sebastian Andrzej Siewior
2019-10-16 22:09   ` Sebastian Andrzej Siewior
2019-10-17 15:36     ` Waiman Long

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