From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Will Deacon <will@kernel.org>, Andrew Jones <drjones@redhat.com>,
Peng Liang <liangpeng10@huawei.com>,
Peter Shier <pshier@google.com>,
Ricardo Koller <ricarkol@google.com>,
Oliver Upton <oupton@google.com>,
Jing Zhang <jingzhangos@google.com>,
Raghavendra Rao Anata <rananta@google.com>,
Reiji Watanabe <reijiw@google.com>
Subject: [RFC PATCH 03/25] KVM: arm64: Introduce a validation function for an ID register
Date: Mon, 11 Oct 2021 21:35:13 -0700 [thread overview]
Message-ID: <20211012043535.500493-4-reijiw@google.com> (raw)
In-Reply-To: <20211012043535.500493-1-reijiw@google.com>
Introduce arm64_check_features(), which does a basic validity checking
of an ID register value against the register's limit value that KVM
can support.
This function will be used by the following patches to check if an ID
register value that userspace tries to set can be supported by KVM on
the host.
Signed-off-by: Reiji Watanabe <reijiw@google.com>
---
arch/arm64/include/asm/cpufeature.h | 1 +
arch/arm64/kernel/cpufeature.c | 26 ++++++++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index ef6be92b1921..eda7ddbed8cf 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -631,6 +631,7 @@ void check_local_cpu_capabilities(void);
u64 read_sanitised_ftr_reg(u32 id);
u64 __read_sysreg_by_encoding(u32 sys_id);
+int arm64_check_features(u32 sys_reg, u64 val, u64 limit);
static inline bool cpu_supports_mixed_endian_el0(void)
{
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6ec7036ef7e1..d146ef759435 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -3114,3 +3114,29 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr,
return sprintf(buf, "Vulnerable\n");
}
}
+
+/*
+ * Check if all features that are indicated in the given ID register value
+ * ('val') are also indicated in the 'limit'.
+ */
+int arm64_check_features(u32 sys_reg, u64 val, u64 limit)
+{
+ struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
+ const struct arm64_ftr_bits *ftrp;
+ u64 exposed_mask = 0;
+
+ if (!reg)
+ return -ENOENT;
+
+ for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
+ if (arm64_ftr_value(ftrp, val) > arm64_ftr_value(ftrp, limit))
+ return -E2BIG;
+
+ exposed_mask |= arm64_ftr_mask(ftrp);
+ }
+
+ if (val & ~exposed_mask)
+ return -E2BIG;
+
+ return 0;
+}
--
2.33.0.882.g93a45727a2-goog
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next prev parent reply other threads:[~2021-10-12 4:38 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 4:35 [RFC PATCH 00/25] KVM: arm64: Make CPU ID registers writable by userspace Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 01/25] KVM: arm64: Add has_reset_once flag for vcpu Reiji Watanabe
2021-10-15 10:12 ` Andrew Jones
2021-10-16 19:54 ` Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 02/25] KVM: arm64: Save ID registers' sanitized value per vCPU Reiji Watanabe
2021-10-15 13:09 ` Andrew Jones
2021-10-17 0:42 ` Reiji Watanabe
2021-10-18 14:30 ` Andrew Jones
2021-10-18 23:54 ` Reiji Watanabe
2021-10-12 4:35 ` Reiji Watanabe [this message]
2021-10-15 13:30 ` [RFC PATCH 03/25] KVM: arm64: Introduce a validation function for an ID register Andrew Jones
[not found] ` <CAAeT=Fy-enk=X_PaRSDEKQ01yQzdyU=bcpq8cuCZhtpzC=JvnQ@mail.gmail.com>
[not found] ` <20211018144215.fvz7lrqiqlwhadms@gator.home>
[not found] ` <CAAeT=FyvRg7cD9-N81BM4gz0FaZHcaoWWQptniB5zDKdL=OkXg@mail.gmail.com>
[not found] ` <20211019062516.smjbbil5ugbipwno@gator.home>
2021-10-19 7:26 ` Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 04/25] KVM: arm64: Introduce struct id_reg_info Reiji Watanabe
2021-10-15 13:47 ` Andrew Jones
2021-10-17 4:43 ` Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 05/25] KVM: arm64: Keep consistency of ID registers between vCPUs Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 06/25] KVM: arm64: Make ID_AA64PFR0_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 07/25] KVM: arm64: Make ID_AA64PFR1_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 08/25] KVM: arm64: Make ID_AA64ISAR0_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 09/25] KVM: arm64: Make ID_AA64ISAR1_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 10/25] KVM: arm64: Make ID_AA64DFR0_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 11/25] KVM: arm64: Make ID_DFR0_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 12/25] KVM: arm64: Make MVFR1_EL1 writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 13/25] KVM: arm64: Make ID registers without id_reg_info writable Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 14/25] KVM: arm64: Add consistency checking for frac fields of ID registers Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 15/25] KVM: arm64: Introduce KVM_CAP_ARM_ID_REG_WRITABLE capability Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 16/25] KVM: arm64: Use vcpu->arch cptr_el2 to track value of cptr_el2 for VHE Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 17/25] KVM: arm64: Use vcpu->arch.mdcr_el2 to track value of mdcr_el2 Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 18/25] KVM: arm64: Introduce framework to trap disabled features Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 19/25] KVM: arm64: Trap disabled features of ID_AA64PFR0_EL1 Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 20/25] KVM: arm64: Trap disabled features of ID_AA64PFR1_EL1 Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 21/25] KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1 Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 22/25] KVM: arm64: Trap disabled features of ID_AA64MMFR1_EL1 Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 23/25] KVM: arm64: Trap disabled features of ID_AA64ISAR1_EL1 Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 24/25] KVM: arm64: Activate trapping of disabled CPU features for the guest Reiji Watanabe
2021-10-12 4:35 ` [RFC PATCH 25/25] KVM: arm64: selftests: Introduce id_reg_test Reiji Watanabe
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