From: Hsiao Chien Sung via B4 Relay <devnull+shawn.sung.mediatek.com@kernel.org>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
CK Hu <ck.hu@mediatek.com>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Daniel Kurtz <djkurtz@chromium.org>,
Mao Huang <littlecvr@chromium.org>,
"Nancy.Lin" <nancy.lin@mediatek.com>
Cc: YT Shen <yt.shen@mediatek.com>,
dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Hsiao Chien Sung <shawn.sung@mediatek.com>
Subject: [PATCH v3 08/14] drm/mediatek: Add DRM_MODE_ROTATE_0 to rotation property
Date: Thu, 20 Jun 2024 00:38:48 +0800 [thread overview]
Message-ID: <20240620-igt-v3-8-a9d62d2e2c7e@mediatek.com> (raw)
In-Reply-To: <20240620-igt-v3-0-a9d62d2e2c7e@mediatek.com>
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Always add DRM_MODE_ROTATE_0 to rotation property to meet
IGT's (Intel GPU Tools) requirement.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 6 +++++-
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 17 +++++------------
drivers/gpu/drm/mediatek/mtk_plane.c | 2 +-
3 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
index 26236691ce4c..f7fe2e08dc8e 100644
--- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
@@ -192,7 +192,11 @@ unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp)
if (comp->funcs && comp->funcs->supported_rotations)
return comp->funcs->supported_rotations(comp->dev);
- return 0;
+ /*
+ * In order to pass IGT tests, DRM_MODE_ROTATE_0 is required when
+ * rotation is not supported.
+ */
+ return DRM_MODE_ROTATE_0;
}
static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 693560fa34e8..26b598b9f71f 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -305,27 +305,20 @@ int mtk_ovl_layer_check(struct device *dev, unsigned int idx,
struct mtk_plane_state *mtk_state)
{
struct drm_plane_state *state = &mtk_state->base;
- unsigned int rotation = 0;
- rotation = drm_rotation_simplify(state->rotation,
- DRM_MODE_ROTATE_0 |
- DRM_MODE_REFLECT_X |
- DRM_MODE_REFLECT_Y);
- rotation &= ~DRM_MODE_ROTATE_0;
-
- /* We can only do reflection, not rotation */
- if ((rotation & DRM_MODE_ROTATE_MASK) != 0)
+ /* check if any unsupported rotation is set */
+ if (state->rotation & ~mtk_ovl_supported_rotations(dev))
return -EINVAL;
/*
* TODO: Rotating/reflecting YUV buffers is not supported at this time.
* Only RGB[AX] variants are supported.
+ * Since DRM_MODE_ROTATE_0 means "no rotation", we should not
+ * reject layers with this property.
*/
- if (state->fb->format->is_yuv && rotation != 0)
+ if (state->fb->format->is_yuv && (state->rotation & ~DRM_MODE_ROTATE_0))
return -EINVAL;
- state->rotation = rotation;
-
return 0;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c
index a74b26d35985..1723d4333f37 100644
--- a/drivers/gpu/drm/mediatek/mtk_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_plane.c
@@ -338,7 +338,7 @@ int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
return err;
}
- if (supported_rotations & ~DRM_MODE_ROTATE_0) {
+ if (supported_rotations) {
err = drm_plane_create_rotation_property(plane,
DRM_MODE_ROTATE_0,
supported_rotations);
--
Git-146)
next prev parent reply other threads:[~2024-06-19 16:40 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-19 16:38 [PATCH v3 00/14] This series fixes the errors of MediaTek display driver found by IGT Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 01/14] drm/mediatek: Add missing plane settings when async update Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 02/14] drm/mediatek: Use 8-bit alpha in ETHDR Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 03/14] drm/mediatek: Fix XRGB setting error in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 04/14] drm/mediatek: Fix XRGB setting error in Mixer Hsiao Chien Sung via B4 Relay
2024-10-07 11:36 ` Markus Elfring
2024-10-09 6:27 ` Shawn Sung (宋孝謙)
2024-06-19 16:38 ` [PATCH v3 05/14] drm/mediatek: Fix destination alpha error in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 06/14] drm/mediatek: Turn off the layers with zero width or height Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 07/14] drm/mediatek: Add OVL compatible name for MT8195 Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` Hsiao Chien Sung via B4 Relay [this message]
2024-10-24 20:47 ` [PATCH v3 08/14] drm/mediatek: Add DRM_MODE_ROTATE_0 to rotation property Doug Anderson
2024-10-25 1:32 ` Shawn Sung (宋孝謙)
2024-10-25 16:35 ` Doug Anderson
2024-10-26 4:10 ` Shawn Sung (宋孝謙)
2024-06-19 16:38 ` [PATCH v3 09/14] drm/mediatek: Add new color format MACROs in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 10/14] drm/mediatek: Set DRM mode configs accordingly Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 11/14] drm/mediatek: Support more 10bit formats in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 12/14] drm/mediatek: Support RGBA8888 and RGBX8888 in OVL on MT8195 Hsiao Chien Sung via B4 Relay
2024-06-19 16:38 ` [PATCH v3 13/14] drm/mediatek: Support DRM plane alpha in OVL Hsiao Chien Sung via B4 Relay
2024-09-30 17:48 ` Adam Thiede
2024-10-01 8:55 ` CK Hu (胡俊光)
2024-10-01 18:02 ` Jason-JH Lin (林睿祥)
2024-10-01 19:51 ` Adam Thiede
2024-10-02 7:50 ` Jason-JH Lin (林睿祥)
2024-10-02 15:28 ` Adam Thiede
2024-10-03 5:17 ` Jason-JH Lin (林睿祥)
2024-10-03 15:29 ` Adam Thiede
2024-10-05 5:54 ` Yassine Oudjana
2024-10-05 6:33 ` Yassine Oudjana
2024-10-05 10:02 ` Jason-JH Lin (林睿祥)
2024-10-05 17:32 ` Adam Thiede
2024-10-07 7:22 ` Jason-JH Lin (林睿祥)
2024-10-07 10:54 ` Adam Thiede
2024-10-07 14:38 ` Jason-JH Lin (林睿祥)
2024-06-19 16:38 ` [PATCH v3 14/14] drm/mediatek: Support DRM plane alpha in Mixer Hsiao Chien Sung via B4 Relay
2024-06-20 14:16 ` [PATCH v3 00/14] This series fixes the errors of MediaTek display driver found by IGT Chun-Kuang Hu
2024-06-21 1:52 ` Shawn Sung (宋孝謙)
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