From: Yassine Oudjana <yassine.oudjana@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Lukas Bulwahn <lukas.bulwahn@redhat.com>,
Daniel Golle <daniel@makrotopia.org>,
Sam Shih <sam.shih@mediatek.com>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
Yassine Oudjana <yassine.oudjana@gmail.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/2] MediaTek MT6735 syscon clock/reset controller support
Date: Mon, 21 Oct 2024 15:16:14 +0300 [thread overview]
Message-ID: <20241021121618.151079-1-y.oudjana@protonmail.com> (raw)
From: Yassine Oudjana <y.oudjana@protonmail.com>
These patches are part of a larger effort to support the MT6735 SoC family
in mainline Linux. More patches can found here[1].
This series adds support for clocks and resets of the following blocks:
- IMGSYS (Camera)
- MFGCFG (GPU)
- VDECSYS (Video decoder)
- VENCSYS (Video encoder, also has JPEG codec clocks)
[1] https://gitlab.com/mt6735-mainline/linux/-/commits/mt6735-staging
Yassine Oudjana (2):
dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and
reset controllers
clk: mediatek: Add drivers for MT6735 syscon clock and reset
controllers
.../bindings/clock/mediatek,syscon.yaml | 4 +
MAINTAINERS | 10 +++
drivers/clk/mediatek/Kconfig | 32 ++++++++
drivers/clk/mediatek/Makefile | 4 +
drivers/clk/mediatek/clk-mt6735-imgsys.c | 57 +++++++++++++
drivers/clk/mediatek/clk-mt6735-mfgcfg.c | 61 ++++++++++++++
drivers/clk/mediatek/clk-mt6735-vdecsys.c | 81 +++++++++++++++++++
drivers/clk/mediatek/clk-mt6735-vencsys.c | 53 ++++++++++++
.../clock/mediatek,mt6735-imgsys.h | 15 ++++
.../clock/mediatek,mt6735-mfgcfg.h | 8 ++
.../clock/mediatek,mt6735-vdecsys.h | 9 +++
.../clock/mediatek,mt6735-vencsys.h | 11 +++
.../reset/mediatek,mt6735-mfgcfg.h | 9 +++
.../reset/mediatek,mt6735-vdecsys.h | 10 +++
14 files changed, 364 insertions(+)
create mode 100644 drivers/clk/mediatek/clk-mt6735-imgsys.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-mfgcfg.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-vdecsys.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-vencsys.c
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-imgsys.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vdecsys.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vencsys.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-mfgcfg.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
--
2.47.0
next reply other threads:[~2024-10-21 12:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 12:16 Yassine Oudjana [this message]
2024-10-21 12:16 ` [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers Yassine Oudjana
2024-10-21 16:56 ` Conor Dooley
2024-10-22 9:36 ` AngeloGioacchino Del Regno
2024-10-22 17:23 ` Conor Dooley
2024-10-22 9:04 ` AngeloGioacchino Del Regno
2024-10-21 12:16 ` [PATCH 2/2] clk: mediatek: Add drivers " Yassine Oudjana
2024-10-22 9:05 ` AngeloGioacchino Del Regno
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