From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Yassine Oudjana <yassine.oudjana@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Lukas Bulwahn <lukas.bulwahn@redhat.com>,
Daniel Golle <daniel@makrotopia.org>,
Sam Shih <sam.shih@mediatek.com>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers
Date: Tue, 22 Oct 2024 11:04:59 +0200 [thread overview]
Message-ID: <3a550c82-7099-4544-bdff-e1ea411b1636@collabora.com> (raw)
In-Reply-To: <20241021121618.151079-2-y.oudjana@protonmail.com>
Il 21/10/24 14:16, Yassine Oudjana ha scritto:
> From: Yassine Oudjana <y.oudjana@protonmail.com>
>
> Add device tree bindings for syscon clock and reset controllers (IMGSYS,
> MFGCFG, VDECSYS and VENCSYS).
>
> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> ---
> .../bindings/clock/mediatek,syscon.yaml | 4 ++++
> MAINTAINERS | 6 ++++++
> .../dt-bindings/clock/mediatek,mt6735-imgsys.h | 15 +++++++++++++++
> .../dt-bindings/clock/mediatek,mt6735-mfgcfg.h | 8 ++++++++
> .../dt-bindings/clock/mediatek,mt6735-vdecsys.h | 9 +++++++++
> .../dt-bindings/clock/mediatek,mt6735-vencsys.h | 11 +++++++++++
> .../dt-bindings/reset/mediatek,mt6735-mfgcfg.h | 9 +++++++++
> .../dt-bindings/reset/mediatek,mt6735-vdecsys.h | 10 ++++++++++
> 8 files changed, 72 insertions(+)
> create mode 100644 include/dt-bindings/clock/mediatek,mt6735-imgsys.h
> create mode 100644 include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h
> create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vdecsys.h
> create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vencsys.h
> create mode 100644 include/dt-bindings/reset/mediatek,mt6735-mfgcfg.h
> create mode 100644 include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
>
..snip..
> diff --git a/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h b/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
> new file mode 100644
> index 0000000000000..90ad73af50a3f
> --- /dev/null
> +++ b/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
> @@ -0,0 +1,10 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +
> +#ifndef _DT_BINDINGS_RESET_MT6735_VDECSYS_H
> +#define _DT_BINDINGS_RESET_MT6735_VDECSYS_H
> +
> +#define MT6735_VDEC_RST0_VDEC 0
> +
Since you anyway have to send a new version, please remove this extra and
unneeded blank line for v2.
Anyway...
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
next prev parent reply other threads:[~2024-10-22 9:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 12:16 [PATCH 0/2] MediaTek MT6735 syscon clock/reset controller support Yassine Oudjana
2024-10-21 12:16 ` [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers Yassine Oudjana
2024-10-21 16:56 ` Conor Dooley
2024-10-22 9:36 ` AngeloGioacchino Del Regno
2024-10-22 17:23 ` Conor Dooley
2024-10-22 9:04 ` AngeloGioacchino Del Regno [this message]
2024-10-21 12:16 ` [PATCH 2/2] clk: mediatek: Add drivers " Yassine Oudjana
2024-10-22 9:05 ` AngeloGioacchino Del Regno
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