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From: Conor Dooley <conor@kernel.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Yassine Oudjana <yassine.oudjana@gmail.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Lukas Bulwahn <lukas.bulwahn@redhat.com>,
	Daniel Golle <daniel@makrotopia.org>,
	Sam Shih <sam.shih@mediatek.com>,
	Yassine Oudjana <y.oudjana@protonmail.com>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers
Date: Tue, 22 Oct 2024 18:23:52 +0100	[thread overview]
Message-ID: <20241022-map-unsightly-fafb554b8f9b@spud> (raw)
In-Reply-To: <78f4da13-cbff-415b-a8eb-ec16108b5c00@collabora.com>

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On Tue, Oct 22, 2024 at 11:36:20AM +0200, AngeloGioacchino Del Regno wrote:
> Il 21/10/24 18:56, Conor Dooley ha scritto:
> > On Mon, Oct 21, 2024 at 03:16:15PM +0300, Yassine Oudjana wrote:
> > > From: Yassine Oudjana <y.oudjana@protonmail.com>
> > > 
> > > Add device tree bindings for syscon clock and reset controllers (IMGSYS,
> > > MFGCFG, VDECSYS and VENCSYS).
> > > 
> > > Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
> > > ---
> > >   .../bindings/clock/mediatek,syscon.yaml           |  4 ++++
> > >   MAINTAINERS                                       |  6 ++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-imgsys.h    | 15 +++++++++++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-mfgcfg.h    |  8 ++++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-vdecsys.h   |  9 +++++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-vencsys.h   | 11 +++++++++++
> > >   .../dt-bindings/reset/mediatek,mt6735-mfgcfg.h    |  9 +++++++++
> > >   .../dt-bindings/reset/mediatek,mt6735-vdecsys.h   | 10 ++++++++++
> > 
> > Is it really necessary to have individual files foe each of these? Seems
> > a bit extra, no?
> > 
> 
> It's only good for including smaller headers in each driver (and/or DT, but
> then the SoC DT will anyway include them all).
> 
> I'm fine with that, but I'm also fine with one header for clock and one for reset.
> 
> So.. Conor, it's however you prefer :-)

It's not worth respinning for, IMO, but I think having 8 and 9 line
header files for 2 definitions is silly.
Acked-by: Conor Dooley <conor.dooley@microchip.com>

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  reply	other threads:[~2024-10-22 17:43 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-21 12:16 [PATCH 0/2] MediaTek MT6735 syscon clock/reset controller support Yassine Oudjana
2024-10-21 12:16 ` [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers Yassine Oudjana
2024-10-21 16:56   ` Conor Dooley
2024-10-22  9:36     ` AngeloGioacchino Del Regno
2024-10-22 17:23       ` Conor Dooley [this message]
2024-10-22  9:04   ` AngeloGioacchino Del Regno
2024-10-21 12:16 ` [PATCH 2/2] clk: mediatek: Add drivers " Yassine Oudjana
2024-10-22  9:05   ` AngeloGioacchino Del Regno

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