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From: Yabin Cui <yabinc@google.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	 James Clark <james.clark@linaro.org>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org, Yabin Cui <yabinc@google.com>,
	Leo Yan <leo.yan@arm.com>
Subject: [PATCH v2 2/3] coresight: catu: Prevent concurrent PERF and SYSFS mode enablement
Date: Tue,  1 Apr 2025 18:18:31 -0700	[thread overview]
Message-ID: <20250402011832.2970072-3-yabinc@google.com> (raw)
In-Reply-To: <20250402011832.2970072-1-yabinc@google.com>

A CATU device can be enabled for either PERF mode or SYSFS mode, but
not both simultaneously. Consider the following race condition:

CPU 1 enables CATU for PERF mode.
CPU 2 enables CATU for SYSFS mode. It only increases refcnt.
CPU 2 enables ETR for SYSFS mode.
CPU 1 fails to enable ETR for PERF mode.

This results in a CATU being enabled in PERF mode and an ETR enabled
in SYSFS mode, leading to unknown behavior.

To prevent this situation, this patch checks enabled mode of a
CATU device before increasing its refcnt.

Signed-off-by: Yabin Cui <yabinc@google.com>
Suggested-by: James Clark <james.clark@linaro.org>
Suggested-by: Leo Yan <leo.yan@arm.com>
---
 drivers/hwtracing/coresight/coresight-catu.c | 6 +++++-
 drivers/hwtracing/coresight/coresight-catu.h | 1 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c
index b1d490dd7249..0caf3a3e75ce 100644
--- a/drivers/hwtracing/coresight/coresight-catu.c
+++ b/drivers/hwtracing/coresight/coresight-catu.c
@@ -466,7 +466,10 @@ static int catu_enable(struct coresight_device *csdev, enum cs_mode mode,
 		CS_UNLOCK(catu_drvdata->base);
 		rc = catu_enable_hw(catu_drvdata, mode, data);
 		CS_LOCK(catu_drvdata->base);
-	}
+		if (!rc)
+			catu_drvdata->mode = mode;
+	} else if (catu_drvdata->mode != mode)
+		rc = -EBUSY;
 	if (!rc)
 		csdev->refcnt++;
 	return rc;
@@ -499,6 +502,7 @@ static int catu_disable(struct coresight_device *csdev, void *__unused)
 		CS_UNLOCK(catu_drvdata->base);
 		rc = catu_disable_hw(catu_drvdata);
 		CS_LOCK(catu_drvdata->base);
+		catu_drvdata->mode = CS_MODE_DISABLED;
 	} else {
 		rc = -EBUSY;
 	}
diff --git a/drivers/hwtracing/coresight/coresight-catu.h b/drivers/hwtracing/coresight/coresight-catu.h
index 755776cd19c5..ea406464f0a8 100644
--- a/drivers/hwtracing/coresight/coresight-catu.h
+++ b/drivers/hwtracing/coresight/coresight-catu.h
@@ -66,6 +66,7 @@ struct catu_drvdata {
 	struct coresight_device *csdev;
 	int irq;
 	raw_spinlock_t spinlock;
+	enum cs_mode mode;
 };
 
 #define CATU_REG32(name, offset)					\
-- 
2.49.0.472.ge94155a9ec-goog



  parent reply	other threads:[~2025-04-02  1:24 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-02  1:18 [PATCH v2 0/3] coresight: catu: Introduce refcount and spinlock for enabling/disabling Yabin Cui
2025-04-02  1:18 ` [PATCH v2 1/3] " Yabin Cui
2025-04-02  1:21   ` Yabin Cui
2025-04-02 13:01     ` Leo Yan
2025-04-03 17:53       ` Yabin Cui
2025-04-04  9:46         ` Suzuki K Poulose
2025-04-02  1:18 ` Yabin Cui [this message]
2025-04-02 13:47   ` [PATCH v2 2/3] coresight: catu: Prevent concurrent PERF and SYSFS mode enablement Leo Yan
2025-04-03 17:58     ` Yabin Cui
2025-04-02  1:18 ` [PATCH v2 3/3] coresight: core: Disable helpers for devices that fail to enable Yabin Cui
2025-04-02  1:22   ` Yabin Cui
2025-04-02 13:32     ` Leo Yan
2025-04-02 13:50       ` Mike Leach
2025-04-02 14:12         ` Leo Yan
2025-04-03  0:53           ` Jie Gan
2025-04-03 18:28             ` Yabin Cui

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