* [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties [not found] <20260529113338.984301-1-can.guo@oss.qualcomm.com> @ 2026-05-29 11:33 ` Can Guo 2026-05-29 16:58 ` Krzysztof Kozlowski 0 siblings, 1 reply; 2+ messages in thread From: Can Guo @ 2026-05-29 11:33 UTC (permalink / raw) To: bvanassche, beanhuo, peter.wang, martin.petersen, mani Cc: linux-scsi, Can Guo, Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list, moderated list:ARM/Mediatek SoC support:Keyword:mediatek, moderated list:ARM/Mediatek SoC support:Keyword:mediatek UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0 and M-PHY v6.0. In these specs, TX Equalization is defined for all High Speed Gears (not only HS-G6) to compensate channel loss and improve signal integrity at high speed operation. For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be required depending on channel characteristics. Add vendor-neutral DT properties: - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6] - fixed property tx-precode-enable-g6 Each property is a uint32 array of per-lane tuples: <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>] Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values are 0..7. Precode enable values are 0/1 and only applicable to HS-G6. Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com> --- .../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml index ed97f5682509..d90cf25adfa5 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -105,6 +105,51 @@ properties: Restricts the UFS controller to rate-a or rate-b for both TX and RX directions. + tx-precode-enable-g6: + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - minItems: 2 + maxItems: 2 + - minItems: 4 + maxItems: 4 + items: + enum: [0, 1] + description: | + Static TX Precode enable values for HS-G6 only. + Values are specified as per-lane tuples: + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]. + +patternProperties: + "^txeq-preshoot-g[1-6]$": + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - minItems: 2 + maxItems: 2 + - minItems: 4 + maxItems: 4 + items: + minimum: 0 + maximum: 7 + description: | + Static TX Equalization PreShoot values for High Speed Gears. + Values are specified as per-lane tuples: + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]. + + "^txeq-deemphasis-g[1-6]$": + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - minItems: 2 + maxItems: 2 + - minItems: 4 + maxItems: 4 + items: + minimum: 0 + maximum: 7 + description: | + Static TX Equalization DeEmphasis values for High Speed Gears. + Values are specified as per-lane tuples: + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]. + dependencies: freq-table-hz: [ clocks ] operating-points-v2: [ clocks, clock-names ] -- 2.34.1 ^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties 2026-05-29 11:33 ` [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties Can Guo @ 2026-05-29 16:58 ` Krzysztof Kozlowski 0 siblings, 0 replies; 2+ messages in thread From: Krzysztof Kozlowski @ 2026-05-29 16:58 UTC (permalink / raw) To: Can Guo Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani, linux-scsi, Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list, moderated list:ARM/Mediatek SoC support:Keyword:mediatek, moderated list:ARM/Mediatek SoC support:Keyword:mediatek On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote: > UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0 > and M-PHY v6.0. In these specs, TX Equalization is defined for all High > Speed Gears (not only HS-G6) to compensate channel loss and improve signal > integrity at high speed operation. > > For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be > required depending on channel characteristics. > > Add vendor-neutral DT properties: > > - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6] > - fixed property tx-precode-enable-g6 > > Each property is a uint32 array of per-lane tuples: > <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>] > > Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values > are 0..7. Precode enable values are 0/1 and only applicable to HS-G6. > > Acked-by: Manivannan Sadhasivam <mani@kernel.org> > Reviewed-by: Bean Huo <beanhuo@micron.com> > Reviewed-by: Peter Wang <peter.wang@mediatek.com> > Signed-off-by: Can Guo <can.guo@oss.qualcomm.com> > --- > .../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml > index ed97f5682509..d90cf25adfa5 100644 > --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml > +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml > @@ -105,6 +105,51 @@ properties: > Restricts the UFS controller to rate-a or rate-b for both TX and > RX directions. > > + tx-precode-enable-g6: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + oneOf: > + - minItems: 2 > + maxItems: 2 > + - minItems: 4 > + maxItems: 4 > + items: > + enum: [0, 1] > + description: | > + Static TX Precode enable values for HS-G6 only. > + Values are specified as per-lane tuples: > + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]. You need to include them in any of applicable examples, otherwise nothing here is validated. Why values cannot be on or off? Or even better: why you cannot just list all the lanes which has it enabled, assuming disabled is by default? > + > +patternProperties: > + "^txeq-preshoot-g[1-6]$": > + $ref: /schemas/types.yaml#/definitions/uint32-array > + oneOf: > + - minItems: 2 > + maxItems: 2 > + - minItems: 4 > + maxItems: 4 > + items: > + minimum: 0 > + maximum: 7 What is the meaning of values? Nothing here refers to the spec, so is this driver specific? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-05-29 11:33 ` [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties Can Guo
2026-05-29 16:58 ` Krzysztof Kozlowski
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