From: Steffen Eiden <seiden@linux.ibm.com>
To: kvm@vger.kernel.org, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org
Cc: Alexander Gordeev <agordeev@linux.ibm.com>,
Andreas Grapentin <gra@linux.ibm.com>,
Arnd Bergmann <arnd@arndb.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Christian Borntraeger <borntraeger@linux.ibm.com>,
Claudio Imbrenda <imbrenda@linux.ibm.com>,
David Hildenbrand <david@kernel.org>,
Friedrich Welter <fritz@linux.ibm.com>,
Gautam Gala <ggala@linux.ibm.com>,
Hariharan Mari <hari55@linux.ibm.com>,
Heiko Carstens <hca@linux.ibm.com>,
Hendrik Brueckner <brueckner@linux.ibm.com>,
Ilya Leoshkevich <iii@linux.ibm.com>,
Janosch Frank <frankja@linux.ibm.com>,
Joey Gouly <joey.gouly@arm.com>, Marc Zyngier <maz@kernel.org>,
Nico Boehr <nrb@linux.ibm.com>,
Nina Schoetterl-Glausch <oss@nina.schoetterlglausch.eu>,
Oliver Upton <oupton@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Sven Schnelle <svens@linux.ibm.com>,
Ulrich Weigand <Ulrich.Weigand@de.ibm.com>,
Vasily Gorbik <gor@linux.ibm.com>, Will Deacon <will@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v1 09/26] KVM: arm64: Refactor idreg caching into dedicated structure
Date: Fri, 29 May 2026 17:55:42 +0200 [thread overview]
Message-ID: <20260529155601.2927240-10-seiden@linux.ibm.com> (raw)
In-Reply-To: <20260529155601.2927240-1-seiden@linux.ibm.com>
Move VM-wide ID register emulation fields from struct kvm_arch into a
new struct kvm_vm_id_regs to prepare future sharing of these fields and
functions using them. Update all users to use the new structure. No
functional changes.
Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Signed-off-by: Steffen Eiden <seiden@linux.ibm.com>
---
arch/arm64/include/asm/kvm_host.h | 50 ++++++++++++++++--------------
arch/arm64/kvm/config.c | 2 +-
arch/arm64/kvm/hyp/nvhe/pkvm.c | 7 +++--
arch/arm64/kvm/hyp/nvhe/sys_regs.c | 4 +--
arch/arm64/kvm/sys_regs.c | 2 +-
5 files changed, 35 insertions(+), 30 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 4c2c62b8b506..a8efff6ea01d 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -352,22 +352,7 @@ struct kvm_arch {
struct kvm_smccc_features smccc_feat;
struct maple_tree smccc_filter;
- /*
- * Emulated CPU ID registers per VM
- * (Op0, Op1, CRn, CRm, Op2) of the ID registers to be saved in it
- * is (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
- *
- * These emulated idregs are VM-wide, but accessed from the context of a vCPU.
- * Atomic access to multiple idregs are guarded by kvm_arch.config_lock.
- */
-#define IDREG_IDX(id) (((sys_reg_CRm(id) - 1) << 3) | sys_reg_Op2(id))
-#define KVM_ARM_ID_REG_NUM (IDREG_IDX(sys_reg(3, 0, 0, 7, 7)) + 1)
- u64 id_regs[KVM_ARM_ID_REG_NUM];
-
- u64 midr_el1;
- u64 revidr_el1;
- u64 aidr_el1;
- u64 ctr_el0;
+ struct kvm_vm_id_regs id_regs;
/* Masks for VNCR-backed and general EL2 sysregs */
struct kvm_sysreg_masks *sysreg_masks;
@@ -1399,19 +1384,38 @@ static inline void kvm_hyp_reserve(void) { }
void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu);
bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu);
-static inline u64 *__vm_id_reg(struct kvm_arch *ka, u32 reg)
+struct kvm_vm_id_regs {
+ /*
+ * Emulated CPU ID registers per VM
+ * (Op0, Op1, CRn, CRm, Op2) of the ID registers to be saved in it
+ * is (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
+ *
+ * These emulated idregs are VM-wide, but accessed from the context of a vCPU.
+ * Atomic access to multiple idregs are guarded by kvm_arch.config_lock.
+ */
+#define IDREG_IDX(id) (((sys_reg_CRm(id) - 1) << 3) | sys_reg_Op2(id))
+#define KVM_ARM_ID_REG_NUM (IDREG_IDX(sys_reg(3, 0, 0, 7, 7)) + 1)
+ u64 normal[KVM_ARM_ID_REG_NUM];
+
+ u64 midr_el1;
+ u64 revidr_el1;
+ u64 aidr_el1;
+ u64 ctr_el0;
+};
+
+static inline u64 *__vm_id_reg(struct kvm_vm_id_regs *id_regs, u32 reg)
{
switch (reg) {
case sys_reg(3, 0, 0, 1, 0) ... sys_reg(3, 0, 0, 7, 7):
- return &ka->id_regs[IDREG_IDX(reg)];
+ return &id_regs->normal[IDREG_IDX(reg)];
case SYS_CTR_EL0:
- return &ka->ctr_el0;
+ return &id_regs->ctr_el0;
case SYS_MIDR_EL1:
- return &ka->midr_el1;
+ return &id_regs->midr_el1;
case SYS_REVIDR_EL1:
- return &ka->revidr_el1;
+ return &id_regs->revidr_el1;
case SYS_AIDR_EL1:
- return &ka->aidr_el1;
+ return &id_regs->aidr_el1;
default:
WARN_ON_ONCE(1);
return NULL;
@@ -1419,7 +1423,7 @@ static inline u64 *__vm_id_reg(struct kvm_arch *ka, u32 reg)
}
#define kvm_read_vm_id_reg(kvm, reg) \
- ({ u64 __val = *__vm_id_reg(&(kvm)->arch, reg); __val; })
+ ({ u64 __val = *__vm_id_reg(&(kvm)->arch.id_regs, reg); __val; })
void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);
diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c
index 014fe04daabf..58a439c3ab9c 100644
--- a/arch/arm64/kvm/config.c
+++ b/arch/arm64/kvm/config.c
@@ -1398,7 +1398,7 @@ void __init check_feature_map(void)
static bool idreg_feat_match(struct kvm *kvm, const struct reg_bits_to_feat_map *map)
{
- u64 regval = kvm->arch.id_regs[map->regidx];
+ u64 regval = kvm->arch.id_regs.normal[map->regidx];
u64 regfld = (regval >> map->shift) & GENMASK(map->width - 1, 0);
if (map->sign) {
diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c
index eb1c10120f9f..94620f142f42 100644
--- a/arch/arm64/kvm/hyp/nvhe/pkvm.c
+++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c
@@ -343,7 +343,7 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc
DECLARE_BITMAP(allowed_features, KVM_VCPU_MAX_FEATURES);
/* CTR_EL0 is always under host control, even for protected VMs. */
- hyp_vm->kvm.arch.ctr_el0 = host_kvm->arch.ctr_el0;
+ hyp_vm->kvm.arch.id_regs.ctr_el0 = host_kvm->arch.id_regs.ctr_el0;
/* Preserve the vgic model so that GICv3 emulation works */
hyp_vm->kvm.arch.vgic.vgic_model = host_kvm->arch.vgic.vgic_model;
@@ -358,7 +358,7 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc
KVM_VCPU_MAX_FEATURES);
if (test_bit(KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS, &host_arch_flags))
- hyp_vm->kvm.arch.midr_el1 = host_kvm->arch.midr_el1;
+ hyp_vm->kvm.arch.id_regs.midr_el1 = host_kvm->arch.id_regs.midr_el1;
return;
}
@@ -493,7 +493,8 @@ static int vm_copy_id_regs(struct pkvm_hyp_vcpu *hyp_vcpu)
if (test_and_set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
return 0;
- memcpy(kvm->arch.id_regs, host_kvm->arch.id_regs, sizeof(kvm->arch.id_regs));
+ memcpy(kvm->arch.id_regs.normal, host_kvm->arch.id_regs.normal,
+ sizeof(kvm->arch.id_regs.normal));
return 0;
}
diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
index b5a0de84ce01..e8d773d38905 100644
--- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c
+++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
@@ -292,7 +292,7 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
return 0;
if (reg >= sys_reg(3, 0, 0, 1, 0) && reg <= sys_reg(3, 0, 0, 7, 7))
- return kvm->arch.id_regs[IDREG_IDX(reg)];
+ return kvm->arch.id_regs.normal[IDREG_IDX(reg)];
return 0;
}
@@ -543,7 +543,7 @@ void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu)
* for protected VMs.
*/
for (r = sys_reg(3, 0, 0, 4, 0); r <= sys_reg(3, 0, 0, 7, 7); r += sys_reg(0, 0, 0, 0, 1))
- ka->id_regs[IDREG_IDX(r)] = pvm_calc_id_reg(vcpu, r);
+ ka->id_regs.normal[IDREG_IDX(r)] = pvm_calc_id_reg(vcpu, r);
set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
}
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index b9aa892616ab..195ecdac7bd6 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2477,7 +2477,7 @@ static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val)
{
- u64 *p = __vm_id_reg(&kvm->arch, reg);
+ u64 *p = __vm_id_reg(&kvm->arch.id_regs, reg);
lockdep_assert_held(&kvm->arch.config_lock);
--
2.53.0
next prev parent reply other threads:[~2026-05-29 15:56 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 15:55 [PATCH v1 00/26] KVM: arm64 on s390 System Register Handling Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 01/26] KVM: arm64: Extract some feature related changes to kvm_feature.h Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 02/26] KVM: arm64: Remove __expand_field_sign_(un)signed Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 03/26] KVM: arm64: Generalize get_idreg_field_*() Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 04/26] KVM: arm64: Generalize kvm_cmp_feat_*() Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 05/26] KVM: arm64: Generalize kvm_has_feat_* Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 06/26] KVM: arm64: Remove get_idreg_field_*() and kvm_cmp_feat_*() Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 07/26] KVM: arm64: Remove kvm_has_feat_range Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 08/26] KVM: arm64: Split up feature sysreg sanitisation Steffen Eiden
2026-05-29 15:55 ` Steffen Eiden [this message]
2026-06-01 22:28 ` [PATCH v1 09/26] KVM: arm64: Refactor idreg caching into dedicated structure Oliver Upton
2026-05-29 15:55 ` [PATCH v1 10/26] KVM: arm64: Fix set_oslsr_el1 to write to OSLAR_EL1 Steffen Eiden
2026-06-01 22:21 ` Oliver Upton
2026-06-02 9:31 ` Andreas Grapentin
2026-05-29 15:55 ` [PATCH v1 11/26] KVM: arm64: Move definitions from sys_regs.c to sys_regs.h Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 12/26] KVM: arm64: Add PVM_ prefix to avoid name collisions Steffen Eiden
2026-06-01 22:23 ` Oliver Upton
2026-05-29 15:55 ` [PATCH v1 13/26] s390: Introduce read/write ARM sysreg instructions Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 14/26] s390: Introduce Query Available Arm features Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 15/26] s390: Add functions to query arm guest time Steffen Eiden
2026-06-01 22:25 ` Oliver Upton
2026-05-29 15:55 ` [PATCH v1 16/26] KVM: s390: arm64: Add sysreg related functions and definitions Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 17/26] arm64: Extract cputype definitions Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 18/26] arm64: Extract cache definitions Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 19/26] KVM: arm64: Share KVM feature detection macros Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 20/26] KVM: arm64: Share ID reg handling Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 22/26] KVM: arm64: Refactor core " Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 23/26] KVM: s390: arm64: Implement feature sanitisation Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 24/26] KVM: s390: arm64: Implement sysreg handling Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 25/26] KVM: s390: arm64: Implement exception injection Steffen Eiden
2026-05-29 15:55 ` [PATCH v1 26/26] KVM: s390: arm64: Finalize page fault handling Steffen Eiden
2026-06-01 15:52 ` [PATCH v1 00/26] KVM: arm64 on s390 System Register Handling Claudio Imbrenda
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