[PATCH v7 09/16] arm64: ras: Probe RAS architecture version

[Ruidong Tian <tianruidong@linux.alibaba.com>]

The RAS version of a component can be probed via its ERRDEVARCH register.

In cases where a component (e.g., SMMU) does not implement an ERRDEVARCH
register, the driver falls back to using the RAS version of the Processing
Element (PE).

Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
---
 arch/arm64/include/asm/ras.h |  3 +++
 drivers/ras/arm64/ras-core.c | 25 +++++++++++++++++++++++++
 drivers/ras/arm64/ras.h      |  3 +++
 3 files changed, 31 insertions(+)

diff --git a/arch/arm64/include/asm/ras.h b/arch/arm64/include/asm/ras.h
index 7bef631a395c..5b938ff03e74 100644
--- a/arch/arm64/include/asm/ras.h
+++ b/arch/arm64/include/asm/ras.h
@@ -44,6 +44,9 @@
 #define ERRFHICR0_OFFSET		0x0
 #define ERRERICR0_OFFSET		0x10
 
+/* ERRDEVARCH */
+#define ERRDEVARCH_REV			GENMASK(19, 16)
+
 struct ras_ext_regs {
 	u64 err_fr;
 	u64 err_ctlr;
diff --git a/drivers/ras/arm64/ras-core.c b/drivers/ras/arm64/ras-core.c
index babb390b795f..9fbc98e89f15 100644
--- a/drivers/ras/arm64/ras-core.c
+++ b/drivers/ras/arm64/ras-core.c
@@ -169,9 +169,18 @@ static void ras_proc_record(struct ras_record *record, void *data)
 	if (regs.err_status & ERR_STATUS_MV) {
 		regs.err_misc[0] = record_read(record, ERXMISC0);
 		regs.err_misc[1] = record_read(record, ERXMISC1);
+		if (record->node->version >= ID_AA64PFR0_EL1_RAS_V1P1) {
+			regs.err_misc[2] = record_read(record, ERXMISC2);
+			regs.err_misc[3] = record_read(record, ERXMISC3);
+		}
+
 		if (record->node->flags & AEST_XFACE_FLAG_CLEAR_MISC) {
 			record_write(record, ERXMISC0, 0);
 			record_write(record, ERXMISC1, 0);
+			if (record->node->version >= ID_AA64PFR0_EL1_RAS_V1P1) {
+				record_write(record, ERXMISC2, 0);
+				record_write(record, ERXMISC3, 0);
+			}
 		}
 	}
 
@@ -358,6 +367,21 @@ static void ras_enable_irq(struct ras_record *record)
 	record_write(record, ERXCTLR, err_ctlr);
 }
 
+static int get_ras_node_ver(struct ras_node *node)
+{
+	u32 reg;
+
+	if (node->type == ACPI_AEST_GIC_ERROR_NODE) {
+		if (!node->base)
+			return 0;
+
+		reg = readl_relaxed(node->base + GIC_ERRDEVARCH);
+		return FIELD_GET(ERRDEVARCH_REV, reg);
+	}
+
+	return FIELD_GET(ID_AA64PFR0_EL1_RAS_MASK, read_cpuid(ID_AA64PFR0_EL1));
+}
+
 static int ras_init_record(struct ras_record *record, int i, struct ras_node *node)
 {
 	record->name = devm_kasprintf(node->dev, GFP_KERNEL, "record%d", i);
@@ -665,6 +689,7 @@ static struct ras_node *ras_init_node(struct platform_device *pdev)
 	if (!node->name)
 		return ERR_PTR(-ENOMEM);
 
+	node->version = get_ras_node_ver(node);
 	node->records = devm_kcalloc(node->dev, node->record_count,
 				     sizeof(struct ras_record), GFP_KERNEL);
 	if (!node->records)
diff --git a/drivers/ras/arm64/ras.h b/drivers/ras/arm64/ras.h
index 11c6def1e4bf..03d1b498acc4 100644
--- a/drivers/ras/arm64/ras.h
+++ b/drivers/ras/arm64/ras.h
@@ -58,6 +58,8 @@
 #define ERXPFGCTL		0x808
 #define ERXPFGCDN		0x810
 
+#define GIC_ERRDEVARCH		0xFFBC
+
 struct ras_access {
 	u64 (*read)(void __iomem *base, u32 offset);
 	void (*write)(void __iomem *base, u32 offset, u64 val);
@@ -148,6 +150,7 @@ struct ras_node {
 	u32 record_count;
 	u32 record_index;
 	u32 flags;
+	int version;
 
 	u8 type;
 	u8 access_type;
-- 
2.51.2.612.gdc70283dfc