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From: Ruidong Tian <tianruidong@linux.alibaba.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Hanjun Guo <guohanjun@huawei.com>,
	Sudeep Holla <sudeep.holla@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Tony Luck <tony.luck@intel.com>,
	Borislav Petkov <bp@alien8.de>, Thomas Gleixner <tglx@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Umang Chheda <umang.chheda@oss.qualcomm.com>
Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
	zhuo.song@linux.alibaba.com, oliver.yang@linux.alibaba.com,
	Ruidong Tian <tianruidong@linux.alibaba.com>
Subject: [PATCH v7 16/16] trace, ras: add ARM RAS extension trace event
Date: Tue,  2 Jun 2026 15:15:39 +0800	[thread overview]
Message-ID: <20260602071540.3711528-17-tianruidong@linux.alibaba.com> (raw)
In-Reply-To: <20260602071540.3711528-1-tianruidong@linux.alibaba.com>

Add a trace event for hardware errors reported by the ARMv8
RAS extension registers. userspace app can monitor this
trace event and decode error information.

Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
---
 drivers/ras/arm64/ras-core.c |  5 +++
 drivers/ras/ras.c            |  3 ++
 include/ras/ras_event.h      | 79 ++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)

diff --git a/drivers/ras/arm64/ras-core.c b/drivers/ras/arm64/ras-core.c
index 82e8bb10870f..3f4e7866bb75 100644
--- a/drivers/ras/arm64/ras-core.c
+++ b/drivers/ras/arm64/ras-core.c
@@ -11,6 +11,7 @@
 #include <linux/panic.h>
 #include <linux/platform_device.h>
 #include <linux/ras.h>
+#include <ras/ras_event.h>
 
 #include "ras.h"
 
@@ -181,6 +182,10 @@ static void ras_do_proc(struct ras_record *record, struct ras_ext_regs *regs)
 		}
 	}
 
+	trace_arm_ras_ext_event(record->node->type, record->index, regs,
+				record->node->specific_data, record->node->specific_data_size,
+				record->vendor_data, record->vendor_data_size);
+
 	atomic_notifier_call_chain(&ras_decoder_chain, 0, record);
 
 	if (status & ERR_STATUS_CE)
diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c
index 03df3db62334..c8858b745021 100644
--- a/drivers/ras/ras.c
+++ b/drivers/ras/ras.c
@@ -115,6 +115,9 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(extlog_mem_event);
 EXPORT_TRACEPOINT_SYMBOL_GPL(mc_event);
 EXPORT_TRACEPOINT_SYMBOL_GPL(non_standard_event);
 EXPORT_TRACEPOINT_SYMBOL_GPL(arm_event);
+#ifdef CONFIG_ARM64_RAS_EXTN
+EXPORT_TRACEPOINT_SYMBOL_GPL(arm_ras_ext_event);
+#endif
 
 static int __init parse_ras_param(char *str)
 {
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
index fdb785fa4613..346c868f3cf7 100644
--- a/include/ras/ras_event.h
+++ b/include/ras/ras_event.h
@@ -381,6 +381,85 @@ TRACE_EVENT(aer_event,
 			"Not available")
 );
 #endif /* CONFIG_PCIEAER */
+
+/*
+ * ARM RAS Extension Events Report
+ *
+ * This event is generated when an error reported by the ARM RAS extension
+ * hardware is detected.
+ */
+
+#ifdef CONFIG_ARM64_RAS_EXTN
+#include <asm/ras.h>
+TRACE_EVENT(arm_ras_ext_event,
+
+	TP_PROTO(const u8 type,
+		 const u32 index,
+		 struct ras_ext_regs *regs,
+		 const u8 *specific_data,
+		 const u32 specific_data_size,
+		 const u8 *vendor_data,
+		 const u32 vendor_data_size),
+
+	TP_ARGS(type, index, regs, specific_data, specific_data_size,
+		vendor_data, vendor_data_size),
+
+	TP_STRUCT__entry(
+		__field(u8,  type)
+		__field(u32, index)
+		__field(u64, err_fr)
+		__field(u64, err_ctlr)
+		__field(u64, err_status)
+		__field(u64, err_addr)
+		__field(u64, err_misc0)
+		__field(u64, err_misc1)
+		__field(u64, err_misc2)
+		__field(u64, err_misc3)
+		__field(u32, specific_data_size)
+		__dynamic_array(u8, specific_data, specific_data_size)
+		__field(u32, vendor_data_size)
+		__dynamic_array(u8, vendor_data, vendor_data_size)
+	),
+
+	TP_fast_assign(
+		__entry->type = type;
+		__entry->index = index;
+		__entry->err_fr = regs->err_fr;
+		__entry->err_ctlr = regs->err_ctlr;
+		__entry->err_status = regs->err_status;
+		__entry->err_addr = regs->err_addr;
+		__entry->err_misc0 = regs->err_misc[0];
+		__entry->err_misc1 = regs->err_misc[1];
+		__entry->err_misc2 = regs->err_misc[2];
+		__entry->err_misc3 = regs->err_misc[3];
+		__entry->specific_data_size = specific_data_size;
+		memcpy(__get_dynamic_array(specific_data), specific_data, specific_data_size);
+		__entry->vendor_data_size = vendor_data_size;
+		memcpy(__get_dynamic_array(vendor_data), vendor_data, vendor_data_size);
+	),
+
+	TP_printk("type: %d; index: %d; "
+		  "ERR_FR: %llx; ERR_CTLR: %llx; ERR_STATUS: %llx; "
+		  "ERR_ADDR: %llx; ERR_MISC0: %llx; ERR_MISC1: %llx; "
+		  "ERR_MISC2: %llx; ERR_MISC3: %llx; "
+		  "specific data len:%d; specific data:%s; "
+		  "vendor data len:%d; vendor data:%s",
+		  __entry->type,
+		  __entry->index,
+		  __entry->err_fr,
+		  __entry->err_ctlr,
+		  __entry->err_status,
+		  __entry->err_addr,
+		  __entry->err_misc0,
+		  __entry->err_misc1,
+		  __entry->err_misc2,
+		  __entry->err_misc3,
+		  __entry->specific_data_size,
+		  __print_hex(__get_dynamic_array(specific_data), __entry->specific_data_size),
+		  __entry->vendor_data_size,
+		  __print_hex(__get_dynamic_array(vendor_data), __entry->vendor_data_size))
+);
+#endif /* CONFIG_ARM64_RAS_EXTN */
 #endif /* _TRACE_HW_EVENT_MC_H */
 
 /* This part must be outside protection */
-- 
2.51.2.612.gdc70283dfc



  parent reply	other threads:[~2026-06-02  7:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-02  7:15 [PATCH v7 00/16] Support Armv8 RAS Extensions for Kernel-first error handling Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 01/16] ACPI/AEST: Register arm64_ras platform devices from AEST v2 Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 02/16] arm64: ras: Add probe/remove for arm64_ras driver Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 03/16] arm64: ras: Unify the read/write interface for system and MMIO registers Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 04/16] arm64: ras: Support RAS Common Fault Injection Model Extension Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 05/16] arm64: ras: Plumb AEST interrupts as platform IRQ resources Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 06/16] arm64: ras: Enable error reporting Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 07/16] arm64: ras: Add error record processing and interrupt handling Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 08/16] arm64: ras: Handle memory failure for uncorrectable errors Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 09/16] arm64: ras: Probe RAS architecture version Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 10/16] arm64: ras: Support CE threshold of error record Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 11/16] arm64: ras: Add RAS decode notifier chain Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 12/16] arm64: ras: Expose config abi through debugfs Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 13/16] arm64: ras: Introduce ras inject interface Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 14/16] arm64: ras: support vendor node CMN700 Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 15/16] arm64: ras: Introduce ras error storm mitigation Ruidong Tian
2026-06-02  7:15 ` Ruidong Tian [this message]
2026-07-08  2:41 ` [PATCH v7 00/16] Support Armv8 RAS Extensions for Kernel-first error handling Borislav Petkov
2026-07-08 17:22   ` Catalin Marinas

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