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From: Ruidong Tian <tianruidong@linux.alibaba.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Hanjun Guo <guohanjun@huawei.com>,
	Sudeep Holla <sudeep.holla@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Tony Luck <tony.luck@intel.com>,
	Borislav Petkov <bp@alien8.de>, Thomas Gleixner <tglx@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Umang Chheda <umang.chheda@oss.qualcomm.com>
Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org,
	zhuo.song@linux.alibaba.com, oliver.yang@linux.alibaba.com,
	Ruidong Tian <tianruidong@linux.alibaba.com>
Subject: [PATCH v7 04/16] arm64: ras: Support RAS Common Fault Injection Model Extension
Date: Tue,  2 Jun 2026 15:15:27 +0800	[thread overview]
Message-ID: <20260602071540.3711528-5-tianruidong@linux.alibaba.com> (raw)
In-Reply-To: <20260602071540.3711528-1-tianruidong@linux.alibaba.com>

Add inject register descripted in Common Fault Injection Model
Extension.

Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
---
 drivers/acpi/arm64/aest.c    |  4 +++-
 drivers/ras/arm64/ras-core.c | 27 +++++++++++++++++++++++++--
 drivers/ras/arm64/ras.h      | 10 ++++++++++
 3 files changed, 38 insertions(+), 3 deletions(-)

diff --git a/drivers/acpi/arm64/aest.c b/drivers/acpi/arm64/aest.c
index 3a813fe7047c..868013498abb 100644
--- a/drivers/acpi/arm64/aest.c
+++ b/drivers/acpi/arm64/aest.c
@@ -110,6 +110,8 @@ aest_init_node_props(struct acpi_aest_hdr *hdr, struct property_entry *props,
 						     group_len);
 	props[(*p)++] = PROPERTY_ENTRY_U64("arm,error-group-base",
 					   common->error_group_register_base);
+	props[(*p)++] = PROPERTY_ENTRY_U64("arm,fault-inject-base",
+					   common->fault_inject_register_base);
 
 	len = hdr->node_interface_offset - hdr->node_specific_offset;
 	props[(*p)++] =
@@ -122,7 +124,7 @@ aest_init_node_props(struct acpi_aest_hdr *hdr, struct property_entry *props,
 static int __init
 aest_create_node_fwnode(struct acpi_aest_hdr *hdr, struct platform_device *pdev)
 {
-	struct property_entry props[11] = { };
+	struct property_entry props[12] = { };
 	int p = 0;
 	int ret;
 
diff --git a/drivers/ras/arm64/ras-core.c b/drivers/ras/arm64/ras-core.c
index 47ab78cc88d7..1dd471376449 100644
--- a/drivers/ras/arm64/ras-core.c
+++ b/drivers/ras/arm64/ras-core.c
@@ -139,6 +139,23 @@ static int ras_node_set_errgsr(struct ras_node *node, phys_addr_t base)
 	return 0;
 }
 
+static int ras_node_set_inj_base(struct ras_node *node, phys_addr_t base)
+{
+	phys_addr_t inj_base = 0;
+	int ret = 0;
+
+	if (!(node->flags & AEST_XFACE_FLAG_FAULT_INJECT))
+		return 0;
+
+	ret = device_property_read_u64(node->dev, "arm,fault-inject-base",
+				       &inj_base);
+	if (ret || !inj_base)
+		return -EINVAL;
+
+	node->inj = inj_base - base + node->base;
+	return 0;
+}
+
 static struct ras_node *ras_init_node(struct platform_device *pdev)
 {
 	int i, ret = 0;
@@ -204,6 +221,11 @@ static struct ras_node *ras_init_node(struct platform_device *pdev)
 		ret = ras_node_set_errgsr(node, mem->start);
 		if (ret)
 			return ERR_PTR(ret);
+		ret = ras_node_set_inj_base(node, mem->start);
+		if (ret)
+			return ERR_PTR(ret);
+	} else if (node->access_type == ACPI_AEST_NODE_MEMORY_MAPPED) {
+		return ERR_PTR(-EINVAL);
 	}
 
 	node->name = alloc_ras_node_name(node);
@@ -221,8 +243,9 @@ static struct ras_node *ras_init_node(struct platform_device *pdev)
 		if (ret)
 			return ERR_PTR(ret);
 	}
-	ras_node_dbg(node, "base: %llx, access_type: %s\n",
-		     node->addr, node->access_type ? "MMIO" : "Register");
+	ras_node_dbg(node, "base: %llx, access_type: %s, %s inject\n",
+		     node->addr, node->access_type ? "MMIO" : "Register",
+		     node->flags & AEST_XFACE_FLAG_FAULT_INJECT ? "with" : "without");
 	return node;
 }
 
diff --git a/drivers/ras/arm64/ras.h b/drivers/ras/arm64/ras.h
index 94ffeb83b251..da03593e5f7f 100644
--- a/drivers/ras/arm64/ras.h
+++ b/drivers/ras/arm64/ras.h
@@ -54,6 +54,9 @@
 #define ERXMISC1		0x28
 #define ERXMISC2		0x30
 #define ERXMISC3		0x38
+#define ERXPFGF			0x800
+#define ERXPFGCTL		0x808
+#define ERXPFGCDN		0x810
 
 struct ras_access {
 	u64 (*read)(void __iomem *base, u32 offset);
@@ -85,6 +88,7 @@ struct ras_node {
 
 	void __iomem *base;
 	void __iomem *errgsr;
+	void __iomem *inj;
 	phys_addr_t addr;
 
 	u8 *specific_data;
@@ -147,6 +151,9 @@ static inline u64 ras_sysreg_read(void __iomem *base __always_unused, u32 offset
 	CASE_READ(res, ERXMISC1)
 	CASE_READ(res, ERXMISC2)
 	CASE_READ(res, ERXMISC3)
+	CASE_READ(res, ERXPFGF)
+	CASE_READ(res, ERXPFGCTL)
+	CASE_READ(res, ERXPFGCDN)
 	default:
 		res = 0;
 	}
@@ -164,6 +171,9 @@ static inline void ras_sysreg_write(void __iomem *base __always_unused, u32 offs
 	CASE_WRITE(val, ERXMISC1)
 	CASE_WRITE(val, ERXMISC2)
 	CASE_WRITE(val, ERXMISC3)
+	CASE_WRITE(val, ERXPFGF)
+	CASE_WRITE(val, ERXPFGCTL)
+	CASE_WRITE(val, ERXPFGCDN)
 	default:
 		return;
 	}
-- 
2.51.2.612.gdc70283dfc



  parent reply	other threads:[~2026-06-02  7:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-02  7:15 [PATCH v7 00/16] Support Armv8 RAS Extensions for Kernel-first error handling Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 01/16] ACPI/AEST: Register arm64_ras platform devices from AEST v2 Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 02/16] arm64: ras: Add probe/remove for arm64_ras driver Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 03/16] arm64: ras: Unify the read/write interface for system and MMIO registers Ruidong Tian
2026-06-02  7:15 ` Ruidong Tian [this message]
2026-06-02  7:15 ` [PATCH v7 05/16] arm64: ras: Plumb AEST interrupts as platform IRQ resources Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 06/16] arm64: ras: Enable error reporting Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 07/16] arm64: ras: Add error record processing and interrupt handling Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 08/16] arm64: ras: Handle memory failure for uncorrectable errors Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 09/16] arm64: ras: Probe RAS architecture version Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 10/16] arm64: ras: Support CE threshold of error record Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 11/16] arm64: ras: Add RAS decode notifier chain Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 12/16] arm64: ras: Expose config abi through debugfs Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 13/16] arm64: ras: Introduce ras inject interface Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 14/16] arm64: ras: support vendor node CMN700 Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 15/16] arm64: ras: Introduce ras error storm mitigation Ruidong Tian
2026-06-02  7:15 ` [PATCH v7 16/16] trace, ras: add ARM RAS extension trace event Ruidong Tian
2026-07-08  2:41 ` [PATCH v7 00/16] Support Armv8 RAS Extensions for Kernel-first error handling Borislav Petkov
2026-07-08 17:22   ` Catalin Marinas

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