From: Joey Lu <a0987203069@gmail.com>
To: zhengxingda@iscas.ac.cn, maarten.lankhorst@linux.intel.com,
mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com,
simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Joey Lu <a0987203069@gmail.com>
Subject: [PATCH v4 5/6] drm/verisilicon: add DCUltraLite chip identity to HWDB
Date: Mon, 15 Jun 2026 14:50:02 +0800 [thread overview]
Message-ID: <20260615065003.76661-6-a0987203069@gmail.com> (raw)
In-Reply-To: <20260615065003.76661-1-a0987203069@gmail.com>
Register the Nuvoton MA35D1 DCUltraLite chip identity in
vs_chip_identities[]:
model = 0x0 (DCUltraLite; Verisilicon uses 0 for this IP)
revision = 0x5560
customer_id = 0x305
generation = VSDC_GEN_DC8000
display_count = 1
max_cursor_size = 32
Placing this entry last makes it the gate that enables MA35D1 hardware
recognition only after all the supporting ops and DT binding changes are
in place.
Signed-off-by: Joey Lu <a0987203069@gmail.com>
---
drivers/gpu/drm/verisilicon/vs_hwdb.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/verisilicon/vs_hwdb.c b/drivers/gpu/drm/verisilicon/vs_hwdb.c
index 91524d16f778..7d630a667a3f 100644
--- a/drivers/gpu/drm/verisilicon/vs_hwdb.c
+++ b/drivers/gpu/drm/verisilicon/vs_hwdb.c
@@ -129,6 +129,16 @@ static struct vs_chip_identity vs_chip_identities[] = {
.max_cursor_size = 64,
.formats = &vs_formats_no_yuv444,
},
+ {
+ .model = 0x0, /* DCUltraLite */
+ .revision = 0x5560,
+ .customer_id = 0x305,
+
+ .generation = VSDC_GEN_DC8000,
+ .display_count = 1,
+ .max_cursor_size = 32,
+ .formats = &vs_formats_no_yuv444,
+ },
};
int vs_fill_chip_identity(struct regmap *regs,
--
2.43.0
next prev parent reply other threads:[~2026-06-15 6:50 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-15 6:49 [PATCH v4 0/6] drm/verisilicon: add Nuvoton MA35D1 DCU Lite support Joey Lu
2026-06-15 6:49 ` [PATCH v4 1/6] dt-bindings: display: verisilicon,dc: generalize for single-output variants Joey Lu
2026-06-15 8:19 ` [PATCH v4 1/6] dt-bindings: display: verisilicon, dc: " Icenowy Zheng
2026-06-15 6:49 ` [PATCH v4 2/6] drm/verisilicon: add register-level macros for DC8000 Joey Lu
2026-06-15 8:24 ` Icenowy Zheng
2026-06-15 6:50 ` [PATCH v4 3/6] drm/verisilicon: introduce per-variant hardware ops table Joey Lu
2026-06-15 8:37 ` Icenowy Zheng
2026-06-15 6:50 ` [PATCH v4 4/6] drm/verisilicon: add DC8000 (DCUltraLite) display controller support Joey Lu
2026-06-15 8:51 ` Icenowy Zheng
2026-06-15 6:50 ` Joey Lu [this message]
2026-06-15 8:57 ` [PATCH v4 5/6] drm/verisilicon: add DCUltraLite chip identity to HWDB Icenowy Zheng
2026-06-15 6:50 ` [PATCH v4 6/6] drm/verisilicon: extend Kconfig to support ARCH_MA35 platforms Joey Lu
2026-06-15 8:58 ` Icenowy Zheng
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