From: Jiaxing Hu <gahing@gahingwoo.com>
To: andrew@lunn.ch
Cc: heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO
Date: Fri, 17 Jul 2026 10:51:37 +1200 [thread overview]
Message-ID: <20260716225137.2544880-1-gahing@gahingwoo.com> (raw)
In-Reply-To: <e99f752a-da1f-498d-9305-089b9d736e70@lunn.ch>
> Try setting phy-mode to rgmii-id, and these delays to 0, or removing
> them.
You are right. The PCB does not use long clock lines, so rgmii-id is the
correct description and the delays should not be in the DT. Most rk3576
boards upstream already use rgmii-id with no tx_delay/rx_delay.
I will switch to rgmii-id, let the YT8531 add both delays internally, drop
tx_delay/rx_delay, and re-test the 1000 Mbit/s link on the board before I
send v4.
Thanks,
Jiaxing
next prev parent reply other threads:[~2026-07-16 23:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 9:50 [PATCH v3 0/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO Jiaxing Hu
2026-07-16 9:51 ` [PATCH v3 1/2] dt-bindings: arm: " Jiaxing Hu
2026-07-16 9:51 ` [PATCH v3 2/2] arm64: dts: " Jiaxing Hu
2026-07-16 18:42 ` Andrew Lunn
2026-07-16 22:51 ` Jiaxing Hu [this message]
2026-07-16 18:35 ` [PATCH v3 0/2] " Heiko Stuebner
2026-07-16 22:51 ` Jiaxing Hu
-- strict thread matches above, loose matches on Subject: below --
2026-07-16 8:17 Jiaxing Hu
2026-07-16 8:17 ` [PATCH v3 1/2] dt-bindings: arm: " Jiaxing Hu
2026-07-16 8:17 ` [PATCH v3 2/2] arm64: dts: " Jiaxing Hu
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