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* [PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a
@ 2026-08-28 23:40 Johan Jonker via B4 Relay
  2026-08-29 21:59 ` Heiko Stübner
  0 siblings, 1 reply; 2+ messages in thread
From: Johan Jonker via B4 Relay @ 2026-08-28 23:40 UTC (permalink / raw)
  To: Russell King, Heiko Stuebner
  Cc: linux-arm-kernel, linux-rockchip, linux-kernel,
	Hüseyin BIYIK, Johan Jonker

From: Hüseyin BIYIK <boogiepop@gmx.com>

RK3066a CPU1 fails to come online. Fix by using
a similar mailbox construction as in use with
other Rockchip SoCs.

Signed-off-by: Hüseyin BIYIK <boogiepop@gmx.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 arch/arm/mach-rockchip/platsmp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index f659d894bfae..d7d080c29f3c 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
 	if (ret < 0)
 		return ret;
 
-	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
+	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
+	    of_machine_is_compatible("rockchip,rk3066a")) {
 		/*
 		 * We communicate with the bootrom to active the cpus other
 		 * than cpu0, after a blob of initialize code, they will

---
base-commit: 2709dd5ae32f0828f386327c76bba9f39f63a1c6
change-id: 20260829-cpu-c518bde9b473

Best regards,
-- 
Johan Jonker <jbx6244@gmail.com>




^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a
  2026-08-28 23:40 [PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a Johan Jonker via B4 Relay
@ 2026-08-29 21:59 ` Heiko Stübner
  0 siblings, 0 replies; 2+ messages in thread
From: Heiko Stübner @ 2026-08-29 21:59 UTC (permalink / raw)
  To: Russell King, jbx6244
  Cc: linux-arm-kernel, linux-rockchip, linux-kernel,
	Hüseyin BIYIK, Johan Jonker

Am Samstag, 29. August 2026, 01:40:57 Mitteleuropäische Sommerzeit schrieb Johan Jonker via B4 Relay:
> From: Hüseyin BIYIK <boogiepop@gmx.com>
> 
> RK3066a CPU1 fails to come online. Fix by using
> a similar mailbox construction as in use with
> other Rockchip SoCs.

"RK3066 CPU1 fails to come online with recent kernels....[rest]" or so
and also please use the line length up a resonable length like around 70
to 75 characters.

Also, is it known, why that happens - i.e. what changed?

> Signed-off-by: Hüseyin BIYIK <boogiepop@gmx.com>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>  arch/arm/mach-rockchip/platsmp.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> index f659d894bfae..d7d080c29f3c 100644
> --- a/arch/arm/mach-rockchip/platsmp.c
> +++ b/arch/arm/mach-rockchip/platsmp.c
> @@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
>  	if (ret < 0)
>  		return ret;
>  
> -	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
> +	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
> +	    of_machine_is_compatible("rockchip,rk3066a")) {
>  		/*
>  		 * We communicate with the bootrom to active the cpus other
>  		 * than cpu0, after a blob of initialize code, they will

isn't now the only user of the old system the RK3188?

With both rk3066 and rk3188 from a similar time, I'd assume both could
be switch and thus the the now unused code removed?

I've never thought to look into that ... need to find my RK3188 board :-)


Heiko




^ permalink raw reply	[flat|nested] 2+ messages in thread

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2026-08-28 23:40 [PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a Johan Jonker via B4 Relay
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