[PATCH] arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart

[PATCH] arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart

[Sherry Sun]

The commit 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But miss
update imx8qm-ss-dma.dtsi.

The commit 5a8e9b022e569 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
dma-names") just simple add dma-names as binding doc requirement.

Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines for
the FSL_EDMA_RX flag.

Fixes: 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel order")
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index 5f24850bf322..974e193f8dcb 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -172,25 +172,25 @@ &flexcan3 {
 
 &lpuart0 {
 	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-	dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
+	dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
 	dma-names = "rx","tx";
 };
 
 &lpuart1 {
 	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-	dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
+	dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
 	dma-names = "rx","tx";
 };
 
 &lpuart2 {
 	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-	dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
+	dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
 	dma-names = "rx","tx";
 };
 
 &lpuart3 {
 	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-	dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
+	dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
 	dma-names = "rx","tx";
 };
 
-- 
2.34.1

Re: [PATCH] arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart

[Alexander Stein]

Hi,

Am Dienstag, 2. Dezember 2025, 12:16:38 CET schrieb Sherry Sun:
> The commit 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
> order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But miss
> update imx8qm-ss-dma.dtsi.
> 
> The commit 5a8e9b022e569 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
> dma-names") just simple add dma-names as binding doc requirement.
> 
> Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines for
> the FSL_EDMA_RX flag.
> 
> Fixes: 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel order")

I'm wondering if this is actually a fix for 5a8e9b022e569 ("arm64: dts:
imx8qm-ss-dma: Pass lpuart dma-names") instead. 616effc0272b5 just
focuses on the common parts. But I don't have a strong opinion here.

Thanks and best regards,
Alexander

> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> index 5f24850bf322..974e193f8dcb 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> @@ -172,25 +172,25 @@ &flexcan3 {
>  
>  &lpuart0 {
>  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> -	dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
> +	dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
>  	dma-names = "rx","tx";
>  };
>  
>  &lpuart1 {
>  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> -	dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
> +	dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
>  	dma-names = "rx","tx";
>  };
>  
>  &lpuart2 {
>  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> -	dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
> +	dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
>  	dma-names = "rx","tx";
>  };
>  
>  &lpuart3 {
>  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> -	dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
> +	dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
>  	dma-names = "rx","tx";
>  };
>  
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

Re: [PATCH] arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart

[Frank Li]

On Tue, Dec 02, 2025 at 12:48:15PM +0100, Alexander Stein wrote:
> Hi,
>
> Am Dienstag, 2. Dezember 2025, 12:16:38 CET schrieb Sherry Sun:
> > The commit 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
> > order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But miss
> > update imx8qm-ss-dma.dtsi.
> >
> > The commit 5a8e9b022e569 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
> > dma-names") just simple add dma-names as binding doc requirement.
> >
> > Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines for
> > the FSL_EDMA_RX flag.
> >
> > Fixes: 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel order")
>
> I'm wondering if this is actually a fix for 5a8e9b022e569 ("arm64: dts:
> imx8qm-ss-dma: Pass lpuart dma-names") instead. 616effc0272b5 just
> focuses on the common parts. But I don't have a strong opinion here.

Yes, it should be 5a8e9b022e569.

Frank
>
> Thanks and best regards,
> Alexander
>
> > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > index 5f24850bf322..974e193f8dcb 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > @@ -172,25 +172,25 @@ &flexcan3 {
> >
> >  &lpuart0 {
> >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > -	dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
> > +	dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
> >  	dma-names = "rx","tx";
> >  };
> >
> >  &lpuart1 {
> >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > -	dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
> > +	dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
> >  	dma-names = "rx","tx";
> >  };
> >
> >  &lpuart2 {
> >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > -	dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
> > +	dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
> >  	dma-names = "rx","tx";
> >  };
> >
> >  &lpuart3 {
> >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > -	dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
> > +	dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
> >  	dma-names = "rx","tx";
> >  };
> >
> >
>
>
> --
> TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> Amtsgericht München, HRB 105018
> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> http://www.tq-group.com/
>
>

RE: [PATCH] arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart

[Sherry Sun]

> -----Original Message-----
> From: Frank Li <frank.li@nxp.com>
> Sent: Tuesday, December 2, 2025 10:49 PM
> To: Alexander Stein <alexander.stein@ew.tq-group.com>
> Cc: robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> shawnguo@kernel.org; s.hauer@pengutronix.de; festevam@gmail.com;
> Sherry Sun <sherry.sun@nxp.com>; devicetree@vger.kernel.org;
> kernel@pengutronix.de; linux-kernel@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH] arm64: dts: imx8qm-ss-dma: correct the dma channels
> of lpuart
> 
> On Tue, Dec 02, 2025 at 12:48:15PM +0100, Alexander Stein wrote:
> > Hi,
> >
> > Am Dienstag, 2. Dezember 2025, 12:16:38 CET schrieb Sherry Sun:
> > > The commit 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
> > > order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But
> > > miss update imx8qm-ss-dma.dtsi.
> > >
> > > The commit 5a8e9b022e569 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
> > > dma-names") just simple add dma-names as binding doc requirement.
> > >
> > > Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines
> > > for the FSL_EDMA_RX flag.
> > >
> > > Fixes: 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
> > > order")
> >
> > I'm wondering if this is actually a fix for 5a8e9b022e569 ("arm64: dts:
> > imx8qm-ss-dma: Pass lpuart dma-names") instead. 616effc0272b5 just
> > focuses on the common parts. But I don't have a strong opinion here.
> 
> Yes, it should be 5a8e9b022e569.

Sure, will update this in V2.

Best Regards
Sherry
> 
> Frank
> >
> > Thanks and best regards,
> > Alexander
> >
> > > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8 ++++----
> > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > > index 5f24850bf322..974e193f8dcb 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
> > > @@ -172,25 +172,25 @@ &flexcan3 {
> > >
> > >  &lpuart0 {
> > >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > > -	dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
> > > +	dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
> > >  	dma-names = "rx","tx";
> > >  };
> > >
> > >  &lpuart1 {
> > >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > > -	dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
> > > +	dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
> > >  	dma-names = "rx","tx";
> > >  };
> > >
> > >  &lpuart2 {
> > >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > > -	dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
> > > +	dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
> > >  	dma-names = "rx","tx";
> > >  };
> > >
> > >  &lpuart3 {
> > >  	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
> > > -	dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
> > > +	dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
> > >  	dma-names = "rx","tx";
> > >  };
> > >
> > >
> >
> >
> > --
> > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> > Amtsgericht München, HRB 105018
> > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> > http://www.tq-group.com/
> >
> >