* [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register
@ 2025-09-04 5:09 Harikrishna Shenoy
2025-09-04 5:43 ` Devarsh Thakkar
2025-09-04 6:22 ` Kumar, Udit
0 siblings, 2 replies; 3+ messages in thread
From: Harikrishna Shenoy @ 2025-09-04 5:09 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, r-ravikumar,
tomi.valkeinen, a-bhatia1, linux-arm-kernel, devicetree,
linux-kernel, aradhya.bhatia, u-kumar1, devarsht, s-jain1
Cc: h-shenoy
Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
TRM Table 2-1 MAIN Domain Memory Map.
Link: https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM
Fixes: 92c996f4ceab ("arm64: dts: ti: k3-j721e-*: add DP & DP PHY")
Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index ab3666ff4297..3fa7537d5414 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1863,7 +1863,7 @@ mhdp: dp-bridge@a000000 {
* the PHY driver.
*/
reg = <0x00 0x0a000000 0x00 0x030a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
- <0x00 0x04f40000 0x00 0x20>; /* DSS_EDP0_INTG_CFG_VP */
+ <0x00 0x04f40000 0x00 0x100>; /* DSS_EDP0_INTG_CFG_VP */
reg-names = "mhdptx", "j721e-intg";
clocks = <&k3_clks 151 36>;
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register
2025-09-04 5:09 [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register Harikrishna Shenoy
@ 2025-09-04 5:43 ` Devarsh Thakkar
2025-09-04 6:22 ` Kumar, Udit
1 sibling, 0 replies; 3+ messages in thread
From: Devarsh Thakkar @ 2025-09-04 5:43 UTC (permalink / raw)
To: Harikrishna Shenoy, nm, vigneshr, kristo, robh, krzk+dt, conor+dt,
r-ravikumar, tomi.valkeinen, a-bhatia1, linux-arm-kernel,
devicetree, linux-kernel, aradhya.bhatia, u-kumar1, s-jain1
On 04/09/25 10:39, Harikrishna Shenoy wrote:
> Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
> TRM Table 2-1 MAIN Domain Memory Map.
> Link: https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM
>
> Fixes: 92c996f4ceab ("arm64: dts: ti: k3-j721e-*: add DP & DP PHY")
>
Remove this blank line. With this,
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
Regards
Devarsh
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index ab3666ff4297..3fa7537d5414 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1863,7 +1863,7 @@ mhdp: dp-bridge@a000000 {
> * the PHY driver.
> */
> reg = <0x00 0x0a000000 0x00 0x030a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
> - <0x00 0x04f40000 0x00 0x20>; /* DSS_EDP0_INTG_CFG_VP */
> + <0x00 0x04f40000 0x00 0x100>; /* DSS_EDP0_INTG_CFG_VP */
> reg-names = "mhdptx", "j721e-intg";
>
> clocks = <&k3_clks 151 36>;
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register
2025-09-04 5:09 [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register Harikrishna Shenoy
2025-09-04 5:43 ` Devarsh Thakkar
@ 2025-09-04 6:22 ` Kumar, Udit
1 sibling, 0 replies; 3+ messages in thread
From: Kumar, Udit @ 2025-09-04 6:22 UTC (permalink / raw)
To: Harikrishna Shenoy, nm, vigneshr, kristo, robh, krzk+dt, conor+dt,
r-ravikumar, tomi.valkeinen, a-bhatia1, linux-arm-kernel,
devicetree, linux-kernel, aradhya.bhatia, devarsht, s-jain1,
u-kumar1
On 9/4/2025 10:39 AM, Harikrishna Shenoy wrote:
> Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
> TRM Table 2-1 MAIN Domain Memory Map.
> Link: https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM
>
> Fixes: 92c996f4ceab ("arm64: dts: ti: k3-j721e-*: add DP & DP PHY")
>
> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index ab3666ff4297..3fa7537d5414 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1863,7 +1863,7 @@ mhdp: dp-bridge@a000000 {
> * the PHY driver.
> */
> reg = <0x00 0x0a000000 0x00 0x030a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
> - <0x00 0x04f40000 0x00 0x20>; /* DSS_EDP0_INTG_CFG_VP */
> + <0x00 0x04f40000 0x00 0x100>; /* DSS_EDP0_INTG_CFG_VP */
Thanks for catching this
I think other SOC
"arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi" needs similar Fix
> reg-names = "mhdptx", "j721e-intg";
>
> clocks = <&k3_clks 151 36>;
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-09-04 5:09 [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register Harikrishna Shenoy
2025-09-04 5:43 ` Devarsh Thakkar
2025-09-04 6:22 ` Kumar, Udit
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