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* [PATCH] ARM: rockchip: keep reset control around
@ 2026-05-21 21:09 Heiko Stuebner
  2026-05-21 21:13 ` Heiko Stuebner
  2026-05-22  7:20 ` Heiko Stuebner
  0 siblings, 2 replies; 5+ messages in thread
From: Heiko Stuebner @ 2026-05-21 21:09 UTC (permalink / raw)
  To: heiko; +Cc: linux-arm-kernel, linux-rockchip, Philipp Zabel, Steven Price

Do not put the reset control, retain exclusive control over it.
After turning on a CPU, the corresponding reset line must stay
deasserted.

This also avoids calling reset_control_put() before workqueues
are operational.

Fixes: 78ebbff6d1a0 ("reset: handle removing supplier before consumers")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Steven Price <steven.price@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/mach-rockchip/platsmp.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index f432d22bfed8..f659d894bfae 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -34,6 +34,7 @@ static int ncores;
 
 static struct regmap *pmu;
 static int has_pmu = true;
+static struct reset_control *cpu_rstc[4];
 
 static int pmu_power_domain_is_on(int pd)
 {
@@ -64,9 +65,11 @@ static struct reset_control *rockchip_get_core_reset(int cpu)
 static int pmu_set_power_domain(int pd, bool on)
 {
 	u32 val = (on) ? 0 : BIT(pd);
-	struct reset_control *rstc = rockchip_get_core_reset(pd);
+	struct reset_control *rstc;
 	int ret;
 
+	rstc = pd < ARRAY_SIZE(cpu_rstc) ? cpu_rstc[pd] : ERR_PTR(-EINVAL);
+
 	if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
 		pr_err("%s: could not get reset control for core %d\n",
 		       __func__, pd);
@@ -100,11 +103,8 @@ static int pmu_set_power_domain(int pd, bool on)
 		}
 	}
 
-	if (!IS_ERR(rstc)) {
-		if (on)
-			reset_control_deassert(rstc);
-		reset_control_put(rstc);
-	}
+	if (!IS_ERR(rstc) && on)
+		reset_control_deassert(rstc);
 
 	return 0;
 }
@@ -312,6 +312,10 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
 		ncores = ((l2ctlr >> 24) & 0x3) + 1;
 	}
 
+	/* Collect cpu core reset control for each core */
+	for (i = 0; i < ncores; i++)
+		cpu_rstc[i] = rockchip_get_core_reset(i);
+
 	/* Make sure that all cores except the first are really off */
 	for (i = 1; i < ncores; i++)
 		pmu_set_power_domain(0 + i, false);
-- 
2.47.3



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] ARM: rockchip: keep reset control around
  2026-05-21 21:09 [PATCH] ARM: rockchip: keep reset control around Heiko Stuebner
@ 2026-05-21 21:13 ` Heiko Stuebner
  2026-05-22  7:20 ` Heiko Stuebner
  1 sibling, 0 replies; 5+ messages in thread
From: Heiko Stuebner @ 2026-05-21 21:13 UTC (permalink / raw)
  To: Heiko Stuebner
  Cc: linux-arm-kernel, linux-rockchip, Philipp Zabel, Steven Price,
	Bartosz Golaszewski

Am Donnerstag, 21. Mai 2026, 23:09:15 Mitteleuropäische Sommerzeit schrieb Heiko Stuebner:
> Do not put the reset control, retain exclusive control over it.
> After turning on a CPU, the corresponding reset line must stay
> deasserted.
> 
> This also avoids calling reset_control_put() before workqueues
> are operational.
> 
> Fixes: 78ebbff6d1a0 ("reset: handle removing supplier before consumers")
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> Tested-by: Steven Price <steven.price@arm.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Forgot to add Bartosz to the Cc list, sorry


Heiko

> ---
>  arch/arm/mach-rockchip/platsmp.c | 16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> index f432d22bfed8..f659d894bfae 100644
> --- a/arch/arm/mach-rockchip/platsmp.c
> +++ b/arch/arm/mach-rockchip/platsmp.c
> @@ -34,6 +34,7 @@ static int ncores;
>  
>  static struct regmap *pmu;
>  static int has_pmu = true;
> +static struct reset_control *cpu_rstc[4];
>  
>  static int pmu_power_domain_is_on(int pd)
>  {
> @@ -64,9 +65,11 @@ static struct reset_control *rockchip_get_core_reset(int cpu)
>  static int pmu_set_power_domain(int pd, bool on)
>  {
>  	u32 val = (on) ? 0 : BIT(pd);
> -	struct reset_control *rstc = rockchip_get_core_reset(pd);
> +	struct reset_control *rstc;
>  	int ret;
>  
> +	rstc = pd < ARRAY_SIZE(cpu_rstc) ? cpu_rstc[pd] : ERR_PTR(-EINVAL);
> +
>  	if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
>  		pr_err("%s: could not get reset control for core %d\n",
>  		       __func__, pd);
> @@ -100,11 +103,8 @@ static int pmu_set_power_domain(int pd, bool on)
>  		}
>  	}
>  
> -	if (!IS_ERR(rstc)) {
> -		if (on)
> -			reset_control_deassert(rstc);
> -		reset_control_put(rstc);
> -	}
> +	if (!IS_ERR(rstc) && on)
> +		reset_control_deassert(rstc);
>  
>  	return 0;
>  }
> @@ -312,6 +312,10 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
>  		ncores = ((l2ctlr >> 24) & 0x3) + 1;
>  	}
>  
> +	/* Collect cpu core reset control for each core */
> +	for (i = 0; i < ncores; i++)
> +		cpu_rstc[i] = rockchip_get_core_reset(i);
> +
>  	/* Make sure that all cores except the first are really off */
>  	for (i = 1; i < ncores; i++)
>  		pmu_set_power_domain(0 + i, false);
> 






^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] ARM: rockchip: keep reset control around
  2026-05-21 21:09 [PATCH] ARM: rockchip: keep reset control around Heiko Stuebner
  2026-05-21 21:13 ` Heiko Stuebner
@ 2026-05-22  7:20 ` Heiko Stuebner
  2026-05-22  8:20   ` Philipp Zabel
  1 sibling, 1 reply; 5+ messages in thread
From: Heiko Stuebner @ 2026-05-22  7:20 UTC (permalink / raw)
  To: Heiko Stuebner
  Cc: linux-arm-kernel, linux-rockchip, Philipp Zabel, Steven Price,
	Bartosz Golaszewski

Am Donnerstag, 21. Mai 2026, 23:09:15 Mitteleuropäische Sommerzeit schrieb Heiko Stuebner:
> Do not put the reset control, retain exclusive control over it.
> After turning on a CPU, the corresponding reset line must stay
> deasserted.
> 
> This also avoids calling reset_control_put() before workqueues
> are operational.
> 
> Fixes: 78ebbff6d1a0 ("reset: handle removing supplier before consumers")
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> Tested-by: Steven Price <steven.price@arm.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/arm/mach-rockchip/platsmp.c | 16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> index f432d22bfed8..f659d894bfae 100644
> --- a/arch/arm/mach-rockchip/platsmp.c
> +++ b/arch/arm/mach-rockchip/platsmp.c
> @@ -34,6 +34,7 @@ static int ncores;
>  
>  static struct regmap *pmu;
>  static int has_pmu = true;
> +static struct reset_control *cpu_rstc[4];

After sleeping on that, this should be cpu_rstc[5];

Coretx-A9 SoCs need to enable the SCU power-domain which thankfully
sits at index 4 of the power-domain register.

So while we (already) expect no reset control for that, we need at least
make sure, it's not reading into undefined memory and thus need that
empty field in the array.


Heiko

>  
>  static int pmu_power_domain_is_on(int pd)
>  {
> @@ -64,9 +65,11 @@ static struct reset_control *rockchip_get_core_reset(int cpu)
>  static int pmu_set_power_domain(int pd, bool on)
>  {
>  	u32 val = (on) ? 0 : BIT(pd);
> -	struct reset_control *rstc = rockchip_get_core_reset(pd);
> +	struct reset_control *rstc;
>  	int ret;
>  
> +	rstc = pd < ARRAY_SIZE(cpu_rstc) ? cpu_rstc[pd] : ERR_PTR(-EINVAL);
> +
>  	if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
>  		pr_err("%s: could not get reset control for core %d\n",
>  		       __func__, pd);
> @@ -100,11 +103,8 @@ static int pmu_set_power_domain(int pd, bool on)
>  		}
>  	}
>  
> -	if (!IS_ERR(rstc)) {
> -		if (on)
> -			reset_control_deassert(rstc);
> -		reset_control_put(rstc);
> -	}
> +	if (!IS_ERR(rstc) && on)
> +		reset_control_deassert(rstc);
>  
>  	return 0;
>  }
> @@ -312,6 +312,10 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
>  		ncores = ((l2ctlr >> 24) & 0x3) + 1;
>  	}
>  
> +	/* Collect cpu core reset control for each core */
> +	for (i = 0; i < ncores; i++)
> +		cpu_rstc[i] = rockchip_get_core_reset(i);
> +
>  	/* Make sure that all cores except the first are really off */
>  	for (i = 1; i < ncores; i++)
>  		pmu_set_power_domain(0 + i, false);
> 






^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] ARM: rockchip: keep reset control around
  2026-05-22  7:20 ` Heiko Stuebner
@ 2026-05-22  8:20   ` Philipp Zabel
  2026-05-22  8:43     ` Heiko Stuebner
  0 siblings, 1 reply; 5+ messages in thread
From: Philipp Zabel @ 2026-05-22  8:20 UTC (permalink / raw)
  To: Heiko Stuebner
  Cc: linux-arm-kernel, linux-rockchip, Steven Price,
	Bartosz Golaszewski

On Fr, 2026-05-22 at 09:20 +0200, Heiko Stuebner wrote:
> Am Donnerstag, 21. Mai 2026, 23:09:15 Mitteleuropäische Sommerzeit schrieb Heiko Stuebner:
> > Do not put the reset control, retain exclusive control over it.
> > After turning on a CPU, the corresponding reset line must stay
> > deasserted.
> > 
> > This also avoids calling reset_control_put() before workqueues
> > are operational.
> > 
> > Fixes: 78ebbff6d1a0 ("reset: handle removing supplier before consumers")
> > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > Tested-by: Steven Price <steven.price@arm.com>
> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > ---
> >  arch/arm/mach-rockchip/platsmp.c | 16 ++++++++++------
> >  1 file changed, 10 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> > index f432d22bfed8..f659d894bfae 100644
> > --- a/arch/arm/mach-rockchip/platsmp.c
> > +++ b/arch/arm/mach-rockchip/platsmp.c
> > @@ -34,6 +34,7 @@ static int ncores;
> >  
> >  static struct regmap *pmu;
> >  static int has_pmu = true;
> > +static struct reset_control *cpu_rstc[4];
> 
> After sleeping on that, this should be cpu_rstc[5];
> 
> Coretx-A9 SoCs need to enable the SCU power-domain which thankfully
> sits at index 4 of the power-domain register.
> 
> So while we (already) expect no reset control for that, we need at least
> make sure, it's not reading into undefined memory

The access in pmu_set_power_domain() is gated by
(pd < ARRAY_SIZE(cpu_rstc)). And ncores in rockchip_smp_prepare_cpus()
can not be larger than 4.

> and thus need that empty field in the array.

We could drop the ARRAY_SIZE check and add a placeholder to the array,
but it would need to be set to ERR_PTR(-EINVAL). Otherwise we'd have to
replace all the IS_ERR(rstc) checks as well. I think that would be a
good follow-up change.

regards
Philipp


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] ARM: rockchip: keep reset control around
  2026-05-22  8:20   ` Philipp Zabel
@ 2026-05-22  8:43     ` Heiko Stuebner
  0 siblings, 0 replies; 5+ messages in thread
From: Heiko Stuebner @ 2026-05-22  8:43 UTC (permalink / raw)
  To: Philipp Zabel
  Cc: linux-arm-kernel, linux-rockchip, Steven Price,
	Bartosz Golaszewski

Am Freitag, 22. Mai 2026, 10:20:06 Mitteleuropäische Sommerzeit schrieb Philipp Zabel:
> On Fr, 2026-05-22 at 09:20 +0200, Heiko Stuebner wrote:
> > Am Donnerstag, 21. Mai 2026, 23:09:15 Mitteleuropäische Sommerzeit schrieb Heiko Stuebner:
> > > Do not put the reset control, retain exclusive control over it.
> > > After turning on a CPU, the corresponding reset line must stay
> > > deasserted.
> > > 
> > > This also avoids calling reset_control_put() before workqueues
> > > are operational.
> > > 
> > > Fixes: 78ebbff6d1a0 ("reset: handle removing supplier before consumers")
> > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > > Tested-by: Steven Price <steven.price@arm.com>
> > > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > > ---
> > >  arch/arm/mach-rockchip/platsmp.c | 16 ++++++++++------
> > >  1 file changed, 10 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> > > index f432d22bfed8..f659d894bfae 100644
> > > --- a/arch/arm/mach-rockchip/platsmp.c
> > > +++ b/arch/arm/mach-rockchip/platsmp.c
> > > @@ -34,6 +34,7 @@ static int ncores;
> > >  
> > >  static struct regmap *pmu;
> > >  static int has_pmu = true;
> > > +static struct reset_control *cpu_rstc[4];
> > 
> > After sleeping on that, this should be cpu_rstc[5];
> > 
> > Coretx-A9 SoCs need to enable the SCU power-domain which thankfully
> > sits at index 4 of the power-domain register.
> > 
> > So while we (already) expect no reset control for that, we need at least
> > make sure, it's not reading into undefined memory
> 
> The access in pmu_set_power_domain() is gated by
> (pd < ARRAY_SIZE(cpu_rstc)). And ncores in rockchip_smp_prepare_cpus()
> can not be larger than 4.

argh ... you're right of course. So the patch can stay as it is.
Should not think about code before going to sleep ;-)


Heiko

> > and thus need that empty field in the array.
> 
> We could drop the ARRAY_SIZE check and add a placeholder to the array,
> but it would need to be set to ERR_PTR(-EINVAL). Otherwise we'd have to
> replace all the IS_ERR(rstc) checks as well. I think that would be a
> good follow-up change.
> 
> regards
> Philipp
> 






^ permalink raw reply	[flat|nested] 5+ messages in thread

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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2026-05-21 21:09 [PATCH] ARM: rockchip: keep reset control around Heiko Stuebner
2026-05-21 21:13 ` Heiko Stuebner
2026-05-22  7:20 ` Heiko Stuebner
2026-05-22  8:20   ` Philipp Zabel
2026-05-22  8:43     ` Heiko Stuebner

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