* [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright
2011-03-02 17:34 [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Sylwester Nawrocki
@ 2011-03-02 17:34 ` Sylwester Nawrocki
2011-03-03 4:33 ` Kukjin Kim
2011-03-02 17:34 ` [PATCH 2/3] ARM: S5PV210: Add clock entries for MIPI DPHY control Sylwester Nawrocki
` (2 subsequent siblings)
3 siblings, 1 reply; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/dev-csis0.c | 2 +-
arch/arm/plat-s5p/dev-csis1.c | 2 +-
arch/arm/plat-s5p/include/plat/csis.h | 28 ----------------------------
arch/arm/plat-s5p/include/plat/mipi_csis.h | 28 ++++++++++++++++++++++++++++
4 files changed, 30 insertions(+), 30 deletions(-)
delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
index dfab1c8..882843b 100644
--- a/arch/arm/plat-s5p/dev-csis0.c
+++ b/arch/arm/plat-s5p/dev-csis0.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 0
*
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
index e3053f2..77f5d25 100644
--- a/arch/arm/plat-s5p/dev-csis1.c
+++ b/arch/arm/plat-s5p/dev-csis1.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 1
*
diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/csis.h
deleted file mode 100644
index 51e308c..0000000
--- a/arch/arm/plat-s5p/include/plat/csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- *
- * S5P series MIPI CSI slave device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef PLAT_S5P_CSIS_H_
-#define PLAT_S5P_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
- * @clk_rate: bus clock frequency
- * @lanes: number of data lanes used
- * @alignment: data alignment in bits
- * @hs_settle: HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
- unsigned long clk_rate;
- u8 lanes;
- u8 alignment;
- u8 hs_settle;
-};
-
-#endif /* PLAT_S5P_CSIS_H_ */
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
new file mode 100644
index 0000000..eb3beab
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2010-2011 Samsung Electronics, Co. Ltd
+ *
+ * S5P series MIPI CSI slave device support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_S5P_MIPI_CSIS_H_
+#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+
+/**
+ * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
+ * @clk_rate: bus clock frequency
+ * @lanes: number of data lanes used
+ * @alignment: data alignment in bits
+ * @hs_settle: HS-RX settle time
+ */
+struct s5p_platform_mipi_csis {
+ unsigned long clk_rate;
+ u8 lanes;
+ u8 alignment;
+ u8 hs_settle;
+};
+
+#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright
2011-03-02 17:34 ` [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright Sylwester Nawrocki
@ 2011-03-03 4:33 ` Kukjin Kim
2011-03-03 9:34 ` Sylwester Nawrocki
0 siblings, 1 reply; 21+ messages in thread
From: Kukjin Kim @ 2011-03-03 4:33 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/plat-s5p/dev-csis0.c | 2 +-
> arch/arm/plat-s5p/dev-csis1.c | 2 +-
> arch/arm/plat-s5p/include/plat/csis.h | 28
--------------------------
> --
> arch/arm/plat-s5p/include/plat/mipi_csis.h | 28
> ++++++++++++++++++++++++++++
> 4 files changed, 30 insertions(+), 30 deletions(-)
> delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
> create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
>
Oops, why didn't use '-M'?
It can show me this like following.
.../plat-s5p/include/plat/{csis.h => mipi_csis.h} | 10 +++++-----
3 files changed, 7 insertions(+), 7 deletions(-)
rename arch/arm/plat-s5p/include/plat/{csis.h => mipi_csis.h} (68%)
Secondly, I remember this...
Following is your response at that time.
http://lists.infradead.org/pipermail/linux-arm-kernel/2011-January/038037.ht
ml
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright
2011-03-03 4:33 ` Kukjin Kim
@ 2011-03-03 9:34 ` Sylwester Nawrocki
0 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-03 9:34 UTC (permalink / raw)
To: linux-arm-kernel
On 03/03/2011 05:33 AM, Kukjin Kim wrote:
> Sylwester Nawrocki wrote:
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> arch/arm/plat-s5p/dev-csis0.c | 2 +-
>> arch/arm/plat-s5p/dev-csis1.c | 2 +-
>> arch/arm/plat-s5p/include/plat/csis.h | 28
> --------------------------
>> --
>> arch/arm/plat-s5p/include/plat/mipi_csis.h | 28
>> ++++++++++++++++++++++++++++
>> 4 files changed, 30 insertions(+), 30 deletions(-)
>> delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
>> create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
>>
> Oops, why didn't use '-M'?
> It can show me this like following.
>
Yes, I could do better. Sorry, I had two version of the patch
and somehow ended up with te wrong one being send.
> .../plat-s5p/include/plat/{csis.h => mipi_csis.h} | 10 +++++-----
> 3 files changed, 7 insertions(+), 7 deletions(-)
> rename arch/arm/plat-s5p/include/plat/{csis.h => mipi_csis.h} (68%)
>
> Secondly, I remember this...
> Following is your response at that time.
> http://lists.infradead.org/pipermail/linux-arm-kernel/2011-January/038037.ht
> ml
>
Yes, but afterwards I realized there will be issues when one is trying
to build common kernel binary for multiple SoCs.
Nevertheless I will prepare common code for S5P and a callback into platform
code, so at least we can move on with the v4l driver.
Thanks,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 2/3] ARM: S5PV210: Add clock entries for MIPI DPHY control
2011-03-02 17:34 [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Sylwester Nawrocki
2011-03-02 17:34 ` [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright Sylwester Nawrocki
@ 2011-03-02 17:34 ` Sylwester Nawrocki
2011-03-02 17:34 ` [PATCH 3/3] ARM: EXYNOS4: " Sylwester Nawrocki
2011-03-03 4:43 ` [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Kukjin Kim
3 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
This clock entries allow control of enable state of MIPI-DSIM
and MIPI-CSIS PHYs from respective drivers without a need
for any callbacks in driver's platform data.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/clock.c | 27 +++++++++++++++++++++++
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 2 +-
2 files changed, 28 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 2d59949..c77d6f2 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -185,6 +185,23 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
}
+static int s5pv210_mipi_dphy_ctrl(struct clk *clk, int enable)
+{
+ u32 reset = clk->ctrlbit;
+ u32 reg = __raw_readl(S5PV210_MIPI_DPHY_CTRL);
+
+ reg = enable ? (reg | reset) : (reg & ~reset);
+ __raw_writel(reg, S5PV210_MIPI_DPHY_CTRL);
+
+ if (enable)
+ reg |= 0x1;
+ else if (!(reg & 0x6 & ~reset))
+ reg &= ~0x1;
+
+ __raw_writel(reg, S5PV210_MIPI_DPHY_CTRL);
+ return 0;
+}
+
static struct clk clk_sclk_hdmi27m = {
.name = "sclk_hdmi27m",
.id = -1,
@@ -531,6 +548,16 @@ static struct clk init_clocks[] = {
.parent = &clk_hclk_psys.clk,
.enable = s5pv210_clk_ip1_ctrl,
.ctrlbit = (1 << 26),
+ }, {
+ .name = "csis_dphy",
+ .id = -1,
+ .enable = s5pv210_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "dsim_dphy",
+ .id = -1,
+ .enable = s5pv210_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 2),
},
};
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 4c45b74..31ab0c7 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -161,7 +161,7 @@
#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
-#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
+#define S5PV210_MIPI_DPHY_CTRL S5P_CLKREG(0xE814)
#define S5P_IDLE_CFG_TL_MASK (3 << 30)
#define S5P_IDLE_CFG_TM_MASK (3 << 28)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 3/3] ARM: EXYNOS4: Add clock entries for MIPI DPHY control
2011-03-02 17:34 [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Sylwester Nawrocki
2011-03-02 17:34 ` [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright Sylwester Nawrocki
2011-03-02 17:34 ` [PATCH 2/3] ARM: S5PV210: Add clock entries for MIPI DPHY control Sylwester Nawrocki
@ 2011-03-02 17:34 ` Sylwester Nawrocki
2011-03-03 4:43 ` [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Kukjin Kim
3 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
This clock entries allow enable control of MIPI-DSIM and
MIPI-CSIS PHYs from respective drivers without a need for
any callbacks in driver's platform data.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos4/clock.c | 31 ++++++++++++++++++++++++-
arch/arm/mach-exynos4/include/mach/regs-pmu.h | 2 +
2 files changed, 32 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 72d53d5..6d64b06 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -23,6 +23,7 @@
#include <mach/map.h>
#include <mach/regs-clock.h>
+#include <mach/regs-pmu.h>
static struct clk clk_sclk_hdmi27m = {
.name = "sclk_hdmi27m",
@@ -116,6 +117,24 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)
return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
}
+static int exynos4_mipi_dphy_ctrl(struct clk *clk, int enable)
+{
+ u32 reset = clk->ctrlbit;
+ void __iomem *addr = S5PV310_MIPI_DPHY_CTRL(clk->id);
+ u32 reg = __raw_readl(addr);
+
+ reg = enable ? (reg | reset) : (reg & ~reset);
+ __raw_writel(reg, addr);
+
+ if (enable)
+ reg |= 0x1;
+ else if (!(reg & 0x6 & ~reset))
+ reg &= ~0x1;
+
+ __raw_writel(reg, addr);
+ return 0;
+}
+
/* Core list of CMU_CPU side */
static struct clksrc_clk clk_mout_apll = {
@@ -623,7 +642,17 @@ static struct clk init_clocks[] = {
.id = 5,
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 5),
- }
+ }, {
+ .name = "csis_dphy",
+ .id = 0,
+ .enable = exynos4_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "csis_dphy",
+ .id = 1,
+ .enable = exynos4_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 1),
+ },
};
static struct clk *clkset_group_list[] = {
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 2ddd617..dd3216f 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -27,4 +27,6 @@
#define S5P_INT_LOCAL_PWR_EN 0x7
+#define S5PV310_MIPI_DPHY_CTRL(n) S5P_PMUREG(0x0710 + (n) * 4)
+
#endif /* __ASM_ARCH_REGS_PMU_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices
2011-03-02 17:34 [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Sylwester Nawrocki
` (2 preceding siblings ...)
2011-03-02 17:34 ` [PATCH 3/3] ARM: EXYNOS4: " Sylwester Nawrocki
@ 2011-03-03 4:43 ` Kukjin Kim
2011-03-03 19:04 ` [PATCH v2 0/3] ARM: S5P: Add D-PHY control platform helpers for MIPI-CSIS/DSIM drivers Sylwester Nawrocki
` (3 more replies)
3 siblings, 4 replies; 21+ messages in thread
From: Kukjin Kim @ 2011-03-03 4:43 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> Hello,
>
> the following patch series adds a common platform code to enable control
> of MIPI-CSI receiver's DPHY from within it's V4L2 subdev driver. The
driver
> is supposed to support possibly all S5P SoCs variants and the PHY handling
> details need to be hidden in the platform code. The functionality behind
> "dphy_csis" clocks is not exact a functionality of the clock, but they
have
> common features. If the clock API rules are to strict to accept this kind
> of usage then I'm willing to create some intermediate layer that will
finally
> solve PHY handling for MIPI-CSI, MIPI-DSIM, USB, SATA.. devices, without
> issues
> on a common kernel binary for multiple boards.
>
>
> The patch series contains:
> [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright
> [PATCH 2/3] ARM: S5PV210: Add clock entries for MIPI DPHY control
> [PATCH 3/3] ARM: EXYNOS4: Add clock entries for MIPI DPHY control
>
> Rebased onto kgene-for-next branch at:
> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
>
Maybe we discussed about this ago.
I remember, we agree that to control phy cannot be handled in clock part.
And didn't say to make some kind of common s5p phy setup/control function?
http://lists.infradead.org/pipermail/linux-arm-kernel/2011-January/038038.ht
ml
I thought it is possible to make it even though some registers is in
different place.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 0/3] ARM: S5P: Add D-PHY control platform helpers for MIPI-CSIS/DSIM drivers
2011-03-03 4:43 ` [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Kukjin Kim
@ 2011-03-03 19:04 ` Sylwester Nawrocki
2011-03-08 23:05 ` Kukjin Kim
2011-03-03 19:04 ` [PATCH v2 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright Sylwester Nawrocki
` (2 subsequent siblings)
3 siblings, 1 reply; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-03 19:04 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
the following patch series adds the platform helpers for MIPI-CSIS and MIPI-DSIM
drivers to control their corresponding D-PHYs.
MIPI-DSIM driver should use its D-PHY control function from plat-s5p/setup-mipi.c.
Changes since v1:
- created common setup-mipi.c under plat-s5p for all S5P/EXYNOS4* SoCs
The patch series contains:
[PATCH v2 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright
[PATCH v2 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
[PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control
Regards,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 0/3] ARM: S5P: Add D-PHY control platform helpers for MIPI-CSIS/DSIM drivers
2011-03-03 19:04 ` [PATCH v2 0/3] ARM: S5P: Add D-PHY control platform helpers for MIPI-CSIS/DSIM drivers Sylwester Nawrocki
@ 2011-03-08 23:05 ` Kukjin Kim
0 siblings, 0 replies; 21+ messages in thread
From: Kukjin Kim @ 2011-03-08 23:05 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> Hello,
>
> the following patch series adds the platform helpers for MIPI-CSIS and
MIPI-
> DSIM
> drivers to control their corresponding D-PHYs.
> MIPI-DSIM driver should use its D-PHY control function from
plat-s5p/setup-
> mipi.c.
>
> Changes since v1:
> - created common setup-mipi.c under plat-s5p for all S5P/EXYNOS4* SoCs
>
>
> The patch series contains:
> [PATCH v2 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update
Copyright
> [PATCH v2 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY
control
> callback
> [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY
control
>
Hi Sylwester,
Basically, I agree with your current approach :)
Will review it today and re-think other method about your ifdef(EXYNOS4) so
that can support single kernel later.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright
2011-03-03 4:43 ` [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Kukjin Kim
2011-03-03 19:04 ` [PATCH v2 0/3] ARM: S5P: Add D-PHY control platform helpers for MIPI-CSIS/DSIM drivers Sylwester Nawrocki
@ 2011-03-03 19:04 ` Sylwester Nawrocki
2011-03-03 19:04 ` [PATCH v2 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Sylwester Nawrocki
2011-03-03 19:04 ` [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control Sylwester Nawrocki
3 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-03 19:04 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/dev-csis0.c | 2 +-
arch/arm/plat-s5p/dev-csis1.c | 2 +-
.../plat-s5p/include/plat/{csis.h => mipi_csis.h} | 10 +++++-----
3 files changed, 7 insertions(+), 7 deletions(-)
rename arch/arm/plat-s5p/include/plat/{csis.h => mipi_csis.h} (68%)
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
index dfab1c8..882843b 100644
--- a/arch/arm/plat-s5p/dev-csis0.c
+++ b/arch/arm/plat-s5p/dev-csis0.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 0
*
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
index e3053f2..77f5d25 100644
--- a/arch/arm/plat-s5p/dev-csis1.c
+++ b/arch/arm/plat-s5p/dev-csis1.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 1
*
diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
similarity index 68%
rename from arch/arm/plat-s5p/include/plat/csis.h
rename to arch/arm/plat-s5p/include/plat/mipi_csis.h
index 51e308c..eb3beab 100644
--- a/arch/arm/plat-s5p/include/plat/csis.h
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics, Co. Ltd
*
* S5P series MIPI CSI slave device support
*
@@ -8,11 +8,11 @@
* published by the Free Software Foundation.
*/
-#ifndef PLAT_S5P_CSIS_H_
-#define PLAT_S5P_CSIS_H_ __FILE__
+#ifndef PLAT_S5P_MIPI_CSIS_H_
+#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
/**
- * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
+ * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
* @clk_rate: bus clock frequency
* @lanes: number of data lanes used
* @alignment: data alignment in bits
@@ -25,4 +25,4 @@ struct s5p_platform_mipi_csis {
u8 hs_settle;
};
-#endif /* PLAT_S5P_CSIS_H_ */
+#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
2011-03-03 4:43 ` [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Kukjin Kim
2011-03-03 19:04 ` [PATCH v2 0/3] ARM: S5P: Add D-PHY control platform helpers for MIPI-CSIS/DSIM drivers Sylwester Nawrocki
2011-03-03 19:04 ` [PATCH v2 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright Sylwester Nawrocki
@ 2011-03-03 19:04 ` Sylwester Nawrocki
2011-03-09 15:44 ` [PATCH v2] " Sylwester Nawrocki
2011-03-03 19:04 ` [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control Sylwester Nawrocki
3 siblings, 1 reply; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-03 19:04 UTC (permalink / raw)
To: linux-arm-kernel
Extend MIPI-CSIS driver's platform data structure with a callback
for D-PHY enable and reset control.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/include/plat/mipi_csis.h | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
index eb3beab..8a9e88a 100644
--- a/arch/arm/plat-s5p/include/plat/mipi_csis.h
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -11,6 +11,8 @@
#ifndef PLAT_S5P_MIPI_CSIS_H_
#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+struct platform_device;
+
/**
* struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
* @clk_rate: bus clock frequency
@@ -23,6 +25,15 @@ struct s5p_platform_mipi_csis {
u8 lanes;
u8 alignment;
u8 hs_settle;
+ int (*phy_enable)(struct platform_device *pdev, bool on);
};
+/**
+ * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
+ * @pdev: MIPI-CSIS platform device
+ * @on: true to enable D-PHY and deassert its reset
+ * false to disable D-PHY
+ */
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
+
#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
2011-03-03 19:04 ` [PATCH v2 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Sylwester Nawrocki
@ 2011-03-09 15:44 ` Sylwester Nawrocki
0 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-09 15:44 UTC (permalink / raw)
To: linux-arm-kernel
Extend MIPI-CSIS driver's platform data structure with a callback
for D-PHY enable and reset control. Also add a flag indicating
whether the external MIPI-CSI (VDD18_MIPI) power supply should
be managed in the driver through the "vdd" power supply. On some
boards this regulator may be a fixed voltage regulator without
an inhibit function.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
Hello,
in this version I have updated the platform data structure with
an additional flag indicating whether the driver should attempt to
control the external mipi-csis (VDD18_MIPI) voltage regulator or not.
This might be needed on systems where MIPI VDD power supply cannot be
separately switched on/off.
SN
---
arch/arm/plat-s5p/include/plat/mipi_csis.h | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
index eb3beab..bb4f396 100644
--- a/arch/arm/plat-s5p/include/plat/mipi_csis.h
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -11,18 +11,33 @@
#ifndef PLAT_S5P_MIPI_CSIS_H_
#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+struct platform_device;
+
/**
* struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
* @clk_rate: bus clock frequency
* @lanes: number of data lanes used
* @alignment: data alignment in bits
* @hs_settle: HS-RX settle time
+ * @fixed_phy_vdd: set to 0 if the driver should be managing external
+ * D-PHY power supply through the "vdd" regulator supply
+ * @phy_enable: pointer to a callback controlling D-PHY enable/reset
*/
struct s5p_platform_mipi_csis {
unsigned long clk_rate;
u8 lanes;
u8 alignment;
u8 hs_settle;
+ unsigned fixed_phy_vdd:1;
+ int (*phy_enable)(struct platform_device *pdev, bool on);
};
+/**
+ * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
+ * @pdev: MIPI-CSIS platform device
+ * @on: true to enable D-PHY and deassert its reset
+ * false to disable D-PHY
+ */
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
+
#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control
2011-03-03 4:43 ` [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices Kukjin Kim
` (2 preceding siblings ...)
2011-03-03 19:04 ` [PATCH v2 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Sylwester Nawrocki
@ 2011-03-03 19:04 ` Sylwester Nawrocki
2011-03-09 22:55 ` Kukjin Kim
3 siblings, 1 reply; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-03 19:04 UTC (permalink / raw)
To: linux-arm-kernel
Add common code for MIPI-CSIS and MIPI-DSIM drivers to support
their corresponding D-PHY's enable and reset control.
Tested with S5PV210 and EXYNOS4 SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos4/include/mach/regs-pmu.h | 5 ++
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 +-
arch/arm/plat-s5p/Kconfig | 5 ++
arch/arm/plat-s5p/Makefile | 1 +
arch/arm/plat-s5p/setup-mipi.c | 68 +++++++++++++++++++++++
5 files changed, 83 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/plat-s5p/setup-mipi.c
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 2ddd617..985416d 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -17,6 +17,11 @@
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
+#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4)
+#define S5P_MIPI_DPHY_ENABLE (1 << 0)
+#define S5P_MIPI_DPHY_SRESETN (1 << 1)
+#define S5P_MIPI_DPHY_MRESETN (1 << 2)
+
#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00)
#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)
#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40)
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 4c45b74..78925c5 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -146,6 +146,10 @@
#define S5P_OM_STAT S5P_CLKREG(0xE100)
#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C)
#define S5P_DAC_CONTROL S5P_CLKREG(0xE810)
+#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814)
+#define S5P_MIPI_DPHY_ENABLE (1 << 0)
+#define S5P_MIPI_DPHY_SRESETN (1 << 1)
+#define S5P_MIPI_DPHY_MRESETN (1 << 2)
#define S5P_INFORM0 S5P_CLKREG(0xF000)
#define S5P_INFORM1 S5P_CLKREG(0xF004)
@@ -161,7 +165,6 @@
#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
-#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
#define S5P_IDLE_CFG_TL_MASK (3 << 30)
#define S5P_IDLE_CFG_TM_MASK (3 << 28)
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 6390ac7..be316d7 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -74,3 +74,8 @@ config S5P_DEV_CSIS1
bool
help
Compile in platform device definitions for MIPI-CSIS channel 1
+
+config S5P_SETUP_MIPI
+ bool
+ help
+ Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices.
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 4bd5cf9..84651af 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
+obj-$(CONFIG_S5P_SETUP_MIPI) += setup-mipi.o
diff --git a/arch/arm/plat-s5p/setup-mipi.c b/arch/arm/plat-s5p/setup-mipi.c
new file mode 100644
index 0000000..4d8ae96
--- /dev/null
+++ b/arch/arm/plat-s5p/setup-mipi.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics Co., Ltd
+ *
+ * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+
+#ifdef CONFIG_ARCH_EXYNOS4
+#include <mach/regs-pmu.h>
+#else
+#include <mach/regs-clock.h>
+#endif
+
+static int __s5p_mipi_phy_control(struct platform_device *pdev,
+ bool on, u32 reset)
+{
+ static DEFINE_SPINLOCK(lock);
+ void __iomem *addr;
+ unsigned long flags;
+ int pid;
+ u32 cfg;
+
+ if (!pdev)
+ return -EINVAL;
+
+ pid = (pdev->id == -1) ? 0 : pdev->id;
+
+ if (pid != 0 && pid != 1)
+ return -EINVAL;
+
+ addr = S5P_MIPI_DPHY_CONTROL(pid);
+
+ spin_lock_irqsave(&lock, flags);
+
+ cfg = __raw_readl(addr);
+ cfg = on ? (cfg | reset) : (cfg & ~reset);
+ __raw_writel(cfg, addr);
+
+ if (on) {
+ cfg |= S5P_MIPI_DPHY_ENABLE;
+ } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN |
+ S5P_MIPI_DPHY_MRESETN) & ~reset)) {
+ cfg &= ~S5P_MIPI_DPHY_ENABLE;
+ }
+
+ __raw_writel(cfg, addr);
+ spin_unlock_irqrestore(&lock, flags);
+
+ return 0;
+}
+
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
+{
+ return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_SRESETN);
+}
+
+int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
+{
+ return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_MRESETN);
+}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control
2011-03-03 19:04 ` [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control Sylwester Nawrocki
@ 2011-03-09 22:55 ` Kukjin Kim
2011-03-10 11:06 ` [PATCH v3 0/3] ARM: S5P: Add platform helpers for MIPI-CSIS/DSIM DPHY Sylwester Nawrocki
` (4 more replies)
0 siblings, 5 replies; 21+ messages in thread
From: Kukjin Kim @ 2011-03-09 22:55 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> Add common code for MIPI-CSIS and MIPI-DSIM drivers to support
> their corresponding D-PHY's enable and reset control.
> Tested with S5PV210 and EXYNOS4 SoCs.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/mach-exynos4/include/mach/regs-pmu.h | 5 ++
> arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 +-
> arch/arm/plat-s5p/Kconfig | 5 ++
> arch/arm/plat-s5p/Makefile | 1 +
> arch/arm/plat-s5p/setup-mipi.c | 68
> +++++++++++++++++++++++
> 5 files changed, 83 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/plat-s5p/setup-mipi.c
>
> diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
b/arch/arm/mach-
> exynos4/include/mach/regs-pmu.h
> index 2ddd617..985416d 100644
> --- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
> +++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
> @@ -17,6 +17,11 @@
>
> #define S5P_PMUREG(x) (S5P_VA_PMU + (x))
>
> +#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4)
> +#define S5P_MIPI_DPHY_ENABLE (1 << 0)
> +#define S5P_MIPI_DPHY_SRESETN (1 << 1)
> +#define S5P_MIPI_DPHY_MRESETN (1 << 2)
> +
> #define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00)
> #define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)
> #define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40)
> diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
b/arch/arm/mach-
> s5pv210/include/mach/regs-clock.h
> index 4c45b74..78925c5 100644
> --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
> +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
> @@ -146,6 +146,10 @@
> #define S5P_OM_STAT S5P_CLKREG(0xE100)
> #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C)
> #define S5P_DAC_CONTROL S5P_CLKREG(0xE810)
> +#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814)
> +#define S5P_MIPI_DPHY_ENABLE (1 << 0)
> +#define S5P_MIPI_DPHY_SRESETN (1 << 1)
> +#define S5P_MIPI_DPHY_MRESETN (1 << 2)
>
> #define S5P_INFORM0 S5P_CLKREG(0xF000)
> #define S5P_INFORM1 S5P_CLKREG(0xF004)
> @@ -161,7 +165,6 @@
> #define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
> #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
> #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
> -#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
>
> #define S5P_IDLE_CFG_TL_MASK (3 << 30)
> #define S5P_IDLE_CFG_TM_MASK (3 << 28)
> diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
> index 6390ac7..be316d7 100644
> --- a/arch/arm/plat-s5p/Kconfig
> +++ b/arch/arm/plat-s5p/Kconfig
> @@ -74,3 +74,8 @@ config S5P_DEV_CSIS1
> bool
> help
> Compile in platform device definitions for MIPI-CSIS channel 1
> +
> +config S5P_SETUP_MIPI
How about S5P_SETUP_MIPIPHY ?
> + bool
> + help
> + Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices.
> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
> index 4bd5cf9..84651af 100644
> --- a/arch/arm/plat-s5p/Makefile
> +++ b/arch/arm/plat-s5p/Makefile
> @@ -31,3 +31,4 @@ obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
> obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
> obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
> obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
> +obj-$(CONFIG_S5P_SETUP_MIPI) += setup-mipi.o
> diff --git a/arch/arm/plat-s5p/setup-mipi.c
b/arch/arm/plat-s5p/setup-mipi.c
> new file mode 100644
> index 0000000..4d8ae96
> --- /dev/null
> +++ b/arch/arm/plat-s5p/setup-mipi.c
I think, "setup-mipiphy.c" is more clearly :)
> @@ -0,0 +1,68 @@
> +/*
> + * Copyright (C) 2011 Samsung Electronics Co., Ltd
> + *
> + * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include <linux/spinlock.h>
> +
> +#ifdef CONFIG_ARCH_EXYNOS4
> +#include <mach/regs-pmu.h>
> +#else
> +#include <mach/regs-clock.h>
> +#endif
How about following?
--- a/arch/arm/mach-exynos4/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h
@@ -160,7 +160,9 @@
#define S5P_CLKDIV_BUS_GPLR_SHIFT (4)
#define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT)
-/* Compatibility defines */
+/* Compatibility defines and inclusion */
+
+#include <mach/regs-pmu.h>
#define S5P_EPLL_CON S5P_EPLL_CON0
Then, just adding regs-clock.h here.
+#include <mach/regs-clock.h>
> +
> +static int __s5p_mipi_phy_control(struct platform_device *pdev,
> + bool on, u32 reset)
> +{
> + static DEFINE_SPINLOCK(lock);
> + void __iomem *addr;
> + unsigned long flags;
> + int pid;
> + u32 cfg;
> +
> + if (!pdev)
> + return -EINVAL;
> +
> + pid = (pdev->id == -1) ? 0 : pdev->id;
> +
> + if (pid != 0 && pid != 1)
> + return -EINVAL;
> +
> + addr = S5P_MIPI_DPHY_CONTROL(pid);
> +
> + spin_lock_irqsave(&lock, flags);
> +
> + cfg = __raw_readl(addr);
> + cfg = on ? (cfg | reset) : (cfg & ~reset);
> + __raw_writel(cfg, addr);
> +
> + if (on) {
> + cfg |= S5P_MIPI_DPHY_ENABLE;
> + } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN |
> + S5P_MIPI_DPHY_MRESETN) & ~reset)) {
> + cfg &= ~S5P_MIPI_DPHY_ENABLE;
> + }
> +
> + __raw_writel(cfg, addr);
> + spin_unlock_irqrestore(&lock, flags);
> +
> + return 0;
> +}
> +
> +int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
> +{
> + return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_SRESETN);
> +}
> +
> +int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
> +{
> + return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_MRESETN);
> +}
> --
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v3 0/3] ARM: S5P: Add platform helpers for MIPI-CSIS/DSIM DPHY
2011-03-09 22:55 ` Kukjin Kim
@ 2011-03-10 11:06 ` Sylwester Nawrocki
2011-03-10 11:06 ` [PATCH v3 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright Sylwester Nawrocki
` (3 subsequent siblings)
4 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-10 11:06 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
the following is a third version of a change set adding platform helpers
for the MIPI-CSIS and MIPI-DSIM PHYs control on S5PV210 and Exynos4.
Changes since v2:
- renamed setup-mipi.c/setup-mipidphy.c
- regs-pmu.h header included in regs-clock.s in mach-exynos4 to get
rid of CONFIG_ARCH_EXYNOS4 in setup-mipiphy.c
Changes since v1:
- updated the platform data structure with an additional flag indicating
whether the driver should attempt to control the external mipi-csis
(VDD18_MIPI) voltage regulator or not. This might be needed on systems
where MIPI VDD power supply cannot be separately switched on/off.
The patch series contains:
[PATCH v3 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright
[PATCH v3 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
[PATCH v3 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control
Created against for-next branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
Regards,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v3 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright
2011-03-09 22:55 ` Kukjin Kim
2011-03-10 11:06 ` [PATCH v3 0/3] ARM: S5P: Add platform helpers for MIPI-CSIS/DSIM DPHY Sylwester Nawrocki
@ 2011-03-10 11:06 ` Sylwester Nawrocki
2011-03-10 11:13 ` Kukjin Kim
2011-03-10 11:06 ` [PATCH v3 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Sylwester Nawrocki
` (2 subsequent siblings)
4 siblings, 1 reply; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-10 11:06 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/dev-csis0.c | 2 +-
arch/arm/plat-s5p/dev-csis1.c | 2 +-
arch/arm/plat-s5p/include/plat/csis.h | 28 ----------------------------
arch/arm/plat-s5p/include/plat/mipi_csis.h | 28 ++++++++++++++++++++++++++++
4 files changed, 30 insertions(+), 30 deletions(-)
delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
index dfab1c8..882843b 100644
--- a/arch/arm/plat-s5p/dev-csis0.c
+++ b/arch/arm/plat-s5p/dev-csis0.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 0
*
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
index e3053f2..77f5d25 100644
--- a/arch/arm/plat-s5p/dev-csis1.c
+++ b/arch/arm/plat-s5p/dev-csis1.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 1
*
diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/csis.h
deleted file mode 100644
index 51e308c..0000000
--- a/arch/arm/plat-s5p/include/plat/csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- *
- * S5P series MIPI CSI slave device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef PLAT_S5P_CSIS_H_
-#define PLAT_S5P_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
- * @clk_rate: bus clock frequency
- * @lanes: number of data lanes used
- * @alignment: data alignment in bits
- * @hs_settle: HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
- unsigned long clk_rate;
- u8 lanes;
- u8 alignment;
- u8 hs_settle;
-};
-
-#endif /* PLAT_S5P_CSIS_H_ */
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
new file mode 100644
index 0000000..eb3beab
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2010-2011 Samsung Electronics, Co. Ltd
+ *
+ * S5P series MIPI CSI slave device support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_S5P_MIPI_CSIS_H_
+#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+
+/**
+ * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
+ * @clk_rate: bus clock frequency
+ * @lanes: number of data lanes used
+ * @alignment: data alignment in bits
+ * @hs_settle: HS-RX settle time
+ */
+struct s5p_platform_mipi_csis {
+ unsigned long clk_rate;
+ u8 lanes;
+ u8 alignment;
+ u8 hs_settle;
+};
+
+#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v3 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright
2011-03-10 11:06 ` [PATCH v3 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright Sylwester Nawrocki
@ 2011-03-10 11:13 ` Kukjin Kim
0 siblings, 0 replies; 21+ messages in thread
From: Kukjin Kim @ 2011-03-10 11:13 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/plat-s5p/dev-csis0.c | 2 +-
> arch/arm/plat-s5p/dev-csis1.c | 2 +-
> arch/arm/plat-s5p/include/plat/csis.h | 28
--------------------------
> --
> arch/arm/plat-s5p/include/plat/mipi_csis.h | 28
> ++++++++++++++++++++++++++++
> 4 files changed, 30 insertions(+), 30 deletions(-)
> delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
> create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
>
Sylwester,
Oops...I remember, already said, if you use -M, you can see following.
arch/arm/plat-s5p/dev-csis0.c | 2 +-
arch/arm/plat-s5p/dev-csis1.c | 2 +-
.../plat-s5p/include/plat/{csis.h => mipi_csis.h} | 10 +++++-----
3 files changed, 7 insertions(+), 7 deletions(-)
rename arch/arm/plat-s5p/include/plat/{csis.h => mipi_csis.h} (68%)
Please don't test my patience :(
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
2011-03-09 22:55 ` Kukjin Kim
2011-03-10 11:06 ` [PATCH v3 0/3] ARM: S5P: Add platform helpers for MIPI-CSIS/DSIM DPHY Sylwester Nawrocki
2011-03-10 11:06 ` [PATCH v3 1/3] ARM: S5P: Rename MIPI-CSIS driver header and update Copyright Sylwester Nawrocki
@ 2011-03-10 11:06 ` Sylwester Nawrocki
2011-03-10 11:29 ` Kukjin Kim
2011-03-10 11:06 ` [PATCH v3 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control Sylwester Nawrocki
2011-03-10 11:20 ` [PATCH v2 " Sylwester Nawrocki
4 siblings, 1 reply; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-10 11:06 UTC (permalink / raw)
To: linux-arm-kernel
Extend MIPI-CSIS driver's platform data structure with a callback
for D-PHY enable and reset control. Also add a flag indicating
whether the external MIPI-CSI (VDD18_MIPI) power supply should
be managed in the driver through the "vdd" power supply. On some
boards this regulator may be a fixed voltage regulator without
an inhibit function.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/include/plat/mipi_csis.h | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
index eb3beab..bb4f396 100644
--- a/arch/arm/plat-s5p/include/plat/mipi_csis.h
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -11,18 +11,33 @@
#ifndef PLAT_S5P_MIPI_CSIS_H_
#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+struct platform_device;
+
/**
* struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
* @clk_rate: bus clock frequency
* @lanes: number of data lanes used
* @alignment: data alignment in bits
* @hs_settle: HS-RX settle time
+ * @fixed_phy_vdd: set to 0 if the driver should be managing external
+ * D-PHY power supply through the "vdd" regulator supply
+ * @phy_enable: pointer to a callback controlling D-PHY enable/reset
*/
struct s5p_platform_mipi_csis {
unsigned long clk_rate;
u8 lanes;
u8 alignment;
u8 hs_settle;
+ unsigned fixed_phy_vdd:1;
+ int (*phy_enable)(struct platform_device *pdev, bool on);
};
+/**
+ * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
+ * @pdev: MIPI-CSIS platform device
+ * @on: true to enable D-PHY and deassert its reset
+ * false to disable D-PHY
+ */
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
+
#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v3 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
2011-03-10 11:06 ` [PATCH v3 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Sylwester Nawrocki
@ 2011-03-10 11:29 ` Kukjin Kim
0 siblings, 0 replies; 21+ messages in thread
From: Kukjin Kim @ 2011-03-10 11:29 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> Extend MIPI-CSIS driver's platform data structure with a callback
> for D-PHY enable and reset control. Also add a flag indicating
> whether the external MIPI-CSI (VDD18_MIPI) power supply should
> be managed in the driver through the "vdd" power supply. On some
> boards this regulator may be a fixed voltage regulator without
> an inhibit function.
>
Grrr...you submitted same patch yesterday like following :(
"[PATCH v2] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY"
http://marc.info/?l=linux-arm-kernel&m=129968557727858&w=2
...
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/plat-s5p/include/plat/mipi_csis.h | 15 +++++++++++++++
> 1 files changed, 15 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-
> s5p/include/plat/mipi_csis.h
> index eb3beab..bb4f396 100644
> --- a/arch/arm/plat-s5p/include/plat/mipi_csis.h
> +++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
> @@ -11,18 +11,33 @@
> #ifndef PLAT_S5P_MIPI_CSIS_H_
> #define PLAT_S5P_MIPI_CSIS_H_ __FILE__
>
> +struct platform_device;
> +
> /**
> * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
> * @clk_rate: bus clock frequency
> * @lanes: number of data lanes used
> * @alignment: data alignment in bits
> * @hs_settle: HS-RX settle time
> + * @fixed_phy_vdd: set to 0 if the driver should be managing external
> + * D-PHY power supply through the "vdd" regulator supply
> + * @phy_enable: pointer to a callback controlling D-PHY enable/reset
> */
> struct s5p_platform_mipi_csis {
> unsigned long clk_rate;
> u8 lanes;
> u8 alignment;
> u8 hs_settle;
> + unsigned fixed_phy_vdd:1;
+ bool fixed_phy_vdd:1;
> + int (*phy_enable)(struct platform_device *pdev, bool on);
> };
>
> +/**
> + * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
> + * @pdev: MIPI-CSIS platform device
> + * @on: true to enable D-PHY and deassert its reset
> + * false to disable D-PHY
> + */
> +int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
> +
> #endif /* PLAT_S5P_MIPI_CSIS_H_ */
> --
> 1.7.4.1
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control
2011-03-09 22:55 ` Kukjin Kim
` (2 preceding siblings ...)
2011-03-10 11:06 ` [PATCH v3 2/3] ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Sylwester Nawrocki
@ 2011-03-10 11:06 ` Sylwester Nawrocki
2011-03-10 11:20 ` [PATCH v2 " Sylwester Nawrocki
4 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-10 11:06 UTC (permalink / raw)
To: linux-arm-kernel
Add common code for MIPI-CSIS and MIPI-DSIM drivers to support
their corresponding D-PHY's enable and reset control.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos4/include/mach/regs-clock.h | 4 +-
arch/arm/mach-exynos4/include/mach/regs-pmu.h | 5 ++
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 ++-
arch/arm/plat-s5p/Kconfig | 5 ++
arch/arm/plat-s5p/Makefile | 1 +
arch/arm/plat-s5p/setup-mipiphy.c | 63 +++++++++++++++++++++++
6 files changed, 81 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/plat-s5p/setup-mipiphy.c
diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach-exynos4/include/mach/regs-clock.h
index ba8f91c..38dee94 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h
@@ -160,7 +160,9 @@
#define S5P_CLKDIV_BUS_GPLR_SHIFT (4)
#define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT)
-/* Compatibility defines */
+/* Compatibility defines and inclusion */
+
+#include <mach/regs-pmu.h>
#define S5P_EPLL_CON S5P_EPLL_CON0
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 2ddd617..985416d 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -17,6 +17,11 @@
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
+#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4)
+#define S5P_MIPI_DPHY_ENABLE (1 << 0)
+#define S5P_MIPI_DPHY_SRESETN (1 << 1)
+#define S5P_MIPI_DPHY_MRESETN (1 << 2)
+
#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00)
#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)
#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40)
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 4c45b74..78925c5 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -146,6 +146,10 @@
#define S5P_OM_STAT S5P_CLKREG(0xE100)
#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C)
#define S5P_DAC_CONTROL S5P_CLKREG(0xE810)
+#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814)
+#define S5P_MIPI_DPHY_ENABLE (1 << 0)
+#define S5P_MIPI_DPHY_SRESETN (1 << 1)
+#define S5P_MIPI_DPHY_MRESETN (1 << 2)
#define S5P_INFORM0 S5P_CLKREG(0xF000)
#define S5P_INFORM1 S5P_CLKREG(0xF004)
@@ -161,7 +165,6 @@
#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
-#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
#define S5P_IDLE_CFG_TL_MASK (3 << 30)
#define S5P_IDLE_CFG_TM_MASK (3 << 28)
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 6390ac7..834c77f 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -74,3 +74,8 @@ config S5P_DEV_CSIS1
bool
help
Compile in platform device definitions for MIPI-CSIS channel 1
+
+config S5P_SETUP_MIPIPHY
+ bool
+ help
+ Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices.
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 4bd5cf9..79ee7bb 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
+obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
diff --git a/arch/arm/plat-s5p/setup-mipiphy.c b/arch/arm/plat-s5p/setup-mipiphy.c
new file mode 100644
index 0000000..a51a234
--- /dev/null
+++ b/arch/arm/plat-s5p/setup-mipiphy.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics Co., Ltd
+ *
+ * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <mach/regs-clock.h>
+
+static int __s5p_mipi_phy_control(struct platform_device *pdev,
+ bool on, u32 reset)
+{
+ static DEFINE_SPINLOCK(lock);
+ void __iomem *addr;
+ unsigned long flags;
+ int pid;
+ u32 cfg;
+
+ if (!pdev)
+ return -EINVAL;
+
+ pid = (pdev->id == -1) ? 0 : pdev->id;
+
+ if (pid != 0 && pid != 1)
+ return -EINVAL;
+
+ addr = S5P_MIPI_DPHY_CONTROL(pid);
+
+ spin_lock_irqsave(&lock, flags);
+
+ cfg = __raw_readl(addr);
+ cfg = on ? (cfg | reset) : (cfg & ~reset);
+ __raw_writel(cfg, addr);
+
+ if (on) {
+ cfg |= S5P_MIPI_DPHY_ENABLE;
+ } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN |
+ S5P_MIPI_DPHY_MRESETN) & ~reset)) {
+ cfg &= ~S5P_MIPI_DPHY_ENABLE;
+ }
+
+ __raw_writel(cfg, addr);
+ spin_unlock_irqrestore(&lock, flags);
+
+ return 0;
+}
+
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
+{
+ return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_SRESETN);
+}
+
+int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
+{
+ return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_MRESETN);
+}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control
2011-03-09 22:55 ` Kukjin Kim
` (3 preceding siblings ...)
2011-03-10 11:06 ` [PATCH v3 3/3] ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control Sylwester Nawrocki
@ 2011-03-10 11:20 ` Sylwester Nawrocki
4 siblings, 0 replies; 21+ messages in thread
From: Sylwester Nawrocki @ 2011-03-10 11:20 UTC (permalink / raw)
To: linux-arm-kernel
On 03/09/2011 11:55 PM, Kukjin Kim wrote:
> Sylwester Nawrocki wrote:
>>
>> Add common code for MIPI-CSIS and MIPI-DSIM drivers to support
>> their corresponding D-PHY's enable and reset control.
>> Tested with S5PV210 and EXYNOS4 SoCs.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> arch/arm/mach-exynos4/include/mach/regs-pmu.h | 5 ++
>> arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 +-
>> arch/arm/plat-s5p/Kconfig | 5 ++
>> arch/arm/plat-s5p/Makefile | 1 +
>> arch/arm/plat-s5p/setup-mipi.c | 68
>> +++++++++++++++++++++++
>> 5 files changed, 83 insertions(+), 1 deletions(-)
>> create mode 100644 arch/arm/plat-s5p/setup-mipi.c
...
>> diff --git a/arch/arm/plat-s5p/setup-mipi.c
> b/arch/arm/plat-s5p/setup-mipi.c
>> new file mode 100644
>> index 0000000..4d8ae96
>> --- /dev/null
>> +++ b/arch/arm/plat-s5p/setup-mipi.c
>
> I think, "setup-mipiphy.c" is more clearly :)
OK.
>
>> @@ -0,0 +1,68 @@
>> +/*
>> + * Copyright (C) 2011 Samsung Electronics Co., Ltd
>> + *
>> + * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/io.h>
>> +#include <linux/spinlock.h>
>> +
>> +#ifdef CONFIG_ARCH_EXYNOS4
>> +#include <mach/regs-pmu.h>
>> +#else
>> +#include <mach/regs-clock.h>
>> +#endif
>
> How about following?
>
> --- a/arch/arm/mach-exynos4/include/mach/regs-clock.h
> +++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h
> @@ -160,7 +160,9 @@
> #define S5P_CLKDIV_BUS_GPLR_SHIFT (4)
> #define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT)
>
> -/* Compatibility defines */
> +/* Compatibility defines and inclusion */
> +
> +#include <mach/regs-pmu.h>
>
> #define S5P_EPLL_CON S5P_EPLL_CON0
>
> Then, just adding regs-clock.h here.
>
> +#include <mach/regs-clock.h>
>
Yeah, that should do the trick, thanks. At least for now it's fine.
But I think the concept of having common code for peripherals and just
different headers for register address offset definitions for various
ARCH_S5P* need to be reconsidered to be able to build single image
for a few SoCs.
>> +
>> +static int __s5p_mipi_phy_control(struct platform_device *pdev,
>> + bool on, u32 reset)
...
Regards,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 21+ messages in thread