[RFC PATCH v2] irqchip/gic-v3-its: enable dynamic MSI-X allocation

[RFC PATCH v2] irqchip/gic-v3-its: enable dynamic MSI-X allocation

[Jinqian Yang]

On ARM64 platforms with GICv3 ITS, VFIO PCI passthrough currently
cannot dynamically allocate MSI-X vectors after MSI-X has been
enabled. When QEMU needs to extend the vector range, it must
disable MSI-X, free all interrupts, then re-enable with a larger
allocation. This creates an interrupt loss window for already-active
vectors.

Consider HNS3 with RoCE: NIC and RDMA share one PCI device and
ITS DeviceID, with MSI-X vectors partitioned as NIC (lower range)
then RoCE (starting at base_vector = num_nic_msi). In VFIO
passthrough, loading hns_roce after hns3 forces QEMU to tear down
all interrupts before re-allocating the larger range. During this
process, NIC interrupts may be lost. Testing confirmed that this
occasionally occurs, causing the network port reset to fail. This
appears to be unavoidable, as it's a standard approach adopted by
all network card vendors.

On Hisilicon HIP09 (ARM64, GICv3/GICv4.1) with latest upstream kernel
and QEMU 8.2. VFIO passthrough of HNS3 NIC to VM: load both hns3 and
hns_roce_hw_v2 drivers and trigger FLR, this bug will occur occasionally.
After enabling dynamic MSIX allocation, this bug no longer occurs.

Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com>
---
Changes in v2:
  - Updated the commit message to add test information.

v1: https://lore.kernel.org/linux-arm-kernel/20260624025345.458387-1-yangjinqian1@huawei.com/
---
 drivers/irqchip/irq-gic-its-msi-parent.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq-gic-its-msi-parent.c
index b9257103a999..b2b9d2068bb1 100644
--- a/drivers/irqchip/irq-gic-its-msi-parent.c
+++ b/drivers/irqchip/irq-gic-its-msi-parent.c
@@ -18,7 +18,8 @@
 
 #define ITS_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK |	\
 				 MSI_FLAG_PCI_MSIX      |	\
-				 MSI_FLAG_MULTI_PCI_MSI)
+				 MSI_FLAG_MULTI_PCI_MSI |	\
+				 MSI_FLAG_PCI_MSIX_ALLOC_DYN)
 
 static int its_translate_frame_address(struct fwnode_handle *msi_node, phys_addr_t *pa)
 {
-- 
2.33.0

Re: [RFC PATCH v2] irqchip/gic-v3-its: enable dynamic MSI-X allocation

[Marc Zyngier]

On Sat, 11 Jul 2026 03:20:15 +0100,
Jinqian Yang <yangjinqian1@huawei.com> wrote:
> 
> On ARM64 platforms with GICv3 ITS, VFIO PCI passthrough currently
> cannot dynamically allocate MSI-X vectors after MSI-X has been
> enabled. When QEMU needs to extend the vector range, it must
> disable MSI-X, free all interrupts, then re-enable with a larger
> allocation. This creates an interrupt loss window for already-active
> vectors.
> 
> Consider HNS3 with RoCE: NIC and RDMA share one PCI device and
> ITS DeviceID, with MSI-X vectors partitioned as NIC (lower range)
> then RoCE (starting at base_vector = num_nic_msi). In VFIO
> passthrough, loading hns_roce after hns3 forces QEMU to tear down
> all interrupts before re-allocating the larger range. During this
> process, NIC interrupts may be lost. Testing confirmed that this
> occasionally occurs, causing the network port reset to fail. This
> appears to be unavoidable, as it's a standard approach adopted by
> all network card vendors.
> 
> On Hisilicon HIP09 (ARM64, GICv3/GICv4.1) with latest upstream kernel
> and QEMU 8.2. VFIO passthrough of HNS3 NIC to VM: load both hns3 and
> hns_roce_hw_v2 drivers and trigger FLR, this bug will occur occasionally.
> After enabling dynamic MSIX allocation, this bug no longer occurs.
> 
> Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com>
> ---
> Changes in v2:
>   - Updated the commit message to add test information.
> 
> v1: https://lore.kernel.org/linux-arm-kernel/20260624025345.458387-1-yangjinqian1@huawei.com/
> ---
>  drivers/irqchip/irq-gic-its-msi-parent.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Jazz isn't dead. It just smells funny.

Re: [RFC PATCH v2] irqchip/gic-v3-its: enable dynamic MSI-X allocation

[Thomas Gleixner]

On Sat, Jul 11 2026 at 10:20, Jinqian Yang wrote:
> On ARM64 platforms with GICv3 ITS, VFIO PCI passthrough currently
> cannot dynamically allocate MSI-X vectors after MSI-X has been
> enabled. When QEMU needs to extend the vector range, it must
> disable MSI-X, free all interrupts, then re-enable with a larger
> allocation. This creates an interrupt loss window for already-active
> vectors.
>
> Consider HNS3 with RoCE: NIC and RDMA share one PCI device and
> ITS DeviceID, with MSI-X vectors partitioned as NIC (lower range)
> then RoCE (starting at base_vector = num_nic_msi). In VFIO
> passthrough, loading hns_roce after hns3 forces QEMU to tear down
> all interrupts before re-allocating the larger range. During this
> process, NIC interrupts may be lost. Testing confirmed that this
> occasionally occurs, causing the network port reset to fail. This
> appears to be unavoidable, as it's a standard approach adopted by
> all network card vendors.
>
> On Hisilicon HIP09 (ARM64, GICv3/GICv4.1) with latest upstream kernel
> and QEMU 8.2. VFIO passthrough of HNS3 NIC to VM: load both hns3 and
> hns_roce_hw_v2 drivers and trigger FLR, this bug will occur occasionally.
> After enabling dynamic MSIX allocation, this bug no longer occurs.
>
> Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com>
> ---
> Changes in v2:
>   - Updated the commit message to add test information.

Well, it contains test information, but it does not tell me _WHY_ this
is safe to do, i.e. what makes gic-v3-its eligible to set this flag?