[PATCH v2 0/3] Add one clock gate for i.MX95 HSIO block

[PATCH v2 0/3] Add one clock gate for i.MX95 HSIO block

[Richard Zhu]

CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
enable/disable.
Add one clock gate for i.MX95 HSIO block to support PCIe REF clock
out gate.

v2 changes:
- Correct the compatible entries by alphabetical order
- Include all necessary To/Cc entried reminderd by Krzysztof.
Thanks.

[PATCH v2 1/3] dt-bindings: clock: nxp,imx95-blk-ctl: Correct
[PATCH v2 2/3] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible
[PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO block

Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml |  5 +++--
drivers/clk/imx/clk-imx95-blk-ctl.c                            | 20 ++++++++++++++++++++
2 files changed, 23 insertions(+), 2 deletions(-)

[PATCH v2 1/3] dt-bindings: clock: nxp,imx95-blk-ctl: Correct compatible entries by alphabetical order

[Richard Zhu]

No function chanegs, correct compatible entries by alphabetical order.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 .../devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml          | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
index 2dffc02dcd8b..6a928735e00d 100644
--- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
+++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
@@ -13,9 +13,9 @@ properties:
   compatible:
     items:
       - enum:
-          - nxp,imx95-lvds-csr
-          - nxp,imx95-display-csr
           - nxp,imx95-camera-csr
+          - nxp,imx95-display-csr
+          - nxp,imx95-lvds-csr
           - nxp,imx95-vpu-csr
       - const: syscon
 
-- 
2.37.1

[PATCH v2 2/3] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible string for i.MX95 HSIO BLK CTRL

[Richard Zhu]

Add compatible string "nxp,imx95-hsio-blk-ctl" for i.MX95.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
index 6a928735e00d..244fe7b95fd6 100644
--- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
+++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
@@ -15,6 +15,7 @@ properties:
       - enum:
           - nxp,imx95-camera-csr
           - nxp,imx95-display-csr
+          - nxp,imx95-hsio-blk-ctl
           - nxp,imx95-lvds-csr
           - nxp,imx95-vpu-csr
       - const: syscon
-- 
2.37.1

[PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO block

[Richard Zhu]

CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
enable/disable.

Add compatible string "fsl,imx95-hsio-blk-ctl" to support PCIe REF clock
out gate.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/clk/imx/clk-imx95-blk-ctl.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c b/drivers/clk/imx/clk-imx95-blk-ctl.c
index 74f595f9e5e3..596dfb2f3b75 100644
--- a/drivers/clk/imx/clk-imx95-blk-ctl.c
+++ b/drivers/clk/imx/clk-imx95-blk-ctl.c
@@ -248,6 +248,25 @@ static const struct imx95_blk_ctl_dev_data dispmix_csr_dev_data = {
 	.clk_reg_offset = 0,
 };
 
+static const struct imx95_blk_ctl_clk_dev_data hsio_blk_ctl_clk_dev_data[] = {
+	[0] = {
+		.name = "hsio_blk_ctl_clk",
+		.parent_names = (const char *[]){ "hsio_pll", },
+		.num_parents = 1,
+		.reg = 0,
+		.bit_idx = 6,
+		.bit_width = 1,
+		.type = CLK_GATE,
+		.flags = CLK_SET_RATE_PARENT,
+	}
+};
+
+static const struct imx95_blk_ctl_dev_data hsio_blk_ctl_dev_data = {
+	.num_clks = 1,
+	.clk_dev_data = hsio_blk_ctl_clk_dev_data,
+	.clk_reg_offset = 0,
+};
+
 static int imx95_bc_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -418,6 +437,7 @@ static const struct of_device_id imx95_bc_of_match[] = {
 	{ .compatible = "nxp,imx95-display-master-csr", },
 	{ .compatible = "nxp,imx95-lvds-csr", .data = &lvds_csr_dev_data },
 	{ .compatible = "nxp,imx95-display-csr", .data = &dispmix_csr_dev_data },
+	{ .compatible = "nxp,imx95-hsio-blk-ctl", .data = &hsio_blk_ctl_dev_data },
 	{ .compatible = "nxp,imx95-vpu-csr", .data = &vpublk_dev_data },
 	{ /* Sentinel */ },
 };
-- 
2.37.1

Re: [PATCH v2 1/3] dt-bindings: clock: nxp,imx95-blk-ctl: Correct compatible entries by alphabetical order

[Frank Li]

On Thu, Sep 05, 2024 at 10:31:06AM +0800, Richard Zhu wrote:
> No function chanegs, correct compatible entries by alphabetical order.

nit:

Sort compatible entries by alphabetical order.

Frank

>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  .../devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml          | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> index 2dffc02dcd8b..6a928735e00d 100644
> --- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> @@ -13,9 +13,9 @@ properties:
>    compatible:
>      items:
>        - enum:
> -          - nxp,imx95-lvds-csr
> -          - nxp,imx95-display-csr
>            - nxp,imx95-camera-csr
> +          - nxp,imx95-display-csr
> +          - nxp,imx95-lvds-csr
>            - nxp,imx95-vpu-csr
>        - const: syscon
>
> --
> 2.37.1
>

Re: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO block

[Frank Li]

On Thu, Sep 05, 2024 at 10:31:08AM +0800, Richard Zhu wrote:
> CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
> enable/disable.
>
> Add compatible string "fsl,imx95-hsio-blk-ctl" to support PCIe REF clock
> out gate.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/clk/imx/clk-imx95-blk-ctl.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c b/drivers/clk/imx/clk-imx95-blk-ctl.c
> index 74f595f9e5e3..596dfb2f3b75 100644
> --- a/drivers/clk/imx/clk-imx95-blk-ctl.c
> +++ b/drivers/clk/imx/clk-imx95-blk-ctl.c
> @@ -248,6 +248,25 @@ static const struct imx95_blk_ctl_dev_data dispmix_csr_dev_data = {
>  	.clk_reg_offset = 0,
>  };
>
> +static const struct imx95_blk_ctl_clk_dev_data hsio_blk_ctl_clk_dev_data[] = {
> +	[0] = {
> +		.name = "hsio_blk_ctl_clk",
> +		.parent_names = (const char *[]){ "hsio_pll", },
> +		.num_parents = 1,
> +		.reg = 0,
> +		.bit_idx = 6,
> +		.bit_width = 1,
> +		.type = CLK_GATE,
> +		.flags = CLK_SET_RATE_PARENT,
> +	}
> +};
> +
> +static const struct imx95_blk_ctl_dev_data hsio_blk_ctl_dev_data = {
> +	.num_clks = 1,
> +	.clk_dev_data = hsio_blk_ctl_clk_dev_data,
> +	.clk_reg_offset = 0,
> +};
> +
>  static int imx95_bc_probe(struct platform_device *pdev)
>  {
>  	struct device *dev = &pdev->dev;
> @@ -418,6 +437,7 @@ static const struct of_device_id imx95_bc_of_match[] = {
>  	{ .compatible = "nxp,imx95-display-master-csr", },
>  	{ .compatible = "nxp,imx95-lvds-csr", .data = &lvds_csr_dev_data },
>  	{ .compatible = "nxp,imx95-display-csr", .data = &dispmix_csr_dev_data },
> +	{ .compatible = "nxp,imx95-hsio-blk-ctl", .data = &hsio_blk_ctl_dev_data },
>  	{ .compatible = "nxp,imx95-vpu-csr", .data = &vpublk_dev_data },
>  	{ /* Sentinel */ },
>  };
> --
> 2.37.1
>

Re: [PATCH v2 2/3] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible string for i.MX95 HSIO BLK CTRL

[Krzysztof Kozlowski]

On Thu, Sep 05, 2024 at 10:31:07AM +0800, Richard Zhu wrote:
> Add compatible string "nxp,imx95-hsio-blk-ctl" for i.MX95.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---

This one here is so trivial, you can squash both patches.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

RE: [PATCH v2 2/3] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible string for i.MX95 HSIO BLK CTRL

[Hongxing Zhu]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: 2024年9月5日 14:45
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> abelvesa@kernel.org; Peng Fan <peng.fan@nxp.com>;
> mturquette@baylibre.com; sboyd@kernel.org; shawnguo@kernel.org;
> s.hauer@pengutronix.de; festevam@gmail.com; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-clk@vger.kernel.org; imx@lists.linux.dev; kernel@pengutronix.de
> Subject: Re: [PATCH v2 2/3] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible
> string for i.MX95 HSIO BLK CTRL
> 
> On Thu, Sep 05, 2024 at 10:31:07AM +0800, Richard Zhu wrote:
> > Add compatible string "nxp,imx95-hsio-blk-ctl" for i.MX95.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> 
> This one here is so trivial, you can squash both patches.
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Okay, If you don't mind, I will squash the first two patches into one.
Thanks a lot for your review.

Best Regards
Richard Zhu
> 
> Best regards,
> Krzysztof

RE: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO block

[Peng Fan]

> Subject: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO
> block
> 
> CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
> enable/disable.
> 
> Add compatible string "fsl,imx95-hsio-blk-ctl" to support PCIe REF clock

Typo: nxp,imx95-hsio-blk-ctl.

Except this, LGTM: Reviewed-by: Peng Fan <peng.fan@nxp.com>

Regards,
Peng.

RE: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO block

[Hongxing Zhu]

> -----Original Message-----
> From: Peng Fan <peng.fan@nxp.com>
> Sent: 2024年9月5日 16:06
> To: Hongxing Zhu <hongxing.zhu@nxp.com>; robh@kernel.org;
> krzk+dt@kernel.org; conor+dt@kernel.org; abelvesa@kernel.org;
> mturquette@baylibre.com; sboyd@kernel.org; shawnguo@kernel.org;
> s.hauer@pengutronix.de; festevam@gmail.com
> Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-clk@vger.kernel.org;
> imx@lists.linux.dev; kernel@pengutronix.de; Hongxing Zhu
> <hongxing.zhu@nxp.com>
> Subject: RE: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO
> block
> 
> > Subject: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for
> > HSIO block
> >
> > CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
> > enable/disable.
> >
> > Add compatible string "fsl,imx95-hsio-blk-ctl" to support PCIe REF
> > clock
> 
> Typo: nxp,imx95-hsio-blk-ctl.
Nice catch, thanks.
Would be corrected later.
Best Regards
Richard Zhu
> 
> Except this, LGTM: Reviewed-by: Peng Fan <peng.fan@nxp.com>
> 
> Regards,
> Peng.