* [PATCH v7 0/4] add sysfs nodes to configure TPDA's registers
@ 2025-12-23 8:41 Jie Gan
2025-12-23 8:41 ` [PATCH v7 1/4] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration Jie Gan
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Jie Gan @ 2025-12-23 8:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Jie Gan, Tao Zhang
Patchset 1 introduces configuration of the global control register with
appropriate values to enable proper generation of cross-trigger packets.
Patchset 2 introduces a sysfs node for triggering global flush for all
ports.
Patchset 3 introduces a logic to configure the TPDA_SYNCR register,
which determines the frequency of ASYNC packet generation. These packets
assist userspace tools in accurately identifying each valid packet.
Patchset 4 introduces a sysfs node to initiate a flush request for the
specific port, forcing the data to synchronize and be transmitted to the
sink device.
Changes in v7:
1. add syncr_count sysfs node.
2. add more detail to describe port_flush_req node.
Link to v6: https://lore.kernel.org/r/20251222-add_sysfs_nodes_to_configure_tpda-v6-0-b27143d45c86@oss.qualcomm.com
Changes in v6:
1. Create a new patch for introducing gloabl_flush_req sysfs node.
2. Add a syncr_mode sysfs node for TPDA_SYNCR.
3. Remove the redundant attr_grp and consolidate all attributes under tpda_attr_grp.
Link to v5: https://lore.kernel.org/r/20251219-add_sysfs_nodes_to_configure_tpda-v5-0-ca93ddfe9d30@oss.qualcomm.com
Chnages in V5:
1. Optimizing the solution to creat sysfs nodes.
2. Optimizing the logic for configuring bits of the global control
register.
Link to V4 - https://lore.kernel.org/all/20251028-configure_tpda_reg-v4-0-23000805d21d@oss.qualcomm.com/
Changes in V4:
1. Document sysfs nodes with correct kernel version and date.
Link to V3 - https://lore.kernel.org/linux-arm-kernel/20250827105545.7140-1-jie.gan@oss.qualcomm.com/
Changes in V3:
1. Optimizing codes according to James's comment.
Link to V2 - https://lore.kernel.org/all/20250827042042.6786-1-jie.gan@oss.qualcomm.com/
Changes in V2:
1. Refactoring the code based on James's comment for optimization.
Link to V1 - https://lore.kernel.org/all/20250826070150.5603-1-jie.gan@oss.qualcomm.com/
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
Jie Gan (1):
coresight: tpda: add global_flush_req sysfs node
Tao Zhang (3):
coresight: tpda: add sysfs nodes for tpda cross-trigger configuration
coresight: tpda: add logic to configure TPDA_SYNCR register
coresight: tpda: add sysfs node to flush specific port
.../ABI/testing/sysfs-bus-coresight-devices-tpda | 69 +++++
drivers/hwtracing/coresight/coresight-tpda.c | 284 ++++++++++++++++++++-
drivers/hwtracing/coresight/coresight-tpda.h | 76 +++++-
3 files changed, 422 insertions(+), 7 deletions(-)
---
base-commit: 12b95d29eb979e5c4f4f31bb05817bc935c52050
change-id: 20251219-add_sysfs_nodes_to_configure_tpda-f54636512817
Best regards,
--
Jie Gan <jie.gan@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v7 1/4] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration
2025-12-23 8:41 [PATCH v7 0/4] add sysfs nodes to configure TPDA's registers Jie Gan
@ 2025-12-23 8:41 ` Jie Gan
2025-12-23 8:41 ` [PATCH v7 2/4] coresight: tpda: add global_flush_req sysfs node Jie Gan
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Jie Gan @ 2025-12-23 8:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Jie Gan, Tao Zhang
From: Tao Zhang <tao.zhang@oss.qualcomm.com>
Introduce sysfs nodes to configure cross-trigger parameters for TPDA.
These registers define the characteristics of cross-trigger packets,
including generation frequency and flag values.
Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tpda | 35 +++++++
drivers/hwtracing/coresight/coresight-tpda.c | 109 ++++++++++++++++++++-
drivers/hwtracing/coresight/coresight-tpda.h | 63 +++++++++++-
3 files changed, 200 insertions(+), 7 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
new file mode 100644
index 000000000000..735ce0e494da
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
@@ -0,0 +1,35 @@
+What: /sys/bus/coresight/devices/<tpda-name>/trig_async_enable
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Enable/disable cross trigger synchronization sequence interface.
+
+What: /sys/bus/coresight/devices/<tpda-name>/trig_flag_ts_enable
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Enable/disable cross trigger FLAG packet request interface.
+
+What: /sys/bus/coresight/devices/<tpda-name>/trig_freq_enable
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Enable/disable cross trigger FREQ packet request interface.
+
+What: /sys/bus/coresight/devices/<tpda-name>/freq_ts_enable
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Enable/disable the timestamp for all FREQ packets.
+
+What: /sys/bus/coresight/devices/<tpda-name>/cmbchan_mode
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Configure the CMB/MCMB channel mode for all enabled ports.
+ Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index 3a3825d27f86..2186223ad33e 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -137,12 +137,32 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata,
/* Settings pre enabling port control register */
static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
{
- u32 val;
+ u32 val = 0;
- val = readl_relaxed(drvdata->base + TPDA_CR);
- val &= ~TPDA_CR_ATID;
val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid);
+ if (drvdata->trig_async)
+ val |= TPDA_CR_SRIE;
+
+ if (drvdata->trig_flag_ts)
+ val |= TPDA_CR_FLRIE;
+
+ if (drvdata->trig_freq)
+ val |= TPDA_CR_FRIE;
+
+ if (drvdata->freq_ts)
+ val |= TPDA_CR_FREQTS;
+
+ if (drvdata->cmbchan_mode)
+ val |= TPDA_CR_CMBCHANMODE;
+
writel_relaxed(val, drvdata->base + TPDA_CR);
+
+ /*
+ * If FLRIE bit is set, set the master and channel
+ * id as zero
+ */
+ if (drvdata->trig_flag_ts)
+ writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
}
static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
@@ -258,6 +278,87 @@ static const struct coresight_ops tpda_cs_ops = {
.link_ops = &tpda_link_ops,
};
+/* Read cross-trigger register member */
+static ssize_t tpda_trig_sysfs_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_trig_sysfs_attribute *tpda_attr =
+ container_of(attr, struct tpda_trig_sysfs_attribute, attr);
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ guard(spinlock)(&drvdata->spinlock);
+ switch (tpda_attr->mem) {
+ case FREQTS:
+ return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->freq_ts);
+ case FRIE:
+ return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->trig_freq);
+ case FLRIE:
+ return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->trig_flag_ts);
+ case SRIE:
+ return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->trig_async);
+ case CMBCHANMODE:
+ return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->cmbchan_mode);
+
+ }
+ return -EINVAL;
+}
+
+static ssize_t tpda_trig_sysfs_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_trig_sysfs_attribute *tpda_attr =
+ container_of(attr, struct tpda_trig_sysfs_attribute, attr);
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ switch (tpda_attr->mem) {
+ case FREQTS:
+ drvdata->freq_ts = !!val;
+ break;
+ case FRIE:
+ drvdata->trig_freq = !!val;
+ break;
+ case FLRIE:
+ drvdata->trig_flag_ts = !!val;
+ break;
+ case SRIE:
+ drvdata->trig_async = !!val;
+ break;
+ case CMBCHANMODE:
+ drvdata->cmbchan_mode = !!val;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return size;
+}
+
+static struct attribute *tpda_attrs[] = {
+ tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
+ tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
+ tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
+ tpda_trig_sysfs_rw(trig_async_enable, SRIE),
+ tpda_trig_sysfs_rw(cmbchan_mode, CMBCHANMODE),
+ NULL,
+};
+
+static struct attribute_group tpda_attr_grp = {
+ .attrs = tpda_attrs,
+};
+
+static const struct attribute_group *tpda_attr_grps[] = {
+ &tpda_attr_grp,
+ NULL,
+};
+
static int tpda_init_default_data(struct tpda_drvdata *drvdata)
{
int atid;
@@ -273,6 +374,7 @@ static int tpda_init_default_data(struct tpda_drvdata *drvdata)
return atid;
drvdata->atid = atid;
+ drvdata->freq_ts = true;
return 0;
}
@@ -316,6 +418,7 @@ static int tpda_probe(struct amba_device *adev, const struct amba_id *id)
desc.ops = &tpda_cs_ops;
desc.pdata = adev->dev.platform_data;
desc.dev = &adev->dev;
+ desc.groups = tpda_attr_grps;
desc.access = CSDEV_ACCESS_IOMEM(base);
drvdata->csdev = coresight_register(&desc);
if (IS_ERR(drvdata->csdev))
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index c6af3d2da3ef..c93732e04af2 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2023,2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _CORESIGHT_CORESIGHT_TPDA_H
@@ -8,6 +8,25 @@
#define TPDA_CR (0x000)
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
+#define TPDA_FPID_CR (0x084)
+
+/* Cross trigger FREQ packets timestamp bit */
+#define TPDA_CR_FREQTS BIT(2)
+/* Cross trigger FREQ packet request bit */
+#define TPDA_CR_FRIE BIT(3)
+/* Cross trigger FLAG packet request interface bit */
+#define TPDA_CR_FLRIE BIT(4)
+/* Cross trigger synchronization bit */
+#define TPDA_CR_SRIE BIT(5)
+/* Bits 6 ~ 12 is for atid value */
+#define TPDA_CR_ATID GENMASK(12, 6)
+/*
+ * Channel mode bit of the packetization of CMB/MCB traffic
+ * 0 - raw channel mapping mode
+ * 1 - channel pair marking mode
+ */
+#define TPDA_CR_CMBCHANMODE BIT(20)
+
/* Aggregator port enable bit */
#define TPDA_Pn_CR_ENA BIT(0)
/* Aggregator port CMB data set element size bit */
@@ -17,9 +36,6 @@
#define TPDA_MAX_INPORTS 32
-/* Bits 6 ~ 12 is for atid value */
-#define TPDA_CR_ATID GENMASK(12, 6)
-
/**
* struct tpda_drvdata - specifics associated to an TPDA component
* @base: memory mapped base address for this component.
@@ -29,6 +45,11 @@
* @enable: enable status of the component.
* @dsb_esize Record the DSB element size.
* @cmb_esize Record the CMB element size.
+ * @trig_async: Enable/disable cross trigger synchronization sequence interface.
+ * @trig_flag_ts: Enable/disable cross trigger FLAG packet request interface.
+ * @trig_freq: Enable/disable cross trigger FREQ packet request interface.
+ * @freq_ts: Enable/disable the timestamp for all FREQ packets.
+ * @cmbchan_mode: Configure the CMB/MCMB channel mode.
*/
struct tpda_drvdata {
void __iomem *base;
@@ -38,6 +59,40 @@ struct tpda_drvdata {
u8 atid;
u32 dsb_esize;
u32 cmb_esize;
+ bool trig_async;
+ bool trig_flag_ts;
+ bool trig_freq;
+ bool freq_ts;
+ bool cmbchan_mode;
+};
+
+/* Enumerate members of global control register(cr) */
+enum tpda_cr_mem {
+ FREQTS,
+ FRIE,
+ FLRIE,
+ SRIE,
+ CMBCHANMODE
+};
+
+/**
+ * struct tpda_trig_sysfs_attribute - Record the member variables of cross
+ * trigger register that need to be operated by sysfs file
+ * @attr: The device attribute
+ * @mem: The member in the control register data structure
+ */
+struct tpda_trig_sysfs_attribute {
+ struct device_attribute attr;
+ enum tpda_cr_mem mem;
};
+#define tpda_trig_sysfs_rw(name, mem) \
+ (&((struct tpda_trig_sysfs_attribute[]) { \
+ { \
+ __ATTR(name, 0644, tpda_trig_sysfs_show, \
+ tpda_trig_sysfs_store), \
+ mem, \
+ } \
+ })[0].attr.attr)
+
#endif /* _CORESIGHT_CORESIGHT_TPDA_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v7 2/4] coresight: tpda: add global_flush_req sysfs node
2025-12-23 8:41 [PATCH v7 0/4] add sysfs nodes to configure TPDA's registers Jie Gan
2025-12-23 8:41 ` [PATCH v7 1/4] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration Jie Gan
@ 2025-12-23 8:41 ` Jie Gan
2025-12-23 8:41 ` [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register Jie Gan
2025-12-23 8:41 ` [PATCH v7 4/4] coresight: tpda: add sysfs node to flush specific port Jie Gan
3 siblings, 0 replies; 7+ messages in thread
From: Jie Gan @ 2025-12-23 8:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Jie Gan
Setting the global_flush_req register to 1 initiates a flush request for
all enabled TPDA input ports. The register remains set until the flush
operation is complete.
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tpda | 8 ++++
drivers/hwtracing/coresight/coresight-tpda.c | 45 ++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 2 +
3 files changed, 55 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
index 735ce0e494da..c8bc7b19ab25 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
@@ -33,3 +33,11 @@ Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
Description:
(RW) Configure the CMB/MCMB channel mode for all enabled ports.
Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
+
+What: /sys/bus/coresight/devices/<tpda-name>/global_flush_req
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Set global (all ports) flush request bit. The bit remains set until a
+ global flush request sequence completes.
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index 2186223ad33e..d24a9098f1b1 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -341,7 +341,52 @@ static ssize_t tpda_trig_sysfs_store(struct device *dev,
return size;
}
+static ssize_t global_flush_req_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ val = readl_relaxed(drvdata->base + TPDA_CR);
+ /* read global_flush_req bit */
+ val &= TPDA_CR_FLREQ;
+
+ return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t global_flush_req_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ if (!drvdata->csdev->refcnt || !val)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ val = readl_relaxed(drvdata->base + TPDA_CR);
+ /* set global_flush_req bit */
+ val |= TPDA_CR_FLREQ;
+ CS_UNLOCK(drvdata->base);
+ writel_relaxed(val, drvdata->base + TPDA_CR);
+ CS_LOCK(drvdata->base);
+
+ return size;
+}
+static DEVICE_ATTR_RW(global_flush_req);
+
static struct attribute *tpda_attrs[] = {
+ &dev_attr_global_flush_req.attr,
tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index c93732e04af2..1cc9253293ec 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -10,6 +10,8 @@
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
#define TPDA_FPID_CR (0x084)
+/* Cross trigger global (all ports) flush request bit */
+#define TPDA_CR_FLREQ BIT(0)
/* Cross trigger FREQ packets timestamp bit */
#define TPDA_CR_FREQTS BIT(2)
/* Cross trigger FREQ packet request bit */
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register
2025-12-23 8:41 [PATCH v7 0/4] add sysfs nodes to configure TPDA's registers Jie Gan
2025-12-23 8:41 ` [PATCH v7 1/4] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration Jie Gan
2025-12-23 8:41 ` [PATCH v7 2/4] coresight: tpda: add global_flush_req sysfs node Jie Gan
@ 2025-12-23 8:41 ` Jie Gan
2025-12-23 9:49 ` Suzuki K Poulose
2025-12-23 8:41 ` [PATCH v7 4/4] coresight: tpda: add sysfs node to flush specific port Jie Gan
3 siblings, 1 reply; 7+ messages in thread
From: Jie Gan @ 2025-12-23 8:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Jie Gan, Tao Zhang
From: Tao Zhang <tao.zhang@oss.qualcomm.com>
The TPDA_SYNC counter tracks the number of bytes transferred from the
aggregator. When this count reaches the value programmed in the
TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace
tools to accurately parse each valid packet.
Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tpda | 18 +++++
drivers/hwtracing/coresight/coresight-tpda.c | 90 ++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 10 +++
3 files changed, 118 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
index c8bc7b19ab25..c989eea1ef59 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
@@ -41,3 +41,21 @@ Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
Description:
(RW) Set global (all ports) flush request bit. The bit remains set until a
global flush request sequence completes.
+
+What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Set mode the of the syncr counter.
+ mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
+ mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
+ data by writing a value 13 to the COUNT[11:7] field.
+
+What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Set value the of the syncr counter.
+ Range: 0-4095
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index d24a9098f1b1..8283e16ec400 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -163,6 +163,20 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
*/
if (drvdata->trig_flag_ts)
writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
+
+ /* Initialize with a value of 0 */
+ val = 0;
+ if (drvdata->syncr_mode)
+ val |= TPDA_SYNCR_MODE_CTRL_MASK;
+
+ if (drvdata->syncr_count > 0 &&
+ drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK)
+ val |= drvdata->syncr_count;
+ else
+ /* Program the count to its MAX value by default */
+ val |= TPDA_SYNCR_COUNT_MASK;
+
+ writel_relaxed(val, drvdata->base + TPDA_SYNCR);
}
static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
@@ -385,8 +399,84 @@ static ssize_t global_flush_req_store(struct device *dev,
}
static DEVICE_ATTR_RW(global_flush_req);
+static ssize_t syncr_mode_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val, syncr_val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
+ val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
+
+ return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t syncr_mode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ /* set the mode when first enabling the device */
+ drvdata->syncr_mode = !!val;
+
+ return size;
+}
+static DEVICE_ATTR_RW(syncr_mode);
+
+static ssize_t syncr_count_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ val = readl_relaxed(drvdata->base + TPDA_SYNCR);
+ val &= TPDA_SYNCR_COUNT_MASK;
+
+ return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t syncr_count_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ if (val < 0 || val > TPDA_SYNCR_COUNT_MASK)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ drvdata->syncr_count = val;
+
+ return size;
+}
+static DEVICE_ATTR_RW(syncr_count);
+
static struct attribute *tpda_attrs[] = {
&dev_attr_global_flush_req.attr,
+ &dev_attr_syncr_mode.attr,
+ &dev_attr_syncr_count.attr,
tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index 1cc9253293ec..56d35697303a 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -9,6 +9,7 @@
#define TPDA_CR (0x000)
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
#define TPDA_FPID_CR (0x084)
+#define TPDA_SYNCR (0x08C)
/* Cross trigger global (all ports) flush request bit */
#define TPDA_CR_FLREQ BIT(0)
@@ -36,6 +37,11 @@
/* Aggregator port DSB data set element size bit */
#define TPDA_Pn_CR_DSBSIZE BIT(8)
+/* TPDA_SYNCR count mask */
+#define TPDA_SYNCR_COUNT_MASK GENMASK(11, 0)
+/* TPDA_SYNCR mode control bit */
+#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12)
+
#define TPDA_MAX_INPORTS 32
/**
@@ -52,6 +58,8 @@
* @trig_freq: Enable/disable cross trigger FREQ packet request interface.
* @freq_ts: Enable/disable the timestamp for all FREQ packets.
* @cmbchan_mode: Configure the CMB/MCMB channel mode.
+ * @syncr_mode: Setting the mode for counting packets.
+ * @syncr_count: Setting the value of the count.
*/
struct tpda_drvdata {
void __iomem *base;
@@ -66,6 +74,8 @@ struct tpda_drvdata {
bool trig_freq;
bool freq_ts;
bool cmbchan_mode;
+ bool syncr_mode;
+ u32 syncr_count;
};
/* Enumerate members of global control register(cr) */
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v7 4/4] coresight: tpda: add sysfs node to flush specific port
2025-12-23 8:41 [PATCH v7 0/4] add sysfs nodes to configure TPDA's registers Jie Gan
` (2 preceding siblings ...)
2025-12-23 8:41 ` [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register Jie Gan
@ 2025-12-23 8:41 ` Jie Gan
3 siblings, 0 replies; 7+ messages in thread
From: Jie Gan @ 2025-12-23 8:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Jie Gan, Tao Zhang
From: Tao Zhang <tao.zhang@oss.qualcomm.com>
Setting bit i in the TPDA_FLUSH_CR register initiates a flush request
for port i, forcing the data to synchronize and be transmitted to the
sink device.
Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tpda | 8 +++++
drivers/hwtracing/coresight/coresight-tpda.c | 40 ++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 1 +
3 files changed, 49 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
index c989eea1ef59..48b8fda1b796 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
@@ -59,3 +59,11 @@ Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
Description:
(RW) Set value the of the syncr counter.
Range: 0-4095
+
+What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req
+Date: December 2025
+KernelVersion: 6.19
+Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+ (RW) Configure the bit i to requests a flush operation of port i on the TPDA.
+ The requested bit(s) remain set until the flush request completes.
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index 8283e16ec400..412c35decc8e 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -473,10 +473,50 @@ static ssize_t syncr_count_store(struct device *dev,
}
static DEVICE_ATTR_RW(syncr_count);
+static ssize_t port_flush_req_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (!drvdata->csdev->refcnt)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ val = readl_relaxed(drvdata->base + TPDA_FLUSH_CR);
+
+ return sysfs_emit(buf, "0x%lx\n", val);
+}
+
+static ssize_t port_flush_req_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ u32 val;
+
+ if (kstrtou32(buf, 0, &val))
+ return -EINVAL;
+
+ if (!drvdata->csdev->refcnt || !val)
+ return -EINVAL;
+
+ guard(spinlock)(&drvdata->spinlock);
+ CS_UNLOCK(drvdata->base);
+ writel_relaxed(val, drvdata->base + TPDA_FLUSH_CR);
+ CS_LOCK(drvdata->base);
+
+ return size;
+}
+static DEVICE_ATTR_RW(port_flush_req);
+
static struct attribute *tpda_attrs[] = {
&dev_attr_global_flush_req.attr,
&dev_attr_syncr_mode.attr,
&dev_attr_syncr_count.attr,
+ &dev_attr_port_flush_req.attr,
tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index 56d35697303a..a090352009bb 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -10,6 +10,7 @@
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
#define TPDA_FPID_CR (0x084)
#define TPDA_SYNCR (0x08C)
+#define TPDA_FLUSH_CR (0x090)
/* Cross trigger global (all ports) flush request bit */
#define TPDA_CR_FLREQ BIT(0)
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register
2025-12-23 8:41 ` [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register Jie Gan
@ 2025-12-23 9:49 ` Suzuki K Poulose
2025-12-23 9:53 ` Jie Gan
0 siblings, 1 reply; 7+ messages in thread
From: Suzuki K Poulose @ 2025-12-23 9:49 UTC (permalink / raw)
To: Jie Gan, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Tao Zhang
On 23/12/2025 08:41, Jie Gan wrote:
> From: Tao Zhang <tao.zhang@oss.qualcomm.com>
>
> The TPDA_SYNC counter tracks the number of bytes transferred from the
> aggregator. When this count reaches the value programmed in the
> TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace
> tools to accurately parse each valid packet.
>
> Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
> Reviewed-by: James Clark <james.clark@linaro.org>
> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> .../ABI/testing/sysfs-bus-coresight-devices-tpda | 18 +++++
> drivers/hwtracing/coresight/coresight-tpda.c | 90 ++++++++++++++++++++++
> drivers/hwtracing/coresight/coresight-tpda.h | 10 +++
> 3 files changed, 118 insertions(+)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
> index c8bc7b19ab25..c989eea1ef59 100644
> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
> @@ -41,3 +41,21 @@ Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
> Description:
> (RW) Set global (all ports) flush request bit. The bit remains set until a
> global flush request sequence completes.
> +
> +What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
> +Date: December 2025
> +KernelVersion: 6.19
> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
> +Description:
> + (RW) Set mode the of the syncr counter.
> + mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
> + mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
> + data by writing a value 13 to the COUNT[11:7] field.
> +
> +What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
> +Date: December 2025
> +KernelVersion: 6.19
> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
> +Description:
> + (RW) Set value the of the syncr counter.
> + Range: 0-4095
> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
> index d24a9098f1b1..8283e16ec400 100644
> --- a/drivers/hwtracing/coresight/coresight-tpda.c
> +++ b/drivers/hwtracing/coresight/coresight-tpda.c
> @@ -163,6 +163,20 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
> */
> if (drvdata->trig_flag_ts)
> writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
> +
> + /* Initialize with a value of 0 */
> + val = 0;
> + if (drvdata->syncr_mode)
> + val |= TPDA_SYNCR_MODE_CTRL_MASK;
> +
> + if (drvdata->syncr_count > 0 &&
> + drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK)
> + val |= drvdata->syncr_count;
> + else
> + /* Program the count to its MAX value by default */
> + val |= TPDA_SYNCR_COUNT_MASK;
> +
> + writel_relaxed(val, drvdata->base + TPDA_SYNCR);
> }
>
> static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
> @@ -385,8 +399,84 @@ static ssize_t global_flush_req_store(struct device *dev,
> }
> static DEVICE_ATTR_RW(global_flush_req);
>
> +static ssize_t syncr_mode_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + unsigned long val, syncr_val;
> +
> + if (!drvdata->csdev->refcnt)
> + return -EINVAL;
> +
> + guard(spinlock)(&drvdata->spinlock);
> + syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
> + val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
> +
> + return sysfs_emit(buf, "%lu\n", val);
> +}
> +
> +static ssize_t syncr_mode_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf,
> + size_t size)
> +{
> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + unsigned long val;
> +
> + if (kstrtoul(buf, 0, &val))
> + return -EINVAL;
> +
> + guard(spinlock)(&drvdata->spinlock);
> + /* set the mode when first enabling the device */
> + drvdata->syncr_mode = !!val;
> +
> + return size;
> +}
> +static DEVICE_ATTR_RW(syncr_mode);
> +
> +static ssize_t syncr_count_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + unsigned long val;
> +
> + if (!drvdata->csdev->refcnt)
> + return -EINVAL;
> +
> + guard(spinlock)(&drvdata->spinlock);
> + val = readl_relaxed(drvdata->base + TPDA_SYNCR);
> + val &= TPDA_SYNCR_COUNT_MASK;
> +
> + return sysfs_emit(buf, "%lu\n", val);
> +}
> +
> +static ssize_t syncr_count_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf,
> + size_t size)
> +{
> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + unsigned long val;
> +
> + if (kstrtoul(buf, 0, &val))
> + return -EINVAL;
> +
> + if (val < 0 || val > TPDA_SYNCR_COUNT_MASK)
Checking "val < 0" for an unsigned type is invalid. Simply keep the
second part.
Suzuki
> + return -EINVAL;
> +
> + guard(spinlock)(&drvdata->spinlock);
> + drvdata->syncr_count = val;
> +
> + return size;
> +}
> +static DEVICE_ATTR_RW(syncr_count);
> +
> static struct attribute *tpda_attrs[] = {
> &dev_attr_global_flush_req.attr,
> + &dev_attr_syncr_mode.attr,
> + &dev_attr_syncr_count.attr,
> tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
> tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
> tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
> index 1cc9253293ec..56d35697303a 100644
> --- a/drivers/hwtracing/coresight/coresight-tpda.h
> +++ b/drivers/hwtracing/coresight/coresight-tpda.h
> @@ -9,6 +9,7 @@
> #define TPDA_CR (0x000)
> #define TPDA_Pn_CR(n) (0x004 + (n * 4))
> #define TPDA_FPID_CR (0x084)
> +#define TPDA_SYNCR (0x08C)
>
> /* Cross trigger global (all ports) flush request bit */
> #define TPDA_CR_FLREQ BIT(0)
> @@ -36,6 +37,11 @@
> /* Aggregator port DSB data set element size bit */
> #define TPDA_Pn_CR_DSBSIZE BIT(8)
>
> +/* TPDA_SYNCR count mask */
> +#define TPDA_SYNCR_COUNT_MASK GENMASK(11, 0)
> +/* TPDA_SYNCR mode control bit */
> +#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12)
> +
> #define TPDA_MAX_INPORTS 32
>
> /**
> @@ -52,6 +58,8 @@
> * @trig_freq: Enable/disable cross trigger FREQ packet request interface.
> * @freq_ts: Enable/disable the timestamp for all FREQ packets.
> * @cmbchan_mode: Configure the CMB/MCMB channel mode.
> + * @syncr_mode: Setting the mode for counting packets.
> + * @syncr_count: Setting the value of the count.
> */
> struct tpda_drvdata {
> void __iomem *base;
> @@ -66,6 +74,8 @@ struct tpda_drvdata {
> bool trig_freq;
> bool freq_ts;
> bool cmbchan_mode;
> + bool syncr_mode;
> + u32 syncr_count;
> };
>
> /* Enumerate members of global control register(cr) */
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register
2025-12-23 9:49 ` Suzuki K Poulose
@ 2025-12-23 9:53 ` Jie Gan
0 siblings, 0 replies; 7+ messages in thread
From: Jie Gan @ 2025-12-23 9:53 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Tingwei Zhang
Cc: coresight, linux-arm-kernel, linux-kernel, Tao Zhang
On 12/23/2025 5:49 PM, Suzuki K Poulose wrote:
> On 23/12/2025 08:41, Jie Gan wrote:
>> From: Tao Zhang <tao.zhang@oss.qualcomm.com>
>>
>> The TPDA_SYNC counter tracks the number of bytes transferred from the
>> aggregator. When this count reaches the value programmed in the
>> TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace
>> tools to accurately parse each valid packet.
>>
>> Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
>> Reviewed-by: James Clark <james.clark@linaro.org>
>> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> ---
>> .../ABI/testing/sysfs-bus-coresight-devices-tpda | 18 +++++
>> drivers/hwtracing/coresight/coresight-tpda.c | 90 ++++++++++++
>> ++++++++++
>> drivers/hwtracing/coresight/coresight-tpda.h | 10 +++
>> 3 files changed, 118 insertions(+)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-
>> tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
>> index c8bc7b19ab25..c989eea1ef59 100644
>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
>> @@ -41,3 +41,21 @@ Contact: Jinlong Mao
>> <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
>> Description:
>> (RW) Set global (all ports) flush request bit. The bit
>> remains set until a
>> global flush request sequence completes.
>> +
>> +What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
>> +Date: December 2025
>> +KernelVersion: 6.19
>> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang
>> <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
>> +Description:
>> + (RW) Set mode the of the syncr counter.
>> + mode 0 - COUNT[11:0] value represents the approximate number
>> of bytes moved between two ASYNC packet requests
>> + mode 1 - the bits COUNT[11:7] are used as a power of 2. for
>> example, we could insert an async packet every 8K
>> + data by writing a value 13 to the COUNT[11:7] field.
>> +
>> +What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
>> +Date: December 2025
>> +KernelVersion: 6.19
>> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang
>> <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
>> +Description:
>> + (RW) Set value the of the syncr counter.
>> + Range: 0-4095
>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/
>> hwtracing/coresight/coresight-tpda.c
>> index d24a9098f1b1..8283e16ec400 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpda.c
>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c
>> @@ -163,6 +163,20 @@ static void tpda_enable_pre_port(struct
>> tpda_drvdata *drvdata)
>> */
>> if (drvdata->trig_flag_ts)
>> writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
>> +
>> + /* Initialize with a value of 0 */
>> + val = 0;
>> + if (drvdata->syncr_mode)
>> + val |= TPDA_SYNCR_MODE_CTRL_MASK;
>> +
>> + if (drvdata->syncr_count > 0 &&
>> + drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK)
>> + val |= drvdata->syncr_count;
>> + else
>> + /* Program the count to its MAX value by default */
>> + val |= TPDA_SYNCR_COUNT_MASK;
>> +
>> + writel_relaxed(val, drvdata->base + TPDA_SYNCR);
>> }
>> static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
>> @@ -385,8 +399,84 @@ static ssize_t global_flush_req_store(struct
>> device *dev,
>> }
>> static DEVICE_ATTR_RW(global_flush_req);
>> +static ssize_t syncr_mode_show(struct device *dev,
>> + struct device_attribute *attr,
>> + char *buf)
>> +{
>> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> + unsigned long val, syncr_val;
>> +
>> + if (!drvdata->csdev->refcnt)
>> + return -EINVAL;
>> +
>> + guard(spinlock)(&drvdata->spinlock);
>> + syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
>> + val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
>> +
>> + return sysfs_emit(buf, "%lu\n", val);
>> +}
>> +
>> +static ssize_t syncr_mode_store(struct device *dev,
>> + struct device_attribute *attr,
>> + const char *buf,
>> + size_t size)
>> +{
>> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> + unsigned long val;
>> +
>> + if (kstrtoul(buf, 0, &val))
>> + return -EINVAL;
>> +
>> + guard(spinlock)(&drvdata->spinlock);
>> + /* set the mode when first enabling the device */
>> + drvdata->syncr_mode = !!val;
>> +
>> + return size;
>> +}
>> +static DEVICE_ATTR_RW(syncr_mode);
>> +
>> +static ssize_t syncr_count_show(struct device *dev,
>> + struct device_attribute *attr,
>> + char *buf)
>> +{
>> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> + unsigned long val;
>> +
>> + if (!drvdata->csdev->refcnt)
>> + return -EINVAL;
>> +
>> + guard(spinlock)(&drvdata->spinlock);
>> + val = readl_relaxed(drvdata->base + TPDA_SYNCR);
>> + val &= TPDA_SYNCR_COUNT_MASK;
>> +
>> + return sysfs_emit(buf, "%lu\n", val);
>> +}
>> +
>> +static ssize_t syncr_count_store(struct device *dev,
>> + struct device_attribute *attr,
>> + const char *buf,
>> + size_t size)
>> +{
>> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> + unsigned long val;
>> +
>> + if (kstrtoul(buf, 0, &val))
>> + return -EINVAL;
>> +
>> + if (val < 0 || val > TPDA_SYNCR_COUNT_MASK)
>
> Checking "val < 0" for an unsigned type is invalid. Simply keep the
> second part.
>
Sure, sorry for the mistake. I forgot it’s an unsigned value here.
Will send a new version to fix it.
Thanks,
Jie
> Suzuki
>
>
>> + return -EINVAL;
>> +
>> + guard(spinlock)(&drvdata->spinlock);
>> + drvdata->syncr_count = val;
>> +
>> + return size;
>> +}
>> +static DEVICE_ATTR_RW(syncr_count);
>> +
>> static struct attribute *tpda_attrs[] = {
>> &dev_attr_global_flush_req.attr,
>> + &dev_attr_syncr_mode.attr,
>> + &dev_attr_syncr_count.attr,
>> tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
>> tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
>> tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/
>> hwtracing/coresight/coresight-tpda.h
>> index 1cc9253293ec..56d35697303a 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpda.h
>> +++ b/drivers/hwtracing/coresight/coresight-tpda.h
>> @@ -9,6 +9,7 @@
>> #define TPDA_CR (0x000)
>> #define TPDA_Pn_CR(n) (0x004 + (n * 4))
>> #define TPDA_FPID_CR (0x084)
>> +#define TPDA_SYNCR (0x08C)
>> /* Cross trigger global (all ports) flush request bit */
>> #define TPDA_CR_FLREQ BIT(0)
>> @@ -36,6 +37,11 @@
>> /* Aggregator port DSB data set element size bit */
>> #define TPDA_Pn_CR_DSBSIZE BIT(8)
>> +/* TPDA_SYNCR count mask */
>> +#define TPDA_SYNCR_COUNT_MASK GENMASK(11, 0)
>> +/* TPDA_SYNCR mode control bit */
>> +#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12)
>> +
>> #define TPDA_MAX_INPORTS 32
>> /**
>> @@ -52,6 +58,8 @@
>> * @trig_freq: Enable/disable cross trigger FREQ packet request
>> interface.
>> * @freq_ts: Enable/disable the timestamp for all FREQ packets.
>> * @cmbchan_mode: Configure the CMB/MCMB channel mode.
>> + * @syncr_mode: Setting the mode for counting packets.
>> + * @syncr_count: Setting the value of the count.
>> */
>> struct tpda_drvdata {
>> void __iomem *base;
>> @@ -66,6 +74,8 @@ struct tpda_drvdata {
>> bool trig_freq;
>> bool freq_ts;
>> bool cmbchan_mode;
>> + bool syncr_mode;
>> + u32 syncr_count;
>> };
>> /* Enumerate members of global control register(cr) */
>>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-12-23 9:53 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-23 8:41 [PATCH v7 0/4] add sysfs nodes to configure TPDA's registers Jie Gan
2025-12-23 8:41 ` [PATCH v7 1/4] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration Jie Gan
2025-12-23 8:41 ` [PATCH v7 2/4] coresight: tpda: add global_flush_req sysfs node Jie Gan
2025-12-23 8:41 ` [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register Jie Gan
2025-12-23 9:49 ` Suzuki K Poulose
2025-12-23 9:53 ` Jie Gan
2025-12-23 8:41 ` [PATCH v7 4/4] coresight: tpda: add sysfs node to flush specific port Jie Gan
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