From: Yeoreum Yun <yeoreum.yun@arm.com>
To: Leo Yan <leo.yan@arm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, suzuki.poulose@arm.com,
mike.leach@arm.com, james.clark@linaro.org,
alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com
Subject: Re: [PATCH v6 04/13] coresight: etm4x: exclude ss_status from drvdata->config
Date: Sat, 9 May 2026 12:55:19 +0100 [thread overview]
Message-ID: <af8gp9rsY6zyo5r7@e129823.arm.com> (raw)
In-Reply-To: <20260508152742.GI3778514@e132581.arm.com>
Hi Leo,
> On Wed, Apr 22, 2026 at 02:21:54PM +0100, Yeoreum Yun wrote:
>
> [...]
>
> > @@ -573,11 +573,9 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
> > etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i));
> >
> > for (i = 0; i < caps->nr_ss_cmp; i++) {
> > - /* always clear status bit on restart if using single-shot */
> > - if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
> > - config->ss_status[i] &= ~TRCSSCSRn_STATUS;
> > etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i));
> > - etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i));
> > + /* always clear status and pending bits on restart if using single-shot */
> > + etm4x_relaxed_write32(csa, 0x0, TRCSSCSRn(i));
>
> After confirmed with hardware team, we should preserve status bits
> (including STATUS and PENDING bits) during a session. So here we should
> set drvdata->ss_status to TRCSSCSRn.
>
> > @@ -1503,8 +1501,9 @@ static void etm4_init_arch_data(void *info)
> > */
> > caps->nr_ss_cmp = FIELD_GET(TRCIDR4_NUMSSCC_MASK, etmidr4);
> > for (i = 0; i < caps->nr_ss_cmp; i++) {
> > - drvdata->config.ss_status[i] =
> > - etm4x_relaxed_read32(csa, TRCSSCSRn(i));
> > + drvdata->ss_status[i] = etm4x_relaxed_read32(csa, TRCSSCSRn(i));
> > + drvdata->ss_status[i] &= (TRCSSCSRn_PC | TRCSSCSRn_DV |
> > + TRCSSCSRn_DA | TRCSSCSRn_INST);
>
> It is fine for read these capacity bits when probe, but we need to clear
> status when a session is starting to avoid the stale value left from
> previous session:
>
> drvdata->ss_status[idx] &= ~(TRCSSCSRn_STATUS | TRCSSCSRn_PENDING);
>
> We can do this in etm4_parse_event_config() for perf mode, and might
> create a new function (say etm4_parse_sysfs_config()) for preparing
> config for sysfs mode?
>
As we discussed in offline, those bits should be cleared at the begining
of the session. so clearing drvdata->ss_status at start of session
in each mode is fine for me and for future integration for cpu suspend/resume.
But, I want to clarify that the perf is one of exceptional case
since the "etm4_parse_event_config()" is called at the "resume" of session
for per-thread mode event.
TBH, We don't have some specific usage how STATUS or PENDING bit could
be used with perf session and until now those bits are always cleared
at the time of "sched-in" though we need to keep those bits theoretically.
Anyway as we discussed, since now there have been no issue
relavant for those bits, let the clear drvdata->ss_status at the
etm4_parse_event_config() or when setting a active config for start/resume
in this patchset and let me fix this with another patchset.
--
Sincerely,
Yeoreum Yun
next prev parent reply other threads:[~2026-05-09 11:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 13:21 [PATCH v6 00/13] fix several inconsistencies with sysfs configuration in etmX Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 01/13] coresight: etm4x: fix wrong check of etm4x_sspcicrn_present() Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 02/13] coresight: etm4x: fix underflow for nrseqstate Yeoreum Yun
2026-05-05 16:19 ` Leo Yan
2026-04-22 13:21 ` [PATCH v6 03/13] coresight: etm4x: introduce struct etm4_caps Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 04/13] coresight: etm4x: exclude ss_status from drvdata->config Yeoreum Yun
2026-05-06 8:48 ` Leo Yan
2026-05-08 15:27 ` Leo Yan
2026-05-09 11:55 ` Yeoreum Yun [this message]
2026-04-22 13:21 ` [PATCH v6 05/13] coresight: etm4x: remove redundant fields in etmv4_save_state Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 06/13] coresight: etm4x: fix leaked trace id Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 07/13] coresight: etm4x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 08/13] coresight: etm4x: remove redundant call etm4_enable_hw() with hotplug Yeoreum Yun
2026-04-22 13:21 ` [PATCH v6 09/13] coresight: etm4x: missing cscfg_csdev_disable_active_config() in perf enable Yeoreum Yun
2026-04-22 13:22 ` [PATCH v6 10/13] coresight: etm3x: change drvdata->spinlock type to raw_spin_lock_t Yeoreum Yun
2026-04-22 13:22 ` [PATCH v6 11/13] coresight: etm3x: introduce struct etm_caps Yeoreum Yun
2026-04-22 13:22 ` [PATCH v6 12/13] coresight: etm3x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-04-22 13:22 ` [PATCH v6 13/13] coresight: etm3x: remove redundant call etm_enable_hw() with hotplug Yeoreum Yun
2026-05-01 12:55 ` [PATCH v6 00/13] fix several inconsistencies with sysfs configuration in etmX Yeoreum Yun
2026-05-01 13:53 ` Leo Yan
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