* [PATCH v4 0/2] dmaengine: apple-admac: Add support for M3 generation
@ 2026-08-15 10:41 Sasha Finkelstein
2026-08-15 10:41 ` [PATCH v4 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs Sasha Finkelstein
2026-08-15 10:41 ` [PATCH v4 2/2] dmaengine: apple-admac: " Sasha Finkelstein
0 siblings, 2 replies; 5+ messages in thread
From: Sasha Finkelstein @ 2026-08-15 10:41 UTC (permalink / raw)
To: Sven Peter, Janne Grunau, Vinod Koul, Frank Li, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Martin Povišer
Cc: asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel,
Sasha Finkelstein, Joshua Peisach
The ADMACs present in M3 series devices (t8122 and t603x SoCs) need
additional register writes in order to function correctly. Add a new
compatible chain for those, and change the driver to do the write.
To simplify the merge strategy, the device tree entries will be sent
in a future patch series.
Signed-off-by: Sasha Finkelstein <k@chaosmail.tech>
---
Changes in v4:
- Use the entire hw data struct
- Link to v3: https://patch.msgid.link/20260812-t603x-admac-v3-0-d1f137f803e1@chaosmail.tech
Changes in v3:
- Use t8013 hw data as default
- Link to v2: https://patch.msgid.link/20260729-t603x-admac-v2-0-e4b2bb6ca45e@chaosmail.tech
Changes in v2:
- Typo fix
- Link to v1: https://patch.msgid.link/20260725-t603x-admac-v1-0-6a4dec023f02@chaosmail.tech
---
Sasha Finkelstein (2):
dt-bindings: dma: apple,admac: Add M3 generation ADMACs
dmaengine: apple-admac: Add M3 generation ADMACs
Documentation/devicetree/bindings/dma/apple,admac.yaml | 10 ++++++++--
drivers/dma/apple-admac.c | 24 ++++++++++++++++++++++++
2 files changed, 32 insertions(+), 2 deletions(-)
---
base-commit: 0ce37745d4bfbc493f718169c3974898ffec8ee7
change-id: 20260725-t603x-admac-a1b07a2ccb54
Best regards,
--
Sasha Finkelstein <k@chaosmail.tech>
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v4 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs 2026-08-15 10:41 [PATCH v4 0/2] dmaengine: apple-admac: Add support for M3 generation Sasha Finkelstein @ 2026-08-15 10:41 ` Sasha Finkelstein 2026-08-17 16:01 ` Frank Li 2026-08-15 10:41 ` [PATCH v4 2/2] dmaengine: apple-admac: " Sasha Finkelstein 1 sibling, 1 reply; 5+ messages in thread From: Sasha Finkelstein @ 2026-08-15 10:41 UTC (permalink / raw) To: Sven Peter, Janne Grunau, Vinod Koul, Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Martin Povišer Cc: asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel, Sasha Finkelstein, Joshua Peisach The admacs seen in M3-generation SoCs (t603x, t8122) need additional configuration writes and so are getting a new compatible chain. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Joshua Peisach <jpeisach@ubuntu.com> Reviewed-by: Janne Grunau <j@jannau.net> Signed-off-by: Sasha Finkelstein <k@chaosmail.tech> --- Documentation/devicetree/bindings/dma/apple,admac.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml index 6a200cbd7d02..5b4fd8348f99 100644 --- a/Documentation/devicetree/bindings/dma/apple,admac.yaml +++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml @@ -10,7 +10,7 @@ description: | Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples on SoCs from the "Apple Silicon" family. - The controller has been seen with up to 24 channels. Even-numbered channels + The controller has been seen with up to 32 channels. Even-numbered channels are TX-only, odd-numbered are RX-only. Individual channels are coupled to fixed device endpoints. @@ -33,6 +33,12 @@ properties: - apple,t8103-admac - apple,t8112-admac - const: apple,admac + - items: + - enum: + - apple,t6030-admac + - apple,t6031-admac + - const: apple,t8122-admac + - const: apple,t8122-admac reg: maxItems: 1 @@ -43,7 +49,7 @@ properties: Clients specify a single cell with channel number. dma-channels: - maximum: 24 + maximum: 32 interrupts: minItems: 4 -- 2.55.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs 2026-08-15 10:41 ` [PATCH v4 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs Sasha Finkelstein @ 2026-08-17 16:01 ` Frank Li 0 siblings, 0 replies; 5+ messages in thread From: Frank Li @ 2026-08-17 16:01 UTC (permalink / raw) To: Sasha Finkelstein Cc: Sven Peter, Janne Grunau, Vinod Koul, Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Martin Povišer, asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel, Joshua Peisach On Sat, Aug 15, 2026 at 12:41:38PM +0200, Sasha Finkelstein wrote: > The admacs seen in M3-generation SoCs (t603x, t8122) need additional > configuration writes and so are getting a new compatible chain. > > Acked-by: Rob Herring (Arm) <robh@kernel.org> > Reviewed-by: Joshua Peisach <jpeisach@ubuntu.com> > Reviewed-by: Janne Grunau <j@jannau.net> > Signed-off-by: Sasha Finkelstein <k@chaosmail.tech> > --- Reviewed-by: Frank Li <Frank.Li@nxp.com> > Documentation/devicetree/bindings/dma/apple,admac.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml > index 6a200cbd7d02..5b4fd8348f99 100644 > --- a/Documentation/devicetree/bindings/dma/apple,admac.yaml > +++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml > @@ -10,7 +10,7 @@ description: | > Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples > on SoCs from the "Apple Silicon" family. > > - The controller has been seen with up to 24 channels. Even-numbered channels > + The controller has been seen with up to 32 channels. Even-numbered channels > are TX-only, odd-numbered are RX-only. Individual channels are coupled to > fixed device endpoints. > > @@ -33,6 +33,12 @@ properties: > - apple,t8103-admac > - apple,t8112-admac > - const: apple,admac > + - items: > + - enum: > + - apple,t6030-admac > + - apple,t6031-admac > + - const: apple,t8122-admac > + - const: apple,t8122-admac > > reg: > maxItems: 1 > @@ -43,7 +49,7 @@ properties: > Clients specify a single cell with channel number. > > dma-channels: > - maximum: 24 > + maximum: 32 > > interrupts: > minItems: 4 > > -- > 2.55.0 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 2/2] dmaengine: apple-admac: Add M3 generation ADMACs 2026-08-15 10:41 [PATCH v4 0/2] dmaengine: apple-admac: Add support for M3 generation Sasha Finkelstein 2026-08-15 10:41 ` [PATCH v4 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs Sasha Finkelstein @ 2026-08-15 10:41 ` Sasha Finkelstein 2026-08-17 16:03 ` Frank Li 1 sibling, 1 reply; 5+ messages in thread From: Sasha Finkelstein @ 2026-08-15 10:41 UTC (permalink / raw) To: Sven Peter, Janne Grunau, Vinod Koul, Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Martin Povišer Cc: asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel, Sasha Finkelstein The admacs present on t8122 and t603x SoCs need additional writes in order to operate correctly. The exact purpose of this register is unknown Signed-off-by: Sasha Finkelstein <k@chaosmail.tech> --- drivers/dma/apple-admac.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c index 14a5ee14a481..9a1c79c12268 100644 --- a/drivers/dma/apple-admac.c +++ b/drivers/dma/apple-admac.c @@ -39,10 +39,14 @@ #define FLAG_DESC_NOTIFY BIT(16) +#define T8122_UNK_28_VAL 0x200000 + #define REG_TX_START 0x0000 #define REG_TX_STOP 0x0004 #define REG_RX_START 0x0008 #define REG_RX_STOP 0x000c +#define REG_UNK_28 0x0028 +#define REG_UNK_2C 0x002c #define REG_IMPRINT 0x0090 #define REG_TX_SRAM_SIZE 0x0094 #define REG_RX_SRAM_SIZE 0x0098 @@ -85,6 +89,10 @@ struct admac_data; struct admac_tx; +struct admac_hw { + bool set_unk28; +}; + struct admac_chan { unsigned int no; struct admac_data *host; @@ -127,6 +135,7 @@ struct admac_data { struct mutex cache_alloc_lock; struct admac_sram txcache, rxcache; + const struct admac_hw *hw; int irq; int irq_index; int nchannels; @@ -747,6 +756,11 @@ static int admac_device_config(struct dma_chan *chan, u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) & ~(BUS_WIDTH_WORD_SIZE | BUS_WIDTH_FRAME_SIZE); + if (ad->hw->set_unk28) { + writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_28); + writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_2C); + } + switch (is_tx ? config->dst_addr_width : config->src_addr_width) { case DMA_SLAVE_BUSWIDTH_1_BYTE: wordsize = 1; @@ -800,11 +814,18 @@ static int admac_device_config(struct dma_chan *chan, return 0; } +static const struct admac_hw admac_base_hw = {}; + +static const struct admac_hw admac_t8122_hw = { + .set_unk28 = true, +}; + static int admac_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct admac_data *ad; struct dma_device *dma; + const struct admac_hw *hw; int nchannels; int err, irq, i; @@ -822,6 +843,8 @@ static int admac_probe(struct platform_device *pdev) ad->dev = &pdev->dev; ad->nchannels = nchannels; mutex_init(&ad->cache_alloc_lock); + hw = of_device_get_match_data(&pdev->dev); + ad->hw = hw ? hw : &admac_base_hw; /* * The controller has 4 IRQ outputs. Try them all until @@ -936,6 +959,7 @@ static void admac_remove(struct platform_device *pdev) } static const struct of_device_id admac_of_match[] = { + { .compatible = "apple,t8122-admac", .data = &admac_t8122_hw }, { .compatible = "apple,t8103-admac", }, { .compatible = "apple,admac", }, { } -- 2.55.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 2/2] dmaengine: apple-admac: Add M3 generation ADMACs 2026-08-15 10:41 ` [PATCH v4 2/2] dmaengine: apple-admac: " Sasha Finkelstein @ 2026-08-17 16:03 ` Frank Li 0 siblings, 0 replies; 5+ messages in thread From: Frank Li @ 2026-08-17 16:03 UTC (permalink / raw) To: Sasha Finkelstein Cc: Sven Peter, Janne Grunau, Vinod Koul, Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Martin Povišer, asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel On Sat, Aug 15, 2026 at 12:41:39PM +0200, Sasha Finkelstein wrote: > The admacs present on t8122 and t603x SoCs need additional writes in > order to operate correctly. The exact purpose of this register > is unknown Nit: miss "." at end of sentense. > > Signed-off-by: Sasha Finkelstein <k@chaosmail.tech> > --- Reviewed-by: Frank Li <Frank.Li@nxp.com> > drivers/dma/apple-admac.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c > index 14a5ee14a481..9a1c79c12268 100644 > --- a/drivers/dma/apple-admac.c > +++ b/drivers/dma/apple-admac.c > @@ -39,10 +39,14 @@ > > #define FLAG_DESC_NOTIFY BIT(16) > > +#define T8122_UNK_28_VAL 0x200000 > + > #define REG_TX_START 0x0000 > #define REG_TX_STOP 0x0004 > #define REG_RX_START 0x0008 > #define REG_RX_STOP 0x000c > +#define REG_UNK_28 0x0028 > +#define REG_UNK_2C 0x002c > #define REG_IMPRINT 0x0090 > #define REG_TX_SRAM_SIZE 0x0094 > #define REG_RX_SRAM_SIZE 0x0098 > @@ -85,6 +89,10 @@ > struct admac_data; > struct admac_tx; > > +struct admac_hw { > + bool set_unk28; > +}; > + > struct admac_chan { > unsigned int no; > struct admac_data *host; > @@ -127,6 +135,7 @@ struct admac_data { > struct mutex cache_alloc_lock; > struct admac_sram txcache, rxcache; > > + const struct admac_hw *hw; > int irq; > int irq_index; > int nchannels; > @@ -747,6 +756,11 @@ static int admac_device_config(struct dma_chan *chan, > u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) & > ~(BUS_WIDTH_WORD_SIZE | BUS_WIDTH_FRAME_SIZE); > > + if (ad->hw->set_unk28) { > + writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_28); > + writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_2C); > + } > + > switch (is_tx ? config->dst_addr_width : config->src_addr_width) { > case DMA_SLAVE_BUSWIDTH_1_BYTE: > wordsize = 1; > @@ -800,11 +814,18 @@ static int admac_device_config(struct dma_chan *chan, > return 0; > } > > +static const struct admac_hw admac_base_hw = {}; > + > +static const struct admac_hw admac_t8122_hw = { > + .set_unk28 = true, > +}; > + > static int admac_probe(struct platform_device *pdev) > { > struct device_node *np = pdev->dev.of_node; > struct admac_data *ad; > struct dma_device *dma; > + const struct admac_hw *hw; > int nchannels; > int err, irq, i; > > @@ -822,6 +843,8 @@ static int admac_probe(struct platform_device *pdev) > ad->dev = &pdev->dev; > ad->nchannels = nchannels; > mutex_init(&ad->cache_alloc_lock); > + hw = of_device_get_match_data(&pdev->dev); > + ad->hw = hw ? hw : &admac_base_hw; > > /* > * The controller has 4 IRQ outputs. Try them all until > @@ -936,6 +959,7 @@ static void admac_remove(struct platform_device *pdev) > } > > static const struct of_device_id admac_of_match[] = { > + { .compatible = "apple,t8122-admac", .data = &admac_t8122_hw }, > { .compatible = "apple,t8103-admac", }, > { .compatible = "apple,admac", }, > { } > > -- > 2.55.0 > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-08-17 16:04 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-08-15 10:41 [PATCH v4 0/2] dmaengine: apple-admac: Add support for M3 generation Sasha Finkelstein 2026-08-15 10:41 ` [PATCH v4 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs Sasha Finkelstein 2026-08-17 16:01 ` Frank Li 2026-08-15 10:41 ` [PATCH v4 2/2] dmaengine: apple-admac: " Sasha Finkelstein 2026-08-17 16:03 ` Frank Li
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).