* [PATCH 3/8] Add a mfd IPUv3 driver
From: Thomas Gleixner @ 2011-03-01 10:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110301093956.GL29521@pengutronix.de>
On Tue, 1 Mar 2011, Sascha Hauer wrote:
> On Mon, Feb 28, 2011 at 07:33:05PM +0100, Thomas Gleixner wrote:
> > > +void ipu_idmac_put(struct ipu_channel *channel)
> > > +{
> > > + dev_dbg(ipu_dev, "%s %d\n", __func__, channel->num);
> >
> > Do we really need this debug stuff in all these functions ?
>
> Reading this comment I expected tons of dev_dbg in the driver. The one
> you mentioned above (plus the corresponding one in ipu_idmac_get) are
> indeed not particularly useful, but do you think there is still too much
> debug code left?
Well, I don't see a point in having useless debug stuff around.
> > > + DECLARE_IPU_IRQ_BITMAP(irqs);
> >
> > Why the hell do we need this? It's a bog standard bitmap, right ?
>
> It's defined as:
>
> #define DECLARE_IPU_IRQ_BITMAP(name) DECLARE_BITMAP(name, IPU_IRQ_COUNT)
>
> So yes, it's a standard bitmask. It can be used in client drivers
> aswell. Where's the problem of adding a define for this so that client
> drivers do not have to care about the size of the bitmap?
That's nonsense. You have to know about the size of the bitmap for any
operation on it. Or are you going to provide wrappers around
bitmap_zero() and all other possible bitmap_* functions as well?
> >
> > > + bitmap_zero(irqs, IPU_IRQ_COUNT);
> > > + ret = ipu_submodules_init(pdev, ipu_base, ipu_clk);
> > > + if (ret)
> > > + goto failed_submodules_init;
> > > +
> > > + /* Set sync refresh channels as high priority */
> > > + ipu_idmac_write(0x18800000, IDMAC_CHA_PRI(0));
> >
> > Hmm, this random prio setting here is odd.
>
> This is 1:1 from the Freescale Kernel and I never thought about it. We
> can remove it and see what happens. Maybe then some day we'll learn
> *why* this is done.
Well, the point is to move that to the init function which deals with
IDMAC and not have it at some random place in the code.
> > > + /* Wait for DC triple buffer to empty */
> > > + if (dc_channels[dc_chan].di == 0)
> > > + while ((__raw_readl(DC_STAT) & 0x00000002)
> > > + != 0x00000002) {
> > > + msleep(2);
> > > + timeout -= 2;
> > > + if (timeout <= 0)
> > > + break;
> >
> > So we poll stuff which is updated from some other function ?
>
> We poll the DC_STAT register here which is updated from the hardware.
And there is no interrupt for this ?
Thanks,
tglx
^ permalink raw reply
* [RFC PATCH] ARM: Use generic BUG() handler
From: Russell King - ARM Linux @ 2011-03-01 10:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <19820.47240.801312.507393@pilspetsen.it.uu.se>
On Tue, Mar 01, 2011 at 10:12:40AM +0100, Mikael Pettersson wrote:
> Russell King - ARM Linux writes:
> > On Tue, Mar 01, 2011 at 08:49:49AM +0000, Russell King - ARM Linux wrote:
> > > On Mon, Feb 28, 2011 at 04:27:43PM -0800, Simon Glass wrote:
> > > > + asm volatile("1:\t.word %c3\n" \
> > > > + ".pushsection __bug_table,\"a\"\n" \
> > > > + "2:\t.word 1b, %c0\n" \
> > > > + "\t.hword %c1, 0\n" \
> > > > + "\t.org 2b+%c2\n" \
> > >
> > > %c doesn't work on lots of versions of gcc, which is why we can't use
> > > the generic bug support. There's no way to reliably generate constants
> > > without many compiler versions spitting out a '#' before them.
> >
> > gcc 4.3.2:
> >
> > asm(".word %c0" : : "i" (0));
> >
> > produces:
> >
> > .word #0
> >
> > which gas chokes on:
> >
> > /tmp/cc2hGOHd.s:12: Error: bad expression
> > /tmp/cc2hGOHd.s:12: Error: junk at end of line, first unrecognized character is `0'
> >
> > So what this means is that it's impossible to generate constants in
> > assembly with GCC targetting ARM without having them prefixed by '#',
> > which in turn makes it impossible to use the generic BUG support.
> >
> > I reported this bug to gcc folk many years ago. I've no idea which
> > version it has been fixed in or if it's even been fixed.
>
> What's the gcc bugzilla bug number?
No idea off hand - I'll have to search for that.
^ permalink raw reply
* [PATCH v10 05/18] OMAP2, 3 DSS2 Change driver name to omap_display
From: Cousson, Benoit @ 2011-03-01 10:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298905056.9809.128.camel@deskari>
On 2/28/2011 3:57 PM, Valkeinen, Tomi wrote:
> On Mon, 2011-02-28 at 08:00 -0600, Cousson, Benoit wrote:
>> On 2/28/2011 1:10 PM, Valkeinen, Tomi wrote:
>>> On Mon, 2011-02-28 at 05:36 -0600, Cousson, Benoit wrote:
>>>> Hi Tomi,
>>>>
>>>> On 2/28/2011 8:19 AM, Valkeinen, Tomi wrote:
>>>>> On Mon, 2011-02-28 at 01:09 -0600, Taneja, Archit wrote:
>>>>>> Hi,
>>>>>>
>>>>>> On Monday 28 February 2011 12:23 PM, Valkeinen, Tomi wrote:
>>>>>>> On Thu, 2011-02-24 at 03:27 -0600, Tomi Valkeinen wrote:
>>>>>>>> Hi,
>>>>>>>>
>>>>>>>> On Mon, 2011-01-24 at 11:51 +0530, ext Sumit Semwal wrote:
>>>>>>>>> From: Senthilvadivu Guruswamy<svadivu@ti.com>
>>>>>>>>>
>>>>>>>>> Change the driver name from omapdss to omap_display as the driver takes care of
>>>>>>>>> the display devices ie number of panels, type of panels available in the
>>>>>>>>> platform. Change the device name in the board files and 2420,2430,3xxx clock
>>>>>>>>> files from omapdss to omap_display to match the driver name.
>>>>>>>>
>>>>>>>> I just realized that changing the driver name will break all scripts and
>>>>>>>> applications using omapdss sysfs files.
>>>>>>>>
>>>>>>>> How does this sound:
>>>>>>>>
>>>>>>>> Let's leave the omapdss device name as it is. It represents a "super"
>>>>>>>> device, containing the dss sysfs files and upper level dss management.
>>>>
>>>> This is the case for all the drivers migrated to omap_device anyway due
>>>> to the change in the top level hierarchy. Everything is below
>>>> platform/omap now.
>>>
>>> The HW module drivers are under platform/omap/, but omapdss is in
>>> platform/. Do you mean that omapdss should also be under platform/omap/?
>>
>> This is because you are probably not using omap_device yet. is should
>> happen when you will change your platform_device to be omap_device.
>
> Hmm. The HW module devices use omap_device. But we have also a
> "management" device, omapdss, which is doesn't match directly to any HW
> component but manages the HW module drivers. It contains, so to say, the
> HW module drivers.
OK, so you will have two different paths. omapdss will be directly below
platform whereas all the omap_device based DSS IPs will be below
platform/omap.
> Should this device also be a omap_device? What does omap_device actually
> represent? My understanding is that omap_device is a linux device for a
> HW block inside OMAP. omapdss doesn't quite match that definition.
Yep, in that case you do not need an omap_device since you do not have
any hwmod to map to.
The only weird thing is the different root paths you will have for the
various devices. But it looks like the only one you have to expose is
the omapdss.
>>> The reason I'm unwilling to change omapdss name, or location, is that
>>> omapdss directory contains lots of DSS configuration files, used by
>>> scripts and programs.
>>
>> Is that used for debug only?
>
> Unfortunately no. DSS contains many features which cannot be exported to
> userspace via the framebuffer device. While I'm not really happy with
> the current omapdss sysfs interface, it's the best we've come up with.
OK, then, something you will be able to fix in the DSS3:-)
Benoit
^ permalink raw reply
* [PATCH 3/8] Add a mfd IPUv3 driver
From: Arnd Bergmann @ 2011-03-01 10:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110301091544.GK29521@pengutronix.de>
On Tuesday 01 March 2011, Sascha Hauer wrote:
> When turning this into a kms driver moving the source code will be the
> smallest problem I guess.
> I have no preference where to put this code. First it was in
> drivers/mfd/ and it felt wrong because there seems to be too much code
> in it a mfd maintainer shouldn't be bothered with. drivers/video/ seems
> to be wrong because this code will probably support cameras which belong
> to drivers/media/video/. So if there's consensus on drivers/gpu/ I will
> happily put it there.
> What directory do you suggest? drivers/gpu/ or some subdirectory
> (drm/vga)?
I'd suggest a subdirectory of drivers/gpu/, e.g.
drivers/gpu/embedded/imx-ipu/. Alan is currently adding a driver
for the Intel GMA500, and there are others (TI, ST-Ericsson, ...)
that fit in a similar category of complex graphics subsystems
without an actual GPU core. I think they should all go to the same
place.
> > The interrupt logic needs some comments. What are you trying to achieve here?
>
> The IPU has 463 status bits which can trigger an interrupt. Most
> of them are associated to channels, some are general interrupts. My
> problem is that I don't know how the interrupts will be used by drivers
> later. Most drivers will probably use only one interrupt but others
> will be interested in a larger group of interrupts. So I decided to
> use a bitmap allowing each driver to register for groups of event
> it is interested in.
Ok, I see. So you essentially have a huge nested interrupt controller
and try to be clever about the possible use cases, which may be the
right choice, but apparently you don't know that yet because not
all the drivers have been written at this point.
Taking one step back from this, have you considered making this
a regular interrupt controller? That would make the client drivers
more standard -- you could define the interrupt numbers as resources
of a platform device or in the device tree, for instance.
The cost might be more complex code, e.g. when a device requires
many interrupts, but I think it will be at least as efficient
at run-time, and less surprising for readers and authors of
client drivers.
Arnd
^ permalink raw reply
* [PATCH 1/4] msm: scm: Mark inline asm as volatile
From: Will Deacon @ 2011-03-01 10:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8yalj112x98.fsf@huya.qualcomm.com>
Hi David,
On Sun, 2011-02-27 at 17:38 +0000, David Brown wrote:
> Per the gcc manual:
>
> If your assembler instructions access memory in an unpredictable
> fashion, add `memory' to the list of clobbered registers. This will
> cause GCC to not keep memory values cached in registers across the
> assembler instruction and not optimize stores or loads to that
> memory. You will also want to add the `volatile' keyword if the
> memory affected is not listed in the inputs or outputs of the `asm',
> as the `memory' clobber does not count as a side-effect of the `asm'.
> If you know how large the accessed memory is, you can add it as input
> or output but if this is not known, you should add `memory'. As an
> example, if you access ten bytes of a string, you can use a memory
> input like:
>
Right, so if you neglected to check the output from the smc block then
it would be a candidate for removal even with a memory clobber. Now I
see why you want a volatile in there!
For what it's worth:
Acked-by: Will Deacon <will.deacon@arm.com>
Will
^ permalink raw reply
* [PATCH 2/4] msm: scm: Fix improper register assignment
From: Will Deacon @ 2011-03-01 10:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.00.1102261452340.22034@xanadu.home>
Hi Nicolas,
On Sat, 2011-02-26 at 20:04 +0000, Nicolas Pitre wrote:
> > The gcc docs say:
> >
> > * Local register variables in specific registers do not reserve the
> > registers, except at the point where they are used as input or
> > output operands in an `asm' statement and the `asm' statement
> > itself is not deleted. The compiler's data flow analysis is
> > capable of determining where the specified registers contain live
> > values, and where they are available for other uses. Stores into
> > local register variables may be deleted when they appear to be
> > dead according to dataflow analysis. References to local register
> > variables may be deleted or moved or simplified.
> >
> > which would suggest that it should at least detect that it can't keep
> > the value in r0. What it seems to do is detect that the value can't be
> > in the register, so it never bothers putting it there in the first
> > place.
I suspect it sees the function call as a write to r0 and then somehow
infers that the live range of the int r0 variable ends there. Without a
use in the live range it then decides it can optimise away the
definition. It really comes down to whether or not the variable is
characterised by its identifier or the register in which it resides.
> Right. A minimal test case may look like this if someone feels like
> filling a gcc bug report:
>
> extern int foo(int x);
>
> int bar(int x)
> {
> register int a asm("r0") = 1;
> x = foo(x);
> asm ("add %0, %1, %2" : "=r" (x) : "r" (a), "r" (x));
> return x;
> }
>
> And the produced code is:
>
> bar:
> stmfd sp!, {r3, lr}
> bl foo
> #APP
> add r0, r0, r0
> ldmfd sp!, {r3, pc}
>
> So this is clearly bogus.
>
I agree that this is wrong, but the compiler people may try and argue
the other way. I'll ask some of the compiler guys at ARM and see what
they think.
> > In any case, fortunately it works with the fix.
>
> Please add a comment in your patch to explain the issue.
>
Perhaps a more robust fix would be to remove the register int
declarations and handle the parameter marshalling in the same asm block
that contains the smc?
Will
^ permalink raw reply
* [PATCH 6/6] ARM: nmk: update GPIO chained IRQ handler to use EOI in parent chip
From: Thomas Gleixner @ 2011-03-01 10:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228214445.GD1937@n2100.arm.linux.org.uk>
On Mon, 28 Feb 2011, Russell King - ARM Linux wrote:
> On Mon, Feb 28, 2011 at 08:16:25PM +0100, Thomas Gleixner wrote:
> > So what's the gain of a barebone chained handler over a regular
> > interrupt:
> >
> > - 100 instructions less
> > - lack of statistics
>
> We don't want statistics. Don't care how many times we go to look
> at the interrupt controller - and actually it's really wrong to count
> them in the first place. Counting them means that you double-count
> these interrupt events, and the more layers of interrupt controllers
> there are the worse that problem gets.
>
> So no, that's a definite argument *for* chained handers.
Errm, why do you double account them ? The accounting goes to
different irq numbers, but we could exclude them from accounting and
showing up in proc/interrupts easily.
> > - lack of affinity setting via standard interfaces
>
> Don't want affinity for them, as setting their affinity means that
> you then end up forcing the affinity for the sub-interrupts too.
> How you do cope with the high-level interrupt having affinity to
> CPU0 but a lower level interrupt being affine to CPU1 only?
>
> It's non-sensible, and is broken. So no, again this isn't an
> argument for not using chained handlers. It's an argument *for*
> them.
Well, moving the whole group to a particular cpu is sensible and the
sub interrupts don't have a set_affinity function anyway as they are
always called on the cpu on which the primary interrupt is handled.
> Sorry, but I think this stuff is right, and chained handlers like
> these have their place.
I'm not against chained handlers per se. I'm against creating a
necessarity to make a chained handler deal with various different
underlying primary irq chips and their oddities. That's simply wrong
and broken.
I don't say you have to use the existing flow handlers, if they are
too heavy weight for your purpose, but pushing conditional flow
handling into the chained handler is violating all principles of
layering.
The underlying primary chip implementation knows about the flow
requirements, so it should install the correct handler so the chained
handler just needs to deal with the sub interrupts which it knows how
to handle.
So if you don't want accounting and affinity setting (which I think is
bad), then we still can solve it in an elegant and simple way.
1) Primary chip installs a rudimentary flow handler which deals with
the requirements of the chip.
primary_handler_eoi()
{
if (desc->action)
action();
chip->irq_eoi();
}
primary_handler_level()
{
chip->irq_mask();
if (desc->action)
action();
chip->irq_unmask();
}
The interupt descriptor is marked IRQ_PRIMARY or whatever
2) Demux handler is installed via:
setup_irq(PRIMARY_IRQ, IRQ_DEMUX, demux_handler);
That's a few lines in the core code to make this work with the same
functionality than your current solution, but avoiding to touch any
demux handler when you change the underlying irq chip
implementation. It simply just works because the demux handler is
agnostic of the primary chip.
Thanks,
tglx
^ permalink raw reply
* [PATCH V5 00/63] Updating SPEAr Support
From: viresh kumar @ 2011-03-01 11:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1295499392.git.viresh.kumar@st.com>
On 01/20/2011 12:55 PM, Viresh KUMAR wrote:
> Following set of patches:
> - updates SPEAr3xx, 6xx support
> - Adds support for SPEAr13xx
> - Removes Multiple defconfigs per machine family
Russell,
As suggested, i have broken down this large patchset to several patchsets.
I will be sending them again to list for getting any further review comments.
I have broadly divided these into following patchsets.
- SPEAr3xx & SPEAr6xx Fixes (8)
- SPEAr3xx & SPEAr6xx: Single Image solution (10) and padmux updates (1)
- Adding SPEAr13xx support (10)
- Adding devices support for all spear machines (17)
- Clock Framework & CPU Freq Updates (3)
--
viresh
^ permalink raw reply
* [PATCH 3/8] Add a mfd IPUv3 driver
From: Sascha Hauer @ 2011-03-01 11:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201103011127.51605.arnd@arndb.de>
On Tue, Mar 01, 2011 at 11:27:49AM +0100, Arnd Bergmann wrote:
> On Tuesday 01 March 2011, Sascha Hauer wrote:
>
> > When turning this into a kms driver moving the source code will be the
> > smallest problem I guess.
> > I have no preference where to put this code. First it was in
> > drivers/mfd/ and it felt wrong because there seems to be too much code
> > in it a mfd maintainer shouldn't be bothered with. drivers/video/ seems
> > to be wrong because this code will probably support cameras which belong
> > to drivers/media/video/. So if there's consensus on drivers/gpu/ I will
> > happily put it there.
> > What directory do you suggest? drivers/gpu/ or some subdirectory
> > (drm/vga)?
>
> I'd suggest a subdirectory of drivers/gpu/, e.g.
> drivers/gpu/embedded/imx-ipu/. Alan is currently adding a driver
> for the Intel GMA500, and there are others (TI, ST-Ericsson, ...)
> that fit in a similar category of complex graphics subsystems
> without an actual GPU core. I think they should all go to the same
> place.
>
> > > The interrupt logic needs some comments. What are you trying to achieve here?
> >
> > The IPU has 463 status bits which can trigger an interrupt. Most
> > of them are associated to channels, some are general interrupts. My
> > problem is that I don't know how the interrupts will be used by drivers
> > later. Most drivers will probably use only one interrupt but others
> > will be interested in a larger group of interrupts. So I decided to
> > use a bitmap allowing each driver to register for groups of event
> > it is interested in.
>
> Ok, I see. So you essentially have a huge nested interrupt controller
> and try to be clever about the possible use cases, which may be the
> right choice, but apparently you don't know that yet because not
> all the drivers have been written at this point.
>
> Taking one step back from this, have you considered making this
> a regular interrupt controller? That would make the client drivers
> more standard -- you could define the interrupt numbers as resources
> of a platform device or in the device tree, for instance.
> The cost might be more complex code, e.g. when a device requires
> many interrupts, but I think it will be at least as efficient
> at run-time, and less surprising for readers and authors of
> client drivers.
I thought about this, but hesitated to increase NR_IRQS by 463. Do you
think we should do this instead?
Sascha
--
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^ permalink raw reply
* [PATCH V6 0/8] SPEAr3xx & SPEAr6xx Fixes
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
This patchset contains minor fixes, renames, & reordering of code of #include
files.
Note: These patches were earlier sent as part of a larger patchset:
"Updating SPEAr Support"
Now it is divided into smaller patchsets. In order to apply these patches
cleanly following order of patchsets must be maintained.
- SPEAr3xx & SPEAr6xx Fixes
- SPEAr3xx & SPEAr6xx: Single Image solution and padmux updates
- Adding SPEAr13xx support
- Adding devices support for all spear machines
- Clock Framework & CPU Freq Updates
Shiraz Hashim (1):
ST SPEAr: Append UL to device address macros.
Viresh Kumar (7):
ST SPEAr: Reordering #includes in .h & .c files.
ST SPEAr: Include mach/hardware.h instead of mach/spear.h
ST SPEAr3xx: Rename sdio to sdhci
ST SPEAr Clock Framework: Rename usbd clock and align apb_clk entry
ST SPEAr3xx: Declare device structures after shirq code
ST SPEAr: Replacing SIZE macro's with SZ_4K macros
ST SPEAr: Remove unused *_SIZE macros from spear*.h files
arch/arm/mach-spear3xx/clock.c | 6 +-
arch/arm/mach-spear3xx/include/mach/entry-macro.S | 3 +-
arch/arm/mach-spear3xx/include/mach/generic.h | 12 +-
arch/arm/mach-spear3xx/include/mach/hardware.h | 1 +
arch/arm/mach-spear3xx/include/mach/irqs.h | 4 +-
arch/arm/mach-spear3xx/include/mach/misc_regs.h | 2 +-
arch/arm/mach-spear3xx/include/mach/spear.h | 135 +++++------------
arch/arm/mach-spear3xx/include/mach/spear300.h | 59 ++-----
arch/arm/mach-spear3xx/include/mach/spear310.h | 34 ++---
arch/arm/mach-spear3xx/include/mach/spear320.h | 67 +++------
arch/arm/mach-spear3xx/spear300.c | 70 ++++-----
arch/arm/mach-spear3xx/spear300_evb.c | 4 +-
arch/arm/mach-spear3xx/spear310.c | 10 +-
arch/arm/mach-spear3xx/spear310_evb.c | 2 +-
arch/arm/mach-spear3xx/spear320.c | 30 ++--
arch/arm/mach-spear3xx/spear320_evb.c | 4 +-
arch/arm/mach-spear3xx/spear3xx.c | 14 +-
arch/arm/mach-spear6xx/clock.c | 6 +-
arch/arm/mach-spear6xx/include/mach/entry-macro.S | 3 +-
arch/arm/mach-spear6xx/include/mach/generic.h | 4 +-
arch/arm/mach-spear6xx/include/mach/hardware.h | 1 +
arch/arm/mach-spear6xx/include/mach/misc_regs.h | 2 +-
arch/arm/mach-spear6xx/include/mach/spear.h | 175 ++++++---------------
arch/arm/mach-spear6xx/spear600.c | 2 +-
arch/arm/mach-spear6xx/spear600_evb.c | 2 +-
arch/arm/mach-spear6xx/spear6xx.c | 29 ++--
arch/arm/plat-spear/include/plat/debug-macro.S | 2 +-
arch/arm/plat-spear/include/plat/system.h | 4 +-
arch/arm/plat-spear/include/plat/uncompress.h | 2 +-
arch/arm/plat-spear/time.c | 5 +-
30 files changed, 235 insertions(+), 459 deletions(-)
--
1.7.2.2
^ permalink raw reply
* [PATCH V6 1/8] ST SPEAr: Reordering #includes in .h & .c files.
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
Order of inclusion of .h files must be: <linux/...>, <asm/...>, <plat/...>,
<mach/...>. This patch corrects this ordering whereever it is not followed.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/clock.c | 2 +-
arch/arm/mach-spear3xx/include/mach/entry-macro.S | 2 +-
arch/arm/mach-spear3xx/include/mach/generic.h | 4 ++--
arch/arm/mach-spear3xx/spear300.c | 2 +-
arch/arm/mach-spear3xx/spear310.c | 2 +-
arch/arm/mach-spear3xx/spear320.c | 2 +-
arch/arm/mach-spear6xx/clock.c | 2 +-
arch/arm/mach-spear6xx/include/mach/entry-macro.S | 2 +-
arch/arm/mach-spear6xx/include/mach/generic.h | 4 ++--
arch/arm/mach-spear6xx/spear6xx.c | 2 +-
arch/arm/plat-spear/include/plat/system.h | 2 +-
arch/arm/plat-spear/time.c | 4 ++--
12 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index 8ae4ad0..5bfeb6f 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -13,8 +13,8 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <mach/misc_regs.h>
#include <plat/clock.h>
+#include <mach/misc_regs.h>
/* root clks */
/* 32 KHz oscillator clock */
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 947625d..e8e7dc0 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,9 +11,9 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <mach/hardware.h>
#include <mach/spear.h>
-#include <asm/hardware/vic.h>
.macro disable_fiq
.endm
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index e7d2de8..aaaa046 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -14,11 +14,11 @@
#ifndef __MACH_GENERIC_H
#define __MACH_GENERIC_H
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
#include <plat/padmux.h>
/* spear3xx declarations */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 7e01677..80ca04a 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -15,9 +15,9 @@
#include <linux/amba/pl061.h>
#include <linux/ptrace.h>
#include <asm/irq.h>
+#include <plat/shirq.h>
#include <mach/generic.h>
#include <mach/spear.h>
-#include <plat/shirq.h>
/* pad multiplexing support */
/* muxing registers */
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index f38eb21..ca1109d 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -13,9 +13,9 @@
#include <linux/ptrace.h>
#include <asm/irq.h>
+#include <plat/shirq.h>
#include <mach/generic.h>
#include <mach/spear.h>
-#include <plat/shirq.h>
/* pad multiplexing support */
/* muxing registers */
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 456bb33..ceb04e8 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -13,9 +13,9 @@
#include <linux/ptrace.h>
#include <asm/irq.h>
+#include <plat/shirq.h>
#include <mach/generic.h>
#include <mach/spear.h>
-#include <plat/shirq.h>
/* pad multiplexing support */
/* muxing registers */
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 9171952..4f351b4 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -13,8 +13,8 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <mach/misc_regs.h>
#include <plat/clock.h>
+#include <mach/misc_regs.h>
/* root clks */
/* 32 KHz oscillator clock */
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 9eaecae..bc55e8b 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,9 +11,9 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <mach/hardware.h>
#include <mach/spear.h>
-#include <asm/hardware/vic.h>
.macro disable_fiq
.endm
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index e5967ed..94cf4a6 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -14,11 +14,11 @@
#ifndef __MACH_GENERIC_H
#define __MACH_GENERIC_H
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
/*
* Each GPT has 2 timer channels
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 9cd3a68..2d95715 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -18,8 +18,8 @@
#include <asm/hardware/vic.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
-#include <mach/irqs.h>
#include <mach/generic.h>
+#include <mach/irqs.h>
#include <mach/spear.h>
/* Add spear6xx machines common devices here */
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index 55a4e40..d52db68 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -14,8 +14,8 @@
#ifndef __PLAT_SYSTEM_H
#define __PLAT_SYSTEM_H
-#include <asm/hardware/sp810.h>
#include <linux/io.h>
+#include <asm/hardware/sp810.h>
#include <mach/spear.h>
static inline void arch_idle(void)
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 100672f..de0a81b 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -20,10 +20,10 @@
#include <linux/time.h>
#include <linux/irq.h>
#include <asm/mach/time.h>
-#include <mach/irqs.h>
+#include <mach/generic.h>
#include <mach/hardware.h>
+#include <mach/irqs.h>
#include <mach/spear.h>
-#include <mach/generic.h>
/*
* We would use TIMER0 and TIMER1 as clockevent and clocksource.
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 2/8] ST SPEAr: Include mach/hardware.h instead of mach/spear.h
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
This patch makes inclusion of hardware.h and spear.h consistent over all spear
variants. Now we will include hardware.h, wherever we need to use hardware
macros. spear.h will be automatically included by hardware.h
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/entry-macro.S | 1 -
arch/arm/mach-spear3xx/include/mach/hardware.h | 1 +
arch/arm/mach-spear3xx/include/mach/misc_regs.h | 2 +-
arch/arm/mach-spear3xx/include/mach/spear.h | 1 -
arch/arm/mach-spear3xx/spear300.c | 2 +-
arch/arm/mach-spear3xx/spear300_evb.c | 2 +-
arch/arm/mach-spear3xx/spear310.c | 2 +-
arch/arm/mach-spear3xx/spear310_evb.c | 2 +-
arch/arm/mach-spear3xx/spear320.c | 2 +-
arch/arm/mach-spear3xx/spear320_evb.c | 2 +-
arch/arm/mach-spear3xx/spear3xx.c | 2 +-
arch/arm/mach-spear6xx/include/mach/entry-macro.S | 1 -
arch/arm/mach-spear6xx/include/mach/hardware.h | 1 +
arch/arm/mach-spear6xx/include/mach/misc_regs.h | 2 +-
arch/arm/mach-spear6xx/include/mach/spear.h | 1 -
arch/arm/mach-spear6xx/spear600.c | 2 +-
arch/arm/mach-spear6xx/spear600_evb.c | 2 +-
arch/arm/mach-spear6xx/spear6xx.c | 2 +-
arch/arm/plat-spear/include/plat/debug-macro.S | 2 +-
arch/arm/plat-spear/include/plat/system.h | 2 +-
arch/arm/plat-spear/include/plat/uncompress.h | 2 +-
arch/arm/plat-spear/time.c | 1 -
22 files changed, 17 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index e8e7dc0..53da422 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -13,7 +13,6 @@
#include <asm/hardware/vic.h>
#include <mach/hardware.h>
-#include <mach/spear.h>
.macro disable_fiq
.endm
diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h
index 490e86a..4660c0d 100644
--- a/arch/arm/mach-spear3xx/include/mach/hardware.h
+++ b/arch/arm/mach-spear3xx/include/mach/hardware.h
@@ -15,6 +15,7 @@
#define __MACH_HARDWARE_H
#include <plat/hardware.h>
+#include <mach/spear.h>
/* Vitual to physical translation of statically mapped space */
#define IO_ADDRESS(x) (x | 0xF0000000)
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
index 0b93347..5bd8cd8 100644
--- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
@@ -14,7 +14,7 @@
#ifndef __MACH_MISC_REGS_H
#define __MACH_MISC_REGS_H
-#include <mach/spear.h>
+#include <mach/hardware.h>
#define MISC_BASE IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index dcca856..8745802 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -14,7 +14,6 @@
#ifndef __MACH_SPEAR3XX_H
#define __MACH_SPEAR3XX_H
-#include <mach/hardware.h>
#include <mach/spear300.h>
#include <mach/spear310.h>
#include <mach/spear320.h>
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 80ca04a..e15c684 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -17,7 +17,7 @@
#include <asm/irq.h>
#include <plat/shirq.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* pad multiplexing support */
/* muxing registers */
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index cd23c98..77c9b83 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -14,7 +14,7 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* padmux devices to enable */
static struct pmx_dev *pmx_devs[] = {
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index ca1109d..5bfab14 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -15,7 +15,7 @@
#include <asm/irq.h>
#include <plat/shirq.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* pad multiplexing support */
/* muxing registers */
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 3855431..2d7f333 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -14,7 +14,7 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* padmux devices to enable */
static struct pmx_dev *pmx_devs[] = {
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index ceb04e8..c25f909 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -15,7 +15,7 @@
#include <asm/irq.h>
#include <plat/shirq.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* pad multiplexing support */
/* muxing registers */
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 4a7ce35..0b80a15 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -14,7 +14,7 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* padmux devices to enable */
static struct pmx_dev *pmx_devs[] = {
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index e12a06c..634116f 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -19,7 +19,7 @@
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* Add spear3xx machines common devices here */
/* gpio device registration */
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index bc55e8b..8a0b0ed 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -13,7 +13,6 @@
#include <asm/hardware/vic.h>
#include <mach/hardware.h>
-#include <mach/spear.h>
.macro disable_fiq
.endm
diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h
index 0291476..0b3f96a 100644
--- a/arch/arm/mach-spear6xx/include/mach/hardware.h
+++ b/arch/arm/mach-spear6xx/include/mach/hardware.h
@@ -15,6 +15,7 @@
#define __MACH_HARDWARE_H
#include <plat/hardware.h>
+#include <mach/spear.h>
/* Vitual to physical translation of statically mapped space */
#define IO_ADDRESS(x) (x | 0xF0000000)
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
index 45571c1..68c20a0 100644
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -14,7 +14,7 @@
#ifndef __MACH_MISC_REGS_H
#define __MACH_MISC_REGS_H
-#include <mach/spear.h>
+#include <mach/hardware.h>
#define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE)
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
index a835f5b..17ab5aa 100644
--- a/arch/arm/mach-spear6xx/include/mach/spear.h
+++ b/arch/arm/mach-spear6xx/include/mach/spear.h
@@ -14,7 +14,6 @@
#ifndef __MACH_SPEAR6XX_H
#define __MACH_SPEAR6XX_H
-#include <mach/hardware.h>
#include <mach/spear600.h>
#define SPEAR6XX_ML_SDRAM_BASE 0x00000000
diff --git a/arch/arm/mach-spear6xx/spear600.c b/arch/arm/mach-spear6xx/spear600.c
index 5c484c4..d0e6eea 100644
--- a/arch/arm/mach-spear6xx/spear600.c
+++ b/arch/arm/mach-spear6xx/spear600.c
@@ -14,7 +14,7 @@
#include <linux/ptrace.h>
#include <asm/irq.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
/* Add spear600 specific devices here */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index b0ed0df..f19cefe 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -14,7 +14,7 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
static struct amba_device *amba_devs[] __initdata = {
&gpio_device[0],
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 2d95715..378440b 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -19,8 +19,8 @@
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <mach/generic.h>
+#include <mach/hardware.h>
#include <mach/irqs.h>
-#include <mach/spear.h>
/* Add spear6xx machines common devices here */
/* uart device registration */
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index e91270e..8501bbf 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -12,7 +12,7 @@
*/
#include <linux/amba/serial.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
.macro addruart, rp, rv
mov \rp, #SPEAR_DBG_UART_BASE @ Physical base
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index d52db68..a235fa0 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -16,7 +16,7 @@
#include <linux/io.h>
#include <asm/hardware/sp810.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
static inline void arch_idle(void)
{
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
index 6dd455b..1bf8452 100644
--- a/arch/arm/plat-spear/include/plat/uncompress.h
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -13,7 +13,7 @@
#include <linux/io.h>
#include <linux/amba/serial.h>
-#include <mach/spear.h>
+#include <mach/hardware.h>
#ifndef __PLAT_UNCOMPRESS_H
#define __PLAT_UNCOMPRESS_H
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index de0a81b..dbb6e4f 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -23,7 +23,6 @@
#include <mach/generic.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
-#include <mach/spear.h>
/*
* We would use TIMER0 and TIMER1 as clockevent and clocksource.
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 3/8] ST SPEAr3xx: Rename sdio to sdhci
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
Device name of SD/MMC/SDIO controller in linux is sdhci. To maintain
consistency across all spear code, rename sdio to sdhci.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/generic.h | 8 ++++----
arch/arm/mach-spear3xx/include/mach/irqs.h | 4 ++--
arch/arm/mach-spear3xx/include/mach/spear300.h | 4 ++--
arch/arm/mach-spear3xx/include/mach/spear320.h | 6 +++---
arch/arm/mach-spear3xx/spear300.c | 20 ++++++++++----------
arch/arm/mach-spear3xx/spear300_evb.c | 2 +-
arch/arm/mach-spear3xx/spear320.c | 20 ++++++++++----------
arch/arm/mach-spear3xx/spear320_evb.c | 2 +-
8 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index aaaa046..8e30636 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -129,8 +129,8 @@ extern struct pmx_dev pmx_telecom_camera;
extern struct pmx_dev pmx_telecom_dac;
extern struct pmx_dev pmx_telecom_i2s;
extern struct pmx_dev pmx_telecom_boot_pins;
-extern struct pmx_dev pmx_telecom_sdio_4bit;
-extern struct pmx_dev pmx_telecom_sdio_8bit;
+extern struct pmx_dev pmx_telecom_sdhci_4bit;
+extern struct pmx_dev pmx_telecom_sdhci_8bit;
extern struct pmx_dev pmx_gpio1;
/* Add spear300 machine function declarations here */
@@ -172,14 +172,14 @@ extern struct pmx_dev pmx_clcd;
extern struct pmx_dev pmx_emi;
extern struct pmx_dev pmx_fsmc;
extern struct pmx_dev pmx_spp;
-extern struct pmx_dev pmx_sdio;
+extern struct pmx_dev pmx_sdhci;
extern struct pmx_dev pmx_i2s;
extern struct pmx_dev pmx_uart1;
extern struct pmx_dev pmx_uart1_modem;
extern struct pmx_dev pmx_uart2;
extern struct pmx_dev pmx_touchscreen;
extern struct pmx_dev pmx_can;
-extern struct pmx_dev pmx_sdio_led;
+extern struct pmx_dev pmx_sdhci_led;
extern struct pmx_dev pmx_pwm0;
extern struct pmx_dev pmx_pwm1;
extern struct pmx_dev pmx_pwm2;
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index 7f940b8..a1a7f48 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -69,7 +69,7 @@
#define IRQ_CLCD IRQ_GEN_RAS_3
/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define IRQ_SDIO IRQ_INTRCOMM_RAS_ARM
+#define IRQ_SDHCI IRQ_INTRCOMM_RAS_ARM
/* GPIO pins virtual irqs */
#define SPEAR_GPIO_INT_BASE (VIRQ_START + 9)
@@ -115,7 +115,7 @@
#define VIRQ_SPP (VIRQ_START + 2)
/* IRQs sharing IRQ_GEN_RAS_2 */
-#define IRQ_SDIO IRQ_GEN_RAS_2
+#define IRQ_SDHCI IRQ_GEN_RAS_2
/* IRQs sharing IRQ_GEN_RAS_3 */
#define VIRQ_PLGPIO (VIRQ_START + 3)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index ccaa765..1059d5a 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -39,8 +39,8 @@
#define SPEAR300_CLCD_BASE 0x60000000
#define SPEAR300_CLCD_SIZE 0x10000000
-#define SPEAR300_SDIO_BASE 0x70000000
-#define SPEAR300_SDIO_SIZE 0x10000000
+#define SPEAR300_SDHCI_BASE 0x70000000
+#define SPEAR300_SDHCI_SIZE 0x10000000
#define SPEAR300_NAND_0_BASE 0x80000000
#define SPEAR300_NAND_0_SIZE 0x04000000
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index 53677e4..1c9d310 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -25,8 +25,8 @@
#define SPEAR320_I2S_BASE 0x60000000
#define SPEAR320_I2S_SIZE 0x10000000
-#define SPEAR320_SDIO_BASE 0x70000000
-#define SPEAR320_SDIO_SIZE 0x10000000
+#define SPEAR320_SDHCI_BASE 0x70000000
+#define SPEAR320_SDHCI_SIZE 0x10000000
#define SPEAR320_CLCD_BASE 0x90000000
#define SPEAR320_CLCD_SIZE 0x10000000
@@ -74,7 +74,7 @@
#define EMI_IRQ_MASK (1 << 7)
#define CLCD_IRQ_MASK (1 << 8)
#define SPP_IRQ_MASK (1 << 9)
-#define SDIO_IRQ_MASK (1 << 10)
+#define SDHCI_IRQ_MASK (1 << 10)
#define CAN_U_IRQ_MASK (1 << 11)
#define CAN_L_IRQ_MASK (1 << 12)
#define UART1_IRQ_MASK (1 << 13)
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index e15c684..42dc29b 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -310,7 +310,7 @@ struct pmx_dev pmx_telecom_boot_pins = {
.enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = {
+struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
{
.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
@@ -323,14 +323,14 @@ struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = {
},
};
-struct pmx_dev pmx_telecom_sdio_4bit = {
- .name = "telecom_sdio_4bit",
- .modes = pmx_telecom_sdio_4bit_modes,
- .mode_count = ARRAY_SIZE(pmx_telecom_sdio_4bit_modes),
+struct pmx_dev pmx_telecom_sdhci_4bit = {
+ .name = "telecom_sdhci_4bit",
+ .modes = pmx_telecom_sdhci_4bit_modes,
+ .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
.enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = {
+struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
{
.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
@@ -342,10 +342,10 @@ struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = {
},
};
-struct pmx_dev pmx_telecom_sdio_8bit = {
- .name = "telecom_sdio_8bit",
- .modes = pmx_telecom_sdio_8bit_modes,
- .mode_count = ARRAY_SIZE(pmx_telecom_sdio_8bit_modes),
+struct pmx_dev pmx_telecom_sdhci_8bit = {
+ .name = "telecom_sdhci_8bit",
+ .modes = pmx_telecom_sdhci_8bit_modes,
+ .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
.enb_on_reset = 1,
};
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 77c9b83..42d2253 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -28,7 +28,7 @@ static struct pmx_dev *pmx_devs[] = {
/* spear300 specific devices */
&pmx_fsmc_2_chips,
&pmx_clcd,
- &pmx_telecom_sdio_4bit,
+ &pmx_telecom_sdhci_4bit,
&pmx_gpio1,
};
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index c25f909..6dba628 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -110,7 +110,7 @@ struct pmx_dev pmx_spp = {
.enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_sdio_modes[] = {
+struct pmx_dev_mode pmx_sdhci_modes[] = {
{
.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
SMALL_PRINTERS_MODE,
@@ -118,10 +118,10 @@ struct pmx_dev_mode pmx_sdio_modes[] = {
},
};
-struct pmx_dev pmx_sdio = {
- .name = "sdio",
- .modes = pmx_sdio_modes,
- .mode_count = ARRAY_SIZE(pmx_sdio_modes),
+struct pmx_dev pmx_sdhci = {
+ .name = "sdhci",
+ .modes = pmx_sdhci_modes,
+ .mode_count = ARRAY_SIZE(pmx_sdhci_modes),
.enb_on_reset = 1,
};
@@ -215,17 +215,17 @@ struct pmx_dev pmx_can = {
.enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_sdio_led_modes[] = {
+struct pmx_dev_mode pmx_sdhci_led_modes[] = {
{
.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
.mask = PMX_SSP_CS_MASK,
},
};
-struct pmx_dev pmx_sdio_led = {
- .name = "sdio_led",
- .modes = pmx_sdio_led_modes,
- .mode_count = ARRAY_SIZE(pmx_sdio_led_modes),
+struct pmx_dev pmx_sdhci_led = {
+ .name = "sdhci_led",
+ .modes = pmx_sdhci_led_modes,
+ .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),
.enb_on_reset = 1,
};
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 0b80a15..8213e4b 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -26,7 +26,7 @@ static struct pmx_dev *pmx_devs[] = {
/* spear320 specific devices */
&pmx_fsmc,
- &pmx_sdio,
+ &pmx_sdhci,
&pmx_i2s,
&pmx_uart1,
&pmx_uart2,
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 4/8] ST SPEAr Clock Framework: Rename usbd clock and align apb_clk entry
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: shiraz hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/clock.c | 4 ++--
arch/arm/mach-spear6xx/clock.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index 5bfeb6f..98bc7ed 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -650,7 +650,7 @@ static struct clk pwm_clk = {
/* array of all spear 3xx clock lookups */
static struct clk_lookup spear_clk_lookups[] = {
- { .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
+ { .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
/* root clks */
{ .con_id = "osc_32k_clk", .clk = &osc_32k_clk},
{ .con_id = "osc_24m_clk", .clk = &osc_24m_clk},
@@ -674,8 +674,8 @@ static struct clk_lookup spear_clk_lookups[] = {
{ .dev_id = "gpt1", .clk = &gpt1_clk},
{ .dev_id = "gpt2", .clk = &gpt2_clk},
/* clock derived from pll3 clk */
+ { .dev_id = "designware_udc", .clk = &usbd_clk},
{ .con_id = "usbh_clk", .clk = &usbh_clk},
- { .dev_id = "usbd", .clk = &usbd_clk},
/* clock derived from ahb clk */
{ .con_id = "apb_clk", .clk = &apb_clk},
{ .dev_id = "i2c_designware.0", .clk = &i2c_clk},
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 4f351b4..88b748b 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -622,7 +622,7 @@ static struct clk dummy_apb_pclk;
/* array of all spear 6xx clock lookups */
static struct clk_lookup spear_clk_lookups[] = {
- { .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
+ { .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
/* root clks */
{ .con_id = "osc_32k_clk", .clk = &osc_32k_clk},
{ .con_id = "osc_30m_clk", .clk = &osc_30m_clk},
@@ -650,9 +650,9 @@ static struct clk_lookup spear_clk_lookups[] = {
{ .dev_id = "gpt2", .clk = &gpt2_clk},
{ .dev_id = "gpt3", .clk = &gpt3_clk},
/* clock derived from pll3 clk */
+ { .dev_id = "designware_udc", .clk = &usbd_clk},
{ .con_id = "usbh.0_clk", .clk = &usbh0_clk},
{ .con_id = "usbh.1_clk", .clk = &usbh1_clk},
- { .dev_id = "usbd", .clk = &usbd_clk},
/* clock derived from ahb clk */
{ .con_id = "apb_clk", .clk = &apb_clk},
{ .dev_id = "i2c_designware.0", .clk = &i2c_clk},
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 5/8] ST SPEAr3xx: Declare device structures after shirq code
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
Order of declarations should be: pmx_devs, shirq support, amba_devices,
plat_devices, routines. This patch moves gpio_device below shirq support.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/spear300.c | 40 ++++++++++++++++++------------------
arch/arm/mach-spear3xx/spear310.c | 4 +-
arch/arm/mach-spear3xx/spear320.c | 4 +-
3 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 42dc29b..23d2a14 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -370,26 +370,6 @@ struct pmx_driver pmx_driver = {
.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
};
-/* Add spear300 specific devices here */
-/* arm gpio1 device registration */
-static struct pl061_platform_data gpio1_plat_data = {
- .gpio_base = 8,
- .irq_base = SPEAR_GPIO1_INT_BASE,
-};
-
-struct amba_device gpio1_device = {
- .dev = {
- .init_name = "gpio1",
- .platform_data = &gpio1_plat_data,
- },
- .res = {
- .start = SPEAR300_GPIO_BASE,
- .end = SPEAR300_GPIO_BASE + SPEAR300_GPIO_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- .irq = {VIRQ_GPIO1, NO_IRQ},
-};
-
/* spear3xx shared irq */
struct shirq_dev_config shirq_ras1_config[] = {
{
@@ -443,6 +423,26 @@ struct spear_shirq shirq_ras1 = {
},
};
+/* Add spear300 specific devices here */
+/* arm gpio1 device registration */
+static struct pl061_platform_data gpio1_plat_data = {
+ .gpio_base = 8,
+ .irq_base = SPEAR_GPIO1_INT_BASE,
+};
+
+struct amba_device gpio1_device = {
+ .dev = {
+ .init_name = "gpio1",
+ .platform_data = &gpio1_plat_data,
+ },
+ .res = {
+ .start = SPEAR300_GPIO_BASE,
+ .end = SPEAR300_GPIO_BASE + SPEAR300_GPIO_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .irq = {VIRQ_GPIO1, NO_IRQ},
+};
+
/* spear300 routines */
void __init spear300_init(void)
{
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 5bfab14..3a3d548 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -139,8 +139,6 @@ struct pmx_driver pmx_driver = {
.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
};
-/* Add spear310 specific devices here */
-
/* spear3xx shared irq */
struct shirq_dev_config shirq_ras1_config[] = {
{
@@ -257,6 +255,8 @@ struct spear_shirq shirq_intrcomm_ras = {
},
};
+/* Add spear310 specific devices here */
+
/* spear310 routines */
void __init spear310_init(void)
{
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 6dba628..8ba3ff2 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -384,8 +384,6 @@ struct pmx_driver pmx_driver = {
.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
};
-/* Add spear320 specific devices here */
-
/* spear3xx shared irq */
struct shirq_dev_config shirq_ras1_config[] = {
{
@@ -510,6 +508,8 @@ struct spear_shirq shirq_intrcomm_ras = {
},
};
+/* Add spear320 specific devices here */
+
/* spear320 routines */
void __init spear320_init(void)
{
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 6/8] ST SPEAr: Replacing SIZE macro's with SZ_4K macros
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
Resource size required mostly is 4K for all devices, whereas currently
reserved space is much beyond that. This patch replaces SIZE macro's used at
multiple places with SZ_4K.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
---
arch/arm/mach-spear3xx/spear300.c | 8 +++-----
arch/arm/mach-spear3xx/spear310.c | 2 +-
arch/arm/mach-spear3xx/spear320.c | 2 +-
arch/arm/mach-spear3xx/spear3xx.c | 12 ++++++------
arch/arm/mach-spear6xx/spear6xx.c | 25 ++++++++++---------------
5 files changed, 21 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 23d2a14..2697e65 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -437,7 +437,7 @@ struct amba_device gpio1_device = {
},
.res = {
.start = SPEAR300_GPIO_BASE,
- .end = SPEAR300_GPIO_BASE + SPEAR300_GPIO_SIZE - 1,
+ .end = SPEAR300_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {VIRQ_GPIO1, NO_IRQ},
@@ -452,8 +452,7 @@ void __init spear300_init(void)
spear3xx_init();
/* shared irq registration */
- shirq_ras1.regs.base =
- ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE);
+ shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
if (shirq_ras1.regs.base) {
ret = spear_shirq_register(&shirq_ras1);
if (ret)
@@ -461,8 +460,7 @@ void __init spear300_init(void)
}
/* pmx initialization */
- pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE,
- SPEAR300_SOC_CONFIG_SIZE);
+ pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
if (pmx_driver.base) {
ret = pmx_register(&pmx_driver);
if (ret)
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 3a3d548..5c0a67b 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -267,7 +267,7 @@ void __init spear310_init(void)
spear3xx_init();
/* shared irq registration */
- base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE);
+ base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K);
if (base) {
/* shirq 1 */
shirq_ras1.regs.base = base;
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 8ba3ff2..741c1f4 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -520,7 +520,7 @@ void __init spear320_init(void)
spear3xx_init();
/* shared irq registration */
- base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE);
+ base = ioremap(SPEAR320_SOC_CONFIG_BASE, SZ_4K);
if (base) {
/* shirq 1 */
shirq_ras1.regs.base = base;
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 634116f..d3ba8ca 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -35,7 +35,7 @@ struct amba_device gpio_device = {
},
.res = {
.start = SPEAR3XX_ICM3_GPIO_BASE,
- .end = SPEAR3XX_ICM3_GPIO_BASE + SPEAR3XX_ICM3_GPIO_SIZE - 1,
+ .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_BASIC_GPIO, NO_IRQ},
@@ -48,7 +48,7 @@ struct amba_device uart_device = {
},
.res = {
.start = SPEAR3XX_ICM1_UART_BASE,
- .end = SPEAR3XX_ICM1_UART_BASE + SPEAR3XX_ICM1_UART_SIZE - 1,
+ .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_UART, NO_IRQ},
@@ -71,22 +71,22 @@ struct map_desc spear3xx_io_desc[] __initdata = {
{
.virtual = VA_SPEAR3XX_ICM1_UART_BASE,
.pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE),
- .length = SPEAR3XX_ICM1_UART_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR3XX_ML1_VIC_BASE,
.pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE),
- .length = SPEAR3XX_ML1_VIC_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE,
.pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE),
- .length = SPEAR3XX_ICM3_SYS_CTRL_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE,
.pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE),
- .length = SPEAR3XX_ICM3_MISC_REG_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
},
};
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 378440b..9818129 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -31,8 +31,7 @@ struct amba_device uart_device[] = {
},
.res = {
.start = SPEAR6XX_ICM1_UART0_BASE,
- .end = SPEAR6XX_ICM1_UART0_BASE +
- SPEAR6XX_ICM1_UART0_SIZE - 1,
+ .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_UART_0, NO_IRQ},
@@ -42,8 +41,7 @@ struct amba_device uart_device[] = {
},
.res = {
.start = SPEAR6XX_ICM1_UART1_BASE,
- .end = SPEAR6XX_ICM1_UART1_BASE +
- SPEAR6XX_ICM1_UART1_SIZE - 1,
+ .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_UART_1, NO_IRQ},
@@ -72,8 +70,7 @@ struct amba_device gpio_device[] = {
},
.res = {
.start = SPEAR6XX_CPU_GPIO_BASE,
- .end = SPEAR6XX_CPU_GPIO_BASE +
- SPEAR6XX_CPU_GPIO_SIZE - 1,
+ .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_LOCAL_GPIO, NO_IRQ},
@@ -84,8 +81,7 @@ struct amba_device gpio_device[] = {
},
.res = {
.start = SPEAR6XX_ICM3_GPIO_BASE,
- .end = SPEAR6XX_ICM3_GPIO_BASE +
- SPEAR6XX_ICM3_GPIO_SIZE - 1,
+ .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_BASIC_GPIO, NO_IRQ},
@@ -96,8 +92,7 @@ struct amba_device gpio_device[] = {
},
.res = {
.start = SPEAR6XX_ICM2_GPIO_BASE,
- .end = SPEAR6XX_ICM2_GPIO_BASE +
- SPEAR6XX_ICM2_GPIO_SIZE - 1,
+ .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_APPL_GPIO, NO_IRQ},
@@ -122,27 +117,27 @@ static struct map_desc spear6xx_io_desc[] __initdata = {
{
.virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
.pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
- .length = SPEAR6XX_ICM1_UART0_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
- .length = SPEAR6XX_CPU_VIC_PRI_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
- .length = SPEAR6XX_CPU_VIC_SEC_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
.pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
- .length = SPEAR6XX_ICM3_MISC_REG_BASE,
+ .length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
.pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
- .length = SPEAR6XX_ICM3_MISC_REG_SIZE,
+ .length = SZ_4K,
.type = MT_DEVICE
},
};
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 7/8] ST SPEAr: Remove unused *_SIZE macros from spear*.h files
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
Now we used standard SZ_* macros instead of self defined *_SIZE macros. This
patch removes all such unused *_SIZE macros for spear3xx & 6xx.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/spear.h | 63 ------------------
arch/arm/mach-spear3xx/include/mach/spear300.h | 29 --------
arch/arm/mach-spear3xx/include/mach/spear310.h | 14 +----
arch/arm/mach-spear3xx/include/mach/spear320.h | 32 +---------
arch/arm/mach-spear6xx/include/mach/spear.h | 83 ------------------------
5 files changed, 2 insertions(+), 219 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index 8745802..df60e30 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -19,118 +19,55 @@
#include <mach/spear320.h>
#define SPEAR3XX_ML_SDRAM_BASE 0x00000000
-#define SPEAR3XX_ML_SDRAM_SIZE 0x40000000
#define SPEAR3XX_ICM9_BASE 0xC0000000
-#define SPEAR3XX_ICM9_SIZE 0x10000000
/* ICM1 - Low speed connection */
#define SPEAR3XX_ICM1_2_BASE 0xD0000000
-#define SPEAR3XX_ICM1_2_SIZE 0x10000000
-
#define SPEAR3XX_ICM1_UART_BASE 0xD0000000
#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
-#define SPEAR3XX_ICM1_UART_SIZE 0x00080000
-
#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000
-#define SPEAR3XX_ICM1_ADC_SIZE 0x00080000
-
#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000
-#define SPEAR3XX_ICM1_SSP_SIZE 0x00080000
-
#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000
-#define SPEAR3XX_ICM1_I2C_SIZE 0x00080000
-
#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000
-#define SPEAR3XX_ICM1_JPEG_SIZE 0x00800000
-
#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000
-#define SPEAR3XX_ICM1_IRDA_SIZE 0x00080000
-
#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000
-#define SPEAR3XX_ICM1_SRAM_SIZE 0x05800000
/* ICM2 - Application Subsystem */
#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000
-#define SPEAR3XX_ICM2_HWACCEL0_SIZE 0x00800000
-
#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000
-#define SPEAR3XX_ICM2_HWACCEL1_SIZE 0x00800000
/* ICM4 - High Speed Connection */
#define SPEAR3XX_ICM4_BASE 0xE0000000
-#define SPEAR3XX_ICM4_SIZE 0x08000000
-
#define SPEAR3XX_ICM4_MII_BASE 0xE0800000
-#define SPEAR3XX_ICM4_MII_SIZE 0x00800000
-
#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000
-#define SPEAR3XX_ICM4_USBD_FIFO_SIZE 0x00100000
-
#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000
-#define SPEAR3XX_ICM4_USBD_CSR_SIZE 0x00100000
-
#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000
-#define SPEAR3XX_ICM4_USBD_PLDT_SIZE 0x00100000
-
#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000
-#define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE 0x00100000
-
#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000
-#define SPEAR3XX_ICM4_USB_OHCI0_SIZE 0x00100000
-
#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000
-#define SPEAR3XX_ICM4_USB_OHCI1_SIZE 0x00100000
-
#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000
-#define SPEAR3XX_ICM4_USB_ARB_SIZE 0x00010000
/* ML1 - Multi Layer CPU Subsystem */
#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000
-#define SPEAR3XX_ICM3_ML1_2_SIZE 0x0F000000
-
#define SPEAR3XX_ML1_TMR_BASE 0xF0000000
-#define SPEAR3XX_ML1_TMR_SIZE 0x00100000
-
#define SPEAR3XX_ML1_VIC_BASE 0xF1100000
#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
-#define SPEAR3XX_ML1_VIC_SIZE 0x00100000
/* ICM3 - Basic Subsystem */
#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000
-#define SPEAR3XX_ICM3_SMEM_SIZE 0x04000000
-
#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000
-#define SPEAR3XX_ICM3_SMI_CTRL_SIZE 0x00200000
-
#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000
-#define SPEAR3XX_ICM3_DMA_SIZE 0x00200000
-
#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
-#define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
-
#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000
-#define SPEAR3XX_ICM3_TMR0_SIZE 0x00080000
-
#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000
-#define SPEAR3XX_ICM3_WDT_SIZE 0x00080000
-
#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000
-#define SPEAR3XX_ICM3_RTC_SIZE 0x00080000
-
#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000
-#define SPEAR3XX_ICM3_GPIO_SIZE 0x00080000
-
#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000
#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR3XX_ICM3_SYS_CTRL_SIZE 0x00080000
-
#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000
#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
-#define SPEAR3XX_ICM3_MISC_REG_SIZE 0x00080000
-
#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000
-#define SPEAR3XX_ICM3_TMR1_SIZE 0x00080000
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index 1059d5a..8f96cc5 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -18,10 +18,8 @@
/* Base address of various IPs */
#define SPEAR300_TELECOM_BASE 0x50000000
-#define SPEAR300_TELECOM_SIZE 0x10000000
/* Interrupt registers offsets and masks */
-#define SPEAR300_TELECOM_REG_SIZE 0x00010000
#define INT_ENB_MASK_REG 0x54
#define INT_STS_MASK_REG 0x58
#define IT_PERS_S_IRQ_MASK (1 << 0)
@@ -37,46 +35,19 @@
#define SHIRQ_RAS1_MASK 0x1FF
#define SPEAR300_CLCD_BASE 0x60000000
-#define SPEAR300_CLCD_SIZE 0x10000000
-
#define SPEAR300_SDHCI_BASE 0x70000000
-#define SPEAR300_SDHCI_SIZE 0x10000000
-
#define SPEAR300_NAND_0_BASE 0x80000000
-#define SPEAR300_NAND_0_SIZE 0x04000000
-
#define SPEAR300_NAND_1_BASE 0x84000000
-#define SPEAR300_NAND_1_SIZE 0x04000000
-
#define SPEAR300_NAND_2_BASE 0x88000000
-#define SPEAR300_NAND_2_SIZE 0x04000000
-
#define SPEAR300_NAND_3_BASE 0x8c000000
-#define SPEAR300_NAND_3_SIZE 0x04000000
-
#define SPEAR300_NOR_0_BASE 0x90000000
-#define SPEAR300_NOR_0_SIZE 0x01000000
-
#define SPEAR300_NOR_1_BASE 0x91000000
-#define SPEAR300_NOR_1_SIZE 0x01000000
-
#define SPEAR300_NOR_2_BASE 0x92000000
-#define SPEAR300_NOR_2_SIZE 0x01000000
-
#define SPEAR300_NOR_3_BASE 0x93000000
-#define SPEAR300_NOR_3_SIZE 0x01000000
-
#define SPEAR300_FSMC_BASE 0x94000000
-#define SPEAR300_FSMC_SIZE 0x05000000
-
#define SPEAR300_SOC_CONFIG_BASE 0x99000000
-#define SPEAR300_SOC_CONFIG_SIZE 0x00000008
-
#define SPEAR300_KEYBOARD_BASE 0xA0000000
-#define SPEAR300_KEYBOARD_SIZE 0x09000000
-
#define SPEAR300_GPIO_BASE 0xA9000000
-#define SPEAR300_GPIO_SIZE 0x07000000
#endif /* __MACH_SPEAR300_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
index b27bb8a..4f58eb1 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear310.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -17,29 +17,17 @@
#define __MACH_SPEAR310_H
#define SPEAR310_NAND_BASE 0x40000000
-#define SPEAR310_NAND_SIZE 0x04000000
-
#define SPEAR310_FSMC_BASE 0x44000000
-#define SPEAR310_FSMC_SIZE 0x01000000
-
#define SPEAR310_UART1_BASE 0xB2000000
#define SPEAR310_UART2_BASE 0xB2080000
#define SPEAR310_UART3_BASE 0xB2100000
#define SPEAR310_UART4_BASE 0xB2180000
#define SPEAR310_UART5_BASE 0xB2200000
-#define SPEAR310_UART_SIZE 0x00080000
-
#define SPEAR310_HDLC_BASE 0xB2800000
-#define SPEAR310_HDLC_SIZE 0x00800000
-
#define SPEAR310_RS485_0_BASE 0xB3000000
-#define SPEAR310_RS485_0_SIZE 0x00800000
-
#define SPEAR310_RS485_1_BASE 0xB3800000
-#define SPEAR310_RS485_1_SIZE 0x00800000
-
#define SPEAR310_SOC_CONFIG_BASE 0xB4000000
-#define SPEAR310_SOC_CONFIG_SIZE 0x00000070
+
/* Interrupt registers offsets and masks */
#define INT_STS_MASK_REG 0x04
#define SMII0_IRQ_MASK (1 << 0)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index 1c9d310..95bdb2e 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -17,53 +17,23 @@
#define __MACH_SPEAR320_H
#define SPEAR320_EMI_CTRL_BASE 0x40000000
-#define SPEAR320_EMI_CTRL_SIZE 0x08000000
-
#define SPEAR320_FSMC_BASE 0x4C000000
-#define SPEAR320_FSMC_SIZE 0x01000000
-
#define SPEAR320_I2S_BASE 0x60000000
-#define SPEAR320_I2S_SIZE 0x10000000
-
#define SPEAR320_SDHCI_BASE 0x70000000
-#define SPEAR320_SDHCI_SIZE 0x10000000
-
#define SPEAR320_CLCD_BASE 0x90000000
-#define SPEAR320_CLCD_SIZE 0x10000000
-
#define SPEAR320_PAR_PORT_BASE 0xA0000000
-#define SPEAR320_PAR_PORT_SIZE 0x01000000
-
#define SPEAR320_CAN0_BASE 0xA1000000
-#define SPEAR320_CAN0_SIZE 0x01000000
-
#define SPEAR320_CAN1_BASE 0xA2000000
-#define SPEAR320_CAN1_SIZE 0x01000000
-
#define SPEAR320_UART1_BASE 0xA3000000
#define SPEAR320_UART2_BASE 0xA4000000
-#define SPEAR320_UART_SIZE 0x01000000
-
#define SPEAR320_SSP0_BASE 0xA5000000
-#define SPEAR320_SSP0_SIZE 0x01000000
-
#define SPEAR320_SSP1_BASE 0xA6000000
-#define SPEAR320_SSP1_SIZE 0x01000000
-
#define SPEAR320_I2C_BASE 0xA7000000
-#define SPEAR320_I2C_SIZE 0x01000000
-
#define SPEAR320_PWM_BASE 0xA8000000
-#define SPEAR320_PWM_SIZE 0x01000000
-
#define SPEAR320_SMII0_BASE 0xAA000000
-#define SPEAR320_SMII0_SIZE 0x01000000
-
#define SPEAR320_SMII1_BASE 0xAB000000
-#define SPEAR320_SMII1_SIZE 0x01000000
-
#define SPEAR320_SOC_CONFIG_BASE 0xB3000000
-#define SPEAR320_SOC_CONFIG_SIZE 0x00000070
+
/* Interrupt registers offsets and masks */
#define INT_STS_MASK_REG 0x04
#define INT_CLR_MASK_REG 0x04
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
index 17ab5aa..c9bba39 100644
--- a/arch/arm/mach-spear6xx/include/mach/spear.h
+++ b/arch/arm/mach-spear6xx/include/mach/spear.h
@@ -17,149 +17,66 @@
#include <mach/spear600.h>
#define SPEAR6XX_ML_SDRAM_BASE 0x00000000
-#define SPEAR6XX_ML_SDRAM_SIZE 0x40000000
-
/* ICM1 - Low speed connection */
#define SPEAR6XX_ICM1_BASE 0xD0000000
-#define SPEAR6XX_ICM1_SIZE 0x08000000
#define SPEAR6XX_ICM1_UART0_BASE 0xD0000000
#define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
-#define SPEAR6XX_ICM1_UART0_SIZE 0x00080000
#define SPEAR6XX_ICM1_UART1_BASE 0xD0080000
-#define SPEAR6XX_ICM1_UART1_SIZE 0x00080000
-
#define SPEAR6XX_ICM1_SSP0_BASE 0xD0100000
-#define SPEAR6XX_ICM1_SSP0_SIZE 0x00080000
-
#define SPEAR6XX_ICM1_SSP1_BASE 0xD0180000
-#define SPEAR6XX_ICM1_SSP1_SIZE 0x00080000
-
#define SPEAR6XX_ICM1_I2C_BASE 0xD0200000
-#define SPEAR6XX_ICM1_I2C_SIZE 0x00080000
-
#define SPEAR6XX_ICM1_JPEG_BASE 0xD0800000
-#define SPEAR6XX_ICM1_JPEG_SIZE 0x00800000
-
#define SPEAR6XX_ICM1_IRDA_BASE 0xD1000000
-#define SPEAR6XX_ICM1_IRDA_SIZE 0x00800000
-
#define SPEAR6XX_ICM1_FSMC_BASE 0xD1800000
-#define SPEAR6XX_ICM1_FSMC_SIZE 0x00800000
-
#define SPEAR6XX_ICM1_NAND_BASE 0xD2000000
-#define SPEAR6XX_ICM1_NAND_SIZE 0x00800000
-
#define SPEAR6XX_ICM1_SRAM_BASE 0xD2800000
-#define SPEAR6XX_ICM1_SRAM_SIZE 0x00800000
/* ICM2 - Application Subsystem */
#define SPEAR6XX_ICM2_BASE 0xD8000000
-#define SPEAR6XX_ICM2_SIZE 0x08000000
-
#define SPEAR6XX_ICM2_TMR0_BASE 0xD8000000
-#define SPEAR6XX_ICM2_TMR0_SIZE 0x00080000
-
#define SPEAR6XX_ICM2_TMR1_BASE 0xD8080000
-#define SPEAR6XX_ICM2_TMR1_SIZE 0x00080000
-
#define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000
-#define SPEAR6XX_ICM2_GPIO_SIZE 0x00080000
-
#define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000
-#define SPEAR6XX_ICM2_SPI2_SIZE 0x00080000
-
#define SPEAR6XX_ICM2_ADC_BASE 0xD8200000
-#define SPEAR6XX_ICM2_ADC_SIZE 0x00080000
/* ML-1, 2 - Multi Layer CPU Subsystem */
#define SPEAR6XX_ML_CPU_BASE 0xF0000000
-#define SPEAR6XX_ML_CPU_SIZE 0x08000000
-
#define SPEAR6XX_CPU_TMR_BASE 0xF0000000
-#define SPEAR6XX_CPU_TMR_SIZE 0x00100000
-
#define SPEAR6XX_CPU_GPIO_BASE 0xF0100000
-#define SPEAR6XX_CPU_GPIO_SIZE 0x00100000
-
#define SPEAR6XX_CPU_VIC_SEC_BASE 0xF1000000
#define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
-#define SPEAR6XX_CPU_VIC_SEC_SIZE 0x00100000
-
#define SPEAR6XX_CPU_VIC_PRI_BASE 0xF1100000
#define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
-#define SPEAR6XX_CPU_VIC_PRI_SIZE 0x00100000
/* ICM3 - Basic Subsystem */
#define SPEAR6XX_ICM3_BASE 0xF8000000
-#define SPEAR6XX_ICM3_SIZE 0x08000000
-
#define SPEAR6XX_ICM3_SMEM_BASE 0xF8000000
-#define SPEAR6XX_ICM3_SMEM_SIZE 0x04000000
-
#define SPEAR6XX_ICM3_SMI_CTRL_BASE 0xFC000000
-#define SPEAR6XX_ICM3_SMI_CTRL_SIZE 0x00200000
-
#define SPEAR6XX_ICM3_CLCD_BASE 0xFC200000
-#define SPEAR6XX_ICM3_CLCD_SIZE 0x00200000
-
#define SPEAR6XX_ICM3_DMA_BASE 0xFC400000
-#define SPEAR6XX_ICM3_DMA_SIZE 0x00200000
-
#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
-#define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
-
#define SPEAR6XX_ICM3_TMR_BASE 0xFC800000
-#define SPEAR6XX_ICM3_TMR_SIZE 0x00080000
-
#define SPEAR6XX_ICM3_WDT_BASE 0xFC880000
-#define SPEAR6XX_ICM3_WDT_SIZE 0x00080000
-
#define SPEAR6XX_ICM3_RTC_BASE 0xFC900000
-#define SPEAR6XX_ICM3_RTC_SIZE 0x00080000
-
#define SPEAR6XX_ICM3_GPIO_BASE 0xFC980000
-#define SPEAR6XX_ICM3_GPIO_SIZE 0x00080000
-
#define SPEAR6XX_ICM3_SYS_CTRL_BASE 0xFCA00000
#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR6XX_ICM3_SYS_CTRL_SIZE 0x00080000
-
#define SPEAR6XX_ICM3_MISC_REG_BASE 0xFCA80000
#define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
-#define SPEAR6XX_ICM3_MISC_REG_SIZE 0x00080000
/* ICM4 - High Speed Connection */
#define SPEAR6XX_ICM4_BASE 0xE0000000
-#define SPEAR6XX_ICM4_SIZE 0x08000000
-
#define SPEAR6XX_ICM4_GMAC_BASE 0xE0800000
-#define SPEAR6XX_ICM4_GMAC_SIZE 0x00800000
-
#define SPEAR6XX_ICM4_USBD_FIFO_BASE 0xE1000000
-#define SPEAR6XX_ICM4_USBD_FIFO_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USBD_CSR_BASE 0xE1100000
-#define SPEAR6XX_ICM4_USBD_CSR_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USBD_PLDT_BASE 0xE1200000
-#define SPEAR6XX_ICM4_USBD_PLDT_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USB_EHCI0_BASE 0xE1800000
-#define SPEAR6XX_ICM4_USB_EHCI0_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USB_OHCI0_BASE 0xE1900000
-#define SPEAR6XX_ICM4_USB_OHCI0_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USB_EHCI1_BASE 0xE2000000
-#define SPEAR6XX_ICM4_USB_EHCI1_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USB_OHCI1_BASE 0xE2100000
-#define SPEAR6XX_ICM4_USB_OHCI1_SIZE 0x00100000
-
#define SPEAR6XX_ICM4_USB_ARB_BASE 0xE2800000
-#define SPEAR6XX_ICM4_USB_ARB_SIZE 0x00010000
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 8/8] ST SPEAr: Append UL to device address macros.
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977691.git.viresh.kumar@st.com>
From: Shiraz Hashim <shiraz.hashim@st.com>
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/spear.h | 71 +++++++++---------
arch/arm/mach-spear3xx/include/mach/spear300.h | 30 ++++----
arch/arm/mach-spear3xx/include/mach/spear310.h | 22 +++---
arch/arm/mach-spear3xx/include/mach/spear320.h | 35 +++++-----
arch/arm/mach-spear6xx/include/mach/spear.h | 91 ++++++++++++------------
5 files changed, 126 insertions(+), 123 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index df60e30..63fd983 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -14,60 +14,61 @@
#ifndef __MACH_SPEAR3XX_H
#define __MACH_SPEAR3XX_H
+#include <asm/memory.h>
#include <mach/spear300.h>
#include <mach/spear310.h>
#include <mach/spear320.h>
-#define SPEAR3XX_ML_SDRAM_BASE 0x00000000
+#define SPEAR3XX_ML_SDRAM_BASE UL(0x00000000)
-#define SPEAR3XX_ICM9_BASE 0xC0000000
+#define SPEAR3XX_ICM9_BASE UL(0xC0000000)
/* ICM1 - Low speed connection */
-#define SPEAR3XX_ICM1_2_BASE 0xD0000000
-#define SPEAR3XX_ICM1_UART_BASE 0xD0000000
+#define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
+#define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
-#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000
-#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000
-#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000
-#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000
-#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000
-#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000
+#define SPEAR3XX_ICM1_ADC_BASE UL(0xD0080000)
+#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
+#define SPEAR3XX_ICM1_I2C_BASE UL(0xD0180000)
+#define SPEAR3XX_ICM1_JPEG_BASE UL(0xD0800000)
+#define SPEAR3XX_ICM1_IRDA_BASE UL(0xD1000000)
+#define SPEAR3XX_ICM1_SRAM_BASE UL(0xD2800000)
/* ICM2 - Application Subsystem */
-#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000
-#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000
+#define SPEAR3XX_ICM2_HWACCEL0_BASE UL(0xD8800000)
+#define SPEAR3XX_ICM2_HWACCEL1_BASE UL(0xD9000000)
/* ICM4 - High Speed Connection */
-#define SPEAR3XX_ICM4_BASE 0xE0000000
-#define SPEAR3XX_ICM4_MII_BASE 0xE0800000
-#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000
-#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000
-#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000
-#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000
-#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000
-#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000
-#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000
+#define SPEAR3XX_ICM4_BASE UL(0xE0000000)
+#define SPEAR3XX_ICM4_MII_BASE UL(0xE0800000)
+#define SPEAR3XX_ICM4_USBD_FIFO_BASE UL(0xE1000000)
+#define SPEAR3XX_ICM4_USBD_CSR_BASE UL(0xE1100000)
+#define SPEAR3XX_ICM4_USBD_PLDT_BASE UL(0xE1200000)
+#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE UL(0xE1800000)
+#define SPEAR3XX_ICM4_USB_OHCI0_BASE UL(0xE1900000)
+#define SPEAR3XX_ICM4_USB_OHCI1_BASE UL(0xE2100000)
+#define SPEAR3XX_ICM4_USB_ARB_BASE UL(0xE2800000)
/* ML1 - Multi Layer CPU Subsystem */
-#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000
-#define SPEAR3XX_ML1_TMR_BASE 0xF0000000
-#define SPEAR3XX_ML1_VIC_BASE 0xF1100000
+#define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
+#define SPEAR3XX_ML1_TMR_BASE UL(0xF0000000)
+#define SPEAR3XX_ML1_VIC_BASE UL(0xF1100000)
#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
/* ICM3 - Basic Subsystem */
-#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000
-#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000
-#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000
-#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
-#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000
-#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000
-#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000
-#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000
-#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000
+#define SPEAR3XX_ICM3_SMEM_BASE UL(0xF8000000)
+#define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
+#define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
+#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000)
+#define SPEAR3XX_ICM3_TMR0_BASE UL(0xFC800000)
+#define SPEAR3XX_ICM3_WDT_BASE UL(0xFC880000)
+#define SPEAR3XX_ICM3_RTC_BASE UL(0xFC900000)
+#define SPEAR3XX_ICM3_GPIO_BASE UL(0xFC980000)
+#define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000
+#define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
-#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000
+#define SPEAR3XX_ICM3_TMR1_BASE UL(0xFCB00000)
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index 8f96cc5..c723515 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -17,7 +17,7 @@
#define __MACH_SPEAR300_H
/* Base address of various IPs */
-#define SPEAR300_TELECOM_BASE 0x50000000
+#define SPEAR300_TELECOM_BASE UL(0x50000000)
/* Interrupt registers offsets and masks */
#define INT_ENB_MASK_REG 0x54
@@ -34,20 +34,20 @@
#define SHIRQ_RAS1_MASK 0x1FF
-#define SPEAR300_CLCD_BASE 0x60000000
-#define SPEAR300_SDHCI_BASE 0x70000000
-#define SPEAR300_NAND_0_BASE 0x80000000
-#define SPEAR300_NAND_1_BASE 0x84000000
-#define SPEAR300_NAND_2_BASE 0x88000000
-#define SPEAR300_NAND_3_BASE 0x8c000000
-#define SPEAR300_NOR_0_BASE 0x90000000
-#define SPEAR300_NOR_1_BASE 0x91000000
-#define SPEAR300_NOR_2_BASE 0x92000000
-#define SPEAR300_NOR_3_BASE 0x93000000
-#define SPEAR300_FSMC_BASE 0x94000000
-#define SPEAR300_SOC_CONFIG_BASE 0x99000000
-#define SPEAR300_KEYBOARD_BASE 0xA0000000
-#define SPEAR300_GPIO_BASE 0xA9000000
+#define SPEAR300_CLCD_BASE UL(0x60000000)
+#define SPEAR300_SDHCI_BASE UL(0x70000000)
+#define SPEAR300_NAND_0_BASE UL(0x80000000)
+#define SPEAR300_NAND_1_BASE UL(0x84000000)
+#define SPEAR300_NAND_2_BASE UL(0x88000000)
+#define SPEAR300_NAND_3_BASE UL(0x8c000000)
+#define SPEAR300_NOR_0_BASE UL(0x90000000)
+#define SPEAR300_NOR_1_BASE UL(0x91000000)
+#define SPEAR300_NOR_2_BASE UL(0x92000000)
+#define SPEAR300_NOR_3_BASE UL(0x93000000)
+#define SPEAR300_FSMC_BASE UL(0x94000000)
+#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000)
+#define SPEAR300_KEYBOARD_BASE UL(0xA0000000)
+#define SPEAR300_GPIO_BASE UL(0xA9000000)
#endif /* __MACH_SPEAR300_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
index 4f58eb1..1e85347 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear310.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -16,17 +16,17 @@
#ifndef __MACH_SPEAR310_H
#define __MACH_SPEAR310_H
-#define SPEAR310_NAND_BASE 0x40000000
-#define SPEAR310_FSMC_BASE 0x44000000
-#define SPEAR310_UART1_BASE 0xB2000000
-#define SPEAR310_UART2_BASE 0xB2080000
-#define SPEAR310_UART3_BASE 0xB2100000
-#define SPEAR310_UART4_BASE 0xB2180000
-#define SPEAR310_UART5_BASE 0xB2200000
-#define SPEAR310_HDLC_BASE 0xB2800000
-#define SPEAR310_RS485_0_BASE 0xB3000000
-#define SPEAR310_RS485_1_BASE 0xB3800000
-#define SPEAR310_SOC_CONFIG_BASE 0xB4000000
+#define SPEAR310_NAND_BASE UL(0x40000000)
+#define SPEAR310_FSMC_BASE UL(0x44000000)
+#define SPEAR310_UART1_BASE UL(0xB2000000)
+#define SPEAR310_UART2_BASE UL(0xB2080000)
+#define SPEAR310_UART3_BASE UL(0xB2100000)
+#define SPEAR310_UART4_BASE UL(0xB2180000)
+#define SPEAR310_UART5_BASE UL(0xB2200000)
+#define SPEAR310_HDLC_BASE UL(0xB2800000)
+#define SPEAR310_RS485_0_BASE UL(0xB3000000)
+#define SPEAR310_RS485_1_BASE UL(0xB3800000)
+#define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000)
/* Interrupt registers offsets and masks */
#define INT_STS_MASK_REG 0x04
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index 95bdb2e..940f0d8 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -16,23 +16,24 @@
#ifndef __MACH_SPEAR320_H
#define __MACH_SPEAR320_H
-#define SPEAR320_EMI_CTRL_BASE 0x40000000
-#define SPEAR320_FSMC_BASE 0x4C000000
-#define SPEAR320_I2S_BASE 0x60000000
-#define SPEAR320_SDHCI_BASE 0x70000000
-#define SPEAR320_CLCD_BASE 0x90000000
-#define SPEAR320_PAR_PORT_BASE 0xA0000000
-#define SPEAR320_CAN0_BASE 0xA1000000
-#define SPEAR320_CAN1_BASE 0xA2000000
-#define SPEAR320_UART1_BASE 0xA3000000
-#define SPEAR320_UART2_BASE 0xA4000000
-#define SPEAR320_SSP0_BASE 0xA5000000
-#define SPEAR320_SSP1_BASE 0xA6000000
-#define SPEAR320_I2C_BASE 0xA7000000
-#define SPEAR320_PWM_BASE 0xA8000000
-#define SPEAR320_SMII0_BASE 0xAA000000
-#define SPEAR320_SMII1_BASE 0xAB000000
-#define SPEAR320_SOC_CONFIG_BASE 0xB3000000
+#define SPEAR320_EMI_CTRL_BASE UL(0x40000000)
+#define SPEAR320_FSMC_BASE UL(0x4C000000)
+#define SPEAR320_NAND_BASE UL(0x50000000)
+#define SPEAR320_I2S_BASE UL(0x60000000)
+#define SPEAR320_SDHCI_BASE UL(0x70000000)
+#define SPEAR320_CLCD_BASE UL(0x90000000)
+#define SPEAR320_PAR_PORT_BASE UL(0xA0000000)
+#define SPEAR320_CAN0_BASE UL(0xA1000000)
+#define SPEAR320_CAN1_BASE UL(0xA2000000)
+#define SPEAR320_UART1_BASE UL(0xA3000000)
+#define SPEAR320_UART2_BASE UL(0xA4000000)
+#define SPEAR320_SSP0_BASE UL(0xA5000000)
+#define SPEAR320_SSP1_BASE UL(0xA6000000)
+#define SPEAR320_I2C_BASE UL(0xA7000000)
+#define SPEAR320_PWM_BASE UL(0xA8000000)
+#define SPEAR320_SMII0_BASE UL(0xAA000000)
+#define SPEAR320_SMII1_BASE UL(0xAB000000)
+#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
/* Interrupt registers offsets and masks */
#define INT_STS_MASK_REG 0x04
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
index c9bba39..7fd6215 100644
--- a/arch/arm/mach-spear6xx/include/mach/spear.h
+++ b/arch/arm/mach-spear6xx/include/mach/spear.h
@@ -14,69 +14,70 @@
#ifndef __MACH_SPEAR6XX_H
#define __MACH_SPEAR6XX_H
+#include <asm/memory.h>
#include <mach/spear600.h>
-#define SPEAR6XX_ML_SDRAM_BASE 0x00000000
+#define SPEAR6XX_ML_SDRAM_BASE UL(0x00000000)
/* ICM1 - Low speed connection */
-#define SPEAR6XX_ICM1_BASE 0xD0000000
+#define SPEAR6XX_ICM1_BASE UL(0xD0000000)
-#define SPEAR6XX_ICM1_UART0_BASE 0xD0000000
+#define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000)
#define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
-#define SPEAR6XX_ICM1_UART1_BASE 0xD0080000
-#define SPEAR6XX_ICM1_SSP0_BASE 0xD0100000
-#define SPEAR6XX_ICM1_SSP1_BASE 0xD0180000
-#define SPEAR6XX_ICM1_I2C_BASE 0xD0200000
-#define SPEAR6XX_ICM1_JPEG_BASE 0xD0800000
-#define SPEAR6XX_ICM1_IRDA_BASE 0xD1000000
-#define SPEAR6XX_ICM1_FSMC_BASE 0xD1800000
-#define SPEAR6XX_ICM1_NAND_BASE 0xD2000000
-#define SPEAR6XX_ICM1_SRAM_BASE 0xD2800000
+#define SPEAR6XX_ICM1_UART1_BASE UL(0xD0080000)
+#define SPEAR6XX_ICM1_SSP0_BASE UL(0xD0100000)
+#define SPEAR6XX_ICM1_SSP1_BASE UL(0xD0180000)
+#define SPEAR6XX_ICM1_I2C_BASE UL(0xD0200000)
+#define SPEAR6XX_ICM1_JPEG_BASE UL(0xD0800000)
+#define SPEAR6XX_ICM1_IRDA_BASE UL(0xD1000000)
+#define SPEAR6XX_ICM1_FSMC_BASE UL(0xD1800000)
+#define SPEAR6XX_ICM1_NAND_BASE UL(0xD2000000)
+#define SPEAR6XX_ICM1_SRAM_BASE UL(0xD2800000)
/* ICM2 - Application Subsystem */
-#define SPEAR6XX_ICM2_BASE 0xD8000000
-#define SPEAR6XX_ICM2_TMR0_BASE 0xD8000000
-#define SPEAR6XX_ICM2_TMR1_BASE 0xD8080000
-#define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000
-#define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000
-#define SPEAR6XX_ICM2_ADC_BASE 0xD8200000
+#define SPEAR6XX_ICM2_BASE UL(0xD8000000)
+#define SPEAR6XX_ICM2_TMR0_BASE UL(0xD8000000)
+#define SPEAR6XX_ICM2_TMR1_BASE UL(0xD8080000)
+#define SPEAR6XX_ICM2_GPIO_BASE UL(0xD8100000)
+#define SPEAR6XX_ICM2_SSP2_BASE UL(0xD8180000)
+#define SPEAR6XX_ICM2_ADC_BASE UL(0xD8200000)
/* ML-1, 2 - Multi Layer CPU Subsystem */
-#define SPEAR6XX_ML_CPU_BASE 0xF0000000
-#define SPEAR6XX_CPU_TMR_BASE 0xF0000000
-#define SPEAR6XX_CPU_GPIO_BASE 0xF0100000
-#define SPEAR6XX_CPU_VIC_SEC_BASE 0xF1000000
+#define SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
+#define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000)
+#define SPEAR6XX_CPU_GPIO_BASE UL(0xF0100000)
+#define SPEAR6XX_CPU_VIC_SEC_BASE UL(0xF1000000)
#define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
-#define SPEAR6XX_CPU_VIC_PRI_BASE 0xF1100000
+#define SPEAR6XX_CPU_VIC_PRI_BASE UL(0xF1100000)
#define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
/* ICM3 - Basic Subsystem */
-#define SPEAR6XX_ICM3_BASE 0xF8000000
-#define SPEAR6XX_ICM3_SMEM_BASE 0xF8000000
-#define SPEAR6XX_ICM3_SMI_CTRL_BASE 0xFC000000
-#define SPEAR6XX_ICM3_CLCD_BASE 0xFC200000
-#define SPEAR6XX_ICM3_DMA_BASE 0xFC400000
-#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
-#define SPEAR6XX_ICM3_TMR_BASE 0xFC800000
-#define SPEAR6XX_ICM3_WDT_BASE 0xFC880000
-#define SPEAR6XX_ICM3_RTC_BASE 0xFC900000
-#define SPEAR6XX_ICM3_GPIO_BASE 0xFC980000
-#define SPEAR6XX_ICM3_SYS_CTRL_BASE 0xFCA00000
+#define SPEAR6XX_ICM3_BASE UL(0xF8000000)
+#define SPEAR6XX_ICM3_SMEM_BASE UL(0xF8000000)
+#define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
+#define SPEAR6XX_ICM3_CLCD_BASE UL(0xFC200000)
+#define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000)
+#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000)
+#define SPEAR6XX_ICM3_TMR_BASE UL(0xFC800000)
+#define SPEAR6XX_ICM3_WDT_BASE UL(0xFC880000)
+#define SPEAR6XX_ICM3_RTC_BASE UL(0xFC900000)
+#define SPEAR6XX_ICM3_GPIO_BASE UL(0xFC980000)
+#define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR6XX_ICM3_MISC_REG_BASE 0xFCA80000
+#define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
#define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
/* ICM4 - High Speed Connection */
-#define SPEAR6XX_ICM4_BASE 0xE0000000
-#define SPEAR6XX_ICM4_GMAC_BASE 0xE0800000
-#define SPEAR6XX_ICM4_USBD_FIFO_BASE 0xE1000000
-#define SPEAR6XX_ICM4_USBD_CSR_BASE 0xE1100000
-#define SPEAR6XX_ICM4_USBD_PLDT_BASE 0xE1200000
-#define SPEAR6XX_ICM4_USB_EHCI0_BASE 0xE1800000
-#define SPEAR6XX_ICM4_USB_OHCI0_BASE 0xE1900000
-#define SPEAR6XX_ICM4_USB_EHCI1_BASE 0xE2000000
-#define SPEAR6XX_ICM4_USB_OHCI1_BASE 0xE2100000
-#define SPEAR6XX_ICM4_USB_ARB_BASE 0xE2800000
+#define SPEAR6XX_ICM4_BASE UL(0xE0000000)
+#define SPEAR6XX_ICM4_GMAC_BASE UL(0xE0800000)
+#define SPEAR6XX_ICM4_USBD_FIFO_BASE UL(0xE1000000)
+#define SPEAR6XX_ICM4_USBD_CSR_BASE UL(0xE1100000)
+#define SPEAR6XX_ICM4_USBD_PLDT_BASE UL(0xE1200000)
+#define SPEAR6XX_ICM4_USB_EHCI0_BASE UL(0xE1800000)
+#define SPEAR6XX_ICM4_USB_OHCI0_BASE UL(0xE1900000)
+#define SPEAR6XX_ICM4_USB_EHCI1_BASE UL(0xE2000000)
+#define SPEAR6XX_ICM4_USB_OHCI1_BASE UL(0xE2100000)
+#define SPEAR6XX_ICM4_USB_ARB_BASE UL(0xE2800000)
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 00/11] SPEAr3xx & SPEAr6xx: Single Image solution and padmux updates
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
This patchset contains following updates for SPEAr3xx & SPEAr6xx:
- Pad multiplexing updates
- Single Image solution
Note: These patches were earlier sent as part of a larger patchset:
"Updating SPEAr Support"
Now it is divided into smaller patchsets. In order to apply these patches
cleanly following order of patchsets must be maintained.
- SPEAr3xx & SPEAr6xx Fixes
- SPEAr3xx & SPEAr6xx: Single Image solution and padmux updates
- Adding SPEAr13xx support
- Adding devices support for all spear machines
- Clock Framework & CPU Freq Updates
Ryan Mallon (5):
ST SPEAr3xx: Make local shirq structures static
ST SPEAR3xx: Rename register/irq defines to remove naming conflicts
ST SPEAr3xx: Rework pmx_dev code to remove conflicts
ST SPEAr3xx: Rework KConfig to allow all boards to be compiled in
ST SPEAr3xx: Replace defconfigs with single unified defconfig
Vipin Kumar (1):
ST SPEAr: Pad multiplexing handling modified
Viresh Kumar (5):
ST SPEAr clock: Define common clk_init routine in plat/clock.c
ST SPEAr Clock: Updating for single image solution
ST SPEAr3xx: Appending spear3** with global device structures
ST SPEAr6xx: Rework Kconfig for single image solution
ST SPEAR6xx: renaming spear600_defconfig as spear6xx_defconfig
arch/arm/configs/spear310_defconfig | 52 --
arch/arm/configs/spear320_defconfig | 52 --
.../{spear300_defconfig => spear3xx_defconfig} | 4 +-
.../{spear600_defconfig => spear6xx_defconfig} | 2 +-
arch/arm/mach-spear3xx/Kconfig | 30 +-
arch/arm/mach-spear3xx/Kconfig300 | 17 -
arch/arm/mach-spear3xx/Kconfig310 | 17 -
arch/arm/mach-spear3xx/Kconfig320 | 17 -
arch/arm/mach-spear3xx/clock.c | 74 ++-
arch/arm/mach-spear3xx/include/mach/generic.h | 215 ++++----
arch/arm/mach-spear3xx/include/mach/irqs.h | 206 ++++----
arch/arm/mach-spear3xx/include/mach/spear300.h | 27 +-
arch/arm/mach-spear3xx/include/mach/spear310.h | 44 +-
arch/arm/mach-spear3xx/include/mach/spear320.h | 48 +-
arch/arm/mach-spear3xx/spear300.c | 449 ++++++++++-----
arch/arm/mach-spear3xx/spear300_evb.c | 32 +-
arch/arm/mach-spear3xx/spear310.c | 247 +++++----
arch/arm/mach-spear3xx/spear310_evb.c | 45 +-
arch/arm/mach-spear3xx/spear320.c | 579 +++++++++++++-------
arch/arm/mach-spear3xx/spear320_evb.c | 40 +-
arch/arm/mach-spear3xx/spear3xx.c | 513 +++++++++++++-----
arch/arm/mach-spear6xx/Kconfig | 15 +-
arch/arm/mach-spear6xx/Kconfig600 | 17 -
arch/arm/mach-spear6xx/clock.c | 4 +-
arch/arm/mach-spear6xx/include/mach/generic.h | 2 +-
arch/arm/mach-spear6xx/spear6xx.c | 2 +-
arch/arm/plat-spear/clock.c | 5 +
arch/arm/plat-spear/include/plat/clock.h | 1 +
arch/arm/plat-spear/include/plat/padmux.h | 34 +-
arch/arm/plat-spear/padmux.c | 54 +-
30 files changed, 1698 insertions(+), 1146 deletions(-)
delete mode 100644 arch/arm/configs/spear310_defconfig
delete mode 100644 arch/arm/configs/spear320_defconfig
rename arch/arm/configs/{spear300_defconfig => spear3xx_defconfig} (93%)
rename arch/arm/configs/{spear600_defconfig => spear6xx_defconfig} (97%)
delete mode 100644 arch/arm/mach-spear3xx/Kconfig300
delete mode 100644 arch/arm/mach-spear3xx/Kconfig310
delete mode 100644 arch/arm/mach-spear3xx/Kconfig320
delete mode 100644 arch/arm/mach-spear6xx/Kconfig600
--
1.7.2.2
^ permalink raw reply
* [PATCH V6 01/11] ST SPEAr: Pad multiplexing handling modified
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977709.git.viresh.kumar@st.com>
From: Vipin Kumar <vipin.kumar@st.com>
Until now, the platform code assumed 1 32 bit register to be used for pad
multiplexing. This assumption is not true for SPEAr13xx devices, so the generic
implementation of pad multiplexing adopts a new concepts of multiple
multiplexing registers in different address range.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/generic.h | 10 +
arch/arm/mach-spear3xx/include/mach/spear300.h | 1 -
arch/arm/mach-spear3xx/spear300.c | 315 +++++++++++++-----
arch/arm/mach-spear3xx/spear310.c | 117 +++++--
arch/arm/mach-spear3xx/spear320.c | 373 ++++++++++++++++-----
arch/arm/mach-spear3xx/spear3xx.c | 441 +++++++++++++++++++-----
arch/arm/plat-spear/include/plat/padmux.h | 34 ++-
arch/arm/plat-spear/padmux.c | 54 ++--
8 files changed, 1016 insertions(+), 329 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 8e30636..33e04fe 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -41,6 +41,7 @@ void __init spear_setup_timer(void);
void __init spear3xx_map_io(void);
void __init spear3xx_init_irq(void);
void __init spear3xx_init(void);
+void spear3xx_pmx_init_addr(struct pmx_driver *driver, unsigned int addr);
/* pad mux declarations */
#define PMX_FIRDA_MASK (1 << 14)
@@ -133,6 +134,10 @@ extern struct pmx_dev pmx_telecom_sdhci_4bit;
extern struct pmx_dev pmx_telecom_sdhci_8bit;
extern struct pmx_dev pmx_gpio1;
+/* pad multiplexing support */
+#define SPEAR300_PAD_MUX_CONFIG_REG 0x99000000
+#define SPEAR300_MODE_CONFIG_REG 0x99000004
+
/* Add spear300 machine function declarations here */
void __init spear300_init(void);
@@ -151,6 +156,7 @@ extern struct pmx_dev pmx_uart3_4_5;
extern struct pmx_dev pmx_fsmc;
extern struct pmx_dev pmx_rs485_0_1;
extern struct pmx_dev pmx_tdm0;
+#define SPEAR310_PAD_MUX_CONFIG_REG 0xB4000008
/* Add spear310 machine function declarations here */
void __init spear310_init(void);
@@ -191,6 +197,10 @@ extern struct pmx_dev pmx_smii0;
extern struct pmx_dev pmx_smii1;
extern struct pmx_dev pmx_i2c1;
+/* pad multiplexing support */
+#define SPEAR320_PAD_MUX_CONFIG_REG 0xB300000C
+#define SPEAR320_MODE_CONFIG_REG 0xB3000010
+
/* Add spear320 machine function declarations here */
void __init spear320_init(void);
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index c723515..4fd2d22 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -45,7 +45,6 @@
#define SPEAR300_NOR_2_BASE UL(0x92000000)
#define SPEAR300_NOR_3_BASE UL(0x93000000)
#define SPEAR300_FSMC_BASE UL(0x94000000)
-#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000)
#define SPEAR300_KEYBOARD_BASE UL(0xA0000000)
#define SPEAR300_GPIO_BASE UL(0xA9000000)
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 2697e65..2e856d8 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -19,11 +19,6 @@
#include <mach/generic.h>
#include <mach/hardware.h>
-/* pad multiplexing support */
-/* muxing registers */
-#define PAD_MUX_CONFIG_REG 0x00
-#define MODE_CONFIG_REG 0x04
-
/* modes */
#define NAND_MODE (1 << 0)
#define NOR_MODE (1 << 1)
@@ -43,87 +38,95 @@
struct pmx_mode nand_mode = {
.id = NAND_MODE,
.name = "nand mode",
- .mask = 0x00,
+ .value = 0x00,
};
struct pmx_mode nor_mode = {
.id = NOR_MODE,
.name = "nor mode",
- .mask = 0x01,
+ .value = 0x01,
};
struct pmx_mode photo_frame_mode = {
.id = PHOTO_FRAME_MODE,
.name = "photo frame mode",
- .mask = 0x02,
+ .value = 0x02,
};
struct pmx_mode lend_ip_phone_mode = {
.id = LEND_IP_PHONE_MODE,
.name = "lend ip phone mode",
- .mask = 0x03,
+ .value = 0x03,
};
struct pmx_mode hend_ip_phone_mode = {
.id = HEND_IP_PHONE_MODE,
.name = "hend ip phone mode",
- .mask = 0x04,
+ .value = 0x04,
};
struct pmx_mode lend_wifi_phone_mode = {
.id = LEND_WIFI_PHONE_MODE,
.name = "lend wifi phone mode",
- .mask = 0x05,
+ .value = 0x05,
};
struct pmx_mode hend_wifi_phone_mode = {
.id = HEND_WIFI_PHONE_MODE,
.name = "hend wifi phone mode",
- .mask = 0x06,
+ .value = 0x06,
};
struct pmx_mode ata_pabx_wi2s_mode = {
.id = ATA_PABX_WI2S_MODE,
.name = "ata pabx wi2s mode",
- .mask = 0x07,
+ .value = 0x07,
};
struct pmx_mode ata_pabx_i2s_mode = {
.id = ATA_PABX_I2S_MODE,
.name = "ata pabx i2s mode",
- .mask = 0x08,
+ .value = 0x08,
};
struct pmx_mode caml_lcdw_mode = {
.id = CAML_LCDW_MODE,
.name = "caml lcdw mode",
- .mask = 0x0C,
+ .value = 0x0C,
};
struct pmx_mode camu_lcd_mode = {
.id = CAMU_LCD_MODE,
.name = "camu lcd mode",
- .mask = 0x0D,
+ .value = 0x0D,
};
struct pmx_mode camu_wlcd_mode = {
.id = CAMU_WLCD_MODE,
.name = "camu wlcd mode",
- .mask = 0x0E,
+ .value = 0x0E,
};
struct pmx_mode caml_lcd_mode = {
.id = CAML_LCD_MODE,
.name = "caml lcd mode",
- .mask = 0x0F,
+ .value = 0x0F,
};
-/* devices */
-struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
+/* Pad multiplexing for FSMC 2 NAND devices */
+static struct pmx_mux_reg pmx_fsmc_2_mux[] = {
+ {
+ .mask = PMX_FIRDA_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
{
.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
- .mask = PMX_FIRDA_MASK,
+ .mux_regs = pmx_fsmc_2_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_fsmc_2_mux),
},
};
@@ -131,14 +134,22 @@ struct pmx_dev pmx_fsmc_2_chips = {
.name = "fsmc_2_chips",
.modes = pmx_fsmc_2_chips_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
+/* Pad multiplexing for FSMC 4 NAND devices */
+static struct pmx_mux_reg pmx_fsmc_4_mux[] = {
+ {
+ .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
{
.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
- .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
+ .mux_regs = pmx_fsmc_4_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_fsmc_4_mux),
},
};
@@ -146,16 +157,24 @@ struct pmx_dev pmx_fsmc_4_chips = {
.name = "fsmc_4_chips",
.modes = pmx_fsmc_4_chips_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_keyboard_modes[] = {
+/* Pad multiplexing for Keyboard device */
+static struct pmx_mux_reg pmx_kbd_mux[] = {
+ {
+ .mask = 0x0,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_keyboard_modes[] = {
{
.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
CAML_LCD_MODE,
- .mask = 0x0,
+ .mux_regs = pmx_kbd_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_kbd_mux),
},
};
@@ -163,17 +182,33 @@ struct pmx_dev pmx_keyboard = {
.name = "keyboard",
.modes = pmx_keyboard_modes,
.mode_count = ARRAY_SIZE(pmx_keyboard_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_clcd_modes[] = {
+/* Pad multiplexing for CLCD device */
+static struct pmx_mux_reg pmx_clcd_pfmode_mux[] = {
+ {
+ .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_clcd_lcdmode_mux[] = {
+ {
+ .mask = PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_clcd_modes[] = {
{
.ids = PHOTO_FRAME_MODE,
- .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
+ .mux_regs = pmx_clcd_pfmode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_clcd_pfmode_mux),
}, {
.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
CAMU_LCD_MODE | CAML_LCD_MODE,
- .mask = PMX_TIMER_3_4_MASK,
+ .mux_regs = pmx_clcd_lcdmode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_clcd_lcdmode_mux),
},
};
@@ -181,26 +216,66 @@ struct pmx_dev pmx_clcd = {
.name = "clcd",
.modes = pmx_clcd_modes,
.mode_count = ARRAY_SIZE(pmx_clcd_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
+/* Pad multiplexing for Telecom GPIO device */
+static struct pmx_mux_reg pmx_gpio_lcdmode_mux[] = {
{
- .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_gpio_fonemode_mux[] = {
+ {
+ .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_gpio_atai2smode_mux[] = {
+ {
+ .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_gpio_lendfonemode_mux[] = {
+ {
+ .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_gpio_atawi2smode_mux[] = {
+ {
+ .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
+ | PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
+ {
+ .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
+ .mux_regs = pmx_gpio_lcdmode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_lcdmode_mux),
}, {
.ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
- .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .mux_regs = pmx_gpio_fonemode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_fonemode_mux),
}, {
.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
- .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
+ .mux_regs = pmx_gpio_atai2smode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_atai2smode_mux),
}, {
.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
- .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
+ .mux_regs = pmx_gpio_lendfonemode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_lendfonemode_mux),
}, {
.ids = ATA_PABX_WI2S_MODE,
- .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
- | PMX_UART0_MODEM_MASK,
+ .mux_regs = pmx_gpio_atawi2smode_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_atawi2smode_mux),
},
};
@@ -208,17 +283,25 @@ struct pmx_dev pmx_telecom_gpio = {
.name = "telecom_gpio",
.modes = pmx_telecom_gpio_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
+/* Pad multiplexing for TDM device */
+static struct pmx_mux_reg pmx_tdm_mux[] = {
+ {
+ .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
{
.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
| CAMU_WLCD_MODE | CAML_LCD_MODE,
- .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
+ .mux_regs = pmx_tdm_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_tdm_mux),
},
};
@@ -226,16 +309,24 @@ struct pmx_dev pmx_telecom_tdm = {
.name = "telecom_tdm",
.modes = pmx_telecom_tdm_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
+/* Pad multiplexing for spi cs i2c device */
+static struct pmx_mux_reg pmx_spi_cs_i2c_mux[] = {
+ {
+ .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
{
.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
| ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
CAML_LCDW_MODE | CAML_LCD_MODE,
- .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .mux_regs = pmx_spi_cs_i2c_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_spi_cs_i2c_mux),
},
};
@@ -243,16 +334,31 @@ struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
.name = "telecom_spi_cs_i2c_clk",
.modes = pmx_telecom_spi_cs_i2c_clk_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_camera_modes[] = {
+static struct pmx_mux_reg pmx_caml_mux[] = {
{
- .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_camu_mux[] = {
+ {
+ .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
+ {
+ .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
+ .mux_regs = pmx_caml_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_caml_mux),
}, {
.ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
- .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
+ .mux_regs = pmx_camu_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_camu_mux),
},
};
@@ -260,14 +366,22 @@ struct pmx_dev pmx_telecom_camera = {
.name = "telecom_camera",
.modes = pmx_telecom_camera_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_dac_modes[] = {
+/* Pad multiplexing for dac device */
+static struct pmx_mux_reg pmx_dac_mux[] = {
+ {
+ .mask = PMX_TIMER_1_2_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
{
.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
| CAMU_WLCD_MODE | CAML_LCD_MODE,
- .mask = PMX_TIMER_1_2_MASK,
+ .mux_regs = pmx_dac_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_dac_mux),
},
};
@@ -275,16 +389,24 @@ struct pmx_dev pmx_telecom_dac = {
.name = "telecom_dac",
.modes = pmx_telecom_dac_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
+/* Pad multiplexing for spi cs i2c device */
+static struct pmx_mux_reg pmx_i2s_mux[] = {
+ {
+ .mask = PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
{
.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
| CAMU_WLCD_MODE | CAML_LCD_MODE,
- .mask = PMX_UART0_MODEM_MASK,
+ .mux_regs = pmx_i2s_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_i2s_mux),
},
};
@@ -292,14 +414,22 @@ struct pmx_dev pmx_telecom_i2s = {
.name = "telecom_i2s",
.modes = pmx_telecom_i2s_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
+/* Pad multiplexing for bootpins device */
+static struct pmx_mux_reg pmx_bootpins_mux[] = {
{
- .ids = NAND_MODE | NOR_MODE,
.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
+ {
+ .ids = NAND_MODE | NOR_MODE,
+ .mux_regs = pmx_bootpins_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_bootpins_mux),
},
};
@@ -307,19 +437,27 @@ struct pmx_dev pmx_telecom_boot_pins = {
.name = "telecom_boot_pins",
.modes = pmx_telecom_boot_pins_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
+/* Pad multiplexing for sdhci 4bit device */
+static struct pmx_mux_reg pmx_sdhci_4bit_mux[] = {
+ {
+ .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
+ PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
+ PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
{
.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
ATA_PABX_I2S_MODE,
- .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
- PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
- PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
+ .mux_regs = pmx_sdhci_4bit_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_sdhci_4bit_mux),
},
};
@@ -327,18 +465,26 @@ struct pmx_dev pmx_telecom_sdhci_4bit = {
.name = "telecom_sdhci_4bit",
.modes = pmx_telecom_sdhci_4bit_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
+/* Pad multiplexing for spi cs i2c device */
+static struct pmx_mux_reg pmx_sdhci_8bit_mux[] = {
+ {
+ .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
+ PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
+ PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
{
.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
CAMU_WLCD_MODE | CAML_LCD_MODE,
- .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
- PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
- PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
+ .mux_regs = pmx_sdhci_8bit_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_sdhci_8bit_mux),
},
};
@@ -346,14 +492,22 @@ struct pmx_dev pmx_telecom_sdhci_8bit = {
.name = "telecom_sdhci_8bit",
.modes = pmx_telecom_sdhci_8bit_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_gpio1_modes[] = {
+/* Pad multiplexing for spi cs i2c device */
+static struct pmx_mux_reg pmx_gpio1_mux[] = {
{
- .ids = PHOTO_FRAME_MODE,
.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio1_modes[] = {
+ {
+ .ids = PHOTO_FRAME_MODE,
+ .mux_regs = pmx_gpio1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio1_mux),
},
};
@@ -361,13 +515,11 @@ struct pmx_dev pmx_gpio1 = {
.name = "arm gpio1",
.modes = pmx_gpio1_modes,
.mode_count = ARRAY_SIZE(pmx_gpio1_modes),
- .enb_on_reset = 1,
};
/* pmx driver structure */
struct pmx_driver pmx_driver = {
- .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
- .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
+ .mode_reg = {.address = SPEAR300_MODE_CONFIG_REG, .mask = 0x0000000f},
};
/* spear3xx shared irq */
@@ -459,14 +611,11 @@ void __init spear300_init(void)
printk(KERN_ERR "Error registering Shared IRQ\n");
}
+ /* This fixes addresses of all pmx devices for spear300 */
+ spear3xx_pmx_init_addr(&pmx_driver, SPEAR300_PAD_MUX_CONFIG_REG);
+
/* pmx initialization */
- pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
- if (pmx_driver.base) {
- ret = pmx_register(&pmx_driver);
- if (ret)
- printk(KERN_ERR "padmux: registeration failed. err no"
- ": %d\n", ret);
- /* Free Mapping, device selection already done */
- iounmap(pmx_driver.base);
- }
+ ret = pmx_register(&pmx_driver);
+ if (ret)
+ pr_err("padmux: registeration failed. err no: %d\n", ret);
}
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 5c0a67b..20182d2 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -18,14 +18,20 @@
#include <mach/hardware.h>
/* pad multiplexing support */
-/* muxing registers */
-#define PAD_MUX_CONFIG_REG 0x08
/* devices */
-struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
+/* Pad multiplexing for emi_cs_0_1_4_5 devices */
+static struct pmx_mux_reg pmx_emi_cs_0_1_4_5_mux[] = {
{
- .ids = 0x00,
.mask = PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
+ {
+ .mux_regs = pmx_emi_cs_0_1_4_5_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_mux),
},
};
@@ -33,13 +39,20 @@ struct pmx_dev pmx_emi_cs_0_1_4_5 = {
.name = "emi_cs_0_1_4_5",
.modes = pmx_emi_cs_0_1_4_5_modes,
.mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
+/* Pad multiplexing for emi_cs_2_3 devices */
+static struct pmx_mux_reg pmx_emi_cs_2_3_mux[] = {
{
- .ids = 0x00,
.mask = PMX_TIMER_1_2_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
+ {
+ .mux_regs = pmx_emi_cs_2_3_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_emi_cs_2_3_mux),
},
};
@@ -47,13 +60,20 @@ struct pmx_dev pmx_emi_cs_2_3 = {
.name = "emi_cs_2_3",
.modes = pmx_emi_cs_2_3_modes,
.mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_uart1_modes[] = {
+/* Pad multiplexing for uart1 device */
+static struct pmx_mux_reg pmx_uart1_mux[] = {
{
- .ids = 0x00,
.mask = PMX_FIRDA_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart1_modes[] = {
+ {
+ .mux_regs = pmx_uart1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart1_mux),
},
};
@@ -61,13 +81,20 @@ struct pmx_dev pmx_uart1 = {
.name = "uart1",
.modes = pmx_uart1_modes,
.mode_count = ARRAY_SIZE(pmx_uart1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_uart2_modes[] = {
+/* Pad multiplexing for uart2 device */
+static struct pmx_mux_reg pmx_uart2_mux[] = {
{
- .ids = 0x00,
.mask = PMX_TIMER_1_2_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart2_modes[] = {
+ {
+ .mux_regs = pmx_uart2_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart2_mux),
},
};
@@ -75,13 +102,20 @@ struct pmx_dev pmx_uart2 = {
.name = "uart2",
.modes = pmx_uart2_modes,
.mode_count = ARRAY_SIZE(pmx_uart2_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
+/* Pad multiplexing for uart3_4_5 devices */
+static struct pmx_mux_reg pmx_uart3_4_5_mux[] = {
{
- .ids = 0x00,
.mask = PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
+ {
+ .mux_regs = pmx_uart3_4_5_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart3_4_5_mux),
},
};
@@ -89,13 +123,20 @@ struct pmx_dev pmx_uart3_4_5 = {
.name = "uart3_4_5",
.modes = pmx_uart3_4_5_modes,
.mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_fsmc_modes[] = {
+/* Pad multiplexing for fsmc device */
+static struct pmx_mux_reg pmx_fsmc_mux[] = {
{
- .ids = 0x00,
.mask = PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_fsmc_modes[] = {
+ {
+ .mux_regs = pmx_fsmc_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_fsmc_mux),
},
};
@@ -103,13 +144,20 @@ struct pmx_dev pmx_fsmc = {
.name = "fsmc",
.modes = pmx_fsmc_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
+/* Pad multiplexing for rs485_0_1 devices */
+static struct pmx_mux_reg pmx_rs485_0_1_mux[] = {
{
- .ids = 0x00,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
+ {
+ .mux_regs = pmx_rs485_0_1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_rs485_0_1_mux),
},
};
@@ -117,13 +165,20 @@ struct pmx_dev pmx_rs485_0_1 = {
.name = "rs485_0_1",
.modes = pmx_rs485_0_1_modes,
.mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_tdm0_modes[] = {
+/* Pad multiplexing for tdm0 device */
+static struct pmx_mux_reg pmx_tdm0_mux[] = {
{
- .ids = 0x00,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_tdm0_modes[] = {
+ {
+ .mux_regs = pmx_tdm0_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_tdm0_mux),
},
};
@@ -131,13 +186,10 @@ struct pmx_dev pmx_tdm0 = {
.name = "tdm0",
.modes = pmx_tdm0_modes,
.mode_count = ARRAY_SIZE(pmx_tdm0_modes),
- .enb_on_reset = 1,
};
/* pmx driver structure */
-struct pmx_driver pmx_driver = {
- .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
-};
+struct pmx_driver pmx_driver;
/* spear3xx shared irq */
struct shirq_dev_config shirq_ras1_config[] = {
@@ -294,10 +346,11 @@ void __init spear310_init(void)
printk(KERN_ERR "Error registering Shared IRQ 4\n");
}
+ /* This fixes addresses of all pmx devices for spear310 */
+ spear3xx_pmx_init_addr(&pmx_driver, SPEAR310_PAD_MUX_CONFIG_REG);
+
/* pmx initialization */
- pmx_driver.base = base;
ret = pmx_register(&pmx_driver);
if (ret)
- printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
- ret);
+ pr_err("padmux: registeration failed. err no: %d\n", ret);
}
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 741c1f4..249798b3 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -17,11 +17,6 @@
#include <mach/generic.h>
#include <mach/hardware.h>
-/* pad multiplexing support */
-/* muxing registers */
-#define PAD_MUX_CONFIG_REG 0x0C
-#define MODE_CONFIG_REG 0x10
-
/* modes */
#define AUTO_NET_SMII_MODE (1 << 0)
#define AUTO_NET_MII_MODE (1 << 1)
@@ -32,32 +27,41 @@
struct pmx_mode auto_net_smii_mode = {
.id = AUTO_NET_SMII_MODE,
.name = "Automation Networking SMII Mode",
- .mask = 0x00,
+ .value = 0x00,
};
struct pmx_mode auto_net_mii_mode = {
.id = AUTO_NET_MII_MODE,
.name = "Automation Networking MII Mode",
- .mask = 0x01,
+ .value = 0x01,
};
struct pmx_mode auto_exp_mode = {
.id = AUTO_EXP_MODE,
.name = "Automation Expanded Mode",
- .mask = 0x02,
+ .value = 0x02,
};
struct pmx_mode small_printers_mode = {
.id = SMALL_PRINTERS_MODE,
.name = "Small Printers Mode",
- .mask = 0x03,
+ .value = 0x03,
};
/* devices */
-struct pmx_dev_mode pmx_clcd_modes[] = {
+/* Pad multiplexing for CLCD device */
+static struct pmx_mux_reg pmx_clcd_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE,
.mask = 0x0,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_clcd_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE,
+ .mux_regs = pmx_clcd_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_clcd_mux),
},
};
@@ -65,13 +69,21 @@ struct pmx_dev pmx_clcd = {
.name = "clcd",
.modes = pmx_clcd_modes,
.mode_count = ARRAY_SIZE(pmx_clcd_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_emi_modes[] = {
+/* Pad multiplexing for EMI (Parallel NOR flash) device */
+static struct pmx_mux_reg pmx_emi_mux[] = {
{
- .ids = AUTO_EXP_MODE,
.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_emi_modes[] = {
+ {
+ .ids = AUTO_EXP_MODE,
+ .mux_regs = pmx_emi_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_emi_mux),
},
};
@@ -79,13 +91,21 @@ struct pmx_dev pmx_emi = {
.name = "emi",
.modes = pmx_emi_modes,
.mode_count = ARRAY_SIZE(pmx_emi_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_fsmc_modes[] = {
+/* Pad multiplexing for FSMC (NAND flash) device */
+static struct pmx_mux_reg pmx_fsmc_mux[] = {
{
- .ids = ALL_MODES,
.mask = 0x0,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_fsmc_modes[] = {
+ {
+ .ids = ALL_MODES,
+ .mux_regs = pmx_fsmc_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_fsmc_mux),
},
};
@@ -93,13 +113,21 @@ struct pmx_dev pmx_fsmc = {
.name = "fsmc",
.modes = pmx_fsmc_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_spp_modes[] = {
+/* Pad multiplexing for SPP device */
+static struct pmx_mux_reg pmx_spp_mux[] = {
{
- .ids = SMALL_PRINTERS_MODE,
.mask = 0x0,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_spp_modes[] = {
+ {
+ .ids = SMALL_PRINTERS_MODE,
+ .mux_regs = pmx_spp_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_spp_mux),
},
};
@@ -107,14 +135,22 @@ struct pmx_dev pmx_spp = {
.name = "spp",
.modes = pmx_spp_modes,
.mode_count = ARRAY_SIZE(pmx_spp_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_sdhci_modes[] = {
+/* Pad multiplexing for sdhci device */
+static struct pmx_mux_reg pmx_sdhci_mux[] = {
+ {
+ .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_sdhci_modes[] = {
{
.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
SMALL_PRINTERS_MODE,
- .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
+ .mux_regs = pmx_sdhci_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_sdhci_mux),
},
};
@@ -122,13 +158,21 @@ struct pmx_dev pmx_sdhci = {
.name = "sdhci",
.modes = pmx_sdhci_modes,
.mode_count = ARRAY_SIZE(pmx_sdhci_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_i2s_modes[] = {
+/* Pad multiplexing for I2S device */
+static struct pmx_mux_reg pmx_i2s_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
.mask = PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_i2s_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
+ .mux_regs = pmx_i2s_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_i2s_mux),
},
};
@@ -136,13 +180,21 @@ struct pmx_dev pmx_i2s = {
.name = "i2s",
.modes = pmx_i2s_modes,
.mode_count = ARRAY_SIZE(pmx_i2s_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_uart1_modes[] = {
+/* Pad multiplexing for UART1 device */
+static struct pmx_mux_reg pmx_uart1_mux[] = {
{
- .ids = ALL_MODES,
.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart1_modes[] = {
+ {
+ .ids = ALL_MODES,
+ .mux_regs = pmx_uart1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart1_mux),
},
};
@@ -150,18 +202,34 @@ struct pmx_dev pmx_uart1 = {
.name = "uart1",
.modes = pmx_uart1_modes,
.mode_count = ARRAY_SIZE(pmx_uart1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_uart1_modem_modes[] = {
+/* Pad multiplexing for UART1 Modem device */
+static struct pmx_mux_reg pmx_uart1_modem_autoexp_mux[] = {
{
- .ids = AUTO_EXP_MODE,
.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |
PMX_SSP_CS_MASK,
- }, {
- .ids = SMALL_PRINTERS_MODE,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_uart1_modem_smallpri_mux[] = {
+ {
.mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK |
PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart1_modem_modes[] = {
+ {
+ .ids = AUTO_EXP_MODE,
+ .mux_regs = pmx_uart1_modem_autoexp_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart1_modem_autoexp_mux),
+ }, {
+ .ids = SMALL_PRINTERS_MODE,
+ .mux_regs = pmx_uart1_modem_smallpri_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart1_modem_smallpri_mux),
},
};
@@ -169,13 +237,21 @@ struct pmx_dev pmx_uart1_modem = {
.name = "uart1_modem",
.modes = pmx_uart1_modem_modes,
.mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_uart2_modes[] = {
+/* Pad multiplexing for UART2 device */
+static struct pmx_mux_reg pmx_uart2_mux[] = {
{
- .ids = ALL_MODES,
.mask = PMX_FIRDA_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart2_modes[] = {
+ {
+ .ids = ALL_MODES,
+ .mux_regs = pmx_uart2_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart2_mux),
},
};
@@ -183,13 +259,21 @@ struct pmx_dev pmx_uart2 = {
.name = "uart2",
.modes = pmx_uart2_modes,
.mode_count = ARRAY_SIZE(pmx_uart2_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_touchscreen_modes[] = {
+/* Pad multiplexing for Touchscreen device */
+static struct pmx_mux_reg pmx_touchscreen_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE,
.mask = PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_touchscreen_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE,
+ .mux_regs = pmx_touchscreen_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_touchscreen_mux),
},
};
@@ -197,14 +281,22 @@ struct pmx_dev pmx_touchscreen = {
.name = "touchscreen",
.modes = pmx_touchscreen_modes,
.mode_count = ARRAY_SIZE(pmx_touchscreen_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_can_modes[] = {
+/* Pad multiplexing for CAN device */
+static struct pmx_mux_reg pmx_can_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
.mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_can_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
+ .mux_regs = pmx_can_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_can_mux),
},
};
@@ -212,13 +304,21 @@ struct pmx_dev pmx_can = {
.name = "can",
.modes = pmx_can_modes,
.mode_count = ARRAY_SIZE(pmx_can_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_sdhci_led_modes[] = {
+/* Pad multiplexing for sdhci LED device */
+static struct pmx_mux_reg pmx_sdhci_led_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
.mask = PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_sdhci_led_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
+ .mux_regs = pmx_sdhci_led_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_sdhci_led_mux),
},
};
@@ -226,16 +326,32 @@ struct pmx_dev pmx_sdhci_led = {
.name = "sdhci_led",
.modes = pmx_sdhci_led_modes,
.mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_pwm0_modes[] = {
+/* Pad multiplexing for PWM0 device */
+static struct pmx_mux_reg pmx_pwm0_net_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
.mask = PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_pwm0_autoexpsmallpri_mux[] = {
+ {
+ .mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_pwm0_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
+ .mux_regs = pmx_pwm0_net_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm0_net_mux),
}, {
.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
- .mask = PMX_MII_MASK,
+ .mux_regs = pmx_pwm0_autoexpsmallpri_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm0_autoexpsmallpri_mux),
},
};
@@ -243,16 +359,32 @@ struct pmx_dev pmx_pwm0 = {
.name = "pwm0",
.modes = pmx_pwm0_modes,
.mode_count = ARRAY_SIZE(pmx_pwm0_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_pwm1_modes[] = {
+/* Pad multiplexing for PWM1 device */
+static struct pmx_mux_reg pmx_pwm1_net_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
.mask = PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_pwm1_autoexpsmallpri_mux[] = {
+ {
+ .mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_pwm1_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
+ .mux_regs = pmx_pwm1_net_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm1_net_mux),
}, {
.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
- .mask = PMX_MII_MASK,
+ .mux_regs = pmx_pwm1_autoexpsmallpri_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm1_autoexpsmallpri_mux),
},
};
@@ -260,16 +392,32 @@ struct pmx_dev pmx_pwm1 = {
.name = "pwm1",
.modes = pmx_pwm1_modes,
.mode_count = ARRAY_SIZE(pmx_pwm1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_pwm2_modes[] = {
+/* Pad multiplexing for PWM2 device */
+static struct pmx_mux_reg pmx_pwm2_net_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
.mask = PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_mux_reg pmx_pwm2_autoexpsmallpri_mux[] = {
+ {
+ .mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_pwm2_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
+ .mux_regs = pmx_pwm2_net_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm2_net_mux),
}, {
.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
- .mask = PMX_MII_MASK,
+ .mux_regs = pmx_pwm2_autoexpsmallpri_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm2_autoexpsmallpri_mux),
},
};
@@ -277,13 +425,21 @@ struct pmx_dev pmx_pwm2 = {
.name = "pwm2",
.modes = pmx_pwm2_modes,
.mode_count = ARRAY_SIZE(pmx_pwm2_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_pwm3_modes[] = {
+/* Pad multiplexing for PWM3 device */
+static struct pmx_mux_reg pmx_pwm3_mux[] = {
{
- .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_pwm3_modes[] = {
+ {
+ .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
+ .mux_regs = pmx_pwm3_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_pwm3_mux),
},
};
@@ -291,13 +447,21 @@ struct pmx_dev pmx_pwm3 = {
.name = "pwm3",
.modes = pmx_pwm3_modes,
.mode_count = ARRAY_SIZE(pmx_pwm3_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_ssp1_modes[] = {
+/* Pad multiplexing for SSP1 device */
+static struct pmx_mux_reg pmx_ssp1_mux[] = {
{
- .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_ssp1_modes[] = {
+ {
+ .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
+ .mux_regs = pmx_ssp1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_ssp1_mux),
},
};
@@ -305,13 +469,21 @@ struct pmx_dev pmx_ssp1 = {
.name = "ssp1",
.modes = pmx_ssp1_modes,
.mode_count = ARRAY_SIZE(pmx_ssp1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_ssp2_modes[] = {
+/* Pad multiplexing for SSP2 device */
+static struct pmx_mux_reg pmx_ssp2_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_ssp2_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE,
+ .mux_regs = pmx_ssp2_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_ssp2_mux),
},
};
@@ -319,13 +491,21 @@ struct pmx_dev pmx_ssp2 = {
.name = "ssp2",
.modes = pmx_ssp2_modes,
.mode_count = ARRAY_SIZE(pmx_ssp2_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_mii1_modes[] = {
+/* Pad multiplexing for mii1 device */
+static struct pmx_mux_reg pmx_mii1_mux[] = {
{
- .ids = AUTO_NET_MII_MODE,
.mask = 0x0,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_mii1_modes[] = {
+ {
+ .ids = AUTO_NET_MII_MODE,
+ .mux_regs = pmx_mii1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_mii1_mux),
},
};
@@ -333,13 +513,21 @@ struct pmx_dev pmx_mii1 = {
.name = "mii1",
.modes = pmx_mii1_modes,
.mode_count = ARRAY_SIZE(pmx_mii1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_smii0_modes[] = {
+/* Pad multiplexing for smii0 device */
+static struct pmx_mux_reg pmx_smii0_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_smii0_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
+ .mux_regs = pmx_smii0_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_smii0_mux),
},
};
@@ -347,13 +535,21 @@ struct pmx_dev pmx_smii0 = {
.name = "smii0",
.modes = pmx_smii0_modes,
.mode_count = ARRAY_SIZE(pmx_smii0_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_smii1_modes[] = {
+/* Pad multiplexing for smii1 device */
+static struct pmx_mux_reg pmx_smii1_mux[] = {
{
- .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_smii1_modes[] = {
+ {
+ .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
+ .mux_regs = pmx_smii1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_smii1_mux),
},
};
@@ -361,13 +557,21 @@ struct pmx_dev pmx_smii1 = {
.name = "smii1",
.modes = pmx_smii1_modes,
.mode_count = ARRAY_SIZE(pmx_smii1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_i2c1_modes[] = {
+/* Pad multiplexing for i2c1 device */
+static struct pmx_mux_reg pmx_i2c1_mux[] = {
{
- .ids = AUTO_EXP_MODE,
.mask = 0x0,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_i2c1_modes[] = {
+ {
+ .ids = AUTO_EXP_MODE,
+ .mux_regs = pmx_i2c1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_i2c1_mux),
},
};
@@ -375,13 +579,11 @@ struct pmx_dev pmx_i2c1 = {
.name = "i2c1",
.modes = pmx_i2c1_modes,
.mode_count = ARRAY_SIZE(pmx_i2c1_modes),
- .enb_on_reset = 1,
};
/* pmx driver structure */
struct pmx_driver pmx_driver = {
- .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},
- .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
+ .mode_reg = {.address = SPEAR320_MODE_CONFIG_REG, .mask = 0x00000007},
};
/* spear3xx shared irq */
@@ -541,10 +743,11 @@ void __init spear320_init(void)
printk(KERN_ERR "Error registering Shared IRQ 4\n");
}
+ /* This fixes addresses of all pmx devices for spear320 */
+ spear3xx_pmx_init_addr(&pmx_driver, SPEAR320_PAD_MUX_CONFIG_REG);
+
/* pmx initialization */
- pmx_driver.base = base;
ret = pmx_register(&pmx_driver);
if (ret)
- printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
- ret);
+ pr_err("padmux: registeration failed. err no: %d\n", ret);
}
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index d3ba8ca..b7a83b2 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -101,11 +101,20 @@ void __init spear3xx_map_io(void)
}
/* pad multiplexing support */
-/* devices */
-struct pmx_dev_mode pmx_firda_modes[] = {
+
+/* Pad multiplexing for firda device */
+static struct pmx_mux_reg pmx_firda_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_FIRDA_MASK,
+ .value = PMX_FIRDA_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_firda_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_firda_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_firda_mux),
},
};
@@ -113,13 +122,21 @@ struct pmx_dev pmx_firda = {
.name = "firda",
.modes = pmx_firda_modes,
.mode_count = ARRAY_SIZE(pmx_firda_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_i2c_modes[] = {
+/* Pad multiplexing for i2c device */
+static struct pmx_mux_reg pmx_i2c_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_I2C_MASK,
+ .value = PMX_I2C_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_i2c_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_i2c_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_i2c_mux),
},
};
@@ -127,13 +144,21 @@ struct pmx_dev pmx_i2c = {
.name = "i2c",
.modes = pmx_i2c_modes,
.mode_count = ARRAY_SIZE(pmx_i2c_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_ssp_cs_modes[] = {
+/* Pad multiplexing for firda device */
+static struct pmx_mux_reg pmx_ssp_cs_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_SSP_CS_MASK,
+ .value = PMX_SSP_CS_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_ssp_cs_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_ssp_cs_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_ssp_cs_mux),
},
};
@@ -141,13 +166,21 @@ struct pmx_dev pmx_ssp_cs = {
.name = "ssp_chip_selects",
.modes = pmx_ssp_cs_modes,
.mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_ssp_modes[] = {
+/* Pad multiplexing for ssp device */
+static struct pmx_mux_reg pmx_ssp_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_SSP_MASK,
+ .value = PMX_SSP_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_ssp_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_ssp_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_ssp_mux),
},
};
@@ -155,13 +188,21 @@ struct pmx_dev pmx_ssp = {
.name = "ssp",
.modes = pmx_ssp_modes,
.mode_count = ARRAY_SIZE(pmx_ssp_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_mii_modes[] = {
+/* Pad multiplexing for mii device */
+static struct pmx_mux_reg pmx_mii_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_MII_MASK,
+ .value = PMX_MII_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_mii_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_mii_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_mii_mux),
},
};
@@ -169,13 +210,21 @@ struct pmx_dev pmx_mii = {
.name = "mii",
.modes = pmx_mii_modes,
.mode_count = ARRAY_SIZE(pmx_mii_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
+/* Pad multiplexing for gpio pin0 device */
+static struct pmx_mux_reg pmx_gpio_pin0_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_GPIO_PIN0_MASK,
+ .value = PMX_GPIO_PIN0_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_gpio_pin0_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_pin0_mux),
},
};
@@ -183,13 +232,21 @@ struct pmx_dev pmx_gpio_pin0 = {
.name = "gpio_pin0",
.modes = pmx_gpio_pin0_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
+/* Pad multiplexing for gpio pin1 device */
+static struct pmx_mux_reg pmx_gpio_pin1_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_GPIO_PIN1_MASK,
+ .value = PMX_GPIO_PIN1_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_gpio_pin1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_pin1_mux),
},
};
@@ -197,13 +254,21 @@ struct pmx_dev pmx_gpio_pin1 = {
.name = "gpio_pin1",
.modes = pmx_gpio_pin1_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
+/* Pad multiplexing for gpio pin2 device */
+static struct pmx_mux_reg pmx_gpio_pin2_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_GPIO_PIN2_MASK,
+ .value = PMX_GPIO_PIN2_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_gpio_pin2_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_pin2_mux),
},
};
@@ -211,13 +276,21 @@ struct pmx_dev pmx_gpio_pin2 = {
.name = "gpio_pin2",
.modes = pmx_gpio_pin2_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
+/* Pad multiplexing for gpio pin3 device */
+static struct pmx_mux_reg pmx_gpio_pin3_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_GPIO_PIN3_MASK,
+ .value = PMX_GPIO_PIN3_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_gpio_pin3_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_pin3_mux),
},
};
@@ -225,13 +298,21 @@ struct pmx_dev pmx_gpio_pin3 = {
.name = "gpio_pin3",
.modes = pmx_gpio_pin3_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
+/* Pad multiplexing for gpio pin4 device */
+static struct pmx_mux_reg pmx_gpio_pin4_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_GPIO_PIN4_MASK,
+ .value = PMX_GPIO_PIN4_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_gpio_pin4_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_pin4_mux),
},
};
@@ -239,13 +320,21 @@ struct pmx_dev pmx_gpio_pin4 = {
.name = "gpio_pin4",
.modes = pmx_gpio_pin4_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
+/* Pad multiplexing for gpio pin5 device */
+static struct pmx_mux_reg pmx_gpio_pin5_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_GPIO_PIN5_MASK,
+ .value = PMX_GPIO_PIN5_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_gpio_pin5_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_gpio_pin5_mux),
},
};
@@ -253,13 +342,21 @@ struct pmx_dev pmx_gpio_pin5 = {
.name = "gpio_pin5",
.modes = pmx_gpio_pin5_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_uart0_modem_modes[] = {
+/* Pad multiplexing for uart0 modem device */
+static struct pmx_mux_reg pmx_uart0_modem_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_UART0_MODEM_MASK,
+ .value = PMX_UART0_MODEM_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart0_modem_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_uart0_modem_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart0_modem_mux),
},
};
@@ -267,13 +364,21 @@ struct pmx_dev pmx_uart0_modem = {
.name = "uart0_modem",
.modes = pmx_uart0_modem_modes,
.mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_uart0_modes[] = {
+/* Pad multiplexing for uart0 device */
+static struct pmx_mux_reg pmx_uart0_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_UART0_MASK,
+ .value = PMX_UART0_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_uart0_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_uart0_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_uart0_mux),
},
};
@@ -281,13 +386,21 @@ struct pmx_dev pmx_uart0 = {
.name = "uart0",
.modes = pmx_uart0_modes,
.mode_count = ARRAY_SIZE(pmx_uart0_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_timer_3_4_modes[] = {
+/* Pad multiplexing for timer 3, 4 device */
+static struct pmx_mux_reg pmx_timer_3_4_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_TIMER_3_4_MASK,
+ .value = PMX_TIMER_3_4_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_timer_3_4_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_timer_3_4_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_timer_3_4_mux),
},
};
@@ -295,13 +408,21 @@ struct pmx_dev pmx_timer_3_4 = {
.name = "timer_3_4",
.modes = pmx_timer_3_4_modes,
.mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),
- .enb_on_reset = 0,
};
-struct pmx_dev_mode pmx_timer_1_2_modes[] = {
+/* Pad multiplexing for gpio pin0 device */
+static struct pmx_mux_reg pmx_timer_1_2_mux[] = {
{
- .ids = 0xffffffff,
.mask = PMX_TIMER_1_2_MASK,
+ .value = PMX_TIMER_1_2_MASK,
+ },
+};
+
+static struct pmx_dev_mode pmx_timer_1_2_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_timer_1_2_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_timer_1_2_mux),
},
};
@@ -309,15 +430,22 @@ struct pmx_dev pmx_timer_1_2 = {
.name = "timer_1_2",
.modes = pmx_timer_1_2_modes,
.mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),
- .enb_on_reset = 0,
};
#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
-/* plgpios devices */
-struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
+/* Pad multiplexing for plgpio_0_1 devices */
+static struct pmx_mux_reg pmx_plgpio_0_1_mux[] = {
{
- .ids = 0x00,
.mask = PMX_FIRDA_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_0_1_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_0_1_mux),
},
};
@@ -325,13 +453,21 @@ struct pmx_dev pmx_plgpio_0_1 = {
.name = "plgpio 0 and 1",
.modes = pmx_plgpio_0_1_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
+/* Pad multiplexing for plgpio_2_3 devices */
+static struct pmx_mux_reg pmx_plgpio_2_3_mux[] = {
{
- .ids = 0x00,
.mask = PMX_UART0_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_2_3_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_2_3_mux),
},
};
@@ -339,13 +475,21 @@ struct pmx_dev pmx_plgpio_2_3 = {
.name = "plgpio 2 and 3",
.modes = pmx_plgpio_2_3_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
+/* Pad multiplexing for plgpio_4_5 devices */
+static struct pmx_mux_reg pmx_plgpio_4_5_mux[] = {
{
- .ids = 0x00,
.mask = PMX_I2C_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_4_5_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_4_5_mux),
},
};
@@ -353,13 +497,21 @@ struct pmx_dev pmx_plgpio_4_5 = {
.name = "plgpio 4 and 5",
.modes = pmx_plgpio_4_5_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
+/* Pad multiplexing for plgpio_6_9 devices */
+static struct pmx_mux_reg pmx_plgpio_6_9_mux[] = {
{
- .ids = 0x00,
.mask = PMX_SSP_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_6_9_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_6_9_mux),
},
};
@@ -367,13 +519,21 @@ struct pmx_dev pmx_plgpio_6_9 = {
.name = "plgpio 6 to 9",
.modes = pmx_plgpio_6_9_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
+/* Pad multiplexing for plgpio_10_27 devices */
+static struct pmx_mux_reg pmx_plgpio_10_27_mux[] = {
{
- .ids = 0x00,
.mask = PMX_MII_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_10_27_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_10_27_mux),
},
};
@@ -381,13 +541,21 @@ struct pmx_dev pmx_plgpio_10_27 = {
.name = "plgpio 10 to 27",
.modes = pmx_plgpio_10_27_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_28_modes[] = {
+/* Pad multiplexing for plgpio_28 devices */
+static struct pmx_mux_reg pmx_plgpio_28_mux[] = {
{
- .ids = 0x00,
.mask = PMX_GPIO_PIN0_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_28_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_28_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_28_mux),
},
};
@@ -395,13 +563,21 @@ struct pmx_dev pmx_plgpio_28 = {
.name = "plgpio 28",
.modes = pmx_plgpio_28_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_29_modes[] = {
+/* Pad multiplexing for plgpio_29 devices */
+static struct pmx_mux_reg pmx_plgpio_29_mux[] = {
{
- .ids = 0x00,
.mask = PMX_GPIO_PIN1_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_29_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_29_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_29_mux),
},
};
@@ -409,13 +585,21 @@ struct pmx_dev pmx_plgpio_29 = {
.name = "plgpio 29",
.modes = pmx_plgpio_29_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_30_modes[] = {
+/* Pad multiplexing for plgpio_30 device */
+static struct pmx_mux_reg pmx_plgpio_30_mux[] = {
{
- .ids = 0x00,
.mask = PMX_GPIO_PIN2_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_30_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_30_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_30_mux),
},
};
@@ -423,13 +607,21 @@ struct pmx_dev pmx_plgpio_30 = {
.name = "plgpio 30",
.modes = pmx_plgpio_30_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_31_modes[] = {
+/* Pad multiplexing for plgpio_31 device */
+static struct pmx_mux_reg pmx_plgpio_31_mux[] = {
{
- .ids = 0x00,
.mask = PMX_GPIO_PIN3_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_31_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_31_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_31_mux),
},
};
@@ -437,13 +629,21 @@ struct pmx_dev pmx_plgpio_31 = {
.name = "plgpio 31",
.modes = pmx_plgpio_31_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_32_modes[] = {
+/* Pad multiplexing for plgpio_32 device */
+static struct pmx_mux_reg pmx_plgpio_32_mux[] = {
{
- .ids = 0x00,
.mask = PMX_GPIO_PIN4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_32_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_32_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_32_mux),
},
};
@@ -451,13 +651,21 @@ struct pmx_dev pmx_plgpio_32 = {
.name = "plgpio 32",
.modes = pmx_plgpio_32_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_33_modes[] = {
+/* Pad multiplexing for plgpio_33 device */
+static struct pmx_mux_reg pmx_plgpio_33_mux[] = {
{
- .ids = 0x00,
.mask = PMX_GPIO_PIN5_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_33_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_33_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_33_mux),
},
};
@@ -465,13 +673,21 @@ struct pmx_dev pmx_plgpio_33 = {
.name = "plgpio 33",
.modes = pmx_plgpio_33_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
+/* Pad multiplexing for plgpio_34_36 device */
+static struct pmx_mux_reg pmx_plgpio_34_36_mux[] = {
{
- .ids = 0x00,
.mask = PMX_SSP_CS_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_34_36_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_34_36_mux),
},
};
@@ -479,13 +695,21 @@ struct pmx_dev pmx_plgpio_34_36 = {
.name = "plgpio 34 to 36",
.modes = pmx_plgpio_34_36_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
+/* Pad multiplexing for plgpio_37_42 device */
+static struct pmx_mux_reg pmx_plgpio_37_42_mux[] = {
{
- .ids = 0x00,
.mask = PMX_UART0_MODEM_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_37_42_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_37_42_mux),
},
};
@@ -493,13 +717,21 @@ struct pmx_dev pmx_plgpio_37_42 = {
.name = "plgpio 37 to 42",
.modes = pmx_plgpio_37_42_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
+/* Pad multiplexing for plgpio_43_44_47_48 device */
+static struct pmx_mux_reg pmx_plgpio_43_44_47_48_mux[] = {
{
- .ids = 0x00,
.mask = PMX_TIMER_1_2_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_43_44_47_48_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_43_44_47_48_mux),
},
};
@@ -507,13 +739,21 @@ struct pmx_dev pmx_plgpio_43_44_47_48 = {
.name = "plgpio 43, 44, 47 and 48",
.modes = pmx_plgpio_43_44_47_48_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),
- .enb_on_reset = 1,
};
-struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
+/* Pad multiplexing for plgpio_45_46_49_50 device */
+static struct pmx_mux_reg pmx_plgpio_45_46_49_50_mux[] = {
{
- .ids = 0x00,
.mask = PMX_TIMER_3_4_MASK,
+ .value = 0,
+ },
+};
+
+static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
+ {
+ .ids = 0xffffffff,
+ .mux_regs = pmx_plgpio_45_46_49_50_mux,
+ .mux_reg_cnt = ARRAY_SIZE(pmx_plgpio_45_46_49_50_mux),
},
};
@@ -521,7 +761,6 @@ struct pmx_dev pmx_plgpio_45_46_49_50 = {
.name = "plgpio 45, 46, 49 and 50",
.modes = pmx_plgpio_45_46_49_50_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),
- .enb_on_reset = 1,
};
#endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */
@@ -555,3 +794,21 @@ static void __init spear3xx_timer_init(void)
struct sys_timer spear3xx_timer = {
.init = spear3xx_timer_init,
};
+
+/* This fixes addresses of all pmx devices for different machines */
+void spear3xx_pmx_init_addr(struct pmx_driver *driver, unsigned int addr)
+{
+ int i;
+ for (i = 0; i < driver->devs_count; i++) {
+ int j;
+ struct pmx_dev *pdev = driver->devs[i];
+
+ for (j = 0; j < pdev->mode_count; j++) {
+ int k;
+ struct pmx_dev_mode *mode = &pdev->modes[j];
+
+ for (k = 0; k < mode->mux_reg_cnt; k++)
+ mode->mux_regs[k].address = addr;
+ }
+ }
+}
diff --git a/arch/arm/plat-spear/include/plat/padmux.h b/arch/arm/plat-spear/include/plat/padmux.h
index 877f3ad..1959235 100644
--- a/arch/arm/plat-spear/include/plat/padmux.h
+++ b/arch/arm/plat-spear/include/plat/padmux.h
@@ -19,35 +19,51 @@
/*
* struct pmx_reg: configuration structure for mode reg and mux reg
*
- * offset: offset of mode reg
+ * address: physical address of mode reg
* mask: mask of mode reg
*/
struct pmx_reg {
- u32 offset;
+ u32 address;
u32 mask;
};
/*
+ * struct pmx_mux_reg: configuration structure every group of modes of a device
+ *
+ * address: physical address of multiplexing register
+ * mask: mask for supported mode
+ * value: value to be written
+ */
+struct pmx_mux_reg {
+ u32 address;
+ u32 mask;
+ u32 value;
+};
+
+/*
* struct pmx_dev_mode: configuration structure every group of modes of a device
*
* ids: all modes for this configuration
- * mask: mask for supported mode
+ * mux_regs: array of mux registers, masks and values to enable the device in
+ * this group of modes
+ * mux_reg_cnt: count of mux_regs elements
*/
struct pmx_dev_mode {
u32 ids;
- u32 mask;
+ struct pmx_mux_reg *mux_regs;
+ u8 mux_reg_cnt;
};
/*
* struct pmx_mode: mode definition structure
*
* name: mode name
- * mask: mode mask
+ * value: mode value
*/
struct pmx_mode {
char *name;
u32 id;
- u32 mask;
+ u32 value;
};
/*
@@ -57,14 +73,12 @@ struct pmx_mode {
* modes: device configuration array for different modes supported
* mode_count: size of modes array
* is_active: is peripheral active/enabled
- * enb_on_reset: if 1, mask bits to be cleared in reg otherwise to be set in reg
*/
struct pmx_dev {
char *name;
struct pmx_dev_mode *modes;
u8 mode_count;
bool is_active;
- bool enb_on_reset;
};
/*
@@ -73,17 +87,13 @@ struct pmx_dev {
* mode: mode to be set
* devs: array of pointer to pmx devices
* devs_count: ARRAY_SIZE of devs
- * base: base address of soc config registers
* mode_reg: structure of mode config register
- * mux_reg: structure of device mux config register
*/
struct pmx_driver {
struct pmx_mode *mode;
struct pmx_dev **devs;
u8 devs_count;
- u32 *base;
struct pmx_reg mode_reg;
- struct pmx_reg mux_reg;
};
/* pmx functions */
diff --git a/arch/arm/plat-spear/padmux.c b/arch/arm/plat-spear/padmux.c
index 555eec6..97e4d96 100644
--- a/arch/arm/plat-spear/padmux.c
+++ b/arch/arm/plat-spear/padmux.c
@@ -19,15 +19,11 @@
/*
* struct pmx: pmx definition structure
*
- * base: base address of configuration registers
* mode_reg: mode configurations
- * mux_reg: muxing configurations
* active_mode: pointer to current active mode
*/
struct pmx {
- u32 base;
struct pmx_reg mode_reg;
- struct pmx_reg mux_reg;
struct pmx_mode *active_mode;
};
@@ -42,17 +38,22 @@ static struct pmx *pmx;
*/
static int pmx_mode_set(struct pmx_mode *mode)
{
- u32 val;
+ u32 val, *address;
if (!mode->name)
return -EFAULT;
pmx->active_mode = mode;
- val = readl(pmx->base + pmx->mode_reg.offset);
- val &= ~pmx->mode_reg.mask;
- val |= mode->mask & pmx->mode_reg.mask;
- writel(val, pmx->base + pmx->mode_reg.offset);
+ address = ioremap(pmx->mode_reg.address, SZ_16);
+ if (address) {
+ val = readl(address);
+ val &= ~pmx->mode_reg.mask;
+ val |= mode->value & pmx->mode_reg.mask;
+ writel(val, address);
+
+ iounmap(address);
+ }
return 0;
}
@@ -66,19 +67,19 @@ static int pmx_mode_set(struct pmx_mode *mode)
* If peripheral is not supported by current mode then request is rejected.
* Conflicts between peripherals are not handled and peripherals will be
* enabled in the order they are present in pmx_dev array.
- * In case of conflicts last peripheral enabled will be present.
+ * In case of conflicts last peripheral enabled will remain present.
* Returns -ve on Err otherwise 0
*/
static int pmx_devs_enable(struct pmx_dev **devs, u8 count)
{
- u32 val, i, mask;
+ u32 val, i;
+ u32 *address;
if (!count)
return -EINVAL;
- val = readl(pmx->base + pmx->mux_reg.offset);
for (i = 0; i < count; i++) {
- u8 j = 0;
+ u8 k, j = 0;
if (!devs[i]->name || !devs[i]->modes) {
printk(KERN_ERR "padmux: dev name or modes is null\n");
@@ -103,15 +104,23 @@ static int pmx_devs_enable(struct pmx_dev **devs, u8 count)
}
/* enable peripheral */
- mask = devs[i]->modes[j].mask & pmx->mux_reg.mask;
- if (devs[i]->enb_on_reset)
- val &= ~mask;
- else
- val |= mask;
+ for (k = 0; k < devs[i]->modes[j].mux_reg_cnt; k++) {
+ struct pmx_mux_reg *mux_reg =
+ &devs[i]->modes[j].mux_regs[k];
+
+ address = ioremap(mux_reg->address, SZ_16);
+ if (address) {
+ val = readl(address);
+ val &= ~mux_reg->mask;
+ val |= mux_reg->value & mux_reg->mask;
+ writel(val, address);
+
+ iounmap(address);
+ }
+ }
devs[i]->is_active = true;
}
- writel(val, pmx->base + pmx->mux_reg.offset);
kfree(pmx);
/* this will ensure that multiplexing can't be changed now */
@@ -134,18 +143,15 @@ int pmx_register(struct pmx_driver *driver)
if (pmx)
return -EPERM;
- if (!driver->base || !driver->devs)
+ if (!driver->devs)
return -EFAULT;
pmx = kzalloc(sizeof(*pmx), GFP_KERNEL);
if (!pmx)
return -ENOMEM;
- pmx->base = (u32)driver->base;
- pmx->mode_reg.offset = driver->mode_reg.offset;
+ pmx->mode_reg.address = driver->mode_reg.address;
pmx->mode_reg.mask = driver->mode_reg.mask;
- pmx->mux_reg.offset = driver->mux_reg.offset;
- pmx->mux_reg.mask = driver->mux_reg.mask;
/* choose mode to enable */
if (driver->mode) {
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 02/11] ST SPEAr clock: Define common clk_init routine in plat/clock.c
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977709.git.viresh.kumar@st.com>
Define common clk_init routine in plat/clock.c for calling recalc_root_clocks.
This routine will be used for any common code across all machine families.
Whereas family specific spear*xx_clk_init routines will be used for family
specific code.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/clock.c | 4 ++--
arch/arm/mach-spear3xx/include/mach/generic.h | 2 +-
arch/arm/mach-spear3xx/spear3xx.c | 2 +-
arch/arm/mach-spear6xx/clock.c | 4 ++--
arch/arm/mach-spear6xx/include/mach/generic.h | 2 +-
arch/arm/mach-spear6xx/spear6xx.c | 2 +-
arch/arm/plat-spear/clock.c | 5 +++++
arch/arm/plat-spear/include/plat/clock.h | 1 +
8 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index 98bc7ed..5707772 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -732,12 +732,12 @@ static struct clk_lookup spear_clk_lookups[] = {
#endif
};
-void __init clk_init(void)
+void __init spear3xx_clk_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
clk_register(&spear_clk_lookups[i]);
- recalc_root_clocks();
+ clk_init();
}
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 33e04fe..4772507 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -36,7 +36,7 @@ extern struct amba_device uart_device;
extern struct sys_timer spear3xx_timer;
/* Add spear3xx family function declarations here */
-void __init clk_init(void);
+void __init spear3xx_clk_init(void);
void __init spear_setup_timer(void);
void __init spear3xx_map_io(void);
void __init spear3xx_init_irq(void);
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index b7a83b2..9a9e92b 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -97,7 +97,7 @@ void __init spear3xx_map_io(void)
iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
/* This will initialize clock framework */
- clk_init();
+ spear3xx_clk_init();
}
/* pad multiplexing support */
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 88b748b..ac70e0d 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -671,12 +671,12 @@ static struct clk_lookup spear_clk_lookups[] = {
{ .dev_id = "gpio2", .clk = &gpio2_clk},
};
-void __init clk_init(void)
+void __init spear6xx_clk_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
clk_register(&spear_clk_lookups[i]);
- recalc_root_clocks();
+ clk_init();
}
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 94cf4a6..183f023 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -39,7 +39,7 @@ void __init spear6xx_map_io(void);
void __init spear6xx_init_irq(void);
void __init spear6xx_init(void);
void __init spear600_init(void);
-void __init clk_init(void);
+void __init spear6xx_clk_init(void);
/* Add spear600 machine device structure declarations here */
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 9818129..e0f6628 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -148,7 +148,7 @@ void __init spear6xx_map_io(void)
iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
/* This will initialize clock framework */
- clk_init();
+ spear6xx_clk_init();
}
static void __init spear6xx_timer_init(void)
diff --git a/arch/arm/plat-spear/clock.c b/arch/arm/plat-spear/clock.c
index bdbd7ec..6fa474c 100644
--- a/arch/arm/plat-spear/clock.c
+++ b/arch/arm/plat-spear/clock.c
@@ -903,6 +903,11 @@ void recalc_root_clocks(void)
spin_unlock_irqrestore(&clocks_lock, flags);
}
+void __init clk_init(void)
+{
+ recalc_root_clocks();
+}
+
#ifdef CONFIG_DEBUG_FS
/*
* debugfs support to trace clock tree hierarchy and attributes
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
index 2ae6606..e4cc787 100644
--- a/arch/arm/plat-spear/include/plat/clock.h
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -224,6 +224,7 @@ struct clcd_rate_tbl {
};
/* platform specific clock functions */
+void __init clk_init(void);
void clk_register(struct clk_lookup *cl);
void recalc_root_clocks(void);
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 03/11] ST SPEAr Clock: Updating for single image solution
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977709.git.viresh.kumar@st.com>
This patch creates different clk_lookup arrays for individual machines.
These lookup arrays will be registered only if that specific machine is
current machine.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/clock.c | 70 ++++++++++++++++++++++++---------------
1 files changed, 43 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index 5707772..f67860c 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
+#include <asm/mach-types.h>
#include <plat/clock.h>
#include <mach/misc_regs.h>
@@ -688,56 +689,71 @@ static struct clk_lookup spear_clk_lookups[] = {
{ .dev_id = "adc", .clk = &adc_clk},
{ .dev_id = "ssp-pl022.0", .clk = &ssp0_clk},
{ .dev_id = "gpio", .clk = &gpio_clk},
-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
- { .dev_id = "physmap-flash", .clk = &emi_clk},
-#endif
-#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \
- defined(CONFIG_MACH_SPEAR320)
- { .con_id = "fsmc", .clk = &fsmc_clk},
-#endif
-
-/* common clocks to spear310 and spear320 */
-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
- { .dev_id = "uart1", .clk = &uart1_clk},
- { .dev_id = "uart2", .clk = &uart2_clk},
-#endif
-
- /* common clock to spear300 and spear320 */
-#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320)
- { .dev_id = "clcd", .clk = &clcd_clk},
- { .dev_id = "sdhci", .clk = &sdhci_clk},
-#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */
+};
- /* spear300 machine specific clock structures */
+/* array of all spear 300 clock lookups */
#ifdef CONFIG_MACH_SPEAR300
+static struct clk_lookup spear300_clk_lookups[] = {
+ { .dev_id = "clcd", .clk = &clcd_clk},
+ { .con_id = "fsmc", .clk = &fsmc_clk},
{ .dev_id = "gpio1", .clk = &gpio1_clk},
{ .dev_id = "keyboard", .clk = &kbd_clk},
+ { .dev_id = "sdhci", .clk = &sdhci_clk},
+};
#endif
- /* spear310 machine specific clock structures */
+/* array of all spear 310 clock lookups */
#ifdef CONFIG_MACH_SPEAR310
+static struct clk_lookup spear310_clk_lookups[] = {
+ { .con_id = "fsmc", .clk = &fsmc_clk},
+ { .con_id = "emi", .clk = &emi_clk},
+ { .dev_id = "uart1", .clk = &uart1_clk},
+ { .dev_id = "uart2", .clk = &uart2_clk},
{ .dev_id = "uart3", .clk = &uart3_clk},
{ .dev_id = "uart4", .clk = &uart4_clk},
{ .dev_id = "uart5", .clk = &uart5_clk},
-
+};
#endif
- /* spear320 machine specific clock structures */
+
+/* array of all spear 320 clock lookups */
#ifdef CONFIG_MACH_SPEAR320
+static struct clk_lookup spear320_clk_lookups[] = {
+ { .dev_id = "clcd", .clk = &clcd_clk},
+ { .con_id = "fsmc", .clk = &fsmc_clk},
+ { .dev_id = "i2c_designware.1", .clk = &i2c1_clk},
+ { .con_id = "emi", .clk = &emi_clk},
+ { .dev_id = "pwm", .clk = &pwm_clk},
+ { .dev_id = "sdhci", .clk = &sdhci_clk},
{ .dev_id = "c_can_platform.0", .clk = &can0_clk},
{ .dev_id = "c_can_platform.1", .clk = &can1_clk},
- { .dev_id = "i2c_designware.1", .clk = &i2c1_clk},
{ .dev_id = "ssp-pl022.1", .clk = &ssp1_clk},
{ .dev_id = "ssp-pl022.2", .clk = &ssp2_clk},
- { .dev_id = "pwm", .clk = &pwm_clk},
-#endif
+ { .dev_id = "uart1", .clk = &uart1_clk},
+ { .dev_id = "uart2", .clk = &uart2_clk},
};
+#endif
void __init spear3xx_clk_init(void)
{
- int i;
+ int i, cnt;
+ struct clk_lookup *lookups;
+
+ if (machine_is_spear300()) {
+ cnt = ARRAY_SIZE(spear300_clk_lookups);
+ lookups = spear300_clk_lookups;
+ } else if (machine_is_spear310()) {
+ cnt = ARRAY_SIZE(spear310_clk_lookups);
+ lookups = spear310_clk_lookups;
+ } else {
+ cnt = ARRAY_SIZE(spear320_clk_lookups);
+ lookups = spear320_clk_lookups;
+ }
for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
clk_register(&spear_clk_lookups[i]);
+ for (i = 0; i < cnt; i++)
+ clk_register(&lookups[i]);
+
clk_init();
}
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 04/11] ST SPEAr3xx: Make local shirq structures static
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977709.git.viresh.kumar@st.com>
From: Ryan Mallon <ryan@bluewatersys.com>
Several structures in arch/arm/mach-spear3xx are not marked static
like they should be. Fix this.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/spear300.c | 4 ++--
arch/arm/mach-spear3xx/spear310.c | 16 ++++++++--------
arch/arm/mach-spear3xx/spear320.c | 12 ++++++------
3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 2e856d8..a1280ba 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -523,7 +523,7 @@ struct pmx_driver pmx_driver = {
};
/* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
{
.virq = VIRQ_IT_PERS_S,
.enb_mask = IT_PERS_S_IRQ_MASK,
@@ -563,7 +563,7 @@ struct shirq_dev_config shirq_ras1_config[] = {
},
};
-struct spear_shirq shirq_ras1 = {
+static struct spear_shirq shirq_ras1 = {
.irq = IRQ_GEN_RAS_1,
.dev_config = shirq_ras1_config,
.dev_count = ARRAY_SIZE(shirq_ras1_config),
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 20182d2..3a2c4b2 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -192,7 +192,7 @@ struct pmx_dev pmx_tdm0 = {
struct pmx_driver pmx_driver;
/* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
{
.virq = VIRQ_SMII0,
.status_mask = SMII0_IRQ_MASK,
@@ -220,7 +220,7 @@ struct shirq_dev_config shirq_ras1_config[] = {
},
};
-struct spear_shirq shirq_ras1 = {
+static struct spear_shirq shirq_ras1 = {
.irq = IRQ_GEN_RAS_1,
.dev_config = shirq_ras1_config,
.dev_count = ARRAY_SIZE(shirq_ras1_config),
@@ -232,7 +232,7 @@ struct spear_shirq shirq_ras1 = {
},
};
-struct shirq_dev_config shirq_ras2_config[] = {
+static struct shirq_dev_config shirq_ras2_config[] = {
{
.virq = VIRQ_UART1,
.status_mask = UART1_IRQ_MASK,
@@ -251,7 +251,7 @@ struct shirq_dev_config shirq_ras2_config[] = {
},
};
-struct spear_shirq shirq_ras2 = {
+static struct spear_shirq shirq_ras2 = {
.irq = IRQ_GEN_RAS_2,
.dev_config = shirq_ras2_config,
.dev_count = ARRAY_SIZE(shirq_ras2_config),
@@ -263,14 +263,14 @@ struct spear_shirq shirq_ras2 = {
},
};
-struct shirq_dev_config shirq_ras3_config[] = {
+static struct shirq_dev_config shirq_ras3_config[] = {
{
.virq = VIRQ_EMI,
.status_mask = EMI_IRQ_MASK,
},
};
-struct spear_shirq shirq_ras3 = {
+static struct spear_shirq shirq_ras3 = {
.irq = IRQ_GEN_RAS_3,
.dev_config = shirq_ras3_config,
.dev_count = ARRAY_SIZE(shirq_ras3_config),
@@ -282,7 +282,7 @@ struct spear_shirq shirq_ras3 = {
},
};
-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
{
.virq = VIRQ_TDM_HDLC,
.status_mask = TDM_HDLC_IRQ_MASK,
@@ -295,7 +295,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = {
},
};
-struct spear_shirq shirq_intrcomm_ras = {
+static struct spear_shirq shirq_intrcomm_ras = {
.irq = IRQ_INTRCOMM_RAS_ARM,
.dev_config = shirq_intrcomm_ras_config,
.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 249798b3..fee265b 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -587,7 +587,7 @@ struct pmx_driver pmx_driver = {
};
/* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
{
.virq = VIRQ_EMI,
.status_mask = EMI_IRQ_MASK,
@@ -603,7 +603,7 @@ struct shirq_dev_config shirq_ras1_config[] = {
},
};
-struct spear_shirq shirq_ras1 = {
+static struct spear_shirq shirq_ras1 = {
.irq = IRQ_GEN_RAS_1,
.dev_config = shirq_ras1_config,
.dev_count = ARRAY_SIZE(shirq_ras1_config),
@@ -616,7 +616,7 @@ struct spear_shirq shirq_ras1 = {
},
};
-struct shirq_dev_config shirq_ras3_config[] = {
+static struct shirq_dev_config shirq_ras3_config[] = {
{
.virq = VIRQ_PLGPIO,
.enb_mask = GPIO_IRQ_MASK,
@@ -635,7 +635,7 @@ struct shirq_dev_config shirq_ras3_config[] = {
},
};
-struct spear_shirq shirq_ras3 = {
+static struct spear_shirq shirq_ras3 = {
.irq = IRQ_GEN_RAS_3,
.dev_config = shirq_ras3_config,
.dev_count = ARRAY_SIZE(shirq_ras3_config),
@@ -649,7 +649,7 @@ struct spear_shirq shirq_ras3 = {
},
};
-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
{
.virq = VIRQ_CANU,
.status_mask = CAN_U_IRQ_MASK,
@@ -697,7 +697,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = {
},
};
-struct spear_shirq shirq_intrcomm_ras = {
+static struct spear_shirq shirq_intrcomm_ras = {
.irq = IRQ_INTRCOMM_RAS_ARM,
.dev_config = shirq_intrcomm_ras_config,
.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 05/11] ST SPEAR3xx: Rename register/irq defines to remove naming conflicts
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977709.git.viresh.kumar@st.com>
From: Ryan Mallon <ryan@bluewatersys.com>
Prefix register and irq defintions to remove naming conflicts between
the three SPEAr3xx platforms.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/generic.h | 4 +-
arch/arm/mach-spear3xx/include/mach/irqs.h | 206 ++++++++++++------------
arch/arm/mach-spear3xx/include/mach/spear300.h | 26 ++--
arch/arm/mach-spear3xx/include/mach/spear310.h | 44 +++---
arch/arm/mach-spear3xx/include/mach/spear320.h | 48 +++---
arch/arm/mach-spear3xx/spear300.c | 66 ++++----
arch/arm/mach-spear3xx/spear310.c | 92 ++++++------
arch/arm/mach-spear3xx/spear320.c | 134 ++++++++--------
arch/arm/mach-spear3xx/spear3xx.c | 6 +-
9 files changed, 314 insertions(+), 312 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 4772507..c2b15b1 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -27,8 +27,8 @@
* Following GPT channels will be used as clock source and clockevent
*/
#define SPEAR_GPT0_BASE SPEAR3XX_ML1_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2
+#define SPEAR_GPT0_CHAN0_IRQ SPEAR3XX_IRQ_CPU_GPT1_1
+#define SPEAR_GPT0_CHAN1_IRQ SPEAR3XX_IRQ_CPU_GPT1_2
/* Add spear3xx family device structure declarations here */
extern struct amba_device gpio_device;
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index a1a7f48..6e26544 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -15,138 +15,140 @@
#define __MACH_IRQS_H
/* SPEAr3xx IRQ definitions */
-#define IRQ_HW_ACCEL_MOD_0 0
-#define IRQ_INTRCOMM_RAS_ARM 1
-#define IRQ_CPU_GPT1_1 2
-#define IRQ_CPU_GPT1_2 3
-#define IRQ_BASIC_GPT1_1 4
-#define IRQ_BASIC_GPT1_2 5
-#define IRQ_BASIC_GPT2_1 6
-#define IRQ_BASIC_GPT2_2 7
-#define IRQ_BASIC_DMA 8
-#define IRQ_BASIC_SMI 9
-#define IRQ_BASIC_RTC 10
-#define IRQ_BASIC_GPIO 11
-#define IRQ_BASIC_WDT 12
-#define IRQ_DDR_CONTROLLER 13
-#define IRQ_SYS_ERROR 14
-#define IRQ_WAKEUP_RCV 15
-#define IRQ_JPEG 16
-#define IRQ_IRDA 17
-#define IRQ_ADC 18
-#define IRQ_UART 19
-#define IRQ_SSP 20
-#define IRQ_I2C 21
-#define IRQ_MAC_1 22
-#define IRQ_MAC_2 23
-#define IRQ_USB_DEV 24
-#define IRQ_USB_H_OHCI_0 25
-#define IRQ_USB_H_EHCI_0 26
-#define IRQ_USB_H_EHCI_1 IRQ_USB_H_EHCI_0
-#define IRQ_USB_H_OHCI_1 27
-#define IRQ_GEN_RAS_1 28
-#define IRQ_GEN_RAS_2 29
-#define IRQ_GEN_RAS_3 30
-#define IRQ_HW_ACCEL_MOD_1 31
-#define IRQ_VIC_END 32
-
-#define VIRQ_START IRQ_VIC_END
+#define SPEAR3XX_IRQ_HW_ACCEL_MOD_0 0
+#define SPEAR3XX_IRQ_INTRCOMM_RAS_ARM 1
+#define SPEAR3XX_IRQ_CPU_GPT1_1 2
+#define SPEAR3XX_IRQ_CPU_GPT1_2 3
+#define SPEAR3XX_IRQ_BASIC_GPT1_1 4
+#define SPEAR3XX_IRQ_BASIC_GPT1_2 5
+#define SPEAR3XX_IRQ_BASIC_GPT2_1 6
+#define SPEAR3XX_IRQ_BASIC_GPT2_2 7
+#define SPEAR3XX_IRQ_BASIC_DMA 8
+#define SPEAR3XX_IRQ_BASIC_SMI 9
+#define SPEAR3XX_IRQ_BASIC_RTC 10
+#define SPEAR3XX_IRQ_BASIC_GPIO 11
+#define SPEAR3XX_IRQ_BASIC_WDT 12
+#define SPEAR3XX_IRQ_DDR_CONTROLLER 13
+#define SPEAR3XX_IRQ_SYS_ERROR 14
+#define SPEAR3XX_IRQ_WAKEUP_RCV 15
+#define SPEAR3XX_IRQ_JPEG 16
+#define SPEAR3XX_IRQ_IRDA 17
+#define SPEAR3XX_IRQ_ADC 18
+#define SPEAR3XX_IRQ_UART 19
+#define SPEAR3XX_IRQ_SSP 20
+#define SPEAR3XX_IRQ_I2C 21
+#define SPEAR3XX_IRQ_MAC_1 22
+#define SPEAR3XX_IRQ_MAC_2 23
+#define SPEAR3XX_IRQ_USB_DEV 24
+#define SPEAR3XX_IRQ_USB_H_OHCI_0 25
+#define SPEAR3XX_IRQ_USB_H_EHCI_0 26
+#define SPEAR3XX_IRQ_USB_H_EHCI_1 SPEAR3XX_IRQ_USB_H_EHCI_0
+#define SPEAR3XX_IRQ_USB_H_OHCI_1 27
+#define SPEAR3XX_IRQ_GEN_RAS_1 28
+#define SPEAR3XX_IRQ_GEN_RAS_2 29
+#define SPEAR3XX_IRQ_GEN_RAS_3 30
+#define SPEAR3XX_IRQ_HW_ACCEL_MOD_1 31
+#define SPEAR3XX_IRQ_VIC_END 32
+
+#define SPEAR3XX_VIRQ_START SPEAR3XX_IRQ_VIC_END
/* SPEAr300 Virtual irq definitions */
-#ifdef CONFIG_MACH_SPEAR300
/* IRQs sharing IRQ_GEN_RAS_1 */
-#define VIRQ_IT_PERS_S (VIRQ_START + 0)
-#define VIRQ_IT_CHANGE_S (VIRQ_START + 1)
-#define VIRQ_I2S (VIRQ_START + 2)
-#define VIRQ_TDM (VIRQ_START + 3)
-#define VIRQ_CAMERA_L (VIRQ_START + 4)
-#define VIRQ_CAMERA_F (VIRQ_START + 5)
-#define VIRQ_CAMERA_V (VIRQ_START + 6)
-#define VIRQ_KEYBOARD (VIRQ_START + 7)
-#define VIRQ_GPIO1 (VIRQ_START + 8)
+#define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0)
+#define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1)
+#define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2)
+#define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3)
+#define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4)
+#define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5)
+#define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6)
+#define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7)
+#define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8)
/* IRQs sharing IRQ_GEN_RAS_3 */
-#define IRQ_CLCD IRQ_GEN_RAS_3
+#define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3
/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define IRQ_SDHCI IRQ_INTRCOMM_RAS_ARM
-
-/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE (VIRQ_START + 9)
-#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO_INT_BASE + 8)
-#define SPEAR_GPIO_INT_END (SPEAR_GPIO1_INT_BASE + 8)
+#define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM
/* SPEAr310 Virtual irq definitions */
-#elif defined(CONFIG_MACH_SPEAR310)
/* IRQs sharing IRQ_GEN_RAS_1 */
-#define VIRQ_SMII0 (VIRQ_START + 0)
-#define VIRQ_SMII1 (VIRQ_START + 1)
-#define VIRQ_SMII2 (VIRQ_START + 2)
-#define VIRQ_SMII3 (VIRQ_START + 3)
-#define VIRQ_WAKEUP_SMII0 (VIRQ_START + 4)
-#define VIRQ_WAKEUP_SMII1 (VIRQ_START + 5)
-#define VIRQ_WAKEUP_SMII2 (VIRQ_START + 6)
-#define VIRQ_WAKEUP_SMII3 (VIRQ_START + 7)
+#define SPEAR310_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 0)
+#define SPEAR310_VIRQ_SMII1 (SPEAR3XX_VIRQ_START + 1)
+#define SPEAR310_VIRQ_SMII2 (SPEAR3XX_VIRQ_START + 2)
+#define SPEAR310_VIRQ_SMII3 (SPEAR3XX_VIRQ_START + 3)
+#define SPEAR310_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 4)
+#define SPEAR310_VIRQ_WAKEUP_SMII1 (SPEAR3XX_VIRQ_START + 5)
+#define SPEAR310_VIRQ_WAKEUP_SMII2 (SPEAR3XX_VIRQ_START + 6)
+#define SPEAR310_VIRQ_WAKEUP_SMII3 (SPEAR3XX_VIRQ_START + 7)
/* IRQs sharing IRQ_GEN_RAS_2 */
-#define VIRQ_UART1 (VIRQ_START + 8)
-#define VIRQ_UART2 (VIRQ_START + 9)
-#define VIRQ_UART3 (VIRQ_START + 10)
-#define VIRQ_UART4 (VIRQ_START + 11)
-#define VIRQ_UART5 (VIRQ_START + 12)
+#define SPEAR310_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8)
+#define SPEAR310_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9)
+#define SPEAR310_VIRQ_UART3 (SPEAR3XX_VIRQ_START + 10)
+#define SPEAR310_VIRQ_UART4 (SPEAR3XX_VIRQ_START + 11)
+#define SPEAR310_VIRQ_UART5 (SPEAR3XX_VIRQ_START + 12)
/* IRQs sharing IRQ_GEN_RAS_3 */
-#define VIRQ_EMI (VIRQ_START + 13)
-#define VIRQ_PLGPIO (VIRQ_START + 14)
+#define SPEAR310_VIRQ_EMI (SPEAR3XX_VIRQ_START + 13)
+#define SPEAR310_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 14)
/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define VIRQ_TDM_HDLC (VIRQ_START + 15)
-#define VIRQ_RS485_0 (VIRQ_START + 16)
-#define VIRQ_RS485_1 (VIRQ_START + 17)
-
-/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE (VIRQ_START + 18)
+#define SPEAR310_VIRQ_TDM_HDLC (SPEAR3XX_VIRQ_START + 15)
+#define SPEAR310_VIRQ_RS485_0 (SPEAR3XX_VIRQ_START + 16)
+#define SPEAR310_VIRQ_RS485_1 (SPEAR3XX_VIRQ_START + 17)
/* SPEAr320 Virtual irq definitions */
-#else
/* IRQs sharing IRQ_GEN_RAS_1 */
-#define VIRQ_EMI (VIRQ_START + 0)
-#define VIRQ_CLCD (VIRQ_START + 1)
-#define VIRQ_SPP (VIRQ_START + 2)
+#define SPEAR320_VIRQ_EMI (SPEAR3XX_VIRQ_START + 0)
+#define SPEAR320_VIRQ_CLCD (SPEAR3XX_VIRQ_START + 1)
+#define SPEAR320_VIRQ_SPP (SPEAR3XX_VIRQ_START + 2)
/* IRQs sharing IRQ_GEN_RAS_2 */
-#define IRQ_SDHCI IRQ_GEN_RAS_2
+#define SPEAR320_IRQ_SDHCI SPEAR3XX_IRQ_GEN_RAS_2
/* IRQs sharing IRQ_GEN_RAS_3 */
-#define VIRQ_PLGPIO (VIRQ_START + 3)
-#define VIRQ_I2S_PLAY (VIRQ_START + 4)
-#define VIRQ_I2S_REC (VIRQ_START + 5)
+#define SPEAR320_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 3)
+#define SPEAR320_VIRQ_I2S_PLAY (SPEAR3XX_VIRQ_START + 4)
+#define SPEAR320_VIRQ_I2S_REC (SPEAR3XX_VIRQ_START + 5)
/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define VIRQ_CANU (VIRQ_START + 6)
-#define VIRQ_CANL (VIRQ_START + 7)
-#define VIRQ_UART1 (VIRQ_START + 8)
-#define VIRQ_UART2 (VIRQ_START + 9)
-#define VIRQ_SSP1 (VIRQ_START + 10)
-#define VIRQ_SSP2 (VIRQ_START + 11)
-#define VIRQ_SMII0 (VIRQ_START + 12)
-#define VIRQ_MII1_SMII1 (VIRQ_START + 13)
-#define VIRQ_WAKEUP_SMII0 (VIRQ_START + 14)
-#define VIRQ_WAKEUP_MII1_SMII1 (VIRQ_START + 15)
-#define VIRQ_I2C (VIRQ_START + 16)
-
-/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE (VIRQ_START + 17)
+#define SPEAR320_VIRQ_CANU (SPEAR3XX_VIRQ_START + 6)
+#define SPEAR320_VIRQ_CANL (SPEAR3XX_VIRQ_START + 7)
+#define SPEAR320_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8)
+#define SPEAR320_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9)
+#define SPEAR320_VIRQ_SSP1 (SPEAR3XX_VIRQ_START + 10)
+#define SPEAR320_VIRQ_SSP2 (SPEAR3XX_VIRQ_START + 11)
+#define SPEAR320_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 12)
+#define SPEAR320_VIRQ_MII1_SMII1 (SPEAR3XX_VIRQ_START + 13)
+#define SPEAR320_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 14)
+#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1 (SPEAR3XX_VIRQ_START + 15)
+#define SPEAR320_VIRQ_I2C1 (SPEAR3XX_VIRQ_START + 16)
+/*
+ * GPIO pins virtual irqs
+ * Use the lowest number for the GPIO virtual IRQs base on which subarchs
+ * we have compiled in
+ */
+#if defined(CONFIG_MACH_SPEAR310)
+#define SPEAR3XX_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 18)
+#elif defined(CONFIG_MACH_SPEAR320)
+#define SPEAR3XX_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 17)
+#else
+#define SPEAR3XX_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 9)
#endif
-/* PLGPIO Virtual IRQs */
+#define SPEAR300_GPIO1_INT_BASE (SPEAR3XX_GPIO_INT_BASE + 8)
+#define SPEAR3XX_PLGPIO_COUNT 102
+
#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
-#define SPEAR_PLGPIO_INT_BASE (SPEAR_GPIO_INT_BASE + 8)
-#define SPEAR_GPIO_INT_END (SPEAR_PLGPIO_INT_BASE + 102)
+#define SPEAR3XX_PLGPIO_INT_BASE (SPEAR3XX_GPIO_INT_BASE + 8)
+#define SPEAR3XX_GPIO_INT_END (SPEAR3XX_PLGPIO_INT_BASE + \
+ SPEAR3XX_PLGPIO_COUNT)
+#else
+#define SPEAR3XX_GPIO_INT_END (SPEAR300_GPIO1_INT_BASE + 8)
#endif
-#define VIRQ_END SPEAR_GPIO_INT_END
-#define NR_IRQS VIRQ_END
+#define SPEAR3XX_VIRQ_END SPEAR3XX_GPIO_INT_END
+#define NR_IRQS SPEAR3XX_VIRQ_END
#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index 4fd2d22..7d5db76 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -20,19 +20,19 @@
#define SPEAR300_TELECOM_BASE UL(0x50000000)
/* Interrupt registers offsets and masks */
-#define INT_ENB_MASK_REG 0x54
-#define INT_STS_MASK_REG 0x58
-#define IT_PERS_S_IRQ_MASK (1 << 0)
-#define IT_CHANGE_S_IRQ_MASK (1 << 1)
-#define I2S_IRQ_MASK (1 << 2)
-#define TDM_IRQ_MASK (1 << 3)
-#define CAMERA_L_IRQ_MASK (1 << 4)
-#define CAMERA_F_IRQ_MASK (1 << 5)
-#define CAMERA_V_IRQ_MASK (1 << 6)
-#define KEYBOARD_IRQ_MASK (1 << 7)
-#define GPIO1_IRQ_MASK (1 << 8)
-
-#define SHIRQ_RAS1_MASK 0x1FF
+#define SPEAR300_INT_ENB_MASK_REG 0x54
+#define SPEAR300_INT_STS_MASK_REG 0x58
+#define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0)
+#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1)
+#define SPEAR300_I2S_IRQ_MASK (1 << 2)
+#define SPEAR300_TDM_IRQ_MASK (1 << 3)
+#define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4)
+#define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5)
+#define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6)
+#define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7)
+#define SPEAR300_GPIO1_IRQ_MASK (1 << 8)
+
+#define SPEAR300_SHIRQ_RAS1_MASK 0x1FF
#define SPEAR300_CLCD_BASE UL(0x60000000)
#define SPEAR300_SDHCI_BASE UL(0x70000000)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
index 1e85347..1567d0da 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear310.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -29,29 +29,29 @@
#define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000)
/* Interrupt registers offsets and masks */
-#define INT_STS_MASK_REG 0x04
-#define SMII0_IRQ_MASK (1 << 0)
-#define SMII1_IRQ_MASK (1 << 1)
-#define SMII2_IRQ_MASK (1 << 2)
-#define SMII3_IRQ_MASK (1 << 3)
-#define WAKEUP_SMII0_IRQ_MASK (1 << 4)
-#define WAKEUP_SMII1_IRQ_MASK (1 << 5)
-#define WAKEUP_SMII2_IRQ_MASK (1 << 6)
-#define WAKEUP_SMII3_IRQ_MASK (1 << 7)
-#define UART1_IRQ_MASK (1 << 8)
-#define UART2_IRQ_MASK (1 << 9)
-#define UART3_IRQ_MASK (1 << 10)
-#define UART4_IRQ_MASK (1 << 11)
-#define UART5_IRQ_MASK (1 << 12)
-#define EMI_IRQ_MASK (1 << 13)
-#define TDM_HDLC_IRQ_MASK (1 << 14)
-#define RS485_0_IRQ_MASK (1 << 15)
-#define RS485_1_IRQ_MASK (1 << 16)
+#define SPEAR310_INT_STS_MASK_REG 0x04
+#define SPEAR310_SMII0_IRQ_MASK (1 << 0)
+#define SPEAR310_SMII1_IRQ_MASK (1 << 1)
+#define SPEAR310_SMII2_IRQ_MASK (1 << 2)
+#define SPEAR310_SMII3_IRQ_MASK (1 << 3)
+#define SPEAR310_WAKEUP_SMII0_IRQ_MASK (1 << 4)
+#define SPEAR310_WAKEUP_SMII1_IRQ_MASK (1 << 5)
+#define SPEAR310_WAKEUP_SMII2_IRQ_MASK (1 << 6)
+#define SPEAR310_WAKEUP_SMII3_IRQ_MASK (1 << 7)
+#define SPEAR310_UART1_IRQ_MASK (1 << 8)
+#define SPEAR310_UART2_IRQ_MASK (1 << 9)
+#define SPEAR310_UART3_IRQ_MASK (1 << 10)
+#define SPEAR310_UART4_IRQ_MASK (1 << 11)
+#define SPEAR310_UART5_IRQ_MASK (1 << 12)
+#define SPEAR310_EMI_IRQ_MASK (1 << 13)
+#define SPEAR310_TDM_HDLC_IRQ_MASK (1 << 14)
+#define SPEAR310_RS485_0_IRQ_MASK (1 << 15)
+#define SPEAR310_RS485_1_IRQ_MASK (1 << 16)
-#define SHIRQ_RAS1_MASK 0x000FF
-#define SHIRQ_RAS2_MASK 0x01F00
-#define SHIRQ_RAS3_MASK 0x02000
-#define SHIRQ_INTRCOMM_RAS_MASK 0x1C000
+#define SPEAR310_SHIRQ_RAS1_MASK 0x000FF
+#define SPEAR310_SHIRQ_RAS2_MASK 0x01F00
+#define SPEAR310_SHIRQ_RAS3_MASK 0x02000
+#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK 0x1C000
#endif /* __MACH_SPEAR310_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index 940f0d8..8cfa83f 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -36,31 +36,31 @@
#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
/* Interrupt registers offsets and masks */
-#define INT_STS_MASK_REG 0x04
-#define INT_CLR_MASK_REG 0x04
-#define INT_ENB_MASK_REG 0x08
-#define GPIO_IRQ_MASK (1 << 0)
-#define I2S_PLAY_IRQ_MASK (1 << 1)
-#define I2S_REC_IRQ_MASK (1 << 2)
-#define EMI_IRQ_MASK (1 << 7)
-#define CLCD_IRQ_MASK (1 << 8)
-#define SPP_IRQ_MASK (1 << 9)
-#define SDHCI_IRQ_MASK (1 << 10)
-#define CAN_U_IRQ_MASK (1 << 11)
-#define CAN_L_IRQ_MASK (1 << 12)
-#define UART1_IRQ_MASK (1 << 13)
-#define UART2_IRQ_MASK (1 << 14)
-#define SSP1_IRQ_MASK (1 << 15)
-#define SSP2_IRQ_MASK (1 << 16)
-#define SMII0_IRQ_MASK (1 << 17)
-#define MII1_SMII1_IRQ_MASK (1 << 18)
-#define WAKEUP_SMII0_IRQ_MASK (1 << 19)
-#define WAKEUP_MII1_SMII1_IRQ_MASK (1 << 20)
-#define I2C1_IRQ_MASK (1 << 21)
+#define SPEAR320_INT_STS_MASK_REG 0x04
+#define SPEAR320_INT_CLR_MASK_REG 0x04
+#define SPEAR320_INT_ENB_MASK_REG 0x08
+#define SPEAR320_GPIO_IRQ_MASK (1 << 0)
+#define SPEAR320_I2S_PLAY_IRQ_MASK (1 << 1)
+#define SPEAR320_I2S_REC_IRQ_MASK (1 << 2)
+#define SPEAR320_EMI_IRQ_MASK (1 << 7)
+#define SPEAR320_CLCD_IRQ_MASK (1 << 8)
+#define SPEAR320_SPP_IRQ_MASK (1 << 9)
+#define SPEAR320_SDHCI_IRQ_MASK (1 << 10)
+#define SPEAR320_CAN_U_IRQ_MASK (1 << 11)
+#define SPEAR320_CAN_L_IRQ_MASK (1 << 12)
+#define SPEAR320_UART1_IRQ_MASK (1 << 13)
+#define SPEAR320_UART2_IRQ_MASK (1 << 14)
+#define SPEAR320_SSP1_IRQ_MASK (1 << 15)
+#define SPEAR320_SSP2_IRQ_MASK (1 << 16)
+#define SPEAR320_SMII0_IRQ_MASK (1 << 17)
+#define SPEAR320_MII1_SMII1_IRQ_MASK (1 << 18)
+#define SPEAR320_WAKEUP_SMII0_IRQ_MASK (1 << 19)
+#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK (1 << 20)
+#define SPEAR320_I2C1_IRQ_MASK (1 << 21)
-#define SHIRQ_RAS1_MASK 0x000380
-#define SHIRQ_RAS3_MASK 0x000007
-#define SHIRQ_INTRCOMM_RAS_MASK 0x3FF800
+#define SPEAR320_SHIRQ_RAS1_MASK 0x000380
+#define SPEAR320_SHIRQ_RAS3_MASK 0x000007
+#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK 0x3FF800
#endif /* __MACH_SPEAR320_H */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index a1280ba..e1b2580 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -525,52 +525,52 @@ struct pmx_driver pmx_driver = {
/* spear3xx shared irq */
static struct shirq_dev_config shirq_ras1_config[] = {
{
- .virq = VIRQ_IT_PERS_S,
- .enb_mask = IT_PERS_S_IRQ_MASK,
- .status_mask = IT_PERS_S_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_IT_PERS_S,
+ .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
+ .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
}, {
- .virq = VIRQ_IT_CHANGE_S,
- .enb_mask = IT_CHANGE_S_IRQ_MASK,
- .status_mask = IT_CHANGE_S_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_IT_CHANGE_S,
+ .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
+ .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
}, {
- .virq = VIRQ_I2S,
- .enb_mask = I2S_IRQ_MASK,
- .status_mask = I2S_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_I2S,
+ .enb_mask = SPEAR300_I2S_IRQ_MASK,
+ .status_mask = SPEAR300_I2S_IRQ_MASK,
}, {
- .virq = VIRQ_TDM,
- .enb_mask = TDM_IRQ_MASK,
- .status_mask = TDM_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_TDM,
+ .enb_mask = SPEAR300_TDM_IRQ_MASK,
+ .status_mask = SPEAR300_TDM_IRQ_MASK,
}, {
- .virq = VIRQ_CAMERA_L,
- .enb_mask = CAMERA_L_IRQ_MASK,
- .status_mask = CAMERA_L_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_CAMERA_L,
+ .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
+ .status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
}, {
- .virq = VIRQ_CAMERA_F,
- .enb_mask = CAMERA_F_IRQ_MASK,
- .status_mask = CAMERA_F_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_CAMERA_F,
+ .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
+ .status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
}, {
- .virq = VIRQ_CAMERA_V,
- .enb_mask = CAMERA_V_IRQ_MASK,
- .status_mask = CAMERA_V_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_CAMERA_V,
+ .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
+ .status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
}, {
- .virq = VIRQ_KEYBOARD,
- .enb_mask = KEYBOARD_IRQ_MASK,
- .status_mask = KEYBOARD_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_KEYBOARD,
+ .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
+ .status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
}, {
- .virq = VIRQ_GPIO1,
- .enb_mask = GPIO1_IRQ_MASK,
- .status_mask = GPIO1_IRQ_MASK,
+ .virq = SPEAR300_VIRQ_GPIO1,
+ .enb_mask = SPEAR300_GPIO1_IRQ_MASK,
+ .status_mask = SPEAR300_GPIO1_IRQ_MASK,
},
};
static struct spear_shirq shirq_ras1 = {
- .irq = IRQ_GEN_RAS_1,
+ .irq = SPEAR3XX_IRQ_GEN_RAS_1,
.dev_config = shirq_ras1_config,
.dev_count = ARRAY_SIZE(shirq_ras1_config),
.regs = {
- .enb_reg = INT_ENB_MASK_REG,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_RAS1_MASK,
+ .enb_reg = SPEAR300_INT_ENB_MASK_REG,
+ .status_reg = SPEAR300_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
.clear_reg = -1,
},
};
@@ -579,7 +579,7 @@ static struct spear_shirq shirq_ras1 = {
/* arm gpio1 device registration */
static struct pl061_platform_data gpio1_plat_data = {
.gpio_base = 8,
- .irq_base = SPEAR_GPIO1_INT_BASE,
+ .irq_base = SPEAR300_GPIO1_INT_BASE,
};
struct amba_device gpio1_device = {
@@ -592,7 +592,7 @@ struct amba_device gpio1_device = {
.end = SPEAR300_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
- .irq = {VIRQ_GPIO1, NO_IRQ},
+ .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ},
};
/* spear300 routines */
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 3a2c4b2..9f18d28 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -194,115 +194,115 @@ struct pmx_driver pmx_driver;
/* spear3xx shared irq */
static struct shirq_dev_config shirq_ras1_config[] = {
{
- .virq = VIRQ_SMII0,
- .status_mask = SMII0_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_SMII0,
+ .status_mask = SPEAR310_SMII0_IRQ_MASK,
}, {
- .virq = VIRQ_SMII1,
- .status_mask = SMII1_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_SMII1,
+ .status_mask = SPEAR310_SMII1_IRQ_MASK,
}, {
- .virq = VIRQ_SMII2,
- .status_mask = SMII2_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_SMII2,
+ .status_mask = SPEAR310_SMII2_IRQ_MASK,
}, {
- .virq = VIRQ_SMII3,
- .status_mask = SMII3_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_SMII3,
+ .status_mask = SPEAR310_SMII3_IRQ_MASK,
}, {
- .virq = VIRQ_WAKEUP_SMII0,
- .status_mask = WAKEUP_SMII0_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_WAKEUP_SMII0,
+ .status_mask = SPEAR310_WAKEUP_SMII0_IRQ_MASK,
}, {
- .virq = VIRQ_WAKEUP_SMII1,
- .status_mask = WAKEUP_SMII1_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_WAKEUP_SMII1,
+ .status_mask = SPEAR310_WAKEUP_SMII1_IRQ_MASK,
}, {
- .virq = VIRQ_WAKEUP_SMII2,
- .status_mask = WAKEUP_SMII2_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_WAKEUP_SMII2,
+ .status_mask = SPEAR310_WAKEUP_SMII2_IRQ_MASK,
}, {
- .virq = VIRQ_WAKEUP_SMII3,
- .status_mask = WAKEUP_SMII3_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_WAKEUP_SMII3,
+ .status_mask = SPEAR310_WAKEUP_SMII3_IRQ_MASK,
},
};
static struct spear_shirq shirq_ras1 = {
- .irq = IRQ_GEN_RAS_1,
+ .irq = SPEAR3XX_IRQ_GEN_RAS_1,
.dev_config = shirq_ras1_config,
.dev_count = ARRAY_SIZE(shirq_ras1_config),
.regs = {
.enb_reg = -1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_RAS1_MASK,
+ .status_reg = SPEAR310_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR310_SHIRQ_RAS1_MASK,
.clear_reg = -1,
},
};
static struct shirq_dev_config shirq_ras2_config[] = {
{
- .virq = VIRQ_UART1,
- .status_mask = UART1_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_UART1,
+ .status_mask = SPEAR310_UART1_IRQ_MASK,
}, {
- .virq = VIRQ_UART2,
- .status_mask = UART2_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_UART2,
+ .status_mask = SPEAR310_UART2_IRQ_MASK,
}, {
- .virq = VIRQ_UART3,
- .status_mask = UART3_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_UART3,
+ .status_mask = SPEAR310_UART3_IRQ_MASK,
}, {
- .virq = VIRQ_UART4,
- .status_mask = UART4_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_UART4,
+ .status_mask = SPEAR310_UART4_IRQ_MASK,
}, {
- .virq = VIRQ_UART5,
- .status_mask = UART5_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_UART5,
+ .status_mask = SPEAR310_UART5_IRQ_MASK,
},
};
static struct spear_shirq shirq_ras2 = {
- .irq = IRQ_GEN_RAS_2,
+ .irq = SPEAR3XX_IRQ_GEN_RAS_2,
.dev_config = shirq_ras2_config,
.dev_count = ARRAY_SIZE(shirq_ras2_config),
.regs = {
.enb_reg = -1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_RAS2_MASK,
+ .status_reg = SPEAR310_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR310_SHIRQ_RAS2_MASK,
.clear_reg = -1,
},
};
static struct shirq_dev_config shirq_ras3_config[] = {
{
- .virq = VIRQ_EMI,
- .status_mask = EMI_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_EMI,
+ .status_mask = SPEAR310_EMI_IRQ_MASK,
},
};
static struct spear_shirq shirq_ras3 = {
- .irq = IRQ_GEN_RAS_3,
+ .irq = SPEAR3XX_IRQ_GEN_RAS_3,
.dev_config = shirq_ras3_config,
.dev_count = ARRAY_SIZE(shirq_ras3_config),
.regs = {
.enb_reg = -1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_RAS3_MASK,
+ .status_reg = SPEAR310_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR310_SHIRQ_RAS3_MASK,
.clear_reg = -1,
},
};
static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
{
- .virq = VIRQ_TDM_HDLC,
- .status_mask = TDM_HDLC_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_TDM_HDLC,
+ .status_mask = SPEAR310_TDM_HDLC_IRQ_MASK,
}, {
- .virq = VIRQ_RS485_0,
- .status_mask = RS485_0_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_RS485_0,
+ .status_mask = SPEAR310_RS485_0_IRQ_MASK,
}, {
- .virq = VIRQ_RS485_1,
- .status_mask = RS485_1_IRQ_MASK,
+ .virq = SPEAR310_VIRQ_RS485_1,
+ .status_mask = SPEAR310_RS485_1_IRQ_MASK,
},
};
static struct spear_shirq shirq_intrcomm_ras = {
- .irq = IRQ_INTRCOMM_RAS_ARM,
+ .irq = SPEAR3XX_IRQ_INTRCOMM_RAS_ARM,
.dev_config = shirq_intrcomm_ras_config,
.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
.regs = {
.enb_reg = -1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK,
+ .status_reg = SPEAR310_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR310_SHIRQ_INTRCOMM_RAS_MASK,
.clear_reg = -1,
},
};
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index fee265b..69b9549 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -589,123 +589,123 @@ struct pmx_driver pmx_driver = {
/* spear3xx shared irq */
static struct shirq_dev_config shirq_ras1_config[] = {
{
- .virq = VIRQ_EMI,
- .status_mask = EMI_IRQ_MASK,
- .clear_mask = EMI_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_EMI,
+ .status_mask = SPEAR320_EMI_IRQ_MASK,
+ .clear_mask = SPEAR320_EMI_IRQ_MASK,
}, {
- .virq = VIRQ_CLCD,
- .status_mask = CLCD_IRQ_MASK,
- .clear_mask = CLCD_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_CLCD,
+ .status_mask = SPEAR320_CLCD_IRQ_MASK,
+ .clear_mask = SPEAR320_CLCD_IRQ_MASK,
}, {
- .virq = VIRQ_SPP,
- .status_mask = SPP_IRQ_MASK,
- .clear_mask = SPP_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_SPP,
+ .status_mask = SPEAR320_SPP_IRQ_MASK,
+ .clear_mask = SPEAR320_SPP_IRQ_MASK,
},
};
static struct spear_shirq shirq_ras1 = {
- .irq = IRQ_GEN_RAS_1,
+ .irq = SPEAR3XX_IRQ_GEN_RAS_1,
.dev_config = shirq_ras1_config,
.dev_count = ARRAY_SIZE(shirq_ras1_config),
.regs = {
.enb_reg = -1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_RAS1_MASK,
- .clear_reg = INT_CLR_MASK_REG,
+ .status_reg = SPEAR320_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR320_SHIRQ_RAS1_MASK,
+ .clear_reg = SPEAR320_INT_CLR_MASK_REG,
.reset_to_clear = 1,
},
};
static struct shirq_dev_config shirq_ras3_config[] = {
{
- .virq = VIRQ_PLGPIO,
- .enb_mask = GPIO_IRQ_MASK,
- .status_mask = GPIO_IRQ_MASK,
- .clear_mask = GPIO_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_PLGPIO,
+ .enb_mask = SPEAR320_GPIO_IRQ_MASK,
+ .status_mask = SPEAR320_GPIO_IRQ_MASK,
+ .clear_mask = SPEAR320_GPIO_IRQ_MASK,
}, {
- .virq = VIRQ_I2S_PLAY,
- .enb_mask = I2S_PLAY_IRQ_MASK,
- .status_mask = I2S_PLAY_IRQ_MASK,
- .clear_mask = I2S_PLAY_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_I2S_PLAY,
+ .enb_mask = SPEAR320_I2S_PLAY_IRQ_MASK,
+ .status_mask = SPEAR320_I2S_PLAY_IRQ_MASK,
+ .clear_mask = SPEAR320_I2S_PLAY_IRQ_MASK,
}, {
- .virq = VIRQ_I2S_REC,
- .enb_mask = I2S_REC_IRQ_MASK,
- .status_mask = I2S_REC_IRQ_MASK,
- .clear_mask = I2S_REC_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_I2S_REC,
+ .enb_mask = SPEAR320_I2S_REC_IRQ_MASK,
+ .status_mask = SPEAR320_I2S_REC_IRQ_MASK,
+ .clear_mask = SPEAR320_I2S_REC_IRQ_MASK,
},
};
static struct spear_shirq shirq_ras3 = {
- .irq = IRQ_GEN_RAS_3,
+ .irq = SPEAR3XX_IRQ_GEN_RAS_3,
.dev_config = shirq_ras3_config,
.dev_count = ARRAY_SIZE(shirq_ras3_config),
.regs = {
- .enb_reg = INT_ENB_MASK_REG,
+ .enb_reg = SPEAR320_INT_ENB_MASK_REG,
.reset_to_enb = 1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_RAS3_MASK,
- .clear_reg = INT_CLR_MASK_REG,
+ .status_reg = SPEAR320_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR320_SHIRQ_RAS3_MASK,
+ .clear_reg = SPEAR320_INT_CLR_MASK_REG,
.reset_to_clear = 1,
},
};
static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
{
- .virq = VIRQ_CANU,
- .status_mask = CAN_U_IRQ_MASK,
- .clear_mask = CAN_U_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_CANU,
+ .status_mask = SPEAR320_CAN_U_IRQ_MASK,
+ .clear_mask = SPEAR320_CAN_U_IRQ_MASK,
}, {
- .virq = VIRQ_CANL,
- .status_mask = CAN_L_IRQ_MASK,
- .clear_mask = CAN_L_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_CANL,
+ .status_mask = SPEAR320_CAN_L_IRQ_MASK,
+ .clear_mask = SPEAR320_CAN_L_IRQ_MASK,
}, {
- .virq = VIRQ_UART1,
- .status_mask = UART1_IRQ_MASK,
- .clear_mask = UART1_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_UART1,
+ .status_mask = SPEAR320_UART1_IRQ_MASK,
+ .clear_mask = SPEAR320_UART1_IRQ_MASK,
}, {
- .virq = VIRQ_UART2,
- .status_mask = UART2_IRQ_MASK,
- .clear_mask = UART2_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_UART2,
+ .status_mask = SPEAR320_UART2_IRQ_MASK,
+ .clear_mask = SPEAR320_UART2_IRQ_MASK,
}, {
- .virq = VIRQ_SSP1,
- .status_mask = SSP1_IRQ_MASK,
- .clear_mask = SSP1_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_SSP1,
+ .status_mask = SPEAR320_SSP1_IRQ_MASK,
+ .clear_mask = SPEAR320_SSP1_IRQ_MASK,
}, {
- .virq = VIRQ_SSP2,
- .status_mask = SSP2_IRQ_MASK,
- .clear_mask = SSP2_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_SSP2,
+ .status_mask = SPEAR320_SSP2_IRQ_MASK,
+ .clear_mask = SPEAR320_SSP2_IRQ_MASK,
}, {
- .virq = VIRQ_SMII0,
- .status_mask = SMII0_IRQ_MASK,
- .clear_mask = SMII0_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_SMII0,
+ .status_mask = SPEAR320_SMII0_IRQ_MASK,
+ .clear_mask = SPEAR320_SMII0_IRQ_MASK,
}, {
- .virq = VIRQ_MII1_SMII1,
- .status_mask = MII1_SMII1_IRQ_MASK,
- .clear_mask = MII1_SMII1_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_MII1_SMII1,
+ .status_mask = SPEAR320_MII1_SMII1_IRQ_MASK,
+ .clear_mask = SPEAR320_MII1_SMII1_IRQ_MASK,
}, {
- .virq = VIRQ_WAKEUP_SMII0,
- .status_mask = WAKEUP_SMII0_IRQ_MASK,
- .clear_mask = WAKEUP_SMII0_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_WAKEUP_SMII0,
+ .status_mask = SPEAR320_WAKEUP_SMII0_IRQ_MASK,
+ .clear_mask = SPEAR320_WAKEUP_SMII0_IRQ_MASK,
}, {
- .virq = VIRQ_WAKEUP_MII1_SMII1,
- .status_mask = WAKEUP_MII1_SMII1_IRQ_MASK,
- .clear_mask = WAKEUP_MII1_SMII1_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_WAKEUP_MII1_SMII1,
+ .status_mask = SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK,
+ .clear_mask = SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK,
}, {
- .virq = VIRQ_I2C,
- .status_mask = I2C1_IRQ_MASK,
- .clear_mask = I2C1_IRQ_MASK,
+ .virq = SPEAR320_VIRQ_I2C1,
+ .status_mask = SPEAR320_I2C1_IRQ_MASK,
+ .clear_mask = SPEAR320_I2C1_IRQ_MASK,
},
};
static struct spear_shirq shirq_intrcomm_ras = {
- .irq = IRQ_INTRCOMM_RAS_ARM,
+ .irq = SPEAR3XX_IRQ_INTRCOMM_RAS_ARM,
.dev_config = shirq_intrcomm_ras_config,
.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
.regs = {
.enb_reg = -1,
- .status_reg = INT_STS_MASK_REG,
- .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK,
- .clear_reg = INT_CLR_MASK_REG,
+ .status_reg = SPEAR320_INT_STS_MASK_REG,
+ .status_reg_mask = SPEAR320_SHIRQ_INTRCOMM_RAS_MASK,
+ .clear_reg = SPEAR320_INT_CLR_MASK_REG,
.reset_to_clear = 1,
},
};
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 9a9e92b..9ae7009 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -25,7 +25,7 @@
/* gpio device registration */
static struct pl061_platform_data gpio_plat_data = {
.gpio_base = 0,
- .irq_base = SPEAR_GPIO_INT_BASE,
+ .irq_base = SPEAR3XX_GPIO_INT_BASE,
};
struct amba_device gpio_device = {
@@ -38,7 +38,7 @@ struct amba_device gpio_device = {
.end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
- .irq = {IRQ_BASIC_GPIO, NO_IRQ},
+ .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ},
};
/* uart device registration */
@@ -51,7 +51,7 @@ struct amba_device uart_device = {
.end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
- .irq = {IRQ_UART, NO_IRQ},
+ .irq = {SPEAR3XX_IRQ_UART, NO_IRQ},
};
/* Do spear3xx familiy common initialization part here */
--
1.7.2.2
^ permalink raw reply related
* [PATCH V6 06/11] ST SPEAr3xx: Rework pmx_dev code to remove conflicts
From: Viresh Kumar @ 2011-03-01 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1298977709.git.viresh.kumar@st.com>
From: Ryan Mallon <ryan@bluewatersys.com>
Prefix the pmx_devs to remove naming conflicts between the three
SPEAr3xx platforms. Also make pmx_driver static to each platform and
rework the init code to pass the devices rather than export the
pmx_driver structure.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
arch/arm/mach-spear3xx/include/mach/generic.h | 193 +++++++++++++------------
arch/arm/mach-spear3xx/spear300.c | 66 +++++----
arch/arm/mach-spear3xx/spear300_evb.c | 26 ++--
arch/arm/mach-spear3xx/spear310.c | 28 ++--
arch/arm/mach-spear3xx/spear310_evb.c | 41 +++---
arch/arm/mach-spear3xx/spear320.c | 64 +++++----
arch/arm/mach-spear3xx/spear320_evb.c | 36 ++---
arch/arm/mach-spear3xx/spear3xx.c | 60 ++++----
8 files changed, 257 insertions(+), 257 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index c2b15b1..9186e5a 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -61,85 +61,84 @@ void spear3xx_pmx_init_addr(struct pmx_driver *driver, unsigned int addr);
#define PMX_TIMER_1_2_MASK (1 << 0)
/* pad mux devices */
-extern struct pmx_dev pmx_firda;
-extern struct pmx_dev pmx_i2c;
-extern struct pmx_dev pmx_ssp_cs;
-extern struct pmx_dev pmx_ssp;
-extern struct pmx_dev pmx_mii;
-extern struct pmx_dev pmx_gpio_pin0;
-extern struct pmx_dev pmx_gpio_pin1;
-extern struct pmx_dev pmx_gpio_pin2;
-extern struct pmx_dev pmx_gpio_pin3;
-extern struct pmx_dev pmx_gpio_pin4;
-extern struct pmx_dev pmx_gpio_pin5;
-extern struct pmx_dev pmx_uart0_modem;
-extern struct pmx_dev pmx_uart0;
-extern struct pmx_dev pmx_timer_3_4;
-extern struct pmx_dev pmx_timer_1_2;
+extern struct pmx_dev spear3xx_pmx_firda;
+extern struct pmx_dev spear3xx_pmx_i2c;
+extern struct pmx_dev spear3xx_pmx_ssp_cs;
+extern struct pmx_dev spear3xx_pmx_ssp;
+extern struct pmx_dev spear3xx_pmx_mii;
+extern struct pmx_dev spear3xx_pmx_gpio_pin0;
+extern struct pmx_dev spear3xx_pmx_gpio_pin1;
+extern struct pmx_dev spear3xx_pmx_gpio_pin2;
+extern struct pmx_dev spear3xx_pmx_gpio_pin3;
+extern struct pmx_dev spear3xx_pmx_gpio_pin4;
+extern struct pmx_dev spear3xx_pmx_gpio_pin5;
+extern struct pmx_dev spear3xx_pmx_uart0_modem;
+extern struct pmx_dev spear3xx_pmx_uart0;
+extern struct pmx_dev spear3xx_pmx_timer_3_4;
+extern struct pmx_dev spear3xx_pmx_timer_1_2;
#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
/* padmux plgpio devices */
-extern struct pmx_dev pmx_plgpio_0_1;
-extern struct pmx_dev pmx_plgpio_2_3;
-extern struct pmx_dev pmx_plgpio_4_5;
-extern struct pmx_dev pmx_plgpio_6_9;
-extern struct pmx_dev pmx_plgpio_10_27;
-extern struct pmx_dev pmx_plgpio_28;
-extern struct pmx_dev pmx_plgpio_29;
-extern struct pmx_dev pmx_plgpio_30;
-extern struct pmx_dev pmx_plgpio_31;
-extern struct pmx_dev pmx_plgpio_32;
-extern struct pmx_dev pmx_plgpio_33;
-extern struct pmx_dev pmx_plgpio_34_36;
-extern struct pmx_dev pmx_plgpio_37_42;
-extern struct pmx_dev pmx_plgpio_43_44_47_48;
-extern struct pmx_dev pmx_plgpio_45_46_49_50;
+extern struct pmx_dev spear3xx_pmx_plgpio_0_1;
+extern struct pmx_dev spear3xx_pmx_plgpio_2_3;
+extern struct pmx_dev spear3xx_pmx_plgpio_4_5;
+extern struct pmx_dev spear3xx_pmx_plgpio_6_9;
+extern struct pmx_dev spear3xx_pmx_plgpio_10_27;
+extern struct pmx_dev spear3xx_pmx_plgpio_28;
+extern struct pmx_dev spear3xx_pmx_plgpio_29;
+extern struct pmx_dev spear3xx_pmx_plgpio_30;
+extern struct pmx_dev spear3xx_pmx_plgpio_31;
+extern struct pmx_dev spear3xx_pmx_plgpio_32;
+extern struct pmx_dev spear3xx_pmx_plgpio_33;
+extern struct pmx_dev spear3xx_pmx_plgpio_34_36;
+extern struct pmx_dev spear3xx_pmx_plgpio_37_42;
+extern struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48;
+extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50;
#endif
-extern struct pmx_driver pmx_driver;
-
/* spear300 declarations */
#ifdef CONFIG_MACH_SPEAR300
/* Add spear300 machine device structure declarations here */
extern struct amba_device gpio1_device;
/* pad mux modes */
-extern struct pmx_mode nand_mode;
-extern struct pmx_mode nor_mode;
-extern struct pmx_mode photo_frame_mode;
-extern struct pmx_mode lend_ip_phone_mode;
-extern struct pmx_mode hend_ip_phone_mode;
-extern struct pmx_mode lend_wifi_phone_mode;
-extern struct pmx_mode hend_wifi_phone_mode;
-extern struct pmx_mode ata_pabx_wi2s_mode;
-extern struct pmx_mode ata_pabx_i2s_mode;
-extern struct pmx_mode caml_lcdw_mode;
-extern struct pmx_mode camu_lcd_mode;
-extern struct pmx_mode camu_wlcd_mode;
-extern struct pmx_mode caml_lcd_mode;
+extern struct pmx_mode spear300_nand_mode;
+extern struct pmx_mode spear300_nor_mode;
+extern struct pmx_mode spear300_photo_frame_mode;
+extern struct pmx_mode spear300_lend_ip_phone_mode;
+extern struct pmx_mode spear300_hend_ip_phone_mode;
+extern struct pmx_mode spear300_lend_wifi_phone_mode;
+extern struct pmx_mode spear300_hend_wifi_phone_mode;
+extern struct pmx_mode spear300_ata_pabx_wi2s_mode;
+extern struct pmx_mode spear300_ata_pabx_i2s_mode;
+extern struct pmx_mode spear300_caml_lcdw_mode;
+extern struct pmx_mode spear300_camu_lcd_mode;
+extern struct pmx_mode spear300_camu_wlcd_mode;
+extern struct pmx_mode spear300_caml_lcd_mode;
/* pad mux devices */
-extern struct pmx_dev pmx_fsmc_2_chips;
-extern struct pmx_dev pmx_fsmc_4_chips;
-extern struct pmx_dev pmx_keyboard;
-extern struct pmx_dev pmx_clcd;
-extern struct pmx_dev pmx_telecom_gpio;
-extern struct pmx_dev pmx_telecom_tdm;
-extern struct pmx_dev pmx_telecom_spi_cs_i2c_clk;
-extern struct pmx_dev pmx_telecom_camera;
-extern struct pmx_dev pmx_telecom_dac;
-extern struct pmx_dev pmx_telecom_i2s;
-extern struct pmx_dev pmx_telecom_boot_pins;
-extern struct pmx_dev pmx_telecom_sdhci_4bit;
-extern struct pmx_dev pmx_telecom_sdhci_8bit;
-extern struct pmx_dev pmx_gpio1;
+extern struct pmx_dev spear300_pmx_fsmc_2_chips;
+extern struct pmx_dev spear300_pmx_fsmc_4_chips;
+extern struct pmx_dev spear300_pmx_keyboard;
+extern struct pmx_dev spear300_pmx_clcd;
+extern struct pmx_dev spear300_pmx_telecom_gpio;
+extern struct pmx_dev spear300_pmx_telecom_tdm;
+extern struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk;
+extern struct pmx_dev spear300_pmx_telecom_camera;
+extern struct pmx_dev spear300_pmx_telecom_dac;
+extern struct pmx_dev spear300_pmx_telecom_i2s;
+extern struct pmx_dev spear300_pmx_telecom_boot_pins;
+extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit;
+extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit;
+extern struct pmx_dev spear300_pmx_gpio1;
/* pad multiplexing support */
#define SPEAR300_PAD_MUX_CONFIG_REG 0x99000000
#define SPEAR300_MODE_CONFIG_REG 0x99000004
/* Add spear300 machine function declarations here */
-void __init spear300_init(void);
+void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+ u8 pmx_dev_count);
#endif /* CONFIG_MACH_SPEAR300 */
@@ -148,18 +147,19 @@ void __init spear300_init(void);
/* Add spear310 machine device structure declarations here */
/* pad mux devices */
-extern struct pmx_dev pmx_emi_cs_0_1_4_5;
-extern struct pmx_dev pmx_emi_cs_2_3;
-extern struct pmx_dev pmx_uart1;
-extern struct pmx_dev pmx_uart2;
-extern struct pmx_dev pmx_uart3_4_5;
-extern struct pmx_dev pmx_fsmc;
-extern struct pmx_dev pmx_rs485_0_1;
-extern struct pmx_dev pmx_tdm0;
+extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5;
+extern struct pmx_dev spear310_pmx_emi_cs_2_3;
+extern struct pmx_dev spear310_pmx_uart1;
+extern struct pmx_dev spear310_pmx_uart2;
+extern struct pmx_dev spear310_pmx_uart3_4_5;
+extern struct pmx_dev spear310_pmx_fsmc;
+extern struct pmx_dev spear310_pmx_rs485_0_1;
+extern struct pmx_dev spear310_pmx_tdm0;
#define SPEAR310_PAD_MUX_CONFIG_REG 0xB4000008
/* Add spear310 machine function declarations here */
-void __init spear310_init(void);
+void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+ u8 pmx_dev_count);
#endif /* CONFIG_MACH_SPEAR310 */
@@ -168,41 +168,42 @@ void __init spear310_init(void);
/* Add spear320 machine device structure declarations here */
/* pad mux modes */
-extern struct pmx_mode auto_net_smii_mode;
-extern struct pmx_mode auto_net_mii_mode;
-extern struct pmx_mode auto_exp_mode;
-extern struct pmx_mode small_printers_mode;
+extern struct pmx_mode spear320_auto_net_smii_mode;
+extern struct pmx_mode spear320_auto_net_mii_mode;
+extern struct pmx_mode spear320_auto_exp_mode;
+extern struct pmx_mode spear320_small_printers_mode;
/* pad mux devices */
-extern struct pmx_dev pmx_clcd;
-extern struct pmx_dev pmx_emi;
-extern struct pmx_dev pmx_fsmc;
-extern struct pmx_dev pmx_spp;
-extern struct pmx_dev pmx_sdhci;
-extern struct pmx_dev pmx_i2s;
-extern struct pmx_dev pmx_uart1;
-extern struct pmx_dev pmx_uart1_modem;
-extern struct pmx_dev pmx_uart2;
-extern struct pmx_dev pmx_touchscreen;
-extern struct pmx_dev pmx_can;
-extern struct pmx_dev pmx_sdhci_led;
-extern struct pmx_dev pmx_pwm0;
-extern struct pmx_dev pmx_pwm1;
-extern struct pmx_dev pmx_pwm2;
-extern struct pmx_dev pmx_pwm3;
-extern struct pmx_dev pmx_ssp1;
-extern struct pmx_dev pmx_ssp2;
-extern struct pmx_dev pmx_mii1;
-extern struct pmx_dev pmx_smii0;
-extern struct pmx_dev pmx_smii1;
-extern struct pmx_dev pmx_i2c1;
+extern struct pmx_dev spear320_pmx_clcd;
+extern struct pmx_dev spear320_pmx_emi;
+extern struct pmx_dev spear320_pmx_fsmc;
+extern struct pmx_dev spear320_pmx_spp;
+extern struct pmx_dev spear320_pmx_sdhci;
+extern struct pmx_dev spear320_pmx_i2s;
+extern struct pmx_dev spear320_pmx_uart1;
+extern struct pmx_dev spear320_pmx_uart1_modem;
+extern struct pmx_dev spear320_pmx_uart2;
+extern struct pmx_dev spear320_pmx_touchscreen;
+extern struct pmx_dev spear320_pmx_can;
+extern struct pmx_dev spear320_pmx_sdhci_led;
+extern struct pmx_dev spear320_pmx_pwm0;
+extern struct pmx_dev spear320_pmx_pwm1;
+extern struct pmx_dev spear320_pmx_pwm2;
+extern struct pmx_dev spear320_pmx_pwm3;
+extern struct pmx_dev spear320_pmx_ssp1;
+extern struct pmx_dev spear320_pmx_ssp2;
+extern struct pmx_dev spear320_pmx_mii1;
+extern struct pmx_dev spear320_pmx_smii0;
+extern struct pmx_dev spear320_pmx_smii1;
+extern struct pmx_dev spear320_pmx_i2c1;
/* pad multiplexing support */
#define SPEAR320_PAD_MUX_CONFIG_REG 0xB300000C
#define SPEAR320_MODE_CONFIG_REG 0xB3000010
/* Add spear320 machine function declarations here */
-void __init spear320_init(void);
+void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+ u8 pmx_dev_count);
#endif /* CONFIG_MACH_SPEAR320 */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index e1b2580..2618181 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -35,79 +35,79 @@
#define CAML_LCD_MODE (1 << 12)
#define ALL_MODES 0x1FFF
-struct pmx_mode nand_mode = {
+struct pmx_mode spear300_nand_mode = {
.id = NAND_MODE,
.name = "nand mode",
.value = 0x00,
};
-struct pmx_mode nor_mode = {
+struct pmx_mode spear300_nor_mode = {
.id = NOR_MODE,
.name = "nor mode",
.value = 0x01,
};
-struct pmx_mode photo_frame_mode = {
+struct pmx_mode spear300_photo_frame_mode = {
.id = PHOTO_FRAME_MODE,
.name = "photo frame mode",
.value = 0x02,
};
-struct pmx_mode lend_ip_phone_mode = {
+struct pmx_mode spear300_lend_ip_phone_mode = {
.id = LEND_IP_PHONE_MODE,
.name = "lend ip phone mode",
.value = 0x03,
};
-struct pmx_mode hend_ip_phone_mode = {
+struct pmx_mode spear300_hend_ip_phone_mode = {
.id = HEND_IP_PHONE_MODE,
.name = "hend ip phone mode",
.value = 0x04,
};
-struct pmx_mode lend_wifi_phone_mode = {
+struct pmx_mode spear300_lend_wifi_phone_mode = {
.id = LEND_WIFI_PHONE_MODE,
.name = "lend wifi phone mode",
.value = 0x05,
};
-struct pmx_mode hend_wifi_phone_mode = {
+struct pmx_mode spear300_hend_wifi_phone_mode = {
.id = HEND_WIFI_PHONE_MODE,
.name = "hend wifi phone mode",
.value = 0x06,
};
-struct pmx_mode ata_pabx_wi2s_mode = {
+struct pmx_mode spear300_ata_pabx_wi2s_mode = {
.id = ATA_PABX_WI2S_MODE,
.name = "ata pabx wi2s mode",
.value = 0x07,
};
-struct pmx_mode ata_pabx_i2s_mode = {
+struct pmx_mode spear300_ata_pabx_i2s_mode = {
.id = ATA_PABX_I2S_MODE,
.name = "ata pabx i2s mode",
.value = 0x08,
};
-struct pmx_mode caml_lcdw_mode = {
+struct pmx_mode spear300_caml_lcdw_mode = {
.id = CAML_LCDW_MODE,
.name = "caml lcdw mode",
.value = 0x0C,
};
-struct pmx_mode camu_lcd_mode = {
+struct pmx_mode spear300_camu_lcd_mode = {
.id = CAMU_LCD_MODE,
.name = "camu lcd mode",
.value = 0x0D,
};
-struct pmx_mode camu_wlcd_mode = {
+struct pmx_mode spear300_camu_wlcd_mode = {
.id = CAMU_WLCD_MODE,
.name = "camu wlcd mode",
.value = 0x0E,
};
-struct pmx_mode caml_lcd_mode = {
+struct pmx_mode spear300_caml_lcd_mode = {
.id = CAML_LCD_MODE,
.name = "caml lcd mode",
.value = 0x0F,
@@ -130,7 +130,7 @@ static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
},
};
-struct pmx_dev pmx_fsmc_2_chips = {
+struct pmx_dev spear300_pmx_fsmc_2_chips = {
.name = "fsmc_2_chips",
.modes = pmx_fsmc_2_chips_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
@@ -153,7 +153,7 @@ static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
},
};
-struct pmx_dev pmx_fsmc_4_chips = {
+struct pmx_dev spear300_pmx_fsmc_4_chips = {
.name = "fsmc_4_chips",
.modes = pmx_fsmc_4_chips_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
@@ -178,7 +178,7 @@ static struct pmx_dev_mode pmx_keyboard_modes[] = {
},
};
-struct pmx_dev pmx_keyboard = {
+struct pmx_dev spear300_pmx_keyboard = {
.name = "keyboard",
.modes = pmx_keyboard_modes,
.mode_count = ARRAY_SIZE(pmx_keyboard_modes),
@@ -212,7 +212,7 @@ static struct pmx_dev_mode pmx_clcd_modes[] = {
},
};
-struct pmx_dev pmx_clcd = {
+struct pmx_dev spear300_pmx_clcd = {
.name = "clcd",
.modes = pmx_clcd_modes,
.mode_count = ARRAY_SIZE(pmx_clcd_modes),
@@ -279,7 +279,7 @@ static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
},
};
-struct pmx_dev pmx_telecom_gpio = {
+struct pmx_dev spear300_pmx_telecom_gpio = {
.name = "telecom_gpio",
.modes = pmx_telecom_gpio_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
@@ -305,7 +305,7 @@ static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
},
};
-struct pmx_dev pmx_telecom_tdm = {
+struct pmx_dev spear300_pmx_telecom_tdm = {
.name = "telecom_tdm",
.modes = pmx_telecom_tdm_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
@@ -330,7 +330,7 @@ static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
},
};
-struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
+struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
.name = "telecom_spi_cs_i2c_clk",
.modes = pmx_telecom_spi_cs_i2c_clk_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
@@ -362,7 +362,7 @@ static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
},
};
-struct pmx_dev pmx_telecom_camera = {
+struct pmx_dev spear300_pmx_telecom_camera = {
.name = "telecom_camera",
.modes = pmx_telecom_camera_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
@@ -385,7 +385,7 @@ static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
},
};
-struct pmx_dev pmx_telecom_dac = {
+struct pmx_dev spear300_pmx_telecom_dac = {
.name = "telecom_dac",
.modes = pmx_telecom_dac_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
@@ -410,7 +410,7 @@ static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
},
};
-struct pmx_dev pmx_telecom_i2s = {
+struct pmx_dev spear300_pmx_telecom_i2s = {
.name = "telecom_i2s",
.modes = pmx_telecom_i2s_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
@@ -433,7 +433,7 @@ static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
},
};
-struct pmx_dev pmx_telecom_boot_pins = {
+struct pmx_dev spear300_pmx_telecom_boot_pins = {
.name = "telecom_boot_pins",
.modes = pmx_telecom_boot_pins_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
@@ -461,7 +461,7 @@ static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
},
};
-struct pmx_dev pmx_telecom_sdhci_4bit = {
+struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
.name = "telecom_sdhci_4bit",
.modes = pmx_telecom_sdhci_4bit_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
@@ -488,7 +488,7 @@ static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
},
};
-struct pmx_dev pmx_telecom_sdhci_8bit = {
+struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
.name = "telecom_sdhci_8bit",
.modes = pmx_telecom_sdhci_8bit_modes,
.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
@@ -511,14 +511,14 @@ static struct pmx_dev_mode pmx_gpio1_modes[] = {
},
};
-struct pmx_dev pmx_gpio1 = {
+struct pmx_dev spear300_pmx_gpio1 = {
.name = "arm gpio1",
.modes = pmx_gpio1_modes,
.mode_count = ARRAY_SIZE(pmx_gpio1_modes),
};
/* pmx driver structure */
-struct pmx_driver pmx_driver = {
+static struct pmx_driver pmx_driver = {
.mode_reg = {.address = SPEAR300_MODE_CONFIG_REG, .mask = 0x0000000f},
};
@@ -596,7 +596,8 @@ struct amba_device gpio1_device = {
};
/* spear300 routines */
-void __init spear300_init(void)
+void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+ u8 pmx_dev_count)
{
int ret = 0;
@@ -611,10 +612,13 @@ void __init spear300_init(void)
printk(KERN_ERR "Error registering Shared IRQ\n");
}
+ /* pmx initialization */
+ pmx_driver.mode = pmx_mode;
+ pmx_driver.devs = pmx_devs;
+ pmx_driver.devs_count = pmx_dev_count;
+
/* This fixes addresses of all pmx devices for spear300 */
spear3xx_pmx_init_addr(&pmx_driver, SPEAR300_PAD_MUX_CONFIG_REG);
-
- /* pmx initialization */
ret = pmx_register(&pmx_driver);
if (ret)
pr_err("padmux: registeration failed. err no: %d\n", ret);
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 42d2253..405ae09 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -19,17 +19,17 @@
/* padmux devices to enable */
static struct pmx_dev *pmx_devs[] = {
/* spear3xx specific devices */
- &pmx_i2c,
- &pmx_ssp_cs,
- &pmx_ssp,
- &pmx_mii,
- &pmx_uart0,
+ &spear3xx_pmx_i2c,
+ &spear3xx_pmx_ssp_cs,
+ &spear3xx_pmx_ssp,
+ &spear3xx_pmx_mii,
+ &spear3xx_pmx_uart0,
/* spear300 specific devices */
- &pmx_fsmc_2_chips,
- &pmx_clcd,
- &pmx_telecom_sdhci_4bit,
- &pmx_gpio1,
+ &spear300_pmx_fsmc_2_chips,
+ &spear300_pmx_clcd,
+ &spear300_pmx_telecom_sdhci_4bit,
+ &spear300_pmx_gpio1,
};
static struct amba_device *amba_devs[] __initdata = {
@@ -51,13 +51,9 @@ static void __init spear300_evb_init(void)
{
unsigned int i;
- /* padmux initialization, must be done before spear300_init */
- pmx_driver.mode = &photo_frame_mode;
- pmx_driver.devs = pmx_devs;
- pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
-
/* call spear300 machine init function */
- spear300_init();
+ spear300_init(&spear300_photo_frame_mode, pmx_devs,
+ ARRAY_SIZE(pmx_devs));
/* Add Platform Devices */
platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 9f18d28..4522e48 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -35,7 +35,7 @@ static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
},
};
-struct pmx_dev pmx_emi_cs_0_1_4_5 = {
+struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = {
.name = "emi_cs_0_1_4_5",
.modes = pmx_emi_cs_0_1_4_5_modes,
.mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
@@ -56,7 +56,7 @@ static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
},
};
-struct pmx_dev pmx_emi_cs_2_3 = {
+struct pmx_dev spear310_pmx_emi_cs_2_3 = {
.name = "emi_cs_2_3",
.modes = pmx_emi_cs_2_3_modes,
.mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
@@ -77,7 +77,7 @@ static struct pmx_dev_mode pmx_uart1_modes[] = {
},
};
-struct pmx_dev pmx_uart1 = {
+struct pmx_dev spear310_pmx_uart1 = {
.name = "uart1",
.modes = pmx_uart1_modes,
.mode_count = ARRAY_SIZE(pmx_uart1_modes),
@@ -98,7 +98,7 @@ static struct pmx_dev_mode pmx_uart2_modes[] = {
},
};
-struct pmx_dev pmx_uart2 = {
+struct pmx_dev spear310_pmx_uart2 = {
.name = "uart2",
.modes = pmx_uart2_modes,
.mode_count = ARRAY_SIZE(pmx_uart2_modes),
@@ -119,7 +119,7 @@ static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
},
};
-struct pmx_dev pmx_uart3_4_5 = {
+struct pmx_dev spear310_pmx_uart3_4_5 = {
.name = "uart3_4_5",
.modes = pmx_uart3_4_5_modes,
.mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
@@ -140,7 +140,7 @@ static struct pmx_dev_mode pmx_fsmc_modes[] = {
},
};
-struct pmx_dev pmx_fsmc = {
+struct pmx_dev spear310_pmx_fsmc = {
.name = "fsmc",
.modes = pmx_fsmc_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_modes),
@@ -161,7 +161,7 @@ static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
},
};
-struct pmx_dev pmx_rs485_0_1 = {
+struct pmx_dev spear310_pmx_rs485_0_1 = {
.name = "rs485_0_1",
.modes = pmx_rs485_0_1_modes,
.mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
@@ -182,14 +182,14 @@ static struct pmx_dev_mode pmx_tdm0_modes[] = {
},
};
-struct pmx_dev pmx_tdm0 = {
+struct pmx_dev spear310_pmx_tdm0 = {
.name = "tdm0",
.modes = pmx_tdm0_modes,
.mode_count = ARRAY_SIZE(pmx_tdm0_modes),
};
/* pmx driver structure */
-struct pmx_driver pmx_driver;
+static struct pmx_driver pmx_driver;
/* spear3xx shared irq */
static struct shirq_dev_config shirq_ras1_config[] = {
@@ -310,7 +310,8 @@ static struct spear_shirq shirq_intrcomm_ras = {
/* Add spear310 specific devices here */
/* spear310 routines */
-void __init spear310_init(void)
+void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+ u8 pmx_dev_count)
{
void __iomem *base;
int ret = 0;
@@ -346,10 +347,13 @@ void __init spear310_init(void)
printk(KERN_ERR "Error registering Shared IRQ 4\n");
}
+ /* pmx initialization */
+ pmx_driver.mode = pmx_mode;
+ pmx_driver.devs = pmx_devs;
+ pmx_driver.devs_count = pmx_dev_count;
+
/* This fixes addresses of all pmx devices for spear310 */
spear3xx_pmx_init_addr(&pmx_driver, SPEAR310_PAD_MUX_CONFIG_REG);
-
- /* pmx initialization */
ret = pmx_register(&pmx_driver);
if (ret)
pr_err("padmux: registeration failed. err no: %d\n", ret);
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 2d7f333..9d4aadb 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -19,25 +19,25 @@
/* padmux devices to enable */
static struct pmx_dev *pmx_devs[] = {
/* spear3xx specific devices */
- &pmx_i2c,
- &pmx_ssp,
- &pmx_gpio_pin0,
- &pmx_gpio_pin1,
- &pmx_gpio_pin2,
- &pmx_gpio_pin3,
- &pmx_gpio_pin4,
- &pmx_gpio_pin5,
- &pmx_uart0,
+ &spear3xx_pmx_i2c,
+ &spear3xx_pmx_ssp,
+ &spear3xx_pmx_gpio_pin0,
+ &spear3xx_pmx_gpio_pin1,
+ &spear3xx_pmx_gpio_pin2,
+ &spear3xx_pmx_gpio_pin3,
+ &spear3xx_pmx_gpio_pin4,
+ &spear3xx_pmx_gpio_pin5,
+ &spear3xx_pmx_uart0,
/* spear310 specific devices */
- &pmx_emi_cs_0_1_4_5,
- &pmx_emi_cs_2_3,
- &pmx_uart1,
- &pmx_uart2,
- &pmx_uart3_4_5,
- &pmx_fsmc,
- &pmx_rs485_0_1,
- &pmx_tdm0,
+ &spear310_pmx_emi_cs_0_1_4_5,
+ &spear310_pmx_emi_cs_2_3,
+ &spear310_pmx_uart1,
+ &spear310_pmx_uart2,
+ &spear310_pmx_uart3_4_5,
+ &spear310_pmx_fsmc,
+ &spear310_pmx_rs485_0_1,
+ &spear310_pmx_tdm0,
};
static struct amba_device *amba_devs[] __initdata = {
@@ -58,13 +58,8 @@ static void __init spear310_evb_init(void)
{
unsigned int i;
- /* padmux initialization, must be done before spear310_init */
- pmx_driver.mode = NULL;
- pmx_driver.devs = pmx_devs;
- pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
-
/* call spear310 machine init function */
- spear310_init();
+ spear310_init(NULL, pmx_devs, ARRAY_SIZE(pmx_devs));
/* Add Platform Devices */
platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 69b9549..a99cf7c 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -24,25 +24,25 @@
#define SMALL_PRINTERS_MODE (1 << 3)
#define ALL_MODES 0xF
-struct pmx_mode auto_net_smii_mode = {
+struct pmx_mode spear320_auto_net_smii_mode = {
.id = AUTO_NET_SMII_MODE,
.name = "Automation Networking SMII Mode",
.value = 0x00,
};
-struct pmx_mode auto_net_mii_mode = {
+struct pmx_mode spear320_auto_net_mii_mode = {
.id = AUTO_NET_MII_MODE,
.name = "Automation Networking MII Mode",
.value = 0x01,
};
-struct pmx_mode auto_exp_mode = {
+struct pmx_mode spear320_auto_exp_mode = {
.id = AUTO_EXP_MODE,
.name = "Automation Expanded Mode",
.value = 0x02,
};
-struct pmx_mode small_printers_mode = {
+struct pmx_mode spear320_small_printers_mode = {
.id = SMALL_PRINTERS_MODE,
.name = "Small Printers Mode",
.value = 0x03,
@@ -65,7 +65,7 @@ static struct pmx_dev_mode pmx_clcd_modes[] = {
},
};
-struct pmx_dev pmx_clcd = {
+struct pmx_dev spear320_pmx_clcd = {
.name = "clcd",
.modes = pmx_clcd_modes,
.mode_count = ARRAY_SIZE(pmx_clcd_modes),
@@ -87,7 +87,7 @@ static struct pmx_dev_mode pmx_emi_modes[] = {
},
};
-struct pmx_dev pmx_emi = {
+struct pmx_dev spear320_pmx_emi = {
.name = "emi",
.modes = pmx_emi_modes,
.mode_count = ARRAY_SIZE(pmx_emi_modes),
@@ -109,7 +109,7 @@ static struct pmx_dev_mode pmx_fsmc_modes[] = {
},
};
-struct pmx_dev pmx_fsmc = {
+struct pmx_dev spear320_pmx_fsmc = {
.name = "fsmc",
.modes = pmx_fsmc_modes,
.mode_count = ARRAY_SIZE(pmx_fsmc_modes),
@@ -131,7 +131,7 @@ static struct pmx_dev_mode pmx_spp_modes[] = {
},
};
-struct pmx_dev pmx_spp = {
+struct pmx_dev spear320_pmx_spp = {
.name = "spp",
.modes = pmx_spp_modes,
.mode_count = ARRAY_SIZE(pmx_spp_modes),
@@ -154,7 +154,7 @@ static struct pmx_dev_mode pmx_sdhci_modes[] = {
},
};
-struct pmx_dev pmx_sdhci = {
+struct pmx_dev spear320_pmx_sdhci = {
.name = "sdhci",
.modes = pmx_sdhci_modes,
.mode_count = ARRAY_SIZE(pmx_sdhci_modes),
@@ -176,7 +176,7 @@ static struct pmx_dev_mode pmx_i2s_modes[] = {
},
};
-struct pmx_dev pmx_i2s = {
+struct pmx_dev spear320_pmx_i2s = {
.name = "i2s",
.modes = pmx_i2s_modes,
.mode_count = ARRAY_SIZE(pmx_i2s_modes),
@@ -198,7 +198,7 @@ static struct pmx_dev_mode pmx_uart1_modes[] = {
},
};
-struct pmx_dev pmx_uart1 = {
+struct pmx_dev spear320_pmx_uart1 = {
.name = "uart1",
.modes = pmx_uart1_modes,
.mode_count = ARRAY_SIZE(pmx_uart1_modes),
@@ -233,7 +233,7 @@ static struct pmx_dev_mode pmx_uart1_modem_modes[] = {
},
};
-struct pmx_dev pmx_uart1_modem = {
+struct pmx_dev spear320_pmx_uart1_modem = {
.name = "uart1_modem",
.modes = pmx_uart1_modem_modes,
.mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),
@@ -255,7 +255,7 @@ static struct pmx_dev_mode pmx_uart2_modes[] = {
},
};
-struct pmx_dev pmx_uart2 = {
+struct pmx_dev spear320_pmx_uart2 = {
.name = "uart2",
.modes = pmx_uart2_modes,
.mode_count = ARRAY_SIZE(pmx_uart2_modes),
@@ -277,7 +277,7 @@ static struct pmx_dev_mode pmx_touchscreen_modes[] = {
},
};
-struct pmx_dev pmx_touchscreen = {
+struct pmx_dev spear320_pmx_touchscreen = {
.name = "touchscreen",
.modes = pmx_touchscreen_modes,
.mode_count = ARRAY_SIZE(pmx_touchscreen_modes),
@@ -300,7 +300,7 @@ static struct pmx_dev_mode pmx_can_modes[] = {
},
};
-struct pmx_dev pmx_can = {
+struct pmx_dev spear320_pmx_can = {
.name = "can",
.modes = pmx_can_modes,
.mode_count = ARRAY_SIZE(pmx_can_modes),
@@ -322,7 +322,7 @@ static struct pmx_dev_mode pmx_sdhci_led_modes[] = {
},
};
-struct pmx_dev pmx_sdhci_led = {
+struct pmx_dev spear320_pmx_sdhci_led = {
.name = "sdhci_led",
.modes = pmx_sdhci_led_modes,
.mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),
@@ -355,7 +355,7 @@ static struct pmx_dev_mode pmx_pwm0_modes[] = {
},
};
-struct pmx_dev pmx_pwm0 = {
+struct pmx_dev spear320_pmx_pwm0 = {
.name = "pwm0",
.modes = pmx_pwm0_modes,
.mode_count = ARRAY_SIZE(pmx_pwm0_modes),
@@ -388,7 +388,7 @@ static struct pmx_dev_mode pmx_pwm1_modes[] = {
},
};
-struct pmx_dev pmx_pwm1 = {
+struct pmx_dev spear320_pmx_pwm1 = {
.name = "pwm1",
.modes = pmx_pwm1_modes,
.mode_count = ARRAY_SIZE(pmx_pwm1_modes),
@@ -421,7 +421,7 @@ static struct pmx_dev_mode pmx_pwm2_modes[] = {
},
};
-struct pmx_dev pmx_pwm2 = {
+struct pmx_dev spear320_pmx_pwm2 = {
.name = "pwm2",
.modes = pmx_pwm2_modes,
.mode_count = ARRAY_SIZE(pmx_pwm2_modes),
@@ -443,7 +443,7 @@ static struct pmx_dev_mode pmx_pwm3_modes[] = {
},
};
-struct pmx_dev pmx_pwm3 = {
+struct pmx_dev spear320_pmx_pwm3 = {
.name = "pwm3",
.modes = pmx_pwm3_modes,
.mode_count = ARRAY_SIZE(pmx_pwm3_modes),
@@ -465,7 +465,7 @@ static struct pmx_dev_mode pmx_ssp1_modes[] = {
},
};
-struct pmx_dev pmx_ssp1 = {
+struct pmx_dev spear320_pmx_ssp1 = {
.name = "ssp1",
.modes = pmx_ssp1_modes,
.mode_count = ARRAY_SIZE(pmx_ssp1_modes),
@@ -487,7 +487,7 @@ static struct pmx_dev_mode pmx_ssp2_modes[] = {
},
};
-struct pmx_dev pmx_ssp2 = {
+struct pmx_dev spear320_pmx_ssp2 = {
.name = "ssp2",
.modes = pmx_ssp2_modes,
.mode_count = ARRAY_SIZE(pmx_ssp2_modes),
@@ -509,7 +509,7 @@ static struct pmx_dev_mode pmx_mii1_modes[] = {
},
};
-struct pmx_dev pmx_mii1 = {
+struct pmx_dev spear320_pmx_mii1 = {
.name = "mii1",
.modes = pmx_mii1_modes,
.mode_count = ARRAY_SIZE(pmx_mii1_modes),
@@ -531,7 +531,7 @@ static struct pmx_dev_mode pmx_smii0_modes[] = {
},
};
-struct pmx_dev pmx_smii0 = {
+struct pmx_dev spear320_pmx_smii0 = {
.name = "smii0",
.modes = pmx_smii0_modes,
.mode_count = ARRAY_SIZE(pmx_smii0_modes),
@@ -553,7 +553,7 @@ static struct pmx_dev_mode pmx_smii1_modes[] = {
},
};
-struct pmx_dev pmx_smii1 = {
+struct pmx_dev spear320_pmx_smii1 = {
.name = "smii1",
.modes = pmx_smii1_modes,
.mode_count = ARRAY_SIZE(pmx_smii1_modes),
@@ -575,14 +575,14 @@ static struct pmx_dev_mode pmx_i2c1_modes[] = {
},
};
-struct pmx_dev pmx_i2c1 = {
+struct pmx_dev spear320_pmx_i2c1 = {
.name = "i2c1",
.modes = pmx_i2c1_modes,
.mode_count = ARRAY_SIZE(pmx_i2c1_modes),
};
/* pmx driver structure */
-struct pmx_driver pmx_driver = {
+static struct pmx_driver pmx_driver = {
.mode_reg = {.address = SPEAR320_MODE_CONFIG_REG, .mask = 0x00000007},
};
@@ -713,7 +713,8 @@ static struct spear_shirq shirq_intrcomm_ras = {
/* Add spear320 specific devices here */
/* spear320 routines */
-void __init spear320_init(void)
+void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+ u8 pmx_dev_count)
{
void __iomem *base;
int ret = 0;
@@ -743,10 +744,13 @@ void __init spear320_init(void)
printk(KERN_ERR "Error registering Shared IRQ 4\n");
}
+ /* pmx initialization */
+ pmx_driver.mode = pmx_mode;
+ pmx_driver.devs = pmx_devs;
+ pmx_driver.devs_count = pmx_dev_count;
+
/* This fixes addresses of all pmx devices for spear320 */
spear3xx_pmx_init_addr(&pmx_driver, SPEAR320_PAD_MUX_CONFIG_REG);
-
- /* pmx initialization */
ret = pmx_register(&pmx_driver);
if (ret)
pr_err("padmux: registeration failed. err no: %d\n", ret);
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 8213e4b..7e5f17f 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -19,22 +19,22 @@
/* padmux devices to enable */
static struct pmx_dev *pmx_devs[] = {
/* spear3xx specific devices */
- &pmx_i2c,
- &pmx_ssp,
- &pmx_mii,
- &pmx_uart0,
+ &spear3xx_pmx_i2c,
+ &spear3xx_pmx_ssp,
+ &spear3xx_pmx_mii,
+ &spear3xx_pmx_uart0,
/* spear320 specific devices */
- &pmx_fsmc,
- &pmx_sdhci,
- &pmx_i2s,
- &pmx_uart1,
- &pmx_uart2,
- &pmx_can,
- &pmx_pwm0,
- &pmx_pwm1,
- &pmx_pwm2,
- &pmx_mii1,
+ &spear320_pmx_fsmc,
+ &spear320_pmx_sdhci,
+ &spear320_pmx_i2s,
+ &spear320_pmx_uart1,
+ &spear320_pmx_uart2,
+ &spear320_pmx_can,
+ &spear320_pmx_pwm0,
+ &spear320_pmx_pwm1,
+ &spear320_pmx_pwm2,
+ &spear320_pmx_mii1,
};
static struct amba_device *amba_devs[] __initdata = {
@@ -55,13 +55,9 @@ static void __init spear320_evb_init(void)
{
unsigned int i;
- /* padmux initialization, must be done before spear320_init */
- pmx_driver.mode = &auto_net_mii_mode;
- pmx_driver.devs = pmx_devs;
- pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
-
/* call spear320 machine init function */
- spear320_init();
+ spear320_init(&spear320_auto_net_mii_mode, pmx_devs,
+ ARRAY_SIZE(pmx_devs));
/* Add Platform Devices */
platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 9ae7009..64dac69 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -118,7 +118,7 @@ static struct pmx_dev_mode pmx_firda_modes[] = {
},
};
-struct pmx_dev pmx_firda = {
+struct pmx_dev spear3xx_pmx_firda = {
.name = "firda",
.modes = pmx_firda_modes,
.mode_count = ARRAY_SIZE(pmx_firda_modes),
@@ -140,7 +140,7 @@ static struct pmx_dev_mode pmx_i2c_modes[] = {
},
};
-struct pmx_dev pmx_i2c = {
+struct pmx_dev spear3xx_pmx_i2c = {
.name = "i2c",
.modes = pmx_i2c_modes,
.mode_count = ARRAY_SIZE(pmx_i2c_modes),
@@ -162,7 +162,7 @@ static struct pmx_dev_mode pmx_ssp_cs_modes[] = {
},
};
-struct pmx_dev pmx_ssp_cs = {
+struct pmx_dev spear3xx_pmx_ssp_cs = {
.name = "ssp_chip_selects",
.modes = pmx_ssp_cs_modes,
.mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),
@@ -184,7 +184,7 @@ static struct pmx_dev_mode pmx_ssp_modes[] = {
},
};
-struct pmx_dev pmx_ssp = {
+struct pmx_dev spear3xx_pmx_ssp = {
.name = "ssp",
.modes = pmx_ssp_modes,
.mode_count = ARRAY_SIZE(pmx_ssp_modes),
@@ -206,7 +206,7 @@ static struct pmx_dev_mode pmx_mii_modes[] = {
},
};
-struct pmx_dev pmx_mii = {
+struct pmx_dev spear3xx_pmx_mii = {
.name = "mii",
.modes = pmx_mii_modes,
.mode_count = ARRAY_SIZE(pmx_mii_modes),
@@ -228,7 +228,7 @@ static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
},
};
-struct pmx_dev pmx_gpio_pin0 = {
+struct pmx_dev spear3xx_pmx_gpio_pin0 = {
.name = "gpio_pin0",
.modes = pmx_gpio_pin0_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),
@@ -250,7 +250,7 @@ static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
},
};
-struct pmx_dev pmx_gpio_pin1 = {
+struct pmx_dev spear3xx_pmx_gpio_pin1 = {
.name = "gpio_pin1",
.modes = pmx_gpio_pin1_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),
@@ -272,7 +272,7 @@ static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
},
};
-struct pmx_dev pmx_gpio_pin2 = {
+struct pmx_dev spear3xx_pmx_gpio_pin2 = {
.name = "gpio_pin2",
.modes = pmx_gpio_pin2_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),
@@ -294,7 +294,7 @@ static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
},
};
-struct pmx_dev pmx_gpio_pin3 = {
+struct pmx_dev spear3xx_pmx_gpio_pin3 = {
.name = "gpio_pin3",
.modes = pmx_gpio_pin3_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),
@@ -316,7 +316,7 @@ static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
},
};
-struct pmx_dev pmx_gpio_pin4 = {
+struct pmx_dev spear3xx_pmx_gpio_pin4 = {
.name = "gpio_pin4",
.modes = pmx_gpio_pin4_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),
@@ -338,7 +338,7 @@ static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
},
};
-struct pmx_dev pmx_gpio_pin5 = {
+struct pmx_dev spear3xx_pmx_gpio_pin5 = {
.name = "gpio_pin5",
.modes = pmx_gpio_pin5_modes,
.mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),
@@ -360,7 +360,7 @@ static struct pmx_dev_mode pmx_uart0_modem_modes[] = {
},
};
-struct pmx_dev pmx_uart0_modem = {
+struct pmx_dev spear3xx_pmx_uart0_modem = {
.name = "uart0_modem",
.modes = pmx_uart0_modem_modes,
.mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),
@@ -382,7 +382,7 @@ static struct pmx_dev_mode pmx_uart0_modes[] = {
},
};
-struct pmx_dev pmx_uart0 = {
+struct pmx_dev spear3xx_pmx_uart0 = {
.name = "uart0",
.modes = pmx_uart0_modes,
.mode_count = ARRAY_SIZE(pmx_uart0_modes),
@@ -404,7 +404,7 @@ static struct pmx_dev_mode pmx_timer_3_4_modes[] = {
},
};
-struct pmx_dev pmx_timer_3_4 = {
+struct pmx_dev spear3xx_pmx_timer_3_4 = {
.name = "timer_3_4",
.modes = pmx_timer_3_4_modes,
.mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),
@@ -426,7 +426,7 @@ static struct pmx_dev_mode pmx_timer_1_2_modes[] = {
},
};
-struct pmx_dev pmx_timer_1_2 = {
+struct pmx_dev spear3xx_pmx_timer_1_2 = {
.name = "timer_1_2",
.modes = pmx_timer_1_2_modes,
.mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),
@@ -449,7 +449,7 @@ static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_0_1 = {
+struct pmx_dev spear3xx_pmx_plgpio_0_1 = {
.name = "plgpio 0 and 1",
.modes = pmx_plgpio_0_1_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),
@@ -471,7 +471,7 @@ static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_2_3 = {
+struct pmx_dev spear3xx_pmx_plgpio_2_3 = {
.name = "plgpio 2 and 3",
.modes = pmx_plgpio_2_3_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),
@@ -493,7 +493,7 @@ static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_4_5 = {
+struct pmx_dev spear3xx_pmx_plgpio_4_5 = {
.name = "plgpio 4 and 5",
.modes = pmx_plgpio_4_5_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),
@@ -515,7 +515,7 @@ static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_6_9 = {
+struct pmx_dev spear3xx_pmx_plgpio_6_9 = {
.name = "plgpio 6 to 9",
.modes = pmx_plgpio_6_9_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),
@@ -537,7 +537,7 @@ static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_10_27 = {
+struct pmx_dev spear3xx_pmx_plgpio_10_27 = {
.name = "plgpio 10 to 27",
.modes = pmx_plgpio_10_27_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),
@@ -559,7 +559,7 @@ static struct pmx_dev_mode pmx_plgpio_28_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_28 = {
+struct pmx_dev spear3xx_pmx_plgpio_28 = {
.name = "plgpio 28",
.modes = pmx_plgpio_28_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),
@@ -581,7 +581,7 @@ static struct pmx_dev_mode pmx_plgpio_29_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_29 = {
+struct pmx_dev spear3xx_pmx_plgpio_29 = {
.name = "plgpio 29",
.modes = pmx_plgpio_29_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),
@@ -603,7 +603,7 @@ static struct pmx_dev_mode pmx_plgpio_30_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_30 = {
+struct pmx_dev spear3xx_pmx_plgpio_30 = {
.name = "plgpio 30",
.modes = pmx_plgpio_30_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),
@@ -625,7 +625,7 @@ static struct pmx_dev_mode pmx_plgpio_31_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_31 = {
+struct pmx_dev spear3xx_pmx_plgpio_31 = {
.name = "plgpio 31",
.modes = pmx_plgpio_31_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),
@@ -647,7 +647,7 @@ static struct pmx_dev_mode pmx_plgpio_32_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_32 = {
+struct pmx_dev spear3xx_pmx_plgpio_32 = {
.name = "plgpio 32",
.modes = pmx_plgpio_32_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),
@@ -669,7 +669,7 @@ static struct pmx_dev_mode pmx_plgpio_33_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_33 = {
+struct pmx_dev spear3xx_pmx_plgpio_33 = {
.name = "plgpio 33",
.modes = pmx_plgpio_33_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),
@@ -691,7 +691,7 @@ static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_34_36 = {
+struct pmx_dev spear3xx_pmx_plgpio_34_36 = {
.name = "plgpio 34 to 36",
.modes = pmx_plgpio_34_36_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),
@@ -713,7 +713,7 @@ static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_37_42 = {
+struct pmx_dev spear3xx_pmx_plgpio_37_42 = {
.name = "plgpio 37 to 42",
.modes = pmx_plgpio_37_42_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),
@@ -735,7 +735,7 @@ static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_43_44_47_48 = {
+struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48 = {
.name = "plgpio 43, 44, 47 and 48",
.modes = pmx_plgpio_43_44_47_48_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),
@@ -757,7 +757,7 @@ static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
},
};
-struct pmx_dev pmx_plgpio_45_46_49_50 = {
+struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = {
.name = "plgpio 45, 46, 49 and 50",
.modes = pmx_plgpio_45_46_49_50_modes,
.mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),
--
1.7.2.2
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