* [RFC PATCH 10/20] ARM: Platform dependent sched_clock() override
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
sched_clock being a (weak) global symbol, there can only be
a single implementation in the kernel, which may cause problems
on the rocky road towards supporting multiple architectures in
a single kernel image.
This patch adds a way of overriding the default sched_clock()
by extending the ARM sched_clock framework. The sched_clock()
call also becomes slightly more expensive (indirect function call).
VExpress support is updated to use that functionnality.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/Kconfig | 9 +++++++
arch/arm/include/asm/sched_clock.h | 41 +++++++++++++++++++++++++++++---
arch/arm/kernel/sched_clock.c | 23 +++++++++++++++++-
arch/arm/plat-versatile/sched-clock.c | 7 +++--
4 files changed, 72 insertions(+), 8 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 316da4b..26fde47 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -48,6 +48,14 @@ config SYS_SUPPORTS_APM_EMULATION
config HAVE_SCHED_CLOCK
bool
+config ARCH_SCHED_CLOCK
+ bool
+ help
+ Allow the default sched_clock() to be overloaded at runtime.
+ Use this option if you build a kernel for a platform with
+ multiplee sched_clock sources, one of which will be selected
+ at runtime.
+
config GENERIC_GPIO
bool
@@ -271,6 +279,7 @@ config ARCH_VEXPRESS
select ARM_TIMER_SP804
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
+ select ARCH_SCHED_CLOCK
select HAVE_CLK
select HAVE_PATA_PLATFORM
select ICST
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index c8e6ddf..27ef05e 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -21,6 +21,17 @@ struct clock_data {
#define DEFINE_CLOCK_DATA(name) struct clock_data name
+#ifdef CONFIG_ARCH_SCHED_CLOCK
+#define __DEFINE_SCHED_CLOCK_ALIAS(name)
+#else
+#define __DEFINE_SCHED_CLOCK_ALIAS(name) \
+ unsigned long long sched_clock(void) __attribute__ ((alias (#name)));
+#endif
+
+#define DEFINE_SCHED_CLOCK_FUNC(name) \
+ __DEFINE_SCHED_CLOCK_ALIAS(name) \
+ static unsigned long long notrace name(void)
+
static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
{
return (cyc * mult) >> shift;
@@ -94,20 +105,35 @@ static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
* and shift. Also setup a timer to ensure that the epoch is refreshed
* at the appropriate time interval, which will call your update
* handler.
+ *
+ * Use the _arch_ version if you want your sched_clock function to be
+ * selected at run time (if CONFIG_ARCH_SCHED_CLOCK is enabled).
*/
-void init_sched_clock(struct clock_data *, void (*)(void),
+void init_arch_sched_clock(struct clock_data *, void (*)(void),
+ unsigned long long (*)(void),
unsigned int, unsigned long);
+static inline void init_sched_clock(struct clock_data *cd,
+ void (*update)(void),
+ unsigned int bits, unsigned long rate)
+{
+ init_arch_sched_clock(cd, update, NULL, bits, rate);
+}
+
/*
* Use this initialization function rather than init_sched_clock() if
* you're using cyc_to_fixed_sched_clock, which will warn if your
* constants are incorrect.
+ *
+ * Use the _arch_ version if you want your sched_clock function to be
+ * selected at run time (if CONFIG_ARCH_SCHED_CLOCK is enabled).
*/
-static inline void init_fixed_sched_clock(struct clock_data *cd,
- void (*update)(void), unsigned int bits, unsigned long rate,
+static inline void init_fixed_arch_sched_clock(struct clock_data *cd,
+ void (*update)(void), unsigned long long (*sched_clock_fn)(void),
+ unsigned int bits, unsigned long rate,
u32 mult, u32 shift)
{
- init_sched_clock(cd, update, bits, rate);
+ init_arch_sched_clock(cd, update, sched_clock_fn, bits, rate);
if (cd->mult != mult || cd->shift != shift) {
pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n"
"sched_clock: fix multiply/shift to avoid scheduler hiccups\n",
@@ -115,6 +141,13 @@ static inline void init_fixed_sched_clock(struct clock_data *cd,
}
}
+static inline void init_fixed_sched_clock(struct clock_data *cd,
+ void (*update)(void), unsigned int bits, unsigned long rate,
+ u32 mult, u32 shift)
+{
+ init_fixed_arch_sched_clock(cd, update, NULL, bits, rate, mult, shift);
+}
+
extern void sched_clock_postinit(void);
#endif
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9a46370..3c1d08b 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -18,13 +18,29 @@ static void sched_clock_poll(unsigned long wrap_ticks);
static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
static void (*sched_clock_update_fn)(void);
+#ifdef CONFIG_ARCH_SCHED_CLOCK
+static unsigned long long notrace default_sched_clock(void)
+{
+ return (unsigned long long)(jiffies - INITIAL_JIFFIES)
+ * (NSEC_PER_SEC / HZ);
+}
+
+static unsigned long long __read_mostly (*sched_clock_fn)(void) = default_sched_clock;
+
+unsigned long long notrace sched_clock(void)
+{
+ return sched_clock_fn();
+}
+#endif
+
static void sched_clock_poll(unsigned long wrap_ticks)
{
mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
sched_clock_update_fn();
}
-void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
+void __init init_arch_sched_clock(struct clock_data *cd, void (*update)(void),
+ unsigned long long (*arch_sched_clock_fn)(void),
unsigned int clock_bits, unsigned long rate)
{
unsigned long r, w;
@@ -33,6 +49,11 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
sched_clock_update_fn = update;
+#ifdef CONFIG_ARCH_SCHED_CLOCK
+ if (arch_sched_clock_fn)
+ sched_clock_fn = arch_sched_clock_fn;
+#endif
+
/* calculate the mult/shift to convert counter ticks to ns. */
clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0);
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 3d6a4c2..d6ebd0f 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -34,7 +34,7 @@ static void __iomem *ctr;
#define SC_MULT 2796202667u
#define SC_SHIFT 26
-unsigned long long notrace sched_clock(void)
+DEFINE_SCHED_CLOCK_FUNC(versatile_sched_clock)
{
if (ctr) {
u32 cyc = readl(ctr);
@@ -53,6 +53,7 @@ static void notrace versatile_update_sched_clock(void)
void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
{
ctr = reg;
- init_fixed_sched_clock(&cd, versatile_update_sched_clock,
- 32, rate, SC_MULT, SC_SHIFT);
+ init_fixed_arch_sched_clock(&cd, versatile_update_sched_clock,
+ versatile_sched_clock,
+ 32, rate, SC_MULT, SC_SHIFT);
}
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 11/20] ARM: architected timers: Add A15 specific sched_clock implementation
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Provide an A15 sched_clock implementation using the virtual counter,
which is thought to be more useful than the physical one in a
virtualised environment, as it can offset the time spent in another
VM or the hypervisor.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/arch_timer.h | 4 ++--
arch/arm/kernel/arch_timer.c | 32 +++++++++++++++++++++++++++++++-
2 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index f98263c..9fa0556 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -2,9 +2,9 @@
#define __ASMARM_ARCH_TIMER_H
#ifdef CONFIG_HAVE_ARCH_TIMERS
-int arch_timer_register_setup(void (*setup)(struct clock_event_device *));
+int arch_timer_register_setup(int (*setup)(struct clock_event_device *));
#else
-static inline int arch_timer_register_setup(void (*setup)(struct clock_event_device *))
+static inline int arch_timer_register_setup(int (*setup)(struct clock_event_device *))
{
return -ENODEV;
}
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index bc05604..fe55919 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -20,10 +20,13 @@
#include <asm/cputype.h>
#include <asm/localtimer.h>
+#include <asm/sched_clock.h>
#include <asm/hardware/gic.h>
static unsigned long arch_timer_rate;
+static DEFINE_CLOCK_DATA(cd);
+
/*
* Architected system timer support.
*/
@@ -201,6 +204,30 @@ static struct clocksource clocksource_counter = {
.flags = (CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_VALID_FOR_HRES),
};
+static u32 arch_counter_get_cntvct32(void)
+{
+ cycle_t cntvct;
+
+ cntvct = arch_counter_get_cntvct();
+
+ /*
+ * The sched_clock infrastructure only knows about counters
+ * with at most 32bits. Forget about the upper 24 bits for the
+ * time being...
+ */
+ return (u32)(cntvct & (u32)~0);
+}
+
+DEFINE_SCHED_CLOCK_FUNC(arch_timer_sched_clock)
+{
+ return cyc_to_sched_clock(&cd, arch_counter_get_cntvct32(), (u32)~0);
+}
+
+static void notrace arch_timer_update_sched_clock(void)
+{
+ update_sched_clock(&cd, arch_counter_get_cntvct32(), (u32)~0);
+}
+
static int __init arch_timer_clocksource_init(void)
{
struct clocksource *cs = &clocksource_counter;
@@ -209,10 +236,13 @@ static int __init arch_timer_clocksource_init(void)
clocksource_register_hz(cs, arch_timer_rate);
+ init_arch_sched_clock(&cd, arch_timer_update_sched_clock,
+ arch_timer_sched_clock, 32, arch_timer_rate);
+
return 0;
}
-int __init arch_timer_register_setup(void (*setup)(struct clock_event_device *))
+int __init arch_timer_register_setup(int (*setup)(struct clock_event_device *))
{
if (!arch_timer_available())
return -ENODEV;
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 12/20] ARM: versatile/vexpress: rework timer support
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Dynamically register the TWD setup function.
For vexpress, give preference to architected timers over SP804 timers
and versatile sched_clock implementation, if available.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-realview/realview_eb.c | 4 ++-
arch/arm/mach-realview/realview_pb11mp.c | 4 ++-
arch/arm/mach-realview/realview_pbx.c | 5 ++-
arch/arm/mach-vexpress/v2m.c | 29 ++++++++++++++++++++-
arch/arm/plat-versatile/include/plat/localtimer.h | 9 ++++++
arch/arm/plat-versatile/localtimer.c | 10 ++++++-
6 files changed, 55 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/plat-versatile/include/plat/localtimer.h
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 2ecc1d9..3a0900f 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -45,6 +45,8 @@
#include <mach/board-eb.h>
#include <mach/irqs.h>
+#include <plat/localtimer.h>
+
#include "core.h"
static struct map_desc realview_eb_io_desc[] __initdata = {
@@ -402,7 +404,7 @@ static void __init realview_eb_timer_init(void)
if (core_tile_eb11mp() || core_tile_a9mp()) {
#ifdef CONFIG_LOCAL_TIMERS
- twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
+ versatile_local_timer_init(__io_address(REALVIEW_EB11MP_TWD_BASE));
#endif
timer_irq = IRQ_EB11MP_TIMER0_1;
} else
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index b2985fc..76da67d 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -46,6 +46,8 @@
#include <mach/board-pb11mp.h>
#include <mach/irqs.h>
+#include <plat/localtimer.h>
+
#include "core.h"
static struct map_desc realview_pb11mp_io_desc[] __initdata = {
@@ -306,7 +308,7 @@ static void __init realview_pb11mp_timer_init(void)
timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
#ifdef CONFIG_LOCAL_TIMERS
- twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
+ versatile_local_timer_init(__io_address(REALVIEW_TC11MP_TWD_BASE));
#endif
realview_timer_init(IRQ_TC11MP_TIMER0_1);
}
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 92ace2c..280befd 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -31,7 +31,6 @@
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
-#include <asm/smp_twd.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
@@ -44,6 +43,8 @@
#include <mach/board-pbx.h>
#include <mach/irqs.h>
+#include <plat/localtimer.h>
+
#include "core.h"
static struct map_desc realview_pbx_io_desc[] __initdata = {
@@ -310,7 +311,7 @@ static void __init realview_pbx_timer_init(void)
#ifdef CONFIG_LOCAL_TIMERS
if (core_tile_pbx11mp() || core_tile_pbxa9mp())
- twd_base = __io_address(REALVIEW_PBX_TILE_TWD_BASE);
+ versatile_local_timer_init(__io_address(REALVIEW_PBX_TILE_TWD_BASE));
#endif
realview_timer_init(IRQ_PBX_TIMER0_1);
}
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index ba46e8e..9fa5ad6 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -16,6 +16,8 @@
#include <asm/mach-types.h>
#include <asm/sizes.h>
+#include <asm/localtimer.h>
+#include <asm/arch_timer.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
@@ -28,6 +30,7 @@
#include <mach/motherboard.h>
#include <plat/sched_clock.h>
+#include <plat/localtimer.h>
#include "core.h"
@@ -49,13 +52,37 @@ static struct map_desc v2m_io_desc[] __initdata = {
static void __init v2m_init_early(void)
{
ct_desc->init_early();
- versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
+}
+
+static int __cpuinit v2m_arch_timer_setup(struct clock_event_device *evt)
+{
+ versatile_local_timer_setup(evt);
+
+ /*
+ * Enable PPI 30 in case we're running in normal mode instead
+ * of secure mode. The timer has been stopped in the pre_setup()
+ * phase, so it is safe to enable the interrupt here.
+ */
+ gic_enable_ppi(30);
+
+ return 0;
}
static void __init v2m_timer_init(void)
{
u32 scctrl;
+ /*
+ * Try architected timers first. If they are not available,
+ * fallback to TWD and versatile sched_clock.
+ */
+ if (!arch_timer_register_setup(v2m_arch_timer_setup))
+ return;
+
+ versatile_local_timer_init(NULL);
+
+ versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
+
/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
diff --git a/arch/arm/plat-versatile/include/plat/localtimer.h b/arch/arm/plat-versatile/include/plat/localtimer.h
new file mode 100644
index 0000000..c6cdf72
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/localtimer.h
@@ -0,0 +1,9 @@
+#ifndef ARM_PLAT_LOCALTIMER_H
+#define ARM_PLAT_LOCALTIMER_H
+
+#include <linux/clockchips.h>
+
+void versatile_local_timer_setup(struct clock_event_device *evt);
+void versatile_local_timer_init(void __iomem *base);
+
+#endif
diff --git a/arch/arm/plat-versatile/localtimer.c b/arch/arm/plat-versatile/localtimer.c
index 93ea3e3..01025ea 100644
--- a/arch/arm/plat-versatile/localtimer.c
+++ b/arch/arm/plat-versatile/localtimer.c
@@ -11,14 +11,22 @@
#include <linux/init.h>
#include <linux/clockchips.h>
+#include <asm/smp_twd.h>
#include <asm/localtimer.h>
#include <mach/irqs.h>
/*
* Setup the local clock events for a CPU.
*/
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
+int __cpuinit versatile_local_timer_setup(struct clock_event_device *evt)
{
evt->irq = IRQ_LOCALTIMER;
return 0;
}
+
+void __init versatile_local_timer_init(void __iomem *base)
+{
+ if (base)
+ twd_base = base;
+ twd_timer_register_setup(versatile_local_timer_setup);
+}
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 13/20] ARM: msm: dynamically register local timer setup function
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-msm/timer.c | 22 +++++++++++++++++++---
1 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 56f920c..e029363 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -22,8 +22,10 @@
#include <linux/delay.h>
#include <linux/io.h>
+#include <asm/localtimer.h>
#include <asm/mach/time.h>
#include <mach/msm_iomap.h>
+
#include <mach/cpu.h>
#define TIMER_MATCH_VAL 0x0000
@@ -200,6 +202,19 @@ static struct msm_clock msm_clocks[] = {
}
};
+#ifdef CONFIG_SMP
+static void __cpuinit msm_local_timer_setup(struct clock_event_device *evt);
+static int msm_local_timer_ack(void);
+
+static struct local_timer_ops msm_timer_ops = {
+ .setup = msm_local_timer_setup,
+ .ack = msm_local_timer_ack,
+};
+#define msm_timer_ops_ptr (&msm_timer_ops)
+#else
+#define msm_timer_ops_ptr NULL
+#endif
+
static void __init msm_timer_init(void)
{
int i;
@@ -228,6 +243,8 @@ static void __init msm_timer_init(void)
writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
#endif
+ percpu_timer_register(msm_timer_ops_ptr);
+
for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) {
struct msm_clock *clock = &msm_clocks[i];
struct clock_event_device *ce = &clock->clockevent;
@@ -263,7 +280,7 @@ static void __init msm_timer_init(void)
}
#ifdef CONFIG_SMP
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
+static void __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
{
struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
@@ -295,10 +312,9 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
gic_enable_ppi(clock->irq.irq);
clockevents_register_device(evt);
- return 0;
}
-inline int local_timer_ack(void)
+static inline int mem_local_timer_ack(void)
{
return 1;
}
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 14/20] ARM: omap4: dynamically register local timer setup function
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-omap2/Makefile | 1 -
arch/arm/mach-omap2/timer-gp.c | 12 +++++++++++-
arch/arm/mach-omap2/timer-mpu.c | 36 ------------------------------------
3 files changed, 11 insertions(+), 38 deletions(-)
delete mode 100644 arch/arm/mach-omap2/timer-mpu.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e61eaf9..c87e4b1 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -22,7 +22,6 @@ obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
# SMP support ONLY available for OMAP4
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
-obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 3b9cf85..ed87878 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -39,6 +39,7 @@
#include <asm/mach/time.h>
#include <plat/dmtimer.h>
#include <asm/localtimer.h>
+#include <asm/smp_twd.h>
#include <asm/sched_clock.h>
#include <plat/common.h>
#include <plat/omap_hwmod.h>
@@ -247,12 +248,21 @@ static void __init omap2_gp_clocksource_init(void)
}
#endif
+#ifdef CONFIG_LOCAL_TIMERS
+static void __cpuinit omap4_local_timer_setup(struct clock_event_device *evt)
+{
+ evt->irq = OMAP44XX_IRQ_LOCALTIMER;
+}
+#endif
+
static void __init omap2_gp_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
- if (cpu_is_omap44xx()) {
+ if (cpu_is_omap44xx() && omap_rev() != OMAP4430_REV_ES1_0) {
twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
BUG_ON(!twd_base);
+
+ twd_timer_register_setup(omap4_local_timer_setup);
}
#endif
omap_dm_timer_init();
diff --git a/arch/arm/mach-omap2/timer-mpu.c b/arch/arm/mach-omap2/timer-mpu.c
deleted file mode 100644
index 02feaff..0000000
--- a/arch/arm/mach-omap2/timer-mpu.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * The MPU local timer source file. In OMAP4, both cortex-a9 cores have
- * own timer in it's MPU domain. These timers will be driving the
- * linux kernel SMP tick framework when active. These timers are not
- * part of the wake up domain.
- *
- * Copyright (C) 2009 Texas Instruments, Inc.
- *
- * Author:
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This file is based on arm realview smp platform file.
- * Copyright (C) 2002 ARM Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/clockchips.h>
-#include <asm/irq.h>
-#include <asm/localtimer.h>
-
-/*
- * Setup the local clock events for a CPU.
- */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- /* Local timers are not supprted on OMAP4430 ES1.0 */
- if (omap_rev() == OMAP4430_REV_ES1_0)
- return -ENXIO;
-
- evt->irq = OMAP44XX_IRQ_LOCALTIMER;
- return 0;
-}
-
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 15/20] ARM: exynos4: dynamically register local timer setup function
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-exynos4/Makefile | 1 -
arch/arm/mach-exynos4/localtimer.c | 25 -------------------------
arch/arm/mach-exynos4/time.c | 10 ++++++++++
3 files changed, 10 insertions(+), 26 deletions(-)
delete mode 100644 arch/arm/mach-exynos4/localtimer.c
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 0558235..0d8880e 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -17,7 +17,6 @@ obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o time.o gpiolib.o irq-eint.o dma.o
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
-obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
# machine support
diff --git a/arch/arm/mach-exynos4/localtimer.c b/arch/arm/mach-exynos4/localtimer.c
deleted file mode 100644
index 9d9be20..0000000
--- a/arch/arm/mach-exynos4/localtimer.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/* linux/arch/arm/mach-exynos4/localtimer.c
- *
- * Cloned from linux/arch/arm/mach-realview/localtimer.c
- *
- * Copyright (C) 2002 ARM Ltd.
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/clockchips.h>
-
-#include <asm/irq.h>
-#include <asm/localtimer.h>
-
-/*
- * Setup the local clock events for a CPU.
- */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- evt->irq = IRQ_LOCALTIMER;
- return 0;
-}
diff --git a/arch/arm/mach-exynos4/time.c b/arch/arm/mach-exynos4/time.c
index e30ac70..6f3682e 100644
--- a/arch/arm/mach-exynos4/time.c
+++ b/arch/arm/mach-exynos4/time.c
@@ -19,9 +19,11 @@
#include <linux/clockchips.h>
#include <linux/platform_device.h>
+#include <asm/localtimer.h>
#include <asm/smp_twd.h>
#include <mach/map.h>
+#include <mach/irqs.h>
#include <plat/regs-timer.h>
#include <asm/mach/time.h>
@@ -267,10 +269,18 @@ static void __init exynos4_timer_resources(void)
clk_enable(tin4);
}
+#ifdef CONFIG_LOCAL_TIMERS
+static void __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
+{
+ evt->irq = IRQ_LOCALTIMER;
+}
+#endif
+
static void __init exynos4_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
twd_base = S5P_VA_TWD;
+ twd_timer_register_setup(exynos4_local_timer_setup);
#endif
exynos4_timer_resources();
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 16/20] ARM: shmobile: dynamically register local timer setup function
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-shmobile/Makefile | 1 -
arch/arm/mach-shmobile/localtimer.c | 25 -------------------------
arch/arm/mach-shmobile/timer.c | 12 ++++++++++++
3 files changed, 12 insertions(+), 26 deletions(-)
delete mode 100644 arch/arm/mach-shmobile/localtimer.c
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index e2507f6..290a232 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
# SMP objects
smp-y := platsmp.o headsmp.o
smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-smp-$(CONFIG_LOCAL_TIMERS) += localtimer.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o
# Pinmux setup
diff --git a/arch/arm/mach-shmobile/localtimer.c b/arch/arm/mach-shmobile/localtimer.c
deleted file mode 100644
index a4c4e8b..0000000
--- a/arch/arm/mach-shmobile/localtimer.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * SMP support for R-Mobile / SH-Mobile - local timer portion
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * Based on vexpress, Copyright (C) 2002 ARM Ltd, All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/clockchips.h>
-#include <asm/smp_twd.h>
-#include <asm/localtimer.h>
-
-/*
- * Setup the local clock events for a CPU.
- */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- evt->irq = 29;
- return 0;
-}
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 895794b..3256b18 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -19,6 +19,8 @@
*
*/
#include <linux/platform_device.h>
+#include <asm/localtimer.h>
+#include <asm/smp_twd.h>
#include <asm/mach/time.h>
static void __init shmobile_late_time_init(void)
@@ -36,8 +38,18 @@ static void __init shmobile_late_time_init(void)
early_platform_driver_probe("earlytimer", 2, 0);
}
+#ifdef CONFIG_LOCAL_TIMERS
+static int __cpuinit shmobile_local_timer_setup(struct clock_event_device *evt)
+{
+ evt->irq = 29;
+}
+#else
+#define shmobile_local_timer_setup NULL
+#endif
+
static void __init shmobile_timer_init(void)
{
+ twd_timer_register_setup(shmobile_local_timer_setup);
late_time_init = shmobile_late_time_init;
}
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 17/20] ARM: tegra: dynamically register local timer setup function
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Cc: Colin Cross <ccross@android.com>
Cc: Erik Gilling <konkers@android.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-tegra/Makefile | 2 +-
arch/arm/mach-tegra/localtimer.c | 24 ------------------------
arch/arm/mach-tegra/timer.c | 10 ++++++++++
3 files changed, 11 insertions(+), 25 deletions(-)
delete mode 100644 arch/arm/mach-tegra/localtimer.c
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9bf39fa..b3b387a 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o
-obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o
+obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o
obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
diff --git a/arch/arm/mach-tegra/localtimer.c b/arch/arm/mach-tegra/localtimer.c
deleted file mode 100644
index aaabad8..0000000
--- a/arch/arm/mach-tegra/localtimer.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-tegra/localtimer.c
- *
- * Copyright (C) 2002 ARM Ltd.
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/clockchips.h>
-
-#include <asm/irq.h>
-#include <asm/localtimer.h>
-
-/*
- * Setup the local clock events for a CPU.
- */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- evt->irq = IRQ_LOCALTIMER;
- return 0;
-}
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 0fcb1eb..df7e590 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -30,6 +30,7 @@
#include <asm/mach/time.h>
#include <asm/localtimer.h>
+#include <asm/smp_twd.h>
#include <asm/sched_clock.h>
#include <mach/iomap.h>
@@ -192,6 +193,13 @@ static struct irqaction tegra_timer_irq = {
.irq = INT_TMR3,
};
+#ifdef CONFIG_HAVE_ARM_TWD
+static void __cpuinit tegra_local_timer_setup(struct clock_event_device *evt)
+{
+ evt->irq = IRQ_LOCALTIMER;
+}
+#endif
+
static void __init tegra_init_timer(void)
{
struct clk *clk;
@@ -212,6 +220,8 @@ static void __init tegra_init_timer(void)
#ifdef CONFIG_HAVE_ARM_TWD
twd_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x600);
+
+ twd_timer_register_setup(tegra_local_timer_setup);
#endif
switch (rate) {
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 18/20] ARM: ux500: dynamically register local timer setup function
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-ux500/Makefile | 1 -
arch/arm/mach-ux500/cpu.c | 12 ++++++++++++
arch/arm/mach-ux500/localtimer.c | 26 --------------------------
3 files changed, 12 insertions(+), 27 deletions(-)
delete mode 100644 arch/arm/mach-ux500/localtimer.c
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index b549a8f..224bc74 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_MACH_U8500) += board-mop500.o board-mop500-sdi.o \
obj-$(CONFIG_MACH_U5500) += board-u5500.o board-u5500-sdi.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_U5500_MODEM_IRQ) += modem-irq-db5500.o
obj-$(CONFIG_U5500_MBOX) += mbox-db5500.o
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 5a43107..e043d47 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -8,12 +8,15 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk.h>
+#include <linux/clockchips.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
+#include <asm/irq.h>
#include <asm/localtimer.h>
+#include <asm/smp_twd.h>
#include <plat/mtu.h>
#include <mach/hardware.h>
@@ -115,6 +118,13 @@ static int ux500_l2x0_init(void)
early_initcall(ux500_l2x0_init);
#endif
+#ifdef CONFIG_LOCAL_TIMERS
+static void __cpuinit ux500_local_timer_setup(struct clock_event_device *evt)
+{
+ evt->irq = IRQ_LOCALTIMER;
+}
+#endif
+
static void __init ux500_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
@@ -125,6 +135,8 @@ static void __init ux500_timer_init(void)
twd_base = __io_address(U8500_TWD_BASE);
else
ux500_unknown_soc();
+
+ twd_timer_register_setup(ux500_local_timer_setup);
#endif
if (cpu_is_u5500())
mtu_base = __io_address(U5500_MTU0_BASE);
diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c
deleted file mode 100644
index c648725..0000000
--- a/arch/arm/mach-ux500/localtimer.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2008-2009 ST-Ericsson
- * Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
- *
- * This file is heavily based on relaview platform, almost a copy.
- *
- * Copyright (C) 2002 ARM Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/clockchips.h>
-
-#include <asm/irq.h>
-#include <asm/localtimer.h>
-
-/*
- * Setup the local clock events for a CPU.
- */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- evt->irq = IRQ_LOCALTIMER;
- return 0;
-}
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 19/20] ARM: simplify percpu_timer_setup
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
Now that all in-tree providers of local_timer_setup() are dynamically
registering their timers with the per cpu timer code, remove the
legacy timer selection code.
If no local timer is provided, a broadcast timer will be used
as a fallback.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/localtimer.h | 5 -----
arch/arm/include/asm/smp_twd.h | 8 +-------
arch/arm/kernel/percpu_timer.c | 19 +------------------
arch/arm/kernel/smp_twd.c | 12 ++----------
4 files changed, 4 insertions(+), 40 deletions(-)
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h
index 8988c50..d47a0cd 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -43,11 +43,6 @@ struct local_timer_ops {
#ifdef CONFIG_LOCAL_TIMERS
/*
- * Setup a local timer interrupt for a CPU.
- */
-int local_timer_setup(struct clock_event_device *);
-
-/*
* Register a local timer.
*/
void percpu_timer_register(struct local_timer_ops *);
diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h
index d2abe52..2c01220 100644
--- a/arch/arm/include/asm/smp_twd.h
+++ b/arch/arm/include/asm/smp_twd.h
@@ -23,15 +23,9 @@
extern void __iomem *twd_base;
#ifdef CONFIG_HAVE_ARM_TWD
-struct local_timer_ops *local_timer_get_twd_ops(void);
int twd_timer_register_setup(int (*setup)(struct clock_event_device *));
#else
-static inline struct local_timer_ops *local_timer_get_twd_ops(void)
-{
- return NULL;
-}
-
-static inline int twd_timer_register_setup(int (*setup)(struct clock_event_device *))
+static inline int twd_timer_register_setup(void (*setup)(struct clock_event_device *))
{
return -ENODEV;
}
diff --git a/arch/arm/kernel/percpu_timer.c b/arch/arm/kernel/percpu_timer.c
index 5992fae..85af863 100644
--- a/arch/arm/kernel/percpu_timer.c
+++ b/arch/arm/kernel/percpu_timer.c
@@ -48,12 +48,7 @@ static struct local_timer_ops broadcast_timer_ops = {
.setup = broadcast_timer_setup,
};
-static struct local_timer_ops *timer_ops;
-
-int __attribute__ ((weak)) local_timer_setup(struct clock_event_device *evt)
-{
- return -ENXIO;
-}
+static struct local_timer_ops *timer_ops = &broadcast_timer_ops;
void percpu_timer_register(struct local_timer_ops *ops)
{
@@ -124,18 +119,6 @@ void __cpuinit percpu_timer_setup(void)
if (evt->name)
return;
- /*
- * All this can go away once we've migrated all users to
- * properly register the timer they use, and broadcast can
- * become the fallback.
- */
- if (!timer_ops)
- timer_ops = local_timer_get_twd_ops();
- if (!timer_ops)
- timer_ops = &broadcast_timer_ops;
- if (!timer_ops->plat_setup)
- timer_ops->plat_setup = local_timer_setup;
-
evt->cpumask = cpumask_of(cpu);
if (timer_ops->pre_setup)
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 4fdfb85..e0bb094 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -149,20 +149,12 @@ static struct local_timer_ops twd_timer_ops = {
.ack = twd_timer_ack,
};
-struct local_timer_ops *local_timer_get_twd_ops(void)
+int __init twd_timer_register_setup(int (*setup)(struct clock_event_device *))
{
if (!twd_base) {
pr_warn("TWD base address not set\n");
- return NULL;
- }
-
- return &twd_timer_ops;
-}
-
-int __init twd_timer_register_setup(int (*setup)(struct clock_event_device *))
-{
- if (!twd_base)
return -ENODEV;
+ }
percpu_timer_register_setup(&twd_timer_ops, setup);
return 0;
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 20/20] ARM: simplify percpu_timer_ack
From: Marc Zyngier @ 2011-03-02 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299084806-16546-1-git-send-email-marc.zyngier@arm.com>
There is no provider of local_timer_ack anymore after the conversion
of msm to the percpu_timer interface. Remove the weak local_timer_ack
symbol and directly call percpu_timer_ack.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/kernel/percpu_timer.c | 8 +-------
1 files changed, 1 insertions(+), 7 deletions(-)
diff --git a/arch/arm/kernel/percpu_timer.c b/arch/arm/kernel/percpu_timer.c
index 85af863..6e1942b 100644
--- a/arch/arm/kernel/percpu_timer.c
+++ b/arch/arm/kernel/percpu_timer.c
@@ -60,24 +60,18 @@ void percpu_timer_register(struct local_timer_ops *ops)
*
* If a local timer interrupt has occurred, acknowledge and return 1.
* Otherwise, return 0.
- *
- * This can be overloaded by platform code that doesn't provide its
- * timer in timer_fns way (msm at the moment). Once all platforms have
- * migrated, the weak alias can be removed.
*/
static int percpu_timer_ack(void)
{
return timer_ops->ack();
}
-int local_timer_ack(void) __attribute__ ((weak, alias("percpu_timer_ack")));
-
asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
int cpu = smp_processor_id();
- if (local_timer_ack()) {
+ if (percpu_timer_ack()) {
__inc_irq_stat(cpu, local_timer_irqs);
percpu_timer_run();
}
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 15/18] omap3+: sr: disable spamming interrupts
From: Nishanth Menon @ 2011-03-02 17:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6E49E9.1020307@ru.mvista.com>
Sergei Shtylyov wrote, on 03/02/2011 07:15 PM:
[...]
>> diff --git a/arch/arm/mach-omap2/smartreflex.c
>> b/arch/arm/mach-omap2/smartreflex.c
>> index 49a04ea..d62da3d 100644
>> --- a/arch/arm/mach-omap2/smartreflex.c
>> +++ b/arch/arm/mach-omap2/smartreflex.c
>> @@ -209,8 +209,16 @@ static irqreturn_t sr_interrupt(int irq, void *data)
>> value = irqstat_to_notifier_v2(status);
>> }
>>
>> - if (sr_class->notify)
>> - sr_class->notify(sr_info->voltdm, value);
>> + /* Attempt some resemblence of recovery! */
>
> Resemblance?
arrgh.. thanks for catching :)
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH v2 10/18] omap3+: sr: call handler with interrupt disabled
From: Nishanth Menon @ 2011-03-02 17:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6E4866.6070107@ru.mvista.com>
Sergei Shtylyov wrote, on 03/02/2011 07:08 PM:
> Hello.
>
> On 02-03-2011 13:55, Nishanth Menon wrote:
>
>> Request the handler irq such that there is no nesting for calls.
>> the notifiers are not expected to be nested, further the interrupt
>> events for status change should be handled prior to the next event
>> else there is a risk of loosing events.
>
>> Signed-off-by: Nishanth Menon<nm@ti.com>
>> ---
>> arch/arm/mach-omap2/smartreflex.c | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>
>> diff --git a/arch/arm/mach-omap2/smartreflex.c
>> b/arch/arm/mach-omap2/smartreflex.c
>> index 99e4c4f..a4e9f2d 100644
>> --- a/arch/arm/mach-omap2/smartreflex.c
>> +++ b/arch/arm/mach-omap2/smartreflex.c
>> @@ -278,7 +278,7 @@ static int sr_late_init(struct omap_sr *sr_info)
>> goto error;
>> }
>> ret = request_irq(sr_info->irq, sr_interrupt,
>> - 0, name, (void *)sr_info);
>> + IRQF_DISABLED, name, (void *)sr_info);
>
> Isn't this flag a nop now?
thanks. hmm...
Documentation/feature-removal-schedule.txt says so as well.. I guess I
was just being paranoid (again?).
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH 6/6] ARM: nmk: update GPIO chained IRQ handler to use EOI in parent chip
From: Thomas Gleixner @ 2011-03-02 17:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <001301cbd8ef$29403c10$7bc0b430$@deacon@arm.com>
On Wed, 2 Mar 2011, Will Deacon wrote:
> Hi Thomas,
>
> > Can you please take the time and explain me the difference of the
> > following:
> >
> > irqchip1.c
> >
> > struct irq_chip1;
> >
> > handle_primary_irq(int irq, struct irq_desc *desc)
> > {
> > chip->irq_ack();
> > desc->demux();
> > }
> >
> > init()
> > {
> > irq_set_chip(PRIMARY_IRQ, &irq_chip1);
> > irq_set_primary_handler(PRIMARY_IRQ, handle_primary_irq);
> > }
>
> I think with this approach you get the exact opposite problem; that
> is the primary irq_chip doesn't know which IRQs are going to be
> demuxed so it cannot know at init time which IRQs need their primary
> handler set. Is the idea that you set_primary_handler for all IRQs,
> stash that in the descriptor somewhere and then replace handle_irq
> with the primary handler when a demux handler is registered?
>
> I guess I'm missing something here,
No, I missed that. Darn, yes this would need storing the
primary_handler in some separate pointer or having a callback into the
chip implementation to make this fully distangled.
Grmbl.
tglx
^ permalink raw reply
* [PATCH 1/1] davinci: changed SRAM allocator to shared ram.
From: Nori, Sekhar @ 2011-03-02 17:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <25DBF349769A4CF7B883D6D7FF01AD70@subhasishg>
Hi Subhasish,
On Sat, Feb 26, 2011 at 17:42:39, Subhasish Ghosh wrote:
> Hi Sekhar,
>
> I tried this using MMC and Kelvin's suggestions, but it never came back.
> Here is a log:
Was this result with or without this patch applied?
>
> root at arago:~# rtcwake -d /dev/rtc0 -s 20 -m mem
> wakeup from "mem" at Tue Apr 21 14:31:13 2009
> PM: Syncing filesystems ... done.
> Freezing user space processes ... (elapsed 0.01 seconds) done.
> Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
> Suspending console(s) (use no_console_suspend to debug)
>
> From the Kconfig I had enabled RTC_DRV_OMAP, CONFIG_PM, CONFIG_SUSPEND.
Nothing stands out from these logs. One thing to
verify is if the RTC Alarm interrupt is really
working by using the test program present in the
Documentation/ folder.
Anyway, the easiest way for you to move quickly is
to use ramdisk so you can bypass all driver specific
issues.
Thanks,
Sekhar
^ permalink raw reply
* [PATCHv1] ARM: imx: Add support for low power suspend on MX51.
From: Dinh.Nguyen at freescale.com @ 2011-03-02 17:17 UTC (permalink / raw)
To: linux-arm-kernel
From: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Adds initial low power suspend functionality to MX51.
Supports "mem" and "standby" modes.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
---
arch/arm/mach-mx5/Makefile | 1 +
arch/arm/mach-mx5/pm.c | 75 ++++++++++++++++++++++++++++++++++
arch/arm/plat-mxc/include/mach/mxc.h | 1 +
3 files changed, 77 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-mx5/pm.c
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 4f63048..7f9435d 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -6,6 +6,7 @@
obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o
obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
+obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
diff --git a/arch/arm/mach-mx5/pm.c b/arch/arm/mach-mx5/pm.c
new file mode 100644
index 0000000..137d204
--- /dev/null
+++ b/arch/arm/mach-mx5/pm.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <linux/suspend.h>
+#include <asm/mach/map.h>
+#include <mach/system.h>
+#include "crm_regs.h"
+
+static int mx5_suspend_enter(suspend_state_t state)
+{
+ u32 plat_lpc, arm_srpgcr, ccm_clpcr;
+
+ /* always allow platform to issue a deep sleep mode request */
+ plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
+ ~(MXC_CORTEXA8_PLAT_LPC_DSM);
+ ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
+ arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
+
+ switch (state) {
+ case PM_SUSPEND_MEM:
+ ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET);
+ ccm_clpcr |= (0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET);
+ ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
+ ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
+ break;
+ case PM_SUSPEND_STANDBY:
+ ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET);
+ ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
+ ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
+ | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
+ arm_srpgcr |= MXC_SRPGCR_PCR;
+
+ __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
+ __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
+ __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
+ __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
+
+ if (tzic_enable_wake(0) != 0)
+ return -EAGAIN;
+
+ cpu_do_idle();
+ return 0;
+}
+
+static int mx5_pm_valid(suspend_state_t state)
+{
+ return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
+}
+
+static const struct platform_suspend_ops mx5_suspend_ops = {
+ .valid = mx5_pm_valid,
+ .enter = mx5_suspend_enter,
+};
+
+static int __init mx5_pm_init(void)
+{
+ if (cpu_is_mx51())
+ suspend_set_ops(&mx5_suspend_ops);
+
+ return 0;
+}
+device_initcall(mx5_pm_init);
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 04c7a26..a72839f 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -53,6 +53,7 @@
#ifndef __ASSEMBLY__
extern unsigned int __mxc_cpu_type;
+int tzic_enable_wake(int is_idle);
#endif
#ifdef CONFIG_ARCH_MX1
--
1.6.0.4
^ permalink raw reply related
* [PATCH] ARM: imx: move selection between i.MX21 and i.MX27 to CPU family choice
From: Uwe Kleine-König @ 2011-03-02 17:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110302112559.GC22310@pengutronix.de>
The only use of selecting MX2-based before was to get the choice to select
between i.MX21 and i.MX27. So better provide this choice directly.
Note that this has an influence on reduced i.MX21 configs because the
former default "MACH_MX21" for the "CPUs" choice makes MACH_MX21 not
appear in the reduced config and so the default for "Freescale CPU family:"
(i.e. ARCH_MX3) is used now. mx21_defconfig is adapted not to be affected
by this problem.
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
arch/arm/configs/mx21_defconfig | 2 +-
arch/arm/configs/mx27_defconfig | 1 -
arch/arm/mach-imx/Kconfig | 20 --------------------
arch/arm/plat-mxc/Kconfig | 19 ++++++++++++++++---
4 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/arch/arm/configs/mx21_defconfig b/arch/arm/configs/mx21_defconfig
index a5a71c2..761fea6 100644
--- a/arch/arm/configs/mx21_defconfig
+++ b/arch/arm/configs/mx21_defconfig
@@ -12,7 +12,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX2=y
+CONFIG_MACH_MX21=y
CONFIG_MACH_MX21ADS=y
CONFIG_MXC_PWM=y
CONFIG_NO_HZ=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index 3817c60..098d77d 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -17,7 +17,6 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX2=y
CONFIG_MACH_MX27=y
CONFIG_MACH_MX27ADS=y
CONFIG_MACH_PCM038=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c172418..c94cbad 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -53,26 +53,6 @@ config MACH_SCB9328
endif
-if ARCH_MX2
-
-choice
- prompt "CPUs:"
- default MACH_MX21
-
-config MACH_MX21
- bool "i.MX21 support"
- help
- This enables support for Freescale's MX2 based i.MX21 processor.
-
-config MACH_MX27
- bool "i.MX27 support"
- help
- This enables support for Freescale's MX2 based i.MX27 processor.
-
-endchoice
-
-endif
-
if MACH_MX21
comment "MX21 platforms:"
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 389f217..03a9a9e 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -2,6 +2,10 @@ if ARCH_MXC
source "arch/arm/plat-mxc/devices/Kconfig"
+config ARCH_MX2
+ # don't use this in new code
+ bool
+
menu "Freescale MXC Implementations"
choice
@@ -14,16 +18,25 @@ config ARCH_MX1
help
This enables support for systems based on the Freescale i.MX1 family
-config ARCH_MX2
- bool "MX2-based"
+config MACH_MX21
+ bool "MX21-based"
+ select ARCH_MX2
help
- This enables support for systems based on the Freescale i.MX2 family
+ This enables support for systems based on the Freescale i.MX21 family
config ARCH_MX25
bool "MX25-based"
+ # note that i.MX25 doesn't match the expectations that are currently
+ # called ARCH_MX2
help
This enables support for systems based on the Freescale i.MX25 family
+config MACH_MX27
+ bool "MX27-based"
+ select ARCH_MX2
+ help
+ This enables support for Freescale's MX2 based i.MX27 processor.
+
config ARCH_MX3
bool "MX3-based"
select CPU_V6
--
1.7.2.3
^ permalink raw reply related
* [PATCH/RFC 0/3] ARM: S5P: Add common DPHY control code for MIPI-CSIS/MIPI-DSIM devices
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
the following patch series adds a common platform code to enable control
of MIPI-CSI receiver's DPHY from within it's V4L2 subdev driver. The driver
is supposed to support possibly all S5P SoCs variants and the PHY handling
details need to be hidden in the platform code. The functionality behind
"dphy_csis" clocks is not exact a functionality of the clock, but they have
common features. If the clock API rules are to strict to accept this kind
of usage then I'm willing to create some intermediate layer that will finally
solve PHY handling for MIPI-CSI, MIPI-DSIM, USB, SATA.. devices, without issues
on a common kernel binary for multiple boards.
The patch series contains:
[PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright
[PATCH 2/3] ARM: S5PV210: Add clock entries for MIPI DPHY control
[PATCH 3/3] ARM: EXYNOS4: Add clock entries for MIPI DPHY control
Rebased onto kgene-for-next branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
Regards,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply
* [PATCH 1/3] ARM: S5P: Rename MIPI-CSIS header and update Copyright
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299087289-29926-1-git-send-email-s.nawrocki@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/dev-csis0.c | 2 +-
arch/arm/plat-s5p/dev-csis1.c | 2 +-
arch/arm/plat-s5p/include/plat/csis.h | 28 ----------------------------
arch/arm/plat-s5p/include/plat/mipi_csis.h | 28 ++++++++++++++++++++++++++++
4 files changed, 30 insertions(+), 30 deletions(-)
delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
index dfab1c8..882843b 100644
--- a/arch/arm/plat-s5p/dev-csis0.c
+++ b/arch/arm/plat-s5p/dev-csis0.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 0
*
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
index e3053f2..77f5d25 100644
--- a/arch/arm/plat-s5p/dev-csis1.c
+++ b/arch/arm/plat-s5p/dev-csis1.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 1
*
diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/csis.h
deleted file mode 100644
index 51e308c..0000000
--- a/arch/arm/plat-s5p/include/plat/csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- *
- * S5P series MIPI CSI slave device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef PLAT_S5P_CSIS_H_
-#define PLAT_S5P_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
- * @clk_rate: bus clock frequency
- * @lanes: number of data lanes used
- * @alignment: data alignment in bits
- * @hs_settle: HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
- unsigned long clk_rate;
- u8 lanes;
- u8 alignment;
- u8 hs_settle;
-};
-
-#endif /* PLAT_S5P_CSIS_H_ */
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
new file mode 100644
index 0000000..eb3beab
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2010-2011 Samsung Electronics, Co. Ltd
+ *
+ * S5P series MIPI CSI slave device support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_S5P_MIPI_CSIS_H_
+#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+
+/**
+ * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
+ * @clk_rate: bus clock frequency
+ * @lanes: number of data lanes used
+ * @alignment: data alignment in bits
+ * @hs_settle: HS-RX settle time
+ */
+struct s5p_platform_mipi_csis {
+ unsigned long clk_rate;
+ u8 lanes;
+ u8 alignment;
+ u8 hs_settle;
+};
+
+#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.4.1
^ permalink raw reply related
* [PATCH 2/3] ARM: S5PV210: Add clock entries for MIPI DPHY control
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299087289-29926-1-git-send-email-s.nawrocki@samsung.com>
This clock entries allow control of enable state of MIPI-DSIM
and MIPI-CSIS PHYs from respective drivers without a need
for any callbacks in driver's platform data.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/clock.c | 27 +++++++++++++++++++++++
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 2 +-
2 files changed, 28 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 2d59949..c77d6f2 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -185,6 +185,23 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
}
+static int s5pv210_mipi_dphy_ctrl(struct clk *clk, int enable)
+{
+ u32 reset = clk->ctrlbit;
+ u32 reg = __raw_readl(S5PV210_MIPI_DPHY_CTRL);
+
+ reg = enable ? (reg | reset) : (reg & ~reset);
+ __raw_writel(reg, S5PV210_MIPI_DPHY_CTRL);
+
+ if (enable)
+ reg |= 0x1;
+ else if (!(reg & 0x6 & ~reset))
+ reg &= ~0x1;
+
+ __raw_writel(reg, S5PV210_MIPI_DPHY_CTRL);
+ return 0;
+}
+
static struct clk clk_sclk_hdmi27m = {
.name = "sclk_hdmi27m",
.id = -1,
@@ -531,6 +548,16 @@ static struct clk init_clocks[] = {
.parent = &clk_hclk_psys.clk,
.enable = s5pv210_clk_ip1_ctrl,
.ctrlbit = (1 << 26),
+ }, {
+ .name = "csis_dphy",
+ .id = -1,
+ .enable = s5pv210_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "dsim_dphy",
+ .id = -1,
+ .enable = s5pv210_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 2),
},
};
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 4c45b74..31ab0c7 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -161,7 +161,7 @@
#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
-#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
+#define S5PV210_MIPI_DPHY_CTRL S5P_CLKREG(0xE814)
#define S5P_IDLE_CFG_TL_MASK (3 << 30)
#define S5P_IDLE_CFG_TM_MASK (3 << 28)
--
1.7.4.1
^ permalink raw reply related
* [PATCH 3/3] ARM: EXYNOS4: Add clock entries for MIPI DPHY control
From: Sylwester Nawrocki @ 2011-03-02 17:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1299087289-29926-1-git-send-email-s.nawrocki@samsung.com>
This clock entries allow enable control of MIPI-DSIM and
MIPI-CSIS PHYs from respective drivers without a need for
any callbacks in driver's platform data.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos4/clock.c | 31 ++++++++++++++++++++++++-
arch/arm/mach-exynos4/include/mach/regs-pmu.h | 2 +
2 files changed, 32 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 72d53d5..6d64b06 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -23,6 +23,7 @@
#include <mach/map.h>
#include <mach/regs-clock.h>
+#include <mach/regs-pmu.h>
static struct clk clk_sclk_hdmi27m = {
.name = "sclk_hdmi27m",
@@ -116,6 +117,24 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)
return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
}
+static int exynos4_mipi_dphy_ctrl(struct clk *clk, int enable)
+{
+ u32 reset = clk->ctrlbit;
+ void __iomem *addr = S5PV310_MIPI_DPHY_CTRL(clk->id);
+ u32 reg = __raw_readl(addr);
+
+ reg = enable ? (reg | reset) : (reg & ~reset);
+ __raw_writel(reg, addr);
+
+ if (enable)
+ reg |= 0x1;
+ else if (!(reg & 0x6 & ~reset))
+ reg &= ~0x1;
+
+ __raw_writel(reg, addr);
+ return 0;
+}
+
/* Core list of CMU_CPU side */
static struct clksrc_clk clk_mout_apll = {
@@ -623,7 +642,17 @@ static struct clk init_clocks[] = {
.id = 5,
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 5),
- }
+ }, {
+ .name = "csis_dphy",
+ .id = 0,
+ .enable = exynos4_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "csis_dphy",
+ .id = 1,
+ .enable = exynos4_mipi_dphy_ctrl,
+ .ctrlbit = (1 << 1),
+ },
};
static struct clk *clkset_group_list[] = {
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 2ddd617..dd3216f 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -27,4 +27,6 @@
#define S5P_INT_LOCAL_PWR_EN 0x7
+#define S5PV310_MIPI_DPHY_CTRL(n) S5P_PMUREG(0x0710 + (n) * 4)
+
#endif /* __ASM_ARCH_REGS_PMU_H */
--
1.7.4.1
^ permalink raw reply related
* [PATCH resend] omap: Fix linker error in drivers/video/omap/lcd_2430sdp.c
From: Tony Lindgren @ 2011-03-02 17:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298960962.2011.11.camel@deskari>
* Tomi Valkeinen <tomi.valkeinen@ti.com> [110228 22:27]:
> On Mon, 2011-02-28 at 19:39 -0600, Tony Lindgren wrote:
> > * Tomi Valkeinen <tomi.valkeinen@ti.com> [110228 07:07]:
> > >
> > > Well, it's a bit ugly, but I'm fine with it. It's for the old omapfb,
> > > which hopefully nobody uses anymore (right =), and there's no simple way
> > > to make it modular and neat.
> >
> > How about let's make mach-omap2 boards all use the new code?
> > That way the old code can be omap1 only.
>
> That has been my long term plan, but I've never had time to start
> working on it. Some (many?) of the old panel drivers are trivial to
> port, needs just copying the panel timings.
OK, that will probably make things a lot easier in the long run.
> Some are much more complex, and porting them without having the hardware
> may be a bit of a guesswork. But perhaps we can find testers for those
> after the code has been ported.
Sure, once we get one working others should be easy..
Tony
^ permalink raw reply
* [PATCH v2 10/18] omap3+: sr: call handler with interrupt disabled
From: Sergei Shtylyov @ 2011-03-02 17:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6E4866.6070107@ru.mvista.com>
I wrote:
>> Request the handler irq such that there is no nesting for calls.
>> the notifiers are not expected to be nested, further the interrupt
>> events for status change should be handled prior to the next event
>> else there is a risk of loosing events.
>> Signed-off-by: Nishanth Menon<nm@ti.com>
>> ---
>> arch/arm/mach-omap2/smartreflex.c | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>> diff --git a/arch/arm/mach-omap2/smartreflex.c
>> b/arch/arm/mach-omap2/smartreflex.c
>> index 99e4c4f..a4e9f2d 100644
>> --- a/arch/arm/mach-omap2/smartreflex.c
>> +++ b/arch/arm/mach-omap2/smartreflex.c
>> @@ -278,7 +278,7 @@ static int sr_late_init(struct omap_sr *sr_info)
>> goto error;
>> }
>> ret = request_irq(sr_info->irq, sr_interrupt,
>> - 0, name, (void *)sr_info);
>> + IRQF_DISABLED, name, (void *)sr_info);
> Isn't this flag a nop now?
Indeed, it is, according to the comment in <linux/interrupt.h>. So what does
this patch really achieve?
WBR, Sergei
^ permalink raw reply
* [PATCH v2 10/18] omap3+: sr: call handler with interrupt disabled
From: Nishanth Menon @ 2011-03-02 17:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6E80B6.9090901@ru.mvista.com>
Sergei Shtylyov wrote, on 03/02/2011 11:09 PM:
> I wrote:
>
>>> Request the handler irq such that there is no nesting for calls.
>>> the notifiers are not expected to be nested, further the interrupt
>>> events for status change should be handled prior to the next event
>>> else there is a risk of loosing events.
>
>>> Signed-off-by: Nishanth Menon<nm@ti.com>
>>> ---
>>> arch/arm/mach-omap2/smartreflex.c | 2 +-
>>> 1 files changed, 1 insertions(+), 1 deletions(-)
>
>>> diff --git a/arch/arm/mach-omap2/smartreflex.c
>>> b/arch/arm/mach-omap2/smartreflex.c
>>> index 99e4c4f..a4e9f2d 100644
>>> --- a/arch/arm/mach-omap2/smartreflex.c
>>> +++ b/arch/arm/mach-omap2/smartreflex.c
>>> @@ -278,7 +278,7 @@ static int sr_late_init(struct omap_sr *sr_info)
>>> goto error;
>>> }
>>> ret = request_irq(sr_info->irq, sr_interrupt,
>>> - 0, name, (void *)sr_info);
>>> + IRQF_DISABLED, name, (void *)sr_info);
>
>> Isn't this flag a nop now?
>
> Indeed, it is, according to the comment in <linux/interrupt.h>. So what
> does this patch really achieve?
Carry over since I had implemented this driver originally on an ancient
kernel and other than the showing off the obvious fact that I am not
reading lwn.net enough, I dont think it achieved anything much :(
The original intent was as following: since bootloaders may have used
the same h/w logic which could generate pending interrupt status, I
wanted to explicitly flag that requesting the irq should also ensure the
IRQ is in disabled status before I get a chance to clean things up.
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH 0/8] OMAP2+: hwmod/clockevent: allow late-init of individual hwmods
From: Tony Lindgren @ 2011-03-02 17:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6B845A.9000900@ti.com>
> On 2/28/2011 3:31 AM, Paul Walmsley wrote:
> >Tony, I guess the omap-for-linus branch will probably need to get rebuilt
> >to drop that patch, once this series is merged...
Let's rather apply a fix or revert instead than start messing with
omap-for-linus. That branch is supposed to be a stable base for others
to base their branches on.
Tony
^ permalink raw reply
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