* Samsung GPIO changes break boot on Cragganmore
From: Mark Brown @ 2011-09-22 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Something in the recent GPIO changes have broken the boot for me on
Cragganmore (S3C6410 based) systems. The boot dies before any console
output is produced so it's hard to isolate exactly what went wrong but
backing out:
5ec7414 ARM: SAMSUNG: Remove useless Samsung GPIO related CONFIGs
7c15788 ARM: SAMSUNG: Update the name of regarding Samsung GPIO
bedcda6 gpio/samsung: gpio-samsung.c to support Samsung GPIOs
fixes the system boot for me. The diff is rather substantial so it's
hard to check by eyeball unfortunately.
Thanks,
Mark
^ permalink raw reply
* booting single uImage on platforms with different base addresses for SDRAM
From: Wolfgang Denk @ 2011-09-22 13:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110922110411.GD20444@tbergstrom-lnx.Nvidia.com>
Dear Peter De Schrijver,
In message <20110922110411.GD20444@tbergstrom-lnx.Nvidia.com> you wrote:
> Hi,
>
> Currently uImages have the load address hardcoded. As we now try to support
> as many ARM platforms as possible with a single binary, this becomes a
> problem. On tegra20 SDRAM starts at physical address 0, but on tegra30 SDRAM
> starts at 0x80000000. It's possible to build a kernel image which can deal
> with this, but the uImage still uses a hardcoded address. This results
> in requiring 2 different uImages even though the zImage is the same.
>
> Has anyone thought of a solution to this problem?
Yes, this has been discussed before. I proposed to allow for an
offset specification instead of an absolute address. After that, the
discussions faded. No code has been submitted yet.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"Never give in. Never give in. Never. Never. Never."
- Winston Churchill
^ permalink raw reply
* [PATCH 6/7] common: dma-mapping: change alloc/free_coherent method to more generic alloc/free_attrs
From: Marek Szyprowski @ 2011-09-22 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110905104352.GD5203@8bytes.org>
Hello,
On Monday, September 05, 2011 12:44 PM Joerg Roedel wrote:
> On Fri, Sep 02, 2011 at 03:53:18PM +0200, Marek Szyprowski wrote:
> > struct dma_map_ops {
> > - void* (*alloc_coherent)(struct device *dev, size_t size,
> > - dma_addr_t *dma_handle, gfp_t gfp);
> > - void (*free_coherent)(struct device *dev, size_t size,
> > - void *vaddr, dma_addr_t dma_handle);
> > + void* (*alloc)(struct device *dev, size_t size,
> > + dma_addr_t *dma_handle, gfp_t gfp,
> > + struct dma_attrs *attrs);
> > + void (*free)(struct device *dev, size_t size,
> > + void *vaddr, dma_addr_t dma_handle,
> > + struct dma_attrs *attrs);
> > + int (*mmap)(struct device *, struct vm_area_struct *,
> > + void *, dma_addr_t, size_t, struct dma_attrs *attrs);
> > +
> > dma_addr_t (*map_page)(struct device *dev, struct page *page,
> > unsigned long offset, size_t size,
> > enum dma_data_direction dir,
> > --
> > 1.7.1.569.g6f426
>
> This needs conversion of all drivers implementing dma_map_ops or you
> will break a lot of architectures. A better approach is to keep
> *_coherent and implement alloc/free/mmap side-by-side until all drivers
> are converted.
> Also I miss some documentation about the new call-backs.
Right this patch will break all other architectures, however it was just
a snapshot of my work-in-progress. Converting all other architectures from
alloc_coherent to alloc with NULL attribute shouldn't be really hard and will
be added in the final version - together with documentation.
Best regards
--
Marek Szyprowski
Samsung Poland R&D Center
^ permalink raw reply
* [PATCH] ARM: platform fixups: remove mdesc argument to fixup function
From: Russell King - ARM Linux @ 2011-09-22 14:22 UTC (permalink / raw)
To: linux-arm-kernel
Get rid of the mdesc pointer in the fixup function call. No one uses
the mdesc pointer, it shouldn't be modified anyway, and we can't wrap
it, so let's remove it. Updated for 3.1-rc6.
Platform files found by:
$ regexp=$(git grep -h '\.fixup.*=' arch/arm |
sed 's!.*= *\([^,]*\),* *!\1!' | sort -u |
tr '\n' '|' | sed 's,|$,,;s,|,\\|,g')
$ git grep $regexp arch/arm
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/include/asm/mach/arch.h | 3 +--
arch/arm/kernel/setup.c | 2 +-
arch/arm/mach-bcmring/arch.c | 4 ++--
arch/arm/mach-clps711x/clep7312.c | 3 +--
arch/arm/mach-clps711x/edb7211-arch.c | 3 +--
arch/arm/mach-clps711x/fortunet.c | 3 +--
arch/arm/mach-clps711x/p720t.c | 3 +--
| 3 +--
| 3 +--
arch/arm/mach-msm/board-halibut.c | 4 ++--
arch/arm/mach-msm/board-mahimahi.c | 4 ++--
arch/arm/mach-msm/board-sapphire.c | 4 ++--
arch/arm/mach-msm/board-trout.c | 4 ++--
arch/arm/mach-orion5x/common.c | 4 ++--
arch/arm/mach-orion5x/common.h | 4 +---
arch/arm/mach-pxa/cm-x300.c | 4 ++--
arch/arm/mach-pxa/corgi.c | 4 ++--
arch/arm/mach-pxa/eseries.c | 3 +--
arch/arm/mach-pxa/eseries.h | 3 +--
arch/arm/mach-pxa/poodle.c | 4 ++--
arch/arm/mach-pxa/spitz.c | 4 ++--
arch/arm/mach-pxa/tosa.c | 4 ++--
arch/arm/mach-realview/core.c | 3 +--
arch/arm/mach-realview/core.h | 4 ++--
arch/arm/mach-realview/realview_pb1176.c | 3 +--
arch/arm/mach-realview/realview_pbx.c | 6 +++---
arch/arm/mach-s3c2412/mach-smdk2413.c | 3 +--
arch/arm/mach-s3c2412/mach-vstms.c | 5 ++---
arch/arm/mach-sa1100/assabet.c | 3 +--
arch/arm/mach-tegra/board-harmony.c | 4 ++--
arch/arm/mach-tegra/board-paz00.c | 4 ++--
arch/arm/mach-tegra/board-trimslice.c | 4 ++--
32 files changed, 50 insertions(+), 66 deletions(-)
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 217aa19..c569998 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -34,8 +34,7 @@ struct machine_desc {
unsigned int reserve_lp1 :1; /* never has lp1 */
unsigned int reserve_lp2 :1; /* never has lp2 */
unsigned int soft_reboot :1; /* soft reboot */
- void (*fixup)(struct machine_desc *,
- struct tag *, char **,
+ void (*fixup)(struct tag *, char **,
struct meminfo *);
void (*reserve)(void);/* reserve mem blocks */
void (*map_io)(void);/* IO mapping function */
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index e514c76..f10fed0 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -861,7 +861,7 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
}
if (mdesc->fixup)
- mdesc->fixup(mdesc, tags, &from, &meminfo);
+ mdesc->fixup(tags, &from, &meminfo);
if (tags->hdr.tag == ATAG_CORE) {
if (meminfo.nr_banks != 0)
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index a604b9e..31a1435 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -136,8 +136,8 @@ static void __init bcmring_init_machine(void)
*
*****************************************************************************/
-static void __init bcmring_fixup(struct machine_desc *desc,
- struct tag *t, char **cmdline, struct meminfo *mi) {
+static void __init bcmring_fixup(struct tag *t, char **cmdline,
+ struct meminfo *mi) {
#ifdef CONFIG_BLK_DEV_INITRD
printk(KERN_NOTICE "bcmring_fixup\n");
t->hdr.tag = ATAG_CORE;
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index 67b5abb4..0a2e74f 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -26,8 +26,7 @@
#include "common.h"
static void __init
-fixup_clep7312(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi)
{
mi->nr_banks=1;
mi->bank[0].start = 0xc0000000;
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
index 98ca5b2..725a7a5 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211-arch.c
@@ -37,8 +37,7 @@ static void __init edb7211_reserve(void)
}
static void __init
-fixup_edb7211(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
{
/*
* Bank start addresses are not present in the information
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index b1cb479..1947b30 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -57,8 +57,7 @@ typedef struct tag_IMAGE_PARAMS
#define IMAGE_PARAMS_PHYS 0xC01F0000
static void __init
-fortunet_fixup(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+fortunet_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
{
IMAGE_PARAMS *ip = phys_to_virt(IMAGE_PARAMS_PHYS);
*cmdline = phys_to_virt(ip->command_line);
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index cefbce0..3f796e0 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -56,8 +56,7 @@ static struct map_desc p720t_io_desc[] __initdata = {
};
static void __init
-fixup_p720t(struct machine_desc *desc, struct tag *tag,
- char **cmdline, struct meminfo *mi)
+fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
{
/*
* Our bootloader doesn't setup any tags (yet).
--git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 5b1a8db..206ff2f 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -76,8 +76,7 @@ __initcall(cats_hw_init);
* hard reboots fail on early boards.
*/
static void __init
-fixup_cats(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
{
screen_info.orig_video_lines = 25;
screen_info.orig_video_points = 16;
--git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 06e514f..4cbc2e6 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -631,8 +631,7 @@ __initcall(nw_hw_init);
* the parameter page.
*/
static void __init
-fixup_netwinder(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
{
#ifdef CONFIG_ISAPNP
extern int isapnp_disable;
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 18a3c97..f81ef1f 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -78,8 +78,8 @@ static void __init halibut_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
}
-static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+static void __init halibut_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
mi->nr_banks=1;
mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c
index 7a9a03e..1df15aa 100644
--- a/arch/arm/mach-msm/board-mahimahi.c
+++ b/arch/arm/mach-msm/board-mahimahi.c
@@ -53,8 +53,8 @@ static void __init mahimahi_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
}
-static void __init mahimahi_fixup(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+static void __init mahimahi_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
mi->nr_banks = 2;
mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index 68f930f..c6e043c 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -77,8 +77,8 @@ static struct map_desc sapphire_io_desc[] __initdata = {
}
};
-static void __init sapphire_fixup(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+static void __init sapphire_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
int smi_sz = parse_tag_smi((const struct tag *)tags);
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 8143867..7acd202 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -48,8 +48,8 @@ static void __init trout_init_irq(void)
msm_init_irq();
}
-static void __init trout_fixup(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+static void __init trout_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
mi->nr_banks = 1;
mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 0ab531d..22ace0b 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -308,8 +308,8 @@ void __init orion5x_init(void)
* Many orion-based systems have buggy bootloader implementations.
* This is a common fixup for bogus memory tags.
*/
-void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
- char **from, struct meminfo *meminfo)
+void __init tag_fixup_mem32(struct tag *t, char **from,
+ struct meminfo *meminfo)
{
for (; t->hdr.size; t = tag_next(t))
if (t->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 3e5499d..909489f 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -53,11 +53,9 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-struct machine_desc;
struct meminfo;
struct tag;
-extern void __init tag_fixup_mem32(struct machine_desc *, struct tag *,
- char **, struct meminfo *);
+extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
#endif
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index b6a5134..d940e8a 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -839,8 +839,8 @@ static void __init cm_x300_init(void)
cm_x300_init_bl();
}
-static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+static void __init cm_x300_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
/* Make sure that mi->bank[0].start = PHYS_ADDR */
for (; tags->hdr.size; tags = tag_next(tags))
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 185a37c..3e9483b 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -705,8 +705,8 @@ static void __init corgi_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
}
-static void __init fixup_corgi(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init fixup_corgi(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
sharpsl_save_param();
mi->nr_banks=1;
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index b4599ec..e4a1f4d 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -41,8 +41,7 @@
#include "clock.h"
/* Only e800 has 128MB RAM */
-void __init eseries_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
{
mi->nr_banks=1;
mi->bank[0].start = 0xa0000000;
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
index 5930f5e..be92196 100644
--- a/arch/arm/mach-pxa/eseries.h
+++ b/arch/arm/mach-pxa/eseries.h
@@ -1,5 +1,4 @@
-void __init eseries_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi);
+void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi);
extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info;
extern struct pxaficp_platform_data e7xx_ficp_platform_data;
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index a113ea9..948ce3e 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -454,8 +454,8 @@ static void __init poodle_init(void)
poodle_init_spi();
}
-static void __init fixup_poodle(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init fixup_poodle(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
sharpsl_save_param();
mi->nr_banks=1;
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 438c7b5..d8dec91 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -970,8 +970,8 @@ static void __init spitz_init(void)
spitz_i2c_init();
}
-static void __init spitz_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init spitz_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
sharpsl_save_param();
mi->nr_banks = 1;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 9f69a26..402b0c9 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -960,8 +960,8 @@ static void __init tosa_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
}
-static void __init fixup_tosa(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init fixup_tosa(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
sharpsl_save_param();
mi->nr_banks=1;
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 5c23450..d5ed5d4 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -517,8 +517,7 @@ void __init realview_timer_init(unsigned int timer_irq)
/*
* Setup the memory banks.
*/
-void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
- struct meminfo *meminfo)
+void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
{
/*
* Most RealView platforms have 512MB contiguous RAM at 0x70000000.
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 5c83d1e..47259c8 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -63,8 +63,8 @@ extern int realview_flash_register(struct resource *res, u32 num);
extern int realview_eth_register(const char *name, struct resource *res);
extern int realview_usb_register(struct resource *res);
extern void realview_init_early(void);
-extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags,
- char **from, struct meminfo *meminfo);
+extern void realview_fixup(struct tag *tags, char **from,
+ struct meminfo *meminfo);
extern void (*realview_reset)(char);
#endif
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index ad5671a..de6b9fa 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -316,8 +316,7 @@ static void realview_pb1176_reset(char mode)
__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
}
-static void realview_pb1176_fixup(struct machine_desc *mdesc,
- struct tag *tags, char **from,
+static void realview_pb1176_fixup(struct tag *tags, char **from,
struct meminfo *meminfo)
{
/*
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 363b0ab..3e1eb2e 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -319,8 +319,8 @@ static struct sys_timer realview_pbx_timer = {
.init = realview_pbx_timer_init,
};
-static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags,
- char **from, struct meminfo *meminfo)
+static void realview_pbx_fixup(struct tag *tags, char **from,
+ struct meminfo *meminfo)
{
#ifdef CONFIG_SPARSEMEM
/*
@@ -335,7 +335,7 @@ static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags,
meminfo->bank[2].size = SZ_256M;
meminfo->nr_banks = 3;
#else
- realview_fixup(mdesc, tags, from, meminfo);
+ realview_fixup(tags, from, meminfo);
#endif
}
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 834cfb6..3391713 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -92,8 +92,7 @@ static struct platform_device *smdk2413_devices[] __initdata = {
&s3c_device_usbgadget,
};
-static void __init smdk2413_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline,
+static void __init smdk2413_fixup(struct tag *tags, char **cmdline,
struct meminfo *mi)
{
if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 83544eb..b6ed457 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -129,9 +129,8 @@ static struct platform_device *vstms_devices[] __initdata = {
&s3c_device_nand,
};
-static void __init vstms_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline,
- struct meminfo *mi)
+static void __init vstms_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
mi->nr_banks=1;
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 26257df..6290ce2 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -301,8 +301,7 @@ static void __init get_assabet_scr(void)
}
static void __init
-fixup_assabet(struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
+fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
{
/* This must be done before any call to machine_has_neponset() */
map_sa1100_gpio_regs();
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 846cd7d..c78ce41 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -123,8 +123,8 @@ static struct platform_device *harmony_devices[] __initdata = {
&harmony_audio_device,
};
-static void __init tegra_harmony_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init tegra_harmony_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
mi->nr_banks = 2;
mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index ea2f79c..5e6bc77 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -84,8 +84,8 @@ static void paz00_usb_init(void)
platform_device_register(&tegra_ehci3_device);
}
-static void __init tegra_paz00_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
mi->nr_banks = 1;
mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 89a6d2a..652c340 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -126,8 +126,8 @@ static void trimslice_usb_init(void)
platform_device_register(&tegra_ehci1_device);
}
-static void __init tegra_trimslice_fixup(struct machine_desc *desc,
- struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
+ struct meminfo *mi)
{
mi->nr_banks = 2;
mi->bank[0].start = PHYS_OFFSET;
--
1.7.4.4
^ permalink raw reply related
* [GIT PULL] omap cleanup part1 for v3.2 merge window
From: Arnd Bergmann @ 2011-09-22 14:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87d3et4zj9.fsf@ti.com>
On Wednesday 21 September 2011, Kevin Hilman wrote:
> Found. Patch below.
>
> If this one is OK, I'll push to my for_3.2/voltage-cleanup branch (which
> is already pulled into arm-soc/next/voltage) so just re-pulling will
> pick up the fix.
Looks good to me, it's always nice when a bug fix is also a cleanup ;-)
Arnd
^ permalink raw reply
* [PATCH REPOST 1/2] arm/dt: Tegra: Update SDHCI nodes to match bindings
From: Arnd Bergmann @ 2011-09-22 14:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMg4kBH77Ou1xyyVT-Ojxg=9uyxmfsmhbbKquru=j+z6Gg@mail.gmail.com>
On Tuesday 20 September 2011, Olof Johansson wrote:
> On Tue, Sep 20, 2011 at 2:01 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > Should I take the other one as well? It's probably better to let that
> > go the proper way through the tegra tree for 3.2, right?
>
> Given that you have a public tree right now, and I don't (since
> kernel.org is down), please feel free to start a tegra/for-3.2 branch
> for me and apply it there. I'll base further work on top of that if
> needed.
>
> (There also aren't a whole lot of other patches queued for 3.2 right now).
Ok, I've put it into the next/fixes branch now, so it will be in 3.2.
Thanks,
Arnd
^ permalink raw reply
* [PATCH v2 2/2] ARM: smp_scu: remove __init annotation from scu_enable()
From: Shawn Guo @ 2011-09-22 15:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110917083236.GB26572@S2100-06.ap.freescale.net>
On Sat, Sep 17, 2011 at 04:32:37PM +0800, Shawn Guo wrote:
> On Tue, Sep 06, 2011 at 01:48:27PM +0800, Shawn Guo wrote:
> > When Cortex-A9 MPCore resumes from Dormant or Shutdown modes,
> > SCU needs to be re-enabled. This patch removes __init annotation
> > from function scu_enable(), so that platform resume procedure can
> > call it to re-enable SCU.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
>
> Hi Russell,
>
> Do you have any comment on this patch? Can I put it into patch tracker?
>
Ping x 2.
As imx6q suspend support depends on this patch, I really need to know
if you will merge it. Otherwise, I will probably have to copy the code
into imx6q platform code just like exynos4 is doing.
--
Regards,
Shawn
^ permalink raw reply
* [GIT PULL] CSR prima2 PM support for 3.2
From: Arnd Bergmann @ 2011-09-22 15:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGsJ_4y6vuy8ZicefRR8DE6Zoj2nzy1JcOxhHK3Xos8d9NxxSQ@mail.gmail.com>
On Wednesday 21 September 2011, Barry Song wrote:
> Hi Arnd,
>
> Can you pls pull the prima2 PM support for 3.2? As the patchset
> depends on rtciobrg you pulled last time, i didn't rebase it to 3.1-rc
> to avoid merge conflict.
>
> The following changes since commit 684f741446f7a3108b4c167faf20214c42b7eeac:
> Zhiwu Song (1):
> ARM: CSR: add rtc i/o bridge interface for SiRFprimaII
>
> are available in the git repository at:
>
> git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel.git for-arnd
>
> Barry Song (2):
> ARM: CSR: PM: save/restore timer status in suspend cycle
> ARM: CSR: PM: save/restore irq status in suspend cycle
>
> Rongjun Ying (1):
> ARM: CSR: PM: add sleep entry for SiRFprimaII
Pulled, thanks!
Arnd
^ permalink raw reply
* [PATCH v2 3/3] ARM: CSR: PM: add sleep entry for SiRFprimaII
From: Arnd Bergmann @ 2011-09-22 15:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGsJ_4zY=J5w5st5P1gYonPata4maWb7Phe1Gohf_qjgDxxbnw@mail.gmail.com>
On Thursday 22 September 2011, Barry Song wrote:
> 2011/9/21 Barry Song <21cnbao@gmail.com>:
> > From: Rongjun Ying <rongjun.ying@csr.com>
> >
> > This patch adds suspend-to-mem support for prima2. It will make prima2
> > enter DEEPSLEEP mode while accepting PM_SUSPEND_MEM command.
> >
> > Signed-off-by: Rongjun Ying <baohua.song@csr.com>
>
> sorry for typo. it should be:
> Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
>
> this was fixed in repository for pull.
Ok, I've made sure I have the right version.
Arnd
^ permalink raw reply
* [V8 PATCH 5/5] MX53 Enable the AHCI SATA on MX53 SMD board
From: Richard Zhu @ 2011-09-22 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E7B1F0F.10601@ru.mvista.com>
Hi Fabio&Sergei:
Thanks for your comments.
Accepted. Would be changed later.
Best Regard
Richard Zhu
On 22/09/2011, Sergei Shtylyov <sshtylyov@mvista.com> wrote:
> Hello.
>
> On 22-09-2011 14:14, Richard Zhu wrote:
>
>> Signed-off-by: Richard Zhu<richard.zhu@linaro.org>
>> ---
>> arch/arm/mach-mx5/board-mx53_smd.c | 16 ++++++++++++++++
>> 1 files changed, 16 insertions(+), 0 deletions(-)
>
>> diff --git a/arch/arm/mach-mx5/board-mx53_smd.c
>> b/arch/arm/mach-mx5/board-mx53_smd.c
>> index bc02894..9d06fbe 100644
>> --- a/arch/arm/mach-mx5/board-mx53_smd.c
>> +++ b/arch/arm/mach-mx5/board-mx53_smd.c
> [...]
>> @@ -111,6 +112,19 @@ static const struct imxi2c_platform_data
>> mx53_smd_i2c_data __initconst = {
>> .bitrate = 100000,
>> };
>>
>> +static inline void mx53_smd_ahci_pwr_on(void)
>> +{
>> + int ret;
>> +
>> + /* Enable SATA PWR */
>> + ret = gpio_request(MX53_SMD_SATA_PWR_EN, "ahci-sata-pwr");
>> + if (ret) {
>> + printk(KERN_ERR "failed to get SATA_PWR_EN: %d\n", ret);
>> + return;
>> + }
>> + gpio_direction_output(MX53_SMD_SATA_PWR_EN, 1);
>
> You can use gpio_request_one() instead of
> gpio_request()/gpio_direction_*().
>
> WBR, Sergei
>
^ permalink raw reply
* [PATCH v7 00/26] gpio/omap: driver cleanup and fixes
From: DebBarma, Tarun Kanti @ 2011-09-22 15:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1315918979-26173-1-git-send-email-tarun.kanti@ti.com>
On Tue, Sep 13, 2011 at 6:32 PM, Tarun Kanti DebBarma
<tarun.kanti@ti.com> wrote:
> This series is continuation of cleanup of OMAP GPIO driver and fixes.
> The cleanup include getting rid of cpu_is_* checks wherever possible,
> use of gpio_bank list instead of static array, use of unique platform
> specific value associated data member to OMAP platforms to avoid
> cpu_is_* checks. The series also include PM runtime support.*
>
> Baseline: git://gitorious.org/khilman/linux-omap-pm.git
> Branch: for_3.2/gpio-cleanup
> Commit: 8323374
Thanks Tony for ack'ing the patches.
Kevin,
Since Tony's has acked the patches, can you please pull them?
Thanks.
--
Tarun
>
> Test Details:
> - Compile tested for omap1_defconfig and omap2plus_defconfig.
> - OMAP1710-H3: Bootup test.
> - OMAP2430/SDP, OMAP3430/SDP, OMAP4430/SDP: Functional testing.
> - PM Testing on OMAP3430-SDP: retention, off_mode, system_wide
> ?suspend and gpio wakeup.
>
> v7:
> - Use pm_runtime_put() instead of pm_runtime_put_sync_suspend()
>
> - Keep *_runtime_get/put*() ?outside spinlock
>
> - Remove additional checking of conditions in _restore_context()
> ?From:
> ?if (bank->regs->set_dataout && bank->regs->clear_dataout)
> ?...
> ?To:
> ?if (bank->regs->set_dataout)
> ?...
>
> - Use SET_RUNTIME_PM_OPS and SET_SYSTEM_SLEEP_PM_OPS macros
>
> - In [PATCH 19/25] gpio/omap: cleanup prepare_for_idle and resume_after_idle,
> ?protect the bank data elements and register access using spinlock in
> ?runtime_suspend/resume() callbacks.
> ?This is because these callbacks run with interrupts enabled.
>
> - Add dbclk aliases for all GPIO modules. Without this, GPIO modules were not
> ?getting the correct clock handle to enable/disable debounec clock.
>
> - Fix log comments on the following patches:
> ?[PATCH 19/25] gpio/omap: cleanup prepare_for_idle and resume_after_idle
> ?[PATCH 20/25] gpio/omap: skip operations in runtime callbacks
> ?[PATCH 24/25] gpio/omap: restore OE only after setting the output level
>
> v6:
> - Save and restore debounce registers for proper driver operation.
> - Restore interrupt enable after all configuration to avoid spurious interrupts.
> - Restore dataout register before oe register.
> - Restore dataout into dataout_set or dataout based upon the OMAP version.
> - Change register name from wkup_status to wkup_en.
> - Remove wrapper around omap_pm_get_dev_context_loss_count(). Use it directly.
> ?Also, changed the signature of get_context_loss_count in pdata and bank structure
> ?from int to u32.
>
> - Use 'context' instead of 'ctx' for clarity wherever it is used.
> - Merged two patches into one which are related to bank_is_mpuio() modification.
> - Use shift operator instead of following:
> + ? ? ? .irqctrl ? ? ? ?= OMAP_MPUIO_GPIO_INT_EDGE / 2,
>
> - Remove redundant check from the following
> + ? ? ? if (bank_is_mpuio(bank)) {
> + ? ? ? ? ? ? ? if (bank->regs->wkup_status) <--- redundant check
> + ? ? ? ? ? ? ? ? ? ? ? mpuio_init(bank);
>
> - Change subject of following patch
> ?[PATCH v5 15/22] gpio/omap: use readl in irq_handler for all access
> ?into
> ?[PATCH 14/25] gpio/omap: remove unnecessary bit-masking for read access
>
> - Fix multi-line comments in
> ?[PATCH v5 20/22] gpio/omap: cleanup prepare_for_idle and resume_after_idle
>
> v5:
> - Reduce runtime callback overhead when *_get/put_sync() called from probe()
> ?and *_gpio_request/free().
>
> - Dynamic context save within functions where context is modified instead of
> ?saving all context within a common function.
>
> - Removed call to mpuio_init() from omap_gpio_mod_init(). Both the functions are
> ?called once during initialization in *_gpio_probe().
> ?Call to omap_gpio_mod_init() has been removed from omap_gpio_request() on the
> ?first access to gpio bank. One time initialization looks sufficient.
>
> - In *_gpio_irq_handler() use *_put_sync_suspend() instead of *_put_sync().
>
> - Removed hardcoding of OMAP16xx sysconfig register value and instead defined an
> ?associated constant.
>
> - Removed *_get_sync() call from *_gpio_suspend() and *_put_sync() call from
> ?*_gpio_resume(). They got wrongly slipped into the code.
>
> - Removed following redundant zero allocated initialization from mach-omap2/gpio.c
> + ? ? ? pdata->regs->irqctrl = 0;
> + ? ? ? pdata->regs->edgectrl1 = 0;
> + ? ? ? pdata->regs->edgectrl2 = 0;
>
> - Removed following redundant code in gpio-omap.c
> ?-#define bank_is_mpuio(bank) ?((bank)->method == METHOD_MPUIO)
>
> v4:
> - since all accesses to registers are 4-byte aligned, removing special
> ?checks and handling of 16 and 32-bit wide bank registers and instead
> ?use 32-bit read/write access consistently.
>
> - redundant usage of MOD_REG_BIT has been corrected and replaced with
> ?_gpio_rmw().
>
> - omap_gpio_mod_init() function has been simplified further using _gpio_rmw().
>
> - sysconfig register offset specific to omap16xx has been removed along
> ?with its usage.
>
> - additional logic to skip from suspend/resume:
>
> ?if (!bank->regs->wkup_status || !bank->suspend_wakeup)
> ? ? ? ?return 0;
>
> ?if (!bank->regs->wkup_status || !bank->saved_wakeup)
> ? ? ? ?return 0;
>
> - separated mpuio related changes into a different patch from the patch where
> ?wakeup status register related changes are done.
>
> - Incorrect replacement of !cpu_class_is_omap2() in gpio_irq_type()
> ?corrected:
> + ? ? ? if (!bank->regs->leveldetect0 &&
> + ? ? ? ? ? ? ? (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
> ? ? ? ? ? ? ? ?return -EINVAL;
>
> v3:
> - Avoid use of wkup_set and wkup_clear registers. Instead use wkup_status
> ?register for all platforms. This is because on OMAP4 it is recommended
> ?not to use them.
>
> - Remove duplicate code in omap_gpio_mod_init() for handling the same for
> ?32-bit and 16-bit GPIO bank widths. This is accomplished by having two
> ?functions to handle each case while assiging a common function pointer
> ?during initialization.
>
> - Remove OMAP16xx specific one time initialization from omap_gpio_mod_init().
> ?Move it inside omap16xx_gpio_init().
>
> - Avoid usage of USHRT_MAX to indicate undefined values. Use 0 instead.
>
> - In omap_gpio_suspend()/resume() functions remove code that checks
> ?if the feature is supported. Instead, assign these functions to
> ?struct platform_driver's suspend & resume function pointers for those
> ?OMAP platforms whcih support this feature.
>
> - Remove 'suspend_support' flag because it is redundant. Instead use
> ?wkup_* registers to decode the same information.
>
> - Restore context also when we don't know if the context is lost.
>
> - Make omap_gpio_save_context() and omap_gpio_restore_context()
> ?static.
>
> v2:
> - Do special handling of non-wakeup GPIOs only on OMAP2420. Avoid this
> ?handling on OMAP3430.
> - Isolate cleanups and fixes into separate set of patches. Keep the cleanup
> ?first followed by the fixes.
> - Avoid calling omap_gpio_get_context_loss() directly and instead call it
> ?through function pointer in pdata initialized during init.
> - workaround_enabled flag is not longer needed and is removed.
> - Call pwrdm_post_transition() before calling omap_gpio_resume_after_idle().
> - In omap2_gpio_resume_after_idle() do context restore before handling
> ?workaround.
> - Use PM runtime framework.
> - Modify register offset names to : wkup_status, wkup_clear, wkup_set.
> ?Also use 'base + offset' for readibility in all relevant places.
> - Remove unwanted messages from commit section like TODO, etc.
>
>
> Charulatha V (10):
> ?gpio/omap: remove dependency on gpio_bank_count
> ?gpio/omap: use flag to identify wakeup domain
> ?gpio/omap: make gpio_context part of gpio_bank structure
> ?gpio/omap: fix pwrdm_post_transition call sequence
> ?gpio/omap: handle save/restore context in GPIO driver
> ?gpio/omap: make non-wakeup GPIO part of pdata
> ?gpio/omap: avoid cpu checks during module ena/disable
> ?gpio/omap: use pinctrl offset instead of macro
> ?gpio/omap: remove bank->method & METHOD_* macros
> ?gpio/omap: fix bankwidth for OMAP7xx MPUIO
>
> Nishanth Menon (4):
> ?gpio/omap: save and restore debounce registers
> ?gpio/omap: enable irq at the end of all configuration in restore
> ?gpio/omap: restore OE only after setting the output level
> ?gpio/omap: handle set_dataout reg capable IP on restore
>
> Tarun Kanti DebBarma (12):
> ?gpio/omap: further cleanup using wkup_en register
> ?gpio/omap: use level/edge detect reg offsets
> ?gpio/omap: remove hardcoded offsets in context save/restore
> ?gpio/omap: cleanup set_gpio_triggering function
> ?gpio/omap: cleanup omap_gpio_mod_init function
> ?gpio/omap: remove unnecessary bit-masking for read access
> ?gpio/omap: use pm-runtime framework
> ?gpio/omap: optimize suspend and resume functions
> ?gpio/omap: cleanup prepare_for_idle and resume_after_idle
> ?gpio/omap: skip operations in runtime callbacks
> ?gpio/omap: remove omap_gpio_save_context overhead
> ?gpio/omap: add dbclk aliases for all gpio modules
>
> ?arch/arm/mach-omap1/gpio15xx.c ? ? ? ? | ? ?7 +-
> ?arch/arm/mach-omap1/gpio16xx.c ? ? ? ? | ? 47 ++-
> ?arch/arm/mach-omap1/gpio7xx.c ? ? ? ? ?| ? 14 +-
> ?arch/arm/mach-omap2/clock3xxx_data.c ? | ? ?6 +
> ?arch/arm/mach-omap2/clock44xx_data.c ? | ? ?6 +
> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? | ? 36 +-
> ?arch/arm/mach-omap2/pm34xx.c ? ? ? ? ? | ? 21 +-
> ?arch/arm/plat-omap/include/plat/gpio.h | ? 29 +-
> ?drivers/gpio/gpio-omap.c ? ? ? ? ? ? ? | 1051 +++++++++++++-------------------
> ?9 files changed, 524 insertions(+), 693 deletions(-)
>
>
^ permalink raw reply
* [PATCH] i2c/tegra: I2C driver uses the suspend_noirq/resume_noirq
From: Arnd Bergmann @ 2011-09-22 15:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF04B73215C9@HQMAIL01.nvidia.com>
On Tuesday 20 September 2011, Stephen Warren wrote:
> Stephen Warren wrote at Tuesday, August 30, 2011 10:25 AM:
> > Ben, Arnd,
> >
> > Could you please ack/nack the patch at the start of this thread for Colin;
> > see below.
>
> Ben, can you please comment on the acceptability of this patch?
>
> Or Arnd, did Mark's most recent explanation of the situation provide enough
> context for you to ack/nak it?
>
After looking through the discussion again, my feeling is that it's ok
and I think that Mark's word should count more than mine anyway on this
issue.
If you think it helps, you can add my Acked-by, but this is really
something for Ben to decide. Just resubmit the patch to Ben with an
an updated changelog that summarises the discussion, in case
Ben got bored already and put this mail thread into the ignore
folder...
Arnd
^ permalink raw reply
* [RFC] Shrink sched_clock some more
From: Russell King - ARM Linux @ 2011-09-22 15:36 UTC (permalink / raw)
To: linux-arm-kernel
... by getting rid of the fixed-constant optimization, and moving the
update code into arch/arm/kernel/sched_clock.c.
Platforms now only have to supply a function to read the sched_clock
register, and some basic information such as the number of significant
bits and the tick rate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/include/asm/sched_clock.h | 98 +--------------------------------
arch/arm/kernel/sched_clock.c | 91 ++++++++++++++++++++++++++++--
arch/arm/mach-ixp4xx/common.c | 15 +----
arch/arm/mach-mmp/time.c | 15 +----
arch/arm/mach-omap1/time.c | 27 +--------
arch/arm/mach-omap2/timer.c | 21 +------
arch/arm/mach-pxa/time.c | 23 +-------
arch/arm/mach-sa1100/time.c | 27 +--------
arch/arm/mach-tegra/timer.c | 23 +-------
arch/arm/mach-u300/timer.c | 22 +------
arch/arm/plat-iop/time.c | 15 +----
arch/arm/plat-mxc/time.c | 15 +----
arch/arm/plat-nomadik/timer.c | 25 +-------
arch/arm/plat-omap/counter_32k.c | 39 +------------
arch/arm/plat-orion/time.c | 16 +----
arch/arm/plat-s5p/s5p-time.c | 29 +---------
arch/arm/plat-versatile/sched-clock.c | 26 +--------
17 files changed, 131 insertions(+), 396 deletions(-)
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index c8e6ddf..2026a0c 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -11,109 +11,13 @@
#include <linux/kernel.h>
#include <linux/types.h>
-struct clock_data {
- u64 epoch_ns;
- u32 epoch_cyc;
- u32 epoch_cyc_copy;
- u32 mult;
- u32 shift;
-};
-
-#define DEFINE_CLOCK_DATA(name) struct clock_data name
-
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
-{
- return (cyc * mult) >> shift;
-}
-
-/*
- * Atomically update the sched_clock epoch. Your update callback will
- * be called from a timer before the counter wraps - read the current
- * counter value, and call this function to safely move the epochs
- * forward. Only use this from the update callback.
- */
-static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask)
-{
- unsigned long flags;
- u64 ns = cd->epoch_ns +
- cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift);
-
- /*
- * Write epoch_cyc and epoch_ns in a way that the update is
- * detectable in cyc_to_fixed_sched_clock().
- */
- raw_local_irq_save(flags);
- cd->epoch_cyc = cyc;
- smp_wmb();
- cd->epoch_ns = ns;
- smp_wmb();
- cd->epoch_cyc_copy = cyc;
- raw_local_irq_restore(flags);
-}
-
-/*
- * If your clock rate is known at compile time, using this will allow
- * you to optimize the mult/shift loads away. This is paired with
- * init_fixed_sched_clock() to ensure that your mult/shift are correct.
- */
-static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd,
- u32 cyc, u32 mask, u32 mult, u32 shift)
-{
- u64 epoch_ns;
- u32 epoch_cyc;
-
- /*
- * Load the epoch_cyc and epoch_ns atomically. We do this by
- * ensuring that we always write epoch_cyc, epoch_ns and
- * epoch_cyc_copy in strict order, and read them in strict order.
- * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
- * the middle of an update, and we should repeat the load.
- */
- do {
- epoch_cyc = cd->epoch_cyc;
- smp_rmb();
- epoch_ns = cd->epoch_ns;
- smp_rmb();
- } while (epoch_cyc != cd->epoch_cyc_copy);
-
- return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift);
-}
-
-/*
- * Otherwise, you need to use this, which will obtain the mult/shift
- * from the clock_data structure. Use init_sched_clock() with this.
- */
-static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
- u32 cyc, u32 mask)
-{
- return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift);
-}
-
/*
* Initialize the clock data - calculate the appropriate multiplier
* and shift. Also setup a timer to ensure that the epoch is refreshed
* at the appropriate time interval, which will call your update
* handler.
*/
-void init_sched_clock(struct clock_data *, void (*)(void),
- unsigned int, unsigned long);
-
-/*
- * Use this initialization function rather than init_sched_clock() if
- * you're using cyc_to_fixed_sched_clock, which will warn if your
- * constants are incorrect.
- */
-static inline void init_fixed_sched_clock(struct clock_data *cd,
- void (*update)(void), unsigned int bits, unsigned long rate,
- u32 mult, u32 shift)
-{
- init_sched_clock(cd, update, bits, rate);
- if (cd->mult != mult || cd->shift != shift) {
- pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n"
- "sched_clock: fix multiply/shift to avoid scheduler hiccups\n",
- mult, shift, cd->mult, cd->shift);
- }
-}
+void init_sched_clock(u32 (*)(void), unsigned int, unsigned long);
extern void sched_clock_postinit(void);
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9a46370..dfee812 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -14,28 +14,107 @@
#include <asm/sched_clock.h>
+struct clock_data {
+ u64 epoch_ns;
+ u32 epoch_cyc;
+ u32 epoch_cyc_copy;
+ u32 mult;
+ u32 shift;
+ u32 mask;
+};
+
static void sched_clock_poll(unsigned long wrap_ticks);
static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
-static void (*sched_clock_update_fn)(void);
+static u32 (*sched_clock_read_fn)(void);
+static struct clock_data sched_clock_data;
+
+static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+{
+ return (cyc * mult) >> shift;
+}
+
+/*
+ * Atomically update the sched_clock epoch. Your update callback will
+ * be called from a timer before the counter wraps - read the current
+ * counter value, and call this function to safely move the epochs
+ * forward. Only use this from the update callback.
+ */
+static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask)
+{
+ unsigned long flags;
+ u64 ns = cd->epoch_ns +
+ cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift);
+
+ /*
+ * Write epoch_cyc and epoch_ns in a way that the update is
+ * detectable in cyc_to_sched_clock().
+ */
+ raw_local_irq_save(flags);
+ cd->epoch_cyc = cyc;
+ smp_wmb();
+ cd->epoch_ns = ns;
+ smp_wmb();
+ cd->epoch_cyc_copy = cyc;
+ raw_local_irq_restore(flags);
+}
+
+static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
+ u32 cyc, u32 mask)
+{
+ u64 epoch_ns;
+ u32 epoch_cyc;
+
+ /*
+ * Load the epoch_cyc and epoch_ns atomically. We do this by
+ * ensuring that we always write epoch_cyc, epoch_ns and
+ * epoch_cyc_copy in strict order, and read them in strict order.
+ * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
+ * the middle of an update, and we should repeat the load.
+ */
+ do {
+ epoch_cyc = cd->epoch_cyc;
+ smp_rmb();
+ epoch_ns = cd->epoch_ns;
+ smp_rmb();
+ } while (epoch_cyc != cd->epoch_cyc_copy);
+
+ return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask,
+ cd->mult, cd->shift);
+}
static void sched_clock_poll(unsigned long wrap_ticks)
{
+ struct clock_data *cd = &sched_clock_data;
mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
- sched_clock_update_fn();
+ update_sched_clock(cd, sched_clock_read_fn(), cd->mask);
}
-void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
+unsigned long long notrace sched_clock(void)
+{
+ struct clock_data *cd = &sched_clock_data;
+ u32 cyc = 0;
+
+ if (sched_clock_read_fn)
+ cyc = sched_clock_read_fn();
+
+ return cyc_to_sched_clock(cd, cyc, cd->mask);
+}
+
+void __init init_sched_clock(u32 (*read)(void),
unsigned int clock_bits, unsigned long rate)
{
+ struct clock_data *cd = &sched_clock_data;
unsigned long r, w;
u64 res, wrap;
char r_unit;
- sched_clock_update_fn = update;
+ sched_clock_read_fn = read;
/* calculate the mult/shift to convert counter ticks to ns. */
clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0);
+ cd->mask = (1ULL << clock_bits) - 1;
+
r = rate;
if (r >= 4000000) {
r /= 1000000;
@@ -46,7 +125,7 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
}
/* calculate how many ns until we wrap */
- wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift);
+ wrap = cyc_to_ns(cd->mask, cd->mult, cd->shift);
do_div(wrap, NSEC_PER_MSEC);
w = wrap;
@@ -60,7 +139,7 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
* sets the initial epoch.
*/
sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
- update();
+ update_sched_clock(cd, read(), cd->mask);
/*
* Ensure that sched_clock() starts off at 0ns
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 0777257..2951db0 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -402,18 +402,9 @@ void __init ixp4xx_sys_init(void)
/*
* sched_clock()
*/
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace ixp4xx_sched_clock_read(void)
{
- u32 cyc = *IXP4XX_OSTS;
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace ixp4xx_update_sched_clock(void)
-{
- u32 cyc = *IXP4XX_OSTS;
- update_sched_clock(&cd, cyc, (u32)~0);
+ return *IXP4XX_OSTS;
}
/*
@@ -429,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
EXPORT_SYMBOL(ixp4xx_timer_freq);
static void __init ixp4xx_clocksource_init(void)
{
- init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq);
+ init_sched_clock(ixp4xx_sched_clock_read, 32, ixp4xx_timer_freq);
clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
ixp4xx_clocksource_read);
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 4e91ee6..11f2bf1 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -42,8 +42,6 @@
#define MAX_DELTA (0xfffffffe)
#define MIN_DELTA (16)
-static DEFINE_CLOCK_DATA(cd);
-
/*
* FIXME: the timer needs some delay to stablize the counter capture
*/
@@ -59,16 +57,9 @@ static inline uint32_t timer_read(void)
return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));
}
-unsigned long long notrace sched_clock(void)
+static u32 notrace mmp_sched_clock_read(void)
{
- u32 cyc = timer_read();
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace mmp_update_sched_clock(void)
-{
- u32 cyc = timer_read();
- update_sched_clock(&cd, cyc, (u32)~0);
+ return timer_read();
}
static irqreturn_t timer_interrupt(int irq, void *dev_id)
@@ -201,7 +192,7 @@ void __init timer_init(int irq)
{
timer_config();
- init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE);
+ init_sched_clock(mmp_sched_clock_read, 32, CLOCK_TICK_RATE);
ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index a183777..e6df086 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -190,30 +190,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
* ---------------------------------------------------------------------------
*/
-static DEFINE_CLOCK_DATA(cd);
-
-static inline unsigned long long notrace _omap_mpu_sched_clock(void)
-{
- u32 cyc = ~omap_mpu_timer_read(1);
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-#ifndef CONFIG_OMAP_32K_TIMER
-unsigned long long notrace sched_clock(void)
-{
- return _omap_mpu_sched_clock();
-}
-#else
-static unsigned long long notrace omap_mpu_sched_clock(void)
-{
- return _omap_mpu_sched_clock();
-}
-#endif
-
-static void notrace mpu_update_sched_clock(void)
+static u32 notrace omap_mpu_sched_clock_read(void)
{
- u32 cyc = ~omap_mpu_timer_read(1);
- update_sched_clock(&cd, cyc, (u32)~0);
+ return = ~omap_mpu_timer_read(1);
}
static void __init omap_init_clocksource(unsigned long rate)
@@ -223,7 +202,7 @@ static void __init omap_init_clocksource(unsigned long rate)
"%s: can't register clocksource!\n";
omap_mpu_timer_start(1, ~0, 1);
- init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+ init_sched_clock(omap_mpu_sched_clock_read, 32, rate);
if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
300, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index cf1de7d..a0d4199 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -248,7 +248,6 @@ static struct omap_dm_timer clksrc;
/*
* clocksource
*/
-static DEFINE_CLOCK_DATA(cd);
static cycle_t clocksource_read_cycles(struct clocksource *cs)
{
return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
@@ -262,23 +261,9 @@ static struct clocksource clocksource_gpt = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-static void notrace dmtimer_update_sched_clock(void)
+static u32 notrace dmtimer_sched_clock_read(void)
{
- u32 cyc;
-
- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
-
- update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = 0;
-
- if (clksrc.reserved)
- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
-
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+ return __omap_dm_timer_read_counter(clksrc.io_base, 1);
}
/* Setup free-running counter for clocksource */
@@ -295,7 +280,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
__omap_dm_timer_load_start(clksrc.io_base,
OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
+ init_sched_clock(dmtimer_sched_clock_read, 32, clksrc.rate);
if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index de68470..ff0b1a6 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -24,26 +24,9 @@
#include <asm/sched_clock.h>
#include <mach/regs-ost.h>
-/*
- * This is PXA's sched_clock implementation. This has a resolution
- * of at least 308 ns and a maximum value of 208 days.
- *
- * The return value is guaranteed to be monotonic in that range as
- * long as there is always less than 582 seconds between successive
- * calls to sched_clock() which should always be the case in practice.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = OSCR;
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace pxa_update_sched_clock(void)
+static u32 notrace pxa_sched_clock_read(void)
{
- u32 cyc = OSCR;
- update_sched_clock(&cd, cyc, (u32)~0);
+ return OSCR;
}
@@ -119,7 +102,7 @@ static void __init pxa_timer_init(void)
OIER = 0;
OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
- init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
+ init_sched_clock(pxa_sched_clock_read, 32, clock_tick_rate);
clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
ckevt_pxa_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fa66024..ebaa64e 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -20,29 +20,9 @@
#include <asm/sched_clock.h>
#include <mach/hardware.h>
-/*
- * This is the SA11x0 sched_clock implementation.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
- * NSEC_PER_SEC, 60).
- * This gives a resolution of about 271ns and a wrap period of about 19min.
- */
-#define SC_MULT 2275555556u
-#define SC_SHIFT 23
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = OSCR;
- return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-static void notrace sa1100_update_sched_clock(void)
+static u32 notrace sa1100_sched_clock_read(void)
{
- u32 cyc = OSCR;
- update_sched_clock(&cd, cyc, (u32)~0);
+ return OSCR;
}
#define MIN_OSCR_DELTA 2
@@ -109,8 +89,7 @@ static void __init sa1100_timer_init(void)
OIER = 0;
OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
- init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
- 3686400, SC_MULT, SC_SHIFT);
+ init_sched_clock(sa1100_sched_clock_read, 32, 3686400);
clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
ckevt_sa1100_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 9035042..fdf1e12 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -106,25 +106,9 @@ static struct clock_event_device tegra_clockevent = {
.set_mode = tegra_timer_set_mode,
};
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 1us and a wrap period of about 1h11min.
- */
-#define SC_MULT 4194304000u
-#define SC_SHIFT 22
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = timer_readl(TIMERUS_CNTR_1US);
- return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-static void notrace tegra_update_sched_clock(void)
+static u32 notrace tegra_sched_clock_read(void)
{
- u32 cyc = timer_readl(TIMERUS_CNTR_1US);
- update_sched_clock(&cd, cyc, (u32)~0);
+ return timer_readl(TIMERUS_CNTR_1US);
}
/*
@@ -218,8 +202,7 @@ static void __init tegra_init_timer(void)
WARN(1, "Unknown clock rate");
}
- init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
- 1000000, SC_MULT, SC_SHIFT);
+ init_sched_clock(tegra_sched_clock_read, 32, 1000000);
if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
"timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 5f51bde..2301f71 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -330,25 +330,9 @@ static struct irqaction u300_timer_irq = {
.handler = u300_timer_interrupt,
};
-/*
- * Override the global weak sched_clock symbol with this
- * local implementation which uses the clocksource to get some
- * better resolution when scheduling the kernel. We accept that
- * this wraps around for now, since it is just a relative time
- * stamp. (Inspired by OMAP implementation.)
- */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace u300_update_sched_clock(void)
+static u32 notrace u300_sched_clock_read(void)
{
- u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
- update_sched_clock(&cd, cyc, (u32)~0);
+ return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
}
@@ -366,7 +350,7 @@ static void __init u300_timer_init(void)
clk_enable(clk);
rate = clk_get_rate(clk);
- init_sched_clock(&cd, u300_update_sched_clock, 32, rate);
+ init_sched_clock(u300_sched_clock_read, 32, rate);
/*
* Disable the "OS" and "DD" timers - these are designed for Symbian!
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 7cdc516..b038636 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -51,21 +51,12 @@ static struct clocksource iop_clocksource = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-static DEFINE_CLOCK_DATA(cd);
-
/*
* IOP sched_clock() implementation via its clocksource.
*/
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = 0xffffffffu - read_tcr1();
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace iop_update_sched_clock(void)
+static u32 notrace iop_sched_clock_read(void)
{
- u32 cyc = 0xffffffffu - read_tcr1();
- update_sched_clock(&cd, cyc, (u32)~0);
+ return cyc = 0xffffffffu - read_tcr1();
}
/*
@@ -151,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
{
u32 timer_ctl;
- init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate);
+ init_sched_clock(iop_sched_clock_read, 32, tick_rate);
ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 4b0fe28..b74f721 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void)
static void __iomem *sched_clock_reg;
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace mxc_sched_clock_read(void)
{
- cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace mxc_update_sched_clock(void)
-{
- cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
- update_sched_clock(&cd, cyc, (u32)~0);
+ return __raw_readl(sched_clock_reg);
}
static int __init mxc_clocksource_init(struct clk *timer_clk)
@@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
sched_clock_reg = reg;
- init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
+ init_sched_clock(mxc_sched_clock_read, 32, c);
return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
clocksource_mmio_readl_up);
}
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index ef74e15..6e38ed1 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -25,28 +25,9 @@
void __iomem *mtu_base; /* Assigned by machine code */
-/*
- * Override the global weak sched_clock symbol with this
- * local implementation which uses the clocksource to get some
- * better resolution when scheduling the kernel.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc;
-
- if (unlikely(!mtu_base))
- return 0;
-
- cyc = -readl(mtu_base + MTU_VAL(0));
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace nomadik_update_sched_clock(void)
+static u32 notrace nomadik_sched_clock_read(void)
{
- u32 cyc = -readl(mtu_base + MTU_VAL(0));
- update_sched_clock(&cd, cyc, (u32)~0);
+ return -readl(mtu_base + MTU_VAL(0));
}
/* Clockevent device: use one-shot mode */
@@ -154,7 +135,7 @@ void __init nmdk_timer_init(void)
pr_err("timer: failed to initialize clock source %s\n",
"mtu_0");
- init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
+ init_sched_clock(nomadik_sched_clock_read, 32, rate);
/* Timer 1 is used for events */
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index a6cbb71..1faa7ce 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -37,41 +37,9 @@ static void __iomem *timer_32k_base;
#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
-/*
- * Returns current time from boot in nsecs. It's OK for this to wrap
- * around for now, as it's just a relative time stamp.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
- * This gives a resolution of about 30us and a wrap period of about 36hrs.
- */
-#define SC_MULT 4000000000u
-#define SC_SHIFT 17
-
-static inline unsigned long long notrace _omap_32k_sched_clock(void)
-{
- u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
- return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
-unsigned long long notrace sched_clock(void)
-{
- return _omap_32k_sched_clock();
-}
-#else
-unsigned long long notrace omap_32k_sched_clock(void)
-{
- return _omap_32k_sched_clock();
-}
-#endif
-
-static void notrace omap_update_sched_clock(void)
+static inline u32 notrace omap_32k_sched_clock_read(void)
{
- u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
- update_sched_clock(&cd, cyc, (u32)~0);
+ return __raw_readl(timer_32k_base);
}
/**
@@ -147,8 +115,7 @@ int __init omap_init_clocksource_32k(void)
clocksource_mmio_readl_up))
printk(err, "32k_counter");
- init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
- 32768, SC_MULT, SC_SHIFT);
+ init_sched_clock(omap_32k_sched_clock_read, 32, 32768);
}
return 0;
}
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 69a6136..34e8224 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -60,24 +60,14 @@ static u32 ticks_per_jiffy;
* Orion's sched_clock implementation. It has a resolution of
* at least 7.5ns (133MHz TCLK).
*/
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
-{
- u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-
-static void notrace orion_update_sched_clock(void)
+static u32 notrace orion_sched_clock_read(void)
{
- u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
- update_sched_clock(&cd, cyc, (u32)~0);
+ return = ~readl(timer_base + TIMER0_VAL_OFF);
}
static void __init setup_sched_clock(unsigned long tclk)
{
- init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
+ init_sched_clock(orion_sched_clock_read, 32, tclk);
}
/*
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index c833e7b..6fc1121 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -314,33 +314,10 @@ static void __iomem *s5p_timer_reg(void)
return S3C_TIMERREG(offset);
}
-/*
- * Override the global weak sched_clock symbol with this
- * local implementation which uses the clocksource to get some
- * better resolution when scheduling the kernel. We accept that
- * this wraps around for now, since it is just a relative time
- * stamp. (Inspired by U300 implementation.)
- */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace s5p_sched_clock_read(void)
{
void __iomem *reg = s5p_timer_reg();
-
- if (!reg)
- return 0;
-
- return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
-}
-
-static void notrace s5p_update_sched_clock(void)
-{
- void __iomem *reg = s5p_timer_reg();
-
- if (!reg)
- return;
-
- update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
+ return ~__raw_readl(reg);
}
static void __init s5p_clocksource_init(void)
@@ -358,7 +335,7 @@ static void __init s5p_clocksource_init(void)
s5p_time_setup(timer_source.source_id, TCNT_MAX);
s5p_time_start(timer_source.source_id, PERIODIC);
- init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
+ init_sched_clock(s5p_sched_clock_read, 32, clock_rate);
if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
clock_rate, 250, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 3d6a4c2..d9d5ba4 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -24,35 +24,15 @@
#include <asm/sched_clock.h>
#include <plat/sched_clock.h>
-static DEFINE_CLOCK_DATA(cd);
static void __iomem *ctr;
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 41ns and a wrap period of about 178s.
- */
-#define SC_MULT 2796202667u
-#define SC_SHIFT 26
-
-unsigned long long notrace sched_clock(void)
-{
- if (ctr) {
- u32 cyc = readl(ctr);
- return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
- SC_MULT, SC_SHIFT);
- } else
- return 0;
-}
-
-static void notrace versatile_update_sched_clock(void)
+static u32 notrace versatile_sched_clock_read(void)
{
- u32 cyc = readl(ctr);
- update_sched_clock(&cd, cyc, (u32)~0);
+ return readl(ctr);
}
void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
{
ctr = reg;
- init_fixed_sched_clock(&cd, versatile_update_sched_clock,
- 32, rate, SC_MULT, SC_SHIFT);
+ init_sched_clock(versatile_sched_clock_read, 32, rate);
}
^ permalink raw reply related
* [GIT PULL] omap cleanup part1 for v3.2 merge window
From: Kevin Hilman @ 2011-09-22 16:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201109221633.14887.arnd@arndb.de>
Arnd Bergmann <arnd@arndb.de> writes:
> On Wednesday 21 September 2011, Kevin Hilman wrote:
>> Found. Patch below.
>>
>> If this one is OK, I'll push to my for_3.2/voltage-cleanup branch (which
>> is already pulled into arm-soc/next/voltage) so just re-pulling will
>> pick up the fix.
>
> Looks good to me, it's always nice when a bug fix is also a cleanup ;-)
>
OK, added it to the branch you've already pulled[1], if you (re)pull,
you'll get the fix too.
Thanks,
Kevin
[1] git://gitorious.org/khilman/linux-omap-pm.git for_3.2/voltage_cleanup
^ permalink raw reply
* DT vs ARM static mappings
From: Pawel Moll @ 2011-09-22 16:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201109202128.55517.arnd@arndb.de>
> - map the entire I/O area in map_io(), depending on the board
> - have an __iomem pointer for the sysreg
> - populate that pointer using of_iomap from the device tree address
> before you first access it.
Ok, so what I came with is below... It's based more-or-less on top of
Dave's patch (it's just a development snapshot, don't treat it as a
final proposal).
Executive summary:
* I have second map_desc with pfn for RS1 memory map, but using the same
virtual address as the legacy one. The legacy one is used if root of the
tree is compatible with "arm,vexpress-legacy".
* The devices I need to use in v2m.c have aliases in DTS so I can find
their offsets in the flat tree (the *_find_node_by_alias() function is
rather generic and could be moved to drivers/of/fdt.c if you think it
would be useful for others).
* There are no more users of MMIO_P2V in v2m.c, next thing I will do is
the same in core tile; then the macro can be killed. Once this happens
the virtual address currently taken from __MMIO_P2V(V2M_PA_CS7) will be
replaced by some kind of "#define V2M_PERIPH_BASE 0xf8000000".
* Once Nico's changes regarding static maps are in, the manual pointer
operations in v2m_dt_map_io can be replaced with neat ioremap()-s.
All feedback appreciated, cheers!
Pawe?
diff --git a/arch/arm/boot/dts/vexpress-v2m-legacy.dtsi b/arch/arm/boot/dts/vexpress-v2m-legacy.dtsi
index cb18052..ec40e5c 100644
--- a/arch/arm/boot/dts/vexpress-v2m-legacy.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-legacy.dtsi
@@ -9,6 +9,10 @@
serial3 = &uart3;
i2c0 = &i2c0;
i2c1 = &i2c1;
+ timer01 = &timer01;
+ timer23 = &timer23;
+ sysreg = &sysreg;
+ sysctl = &sysctl;
};
motherboard {
@@ -48,6 +52,16 @@
#size-cells = <1>;
ranges = <0 7 0 0x20000>;
+ sysreg: sysreg at 00000 {
+ compatible = "arm,vexpress-sysreg";
+ reg = <0x00000 0x1000>;
+ };
+
+ sysctl: sysctl at 01000 {
+ compatible = "arm,sp810";
+ reg = <0x01000 0x1000>;
+ };
+
// PCI-E I2C bus
i2c0: i2c at 02000 {
compatible = "arm,versatile-i2c";
@@ -116,6 +130,16 @@
interrupts = <0>;
};
+ timer01: timer at 11000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x11000 0x1000>;
+ };
+
+ timer23: timer at 12000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ };
+
// DVI I2C bus
i2c1: i2c at 16000 {
compatible = "arm,versatile-i2c";
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 5fc4871..dadaae1 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -6,7 +6,7 @@
/ {
model = "ARM Versatile Express";
- compatible = "arm,vexpress-v2p-ca9", "arm,vexpress";
+ compatible = "arm,vexpress-v2p-ca9", "arm,vexpress-legacy", "arm,vexpress";
interrupt-parent = <&intc>;
memory {
diff --git a/arch/arm/include/asm/hardware/arm_timer.h b/arch/arm/include/asm/hardware/arm_timer.h
index c0f4e7b..d6030ff 100644
--- a/arch/arm/include/asm/hardware/arm_timer.h
+++ b/arch/arm/include/asm/hardware/arm_timer.h
@@ -9,7 +9,12 @@
*
* Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
* can have 16-bit or 32-bit selectable via a bit in the control register.
+ *
+ * Every SP804 contains two identical timers.
*/
+#define TIMER_1_BASE 0x00
+#define TIMER_2_BASE 0x20
+
#define TIMER_LOAD 0x00 /* ACVR rw */
#define TIMER_VALUE 0x04 /* ACVR ro */
#define TIMER_CTRL 0x08 /* ACVR rw */
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
index 0a3a375..0b42b96 100644
--- a/arch/arm/mach-vexpress/include/mach/motherboard.h
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -39,34 +39,27 @@
#define V2M_CF (V2M_PA_CS7 + 0x0001a000)
#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000)
-#define V2M_SYS_ID (V2M_SYSREGS + 0x000)
-#define V2M_SYS_SW (V2M_SYSREGS + 0x004)
-#define V2M_SYS_LED (V2M_SYSREGS + 0x008)
-#define V2M_SYS_100HZ (V2M_SYSREGS + 0x024)
-#define V2M_SYS_FLAGS (V2M_SYSREGS + 0x030)
-#define V2M_SYS_FLAGSSET (V2M_SYSREGS + 0x030)
-#define V2M_SYS_FLAGSCLR (V2M_SYSREGS + 0x034)
-#define V2M_SYS_NVFLAGS (V2M_SYSREGS + 0x038)
-#define V2M_SYS_NVFLAGSSET (V2M_SYSREGS + 0x038)
-#define V2M_SYS_NVFLAGSCLR (V2M_SYSREGS + 0x03c)
-#define V2M_SYS_MCI (V2M_SYSREGS + 0x048)
-#define V2M_SYS_FLASH (V2M_SYSREGS + 0x03c)
-#define V2M_SYS_CFGSW (V2M_SYSREGS + 0x058)
-#define V2M_SYS_24MHZ (V2M_SYSREGS + 0x05c)
-#define V2M_SYS_MISC (V2M_SYSREGS + 0x060)
-#define V2M_SYS_DMA (V2M_SYSREGS + 0x064)
-#define V2M_SYS_PROCID0 (V2M_SYSREGS + 0x084)
-#define V2M_SYS_PROCID1 (V2M_SYSREGS + 0x088)
-#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
-#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
-#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
-
-#define V2M_TIMER0 (V2M_TIMER01 + 0x000)
-#define V2M_TIMER1 (V2M_TIMER01 + 0x020)
-
-#define V2M_TIMER2 (V2M_TIMER23 + 0x000)
-#define V2M_TIMER3 (V2M_TIMER23 + 0x020)
-
+#define V2M_SYS_ID 0x000
+#define V2M_SYS_SW 0x004
+#define V2M_SYS_LED 0x008
+#define V2M_SYS_100HZ 0x024
+#define V2M_SYS_FLAGS 0x030
+#define V2M_SYS_FLAGSSET 0x030
+#define V2M_SYS_FLAGSCLR 0x034
+#define V2M_SYS_NVFLAGS 0x038
+#define V2M_SYS_NVFLAGSSET 0x038
+#define V2M_SYS_NVFLAGSCLR 0x03c
+#define V2M_SYS_MCI 0x048
+#define V2M_SYS_FLASH 0x03c
+#define V2M_SYS_CFGSW 0x058
+#define V2M_SYS_24MHZ 0x05c
+#define V2M_SYS_MISC 0x060
+#define V2M_SYS_DMA 0x064
+#define V2M_SYS_PROCID0 0x084
+#define V2M_SYS_PROCID1 0x088
+#define V2M_SYS_CFGDATA 0x0a0
+#define V2M_SYS_CFGCTRL 0x0a4
+#define V2M_SYS_CFGSTAT 0x0a8
/*
* Interrupts. Those in {} are for AMBA devices
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index ed00d52..16e4006 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -6,6 +6,8 @@
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <linux/init.h>
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
@@ -33,13 +35,14 @@
#include "core.h"
+/* Legacy memory map values for backward compatibility */
#define V2M_PA_CS0 0x40000000
#define V2M_PA_CS1 0x44000000
#define V2M_PA_CS2 0x48000000
#define V2M_PA_CS3 0x4c000000
#define V2M_PA_CS7 0x10000000
-static struct map_desc v2m_io_desc[] __initdata = {
+static struct map_desc v2m_legacy_io_desc[] __initdata = {
{
.virtual = __MMIO_P2V(V2M_PA_CS7),
.pfn = __phys_to_pfn(V2M_PA_CS7),
@@ -48,21 +51,36 @@ static struct map_desc v2m_io_desc[] __initdata = {
},
};
+static struct map_desc v2m_rs1_io_desc[] __initdata = {
+ {
+ .virtual = __MMIO_P2V(V2M_PA_CS7),
+ .pfn = __phys_to_pfn(0x1c000000),
+ .length = SZ_2M,
+ .type = MT_DEVICE,
+ },
+};
+
+static void __iomem *v2m_sysreg_base;
+static void __iomem *v2m_sysctl_base;
+static void __iomem *v2m_timer01_base;
+
+
+
static void __init v2m_timer_init(void)
{
u32 scctrl;
/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
- scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
+ scctrl = readl(v2m_sysctl_base + SCCTRL);
scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
- writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
+ writel(scctrl, v2m_sysctl_base + SCCTRL);
- writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
- writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
+ writel(0, v2m_timer01_base + TIMER_1_BASE + TIMER_CTRL);
+ writel(0, v2m_timer01_base + TIMER_2_BASE + TIMER_CTRL);
- sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1");
- sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0,
+ sp804_clocksource_init(v2m_timer01_base + TIMER_1_BASE, "v2m-timer1");
+ sp804_clockevents_init(v2m_timer01_base + TIMER_2_BASE, IRQ_V2M_TIMER0,
"v2m-timer0");
}
@@ -83,14 +101,14 @@ int v2m_cfg_write(u32 devfn, u32 data)
devfn |= SYS_CFG_START | SYS_CFG_WRITE;
spin_lock(&v2m_cfg_lock);
- val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
- writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
+ val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
+ writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
- writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
- writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
+ writel(data, v2m_sysreg_base + V2M_SYS_CFGDATA);
+ writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
do {
- val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
+ val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
} while (val == 0);
spin_unlock(&v2m_cfg_lock);
@@ -104,17 +122,17 @@ int v2m_cfg_read(u32 devfn, u32 *data)
devfn |= SYS_CFG_START;
spin_lock(&v2m_cfg_lock);
- writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
- writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
+ writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
+ writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
mb();
do {
cpu_relax();
- val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
+ val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
} while (val == 0);
- *data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
+ *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
spin_unlock(&v2m_cfg_lock);
return !!(val & SYS_CFG_ERR);
@@ -205,7 +223,7 @@ static struct platform_device v2m_usb_device = {
static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
{
- writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
+ writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
}
static struct physmap_flash_data v2m_flash_data = {
@@ -259,7 +277,7 @@ static struct platform_device v2m_cf_device = {
static unsigned int v2m_mmci_status(struct device *dev)
{
- return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
+ return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
}
static struct mmci_platform_data v2m_mmci_data = {
@@ -372,7 +390,7 @@ static void __init v2m_init_early(void)
{
ct_desc->init_early();
clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
- versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
+ versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
}
static void v2m_power_off(void)
@@ -401,7 +419,8 @@ static void __init v2m_populate_ct_desc(void)
u32 current_tile_id;
ct_desc = NULL;
- current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;
+ current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
+ & V2M_CT_ID_MASK;
for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
if (ct_descs[i]->id == current_tile_id)
@@ -414,7 +433,10 @@ static void __init v2m_populate_ct_desc(void)
static void __init v2m_map_io(void)
{
- iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
+ iotable_init(v2m_legacy_io_desc, ARRAY_SIZE(v2m_legacy_io_desc));
+ v2m_sysreg_base = MMIO_P2V(V2M_SYSREGS);
+ v2m_sysctl_base = MMIO_P2V(V2M_SYSCTL);
+ v2m_timer01_base = MMIO_P2V(V2M_TIMER01);
v2m_populate_ct_desc();
ct_desc->map_io();
}
@@ -472,6 +494,135 @@ struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {
{}
};
+struct v2m_dt_find_alias_state {
+ const char *alias;
+ unsigned long node;
+ const char *path;
+ int depth;
+ int token_len;
+
+};
+
+static int __init v2m_dt_scan_path(unsigned long node,
+ const char *uname, int depth, void *data)
+{
+ struct v2m_dt_find_alias_state *state = data;
+
+ pr_debug("%s: uname='%s', depth=%d, state->path='%s', state->depth=%d,"
+ " state->token_len=%d\n", __func__, uname, depth,
+ state->path, state->depth, state->token_len);
+
+ /* If the depth decreases, we didn't find the path */
+ if (depth < state->depth)
+ return -ENOENT;
+
+ /* Check if path ~= /^uname[\/\0]/ */
+ if (strncmp(state->path, uname, state->token_len) == 0 &&
+ uname[state->token_len] == 0) {
+ const char *slash;
+
+ state->depth++;
+ state->path += state->token_len; /* Next token */
+ if (*state->path == 0) { /* All path tokens processed? */
+ state->node = node;
+ return 1; /* Success! */
+ }
+ BUG_ON(*state->path != '/');
+ state->path++; /* Skip leading slash */
+ slash = strchr(state->path, '/');
+ if (!slash)
+ state->token_len = strlen(state->path);
+ else
+ state->token_len = slash - state->path;
+ }
+
+ return 0;
+}
+
+static int __init v2m_dt_scan_alias(unsigned long node,
+ const char *uname, int depth, void *data)
+{
+ int res;
+ struct v2m_dt_find_alias_state *state = data;
+
+ if (depth != 1 || strcmp(uname, "aliases") != 0)
+ return 0;
+
+ state->path = of_get_flat_dt_prop(node, state->alias, NULL);
+ if (!state->path)
+ return -ENXIO;
+ if (*state->path != '/')
+ return -EFAULT;
+
+ state->token_len = 0; /* Root node has no name */
+ res = of_scan_flat_dt(v2m_dt_scan_path, state);
+ if (res == 0) /* Whole tree scanned, no path found */
+ res = -ENOENT;
+
+ return res;
+}
+
+static int __init v2m_dt_find_node_by_alias(const char *alias,
+ unsigned long *node)
+{
+ int err;
+ struct v2m_dt_find_alias_state state = {
+ .alias = alias,
+ };
+
+ err = of_scan_flat_dt(v2m_dt_scan_alias, &state);
+
+ if (err > 0)
+ *node = state.node;
+
+ return err;
+}
+
+static unsigned long __init v2m_dt_periph_offset(const char *alias)
+{
+ unsigned long node;
+ __be32 *reg;
+ unsigned long len;
+ unsigned long offset;
+
+ if (v2m_dt_find_node_by_alias(alias, &node) <= 0)
+ panic("%s(): Can't get offset for '%s'!\n", __func__, alias);
+
+ reg = of_get_flat_dt_prop(node, "reg", &len);
+ if (!reg)
+ panic("%s(): Can't get reg property for '%s'!\n",
+ __func__, alias);
+
+ return be32_to_cpup(reg);
+}
+
+static void __init v2m_dt_map_io(void)
+{
+ void __iomem *periph_base;
+
+ if (of_flat_dt_is_compatible(of_get_flat_dt_root(),
+ "arm,vexpress-legacy")) {
+ pr_info("v2m: Legacy memory map.\n");
+ iotable_init(v2m_legacy_io_desc,
+ ARRAY_SIZE(v2m_legacy_io_desc));
+ /* Won't be needed once we can call ioremap() in map_io */
+ periph_base = (void __iomem *)v2m_legacy_io_desc[0].virtual;
+ } else {
+ printk("v2m: RS1 memory map.\n");
+ iotable_init(v2m_rs1_io_desc,
+ ARRAY_SIZE(v2m_rs1_io_desc));
+ /* Won't be needed once we can call ioremap() in map_io */
+ periph_base = (void __iomem *)v2m_legacy_io_desc[0].virtual;
+ }
+
+ v2m_sysreg_base = periph_base + v2m_dt_periph_offset("sysreg");
+ v2m_sysctl_base = periph_base + v2m_dt_periph_offset("sysctl");
+ v2m_timer01_base = periph_base + v2m_dt_periph_offset("timer01");
+
+ v2m_populate_ct_desc();
+ ct_desc->map_io();
+}
+
static void __init v2m_dt_init(void)
{
of_platform_populate(NULL, of_default_bus_match_table,
@@ -489,7 +640,7 @@ static const char *v2m_dt_match[] __initconst = {
};
DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
- .map_io = v2m_map_io,
+ .map_io = v2m_dt_map_io,
.init_early = v2m_init_early,
.init_irq = v2m_init_irq,
.timer = &v2m_timer,
^ permalink raw reply related
* [PATCH] arm/tegra: select AUTO_ZRELADDR by default
From: Stephen Warren @ 2011-09-22 16:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316698045-23190-1-git-send-email-pdeschrijver@nvidia.com>
Peter De Schrijver wrote at Thursday, September 22, 2011 7:27 AM:
> This patch causes the kernel uncompressor to determine the physical address
> of the SDRAM at runtime. This allows the kernel to boot on both tegra2 and
> tegra3 even though SDRAM is at different physical addresses on both SoCs.
Since this deals with Tegra, it should be mailed to/cc the Tegra
Maintainers and mailing list too (I've done that here). get_maintainer.pl
will no doubt list the main linux-kernel mailing list too.
> Change-Id: I91857a590946bbc54168c04bea3a5bd576d87824
And the internal Change-Id lines should be stripped for upstream
submissions.
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
>
> ---
> arch/arm/Kconfig | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 4fda167..9fc0678 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -600,6 +600,7 @@ config ARCH_TEGRA
> select HAVE_CLK
> select HAVE_SCHED_CLOCK
> select ARCH_HAS_CPUFREQ
> + select AUTO_ZRELADDR
> help
> This enables support for NVIDIA Tegra based systems (Tegra APX,
> Tegra 6xx and Tegra 2 series).
> --
> 1.7.7.rc0.72.g4b5ea.dirty
--
nvpublic
^ permalink raw reply
* [PATCH 1/3] arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.h
From: Stephen Warren @ 2011-09-22 16:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110922081140.GH17169@n2100.arm.linux.org.uk>
Russell King - ARM Linux wrote at Thursday, September 22, 2011 2:12 AM:
> On Wed, Sep 21, 2011 at 01:16:49PM -0700, Olof Johansson wrote:
> > Works for me. Or I could stage it in a topic branch that would be
> > merged after Russell's GPIO tree.
>
> Holding stuff off from being merged doesn't work.
Russell,
So I take it I should add the two ack'd patches to the ARM patch system,
and have you pick them up?
Thanks.
> If you have the following commit structure:
>
> A---...-----M1-B-C-M2
> +---A1-B1-C1' /
> +-A2-B2-C2-------'
>
> Now, lets say A2 depends on C1. Merely delaying the stuff so that M2
> happens after M1 is insufficient to ensure git state doesn't break.
> When bisecting, its entirely possible that the bisect algorithm may
> chose B2 as a potential test candidate. At that point you end up with
> A2, but without C1.
>
> The only way to solve this is to have A2 following on from C1 - which
> of course requires A1..C1 to be declared stable and either pulled into
> your local tree or for A2..C2 to be submitted to the same tree which
> A1..C1 are already in.
--
nvpupblic
^ permalink raw reply
* [PATCH 1/3] arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.h
From: Russell King - ARM Linux @ 2011-09-22 16:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF1739554CBD@HQMAIL01.nvidia.com>
On Thu, Sep 22, 2011 at 09:31:48AM -0700, Stephen Warren wrote:
> Russell King - ARM Linux wrote at Thursday, September 22, 2011 2:12 AM:
> > On Wed, Sep 21, 2011 at 01:16:49PM -0700, Olof Johansson wrote:
> > > Works for me. Or I could stage it in a topic branch that would be
> > > merged after Russell's GPIO tree.
> >
> > Holding stuff off from being merged doesn't work.
>
> Russell,
>
> So I take it I should add the two ack'd patches to the ARM patch system,
> and have you pick them up?
That's a workable solution, yes. I've done that with various other
gpio patches from people, and Grant seems happy with that.
^ permalink raw reply
* [GIT PULL] OMAP: omap_device cleanup for v3.2
From: Kevin Hilman @ 2011-09-22 16:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110921182051.GH2937@atomide.com>
Tony Lindgren <tony@atomide.com> writes:
> * Kevin Hilman <khilman@ti.com> [110915 16:23]:
>> Kevin Hilman <khilman@ti.com> writes:
>>
>> > Please pull this omap_device cleanup series for v3.2. This sets the
>> > groundwork for Benoit's DT infrastructure work.
>>
>> Turns out this series has a dependency on a patch[1] in Russell's
>> for-next branch.
>>
>> Russell, any chance of picking this patch into your devel-stable so we
>> have a fixed point to merge with?
>
> Or maybe Kevin can add it to his series instead?
OK, Russell and I agreed (offline) that I would just take this patch,
and he will drop from his for-next branch.
I've cherry-picked it into the my branch, and here's the updated pull
request. Should have no external dependencies now, and I compile tested
for OMAP1 and OMAP2+ on top of the arm-soc/next/cleanup branch.
Kevin
The following changes since commit b6fd41e29dea9c6753b1843a77e50433e6123bcb:
Linux 3.1-rc6 (2011-09-12 14:02:02 -0700)
are available in the git repository at:
git://gitorious.org/khilman/linux-omap-pm.git for_3.2/omap_device
Grazvydas Ignotas (1):
OMAP: omap_device: make latency autoadjust messages debug
Jarkko Nikula (1):
omap: mcbsp: Remove omap device API
Kevin Hilman (7):
OMAP: omap_device: replace debug/warning/error prints with dev_* macros
OMAP: omap_device: remove internal functions from omap_device.h
OMAP: omap_device: when building return platform_device instead of omap_device
OMAP: omap_device: device register functions now take platform_device pointer
OMAP: omap_device: _disable_idle_on_suspend() takes platform_device pointer
OMAP: omap_device: decouple platform_device from omap_device
ARM: 7082/1: platform_device: pdev_archdata: add omap_device pointer
arch/arm/include/asm/device.h | 5 +
arch/arm/mach-omap2/devices.c | 44 +++---
arch/arm/mach-omap2/display.c | 6 +-
arch/arm/mach-omap2/dma.c | 16 +-
arch/arm/mach-omap2/gpio.c | 10 +-
arch/arm/mach-omap2/hsmmc.c | 8 +-
arch/arm/mach-omap2/hwspinlock.c | 8 +-
arch/arm/mach-omap2/mcbsp.c | 8 +-
arch/arm/mach-omap2/opp.c | 2 +-
arch/arm/mach-omap2/pm.c | 8 +-
arch/arm/mach-omap2/serial.c | 14 +-
arch/arm/mach-omap2/sr_device.c | 6 +-
arch/arm/plat-omap/i2c.c | 8 +-
arch/arm/plat-omap/include/plat/omap_device.h | 30 ++--
arch/arm/plat-omap/mcbsp.c | 27 ----
arch/arm/plat-omap/omap_device.c | 185 +++++++++++++------------
16 files changed, 185 insertions(+), 200 deletions(-)
^ permalink raw reply
* [PATCH 2/3] arm/tegra: add support for ventana pinmuxing
From: Stephen Warren @ 2011-09-22 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316686384-20236-3-git-send-email-pdeschrijver@nvidia.com>
Peter De Schrijver wrote at Thursday, September 22, 2011 4:13 AM:
> Add support for ventana pinmuxing as a seaboard derivative. This is a cut down
> version of chromeos kernel commit 772f1b56e713be7a55759c2d5eadb9eb11d078db
> by Jong Kim <jongk@nvidia.com>.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Could you please repost these to the Tegra maintainers/lists as well.
> diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
...
> +static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
The indentation of this new array uses a mix of spaces and TABs between
the fields. Probably best to consistently use one or the other. For
reference, the existing seaboard_pinmux[] uses just spaces internally.
> + {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
...
> + {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
Finally, it's probably a good idea to add a patch to fix mach-tegra/Makefile
such that CONFIG_MACH_TEGRA_DT includes board-seaboard-pinmux.o. I know
internally I said it wasn't worth it since we'd be removing the pinmux
calls from board-dt.c soon, but I'm thinking now it'll take a little
while to sort that out, since I probably need to rework my patches for
that so they're implemented within the core pinmux subsystem rather than
separately within the Tegra pinmux driver. Sorry for flip-flopping here.
--
nvpublic
^ permalink raw reply
* [PATCH for 3.1] ARM: at91: add PWM driver selector in Kconfig for 9g45 family
From: Nicolas Ferre @ 2011-09-22 17:02 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
drivers/misc/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 2d6423c..7ce658e 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -63,7 +63,7 @@ config AD525X_DPOT_SPI
config ATMEL_PWM
tristate "Atmel AT32/AT91 PWM support"
- depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9
+ depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 || ARCH_AT91CAP9
help
This option enables device driver support for the PWM channels
on certain Atmel processors. Pulse Width Modulation is used for
--
1.7.3
^ permalink raw reply related
* [PATCH for 3.1] ARM: at91: add defconfig for at91sam9g45 family
From: Nicolas Ferre @ 2011-09-22 17:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316710934-22405-1-git-send-email-nicolas.ferre@atmel.com>
Defconfig file for at91sam9g45 SoC family:
at91sam9g45, at91sam9g46, at91sam9m10, at91sam9m11.
The Atmel Evaluation Kit for this family is the at91sam9m10g45ek.
It is so useful for automatic compile tests...
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/configs/at91sam9g45_defconfig | 214 ++++++++++++++++++++++++++++++++
1 files changed, 214 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/configs/at91sam9g45_defconfig
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
new file mode 100644
index 0000000..c5876d2
--- /dev/null
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -0,0 +1,214 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9G45=y
+CONFIG_MACH_AT91SAM9M10G45EK=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_SLOW_CLOCK=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_LEDS=y
+CONFIG_LEDS_CPU=y
+CONFIG_UACCESS_WITH_MEMCPY=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x71100000,25165824 root=/dev/ram0 rw"
+CONFIG_AUTO_ZRELADDR=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+CONFIG_IPV6_SIT_6RD=y
+CONFIG_CFG80211=y
+CONFIG_LIB80211=y
+CONFIG_MAC80211=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_LIBERTAS_THINFIRM=m
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_AT76C50X_USB=m
+CONFIG_USB_ZD1201=m
+CONFIG_RTL8187=m
+CONFIG_ATH_COMMON=m
+CONFIG_ATH9K=m
+CONFIG_CARL9170=m
+CONFIG_B43=m
+CONFIG_B43_PHY_N=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RTL8192CU=m
+CONFIG_WL1251=m
+CONFIG_WL1251_SDIO=m
+CONFIG_WL12XX_MENU=m
+CONFIG_WL12XX=m
+CONFIG_WL12XX_SDIO=m
+CONFIG_ZD1211RW=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_INPUT_POLLDEV=m
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_QT1070=m
+CONFIG_KEYBOARD_QT2160=m
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
+# CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=4
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+CONFIG_FB=y
+CONFIG_FB_ATMEL=y
+CONFIG_FB_UDL=m
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_ATMEL_AC97C=y
+# CONFIG_SND_SPI is not set
+CONFIG_SND_USB_AUDIO=m
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ATMEL_USBA=m
+CONFIG_USB_ZERO=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_MMC=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_SDIO_UART=m
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_ATMELMCI_DMA=y
+CONFIG_LEDS_ATMEL_PWM=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91RM9200=y
+CONFIG_DMADEVICES=y
+CONFIG_AT_HDMAC=y
+CONFIG_DMATEST=m
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+# CONFIG_CRYPTO_HW is not set
--
1.7.3
^ permalink raw reply related
* [PATCH 1/3] arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.h
From: Grant Likely @ 2011-09-22 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110922163258.GD8072@n2100.arm.linux.org.uk>
On Thu, Sep 22, 2011 at 05:32:58PM +0100, Russell King - ARM Linux wrote:
> On Thu, Sep 22, 2011 at 09:31:48AM -0700, Stephen Warren wrote:
> > Russell King - ARM Linux wrote at Thursday, September 22, 2011 2:12 AM:
> > > On Wed, Sep 21, 2011 at 01:16:49PM -0700, Olof Johansson wrote:
> > > > Works for me. Or I could stage it in a topic branch that would be
> > > > merged after Russell's GPIO tree.
> > >
> > > Holding stuff off from being merged doesn't work.
> >
> > Russell,
> >
> > So I take it I should add the two ack'd patches to the ARM patch system,
> > and have you pick them up?
>
> That's a workable solution, yes. I've done that with various other
> gpio patches from people, and Grant seems happy with that.
Yes, I'm comfortable with patches going in via other trees when there
are dependencies.
g.
^ permalink raw reply
* [PATCH 2/3] arm/tegra: Replace <mach/gpio.h> with <mach/gpio-tegra.h>
From: Grant Likely @ 2011-09-22 17:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316633620-13184-2-git-send-email-swarren@nvidia.com>
On Wed, Sep 21, 2011 at 01:33:39PM -0600, Stephen Warren wrote:
> This will eventually allow <mach/gpio.h> to be deleted. This mirrors
> LinusW's recent equivalent work on various other ARM platforms.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> arch/arm/mach-tegra/board-harmony.h | 2 +
> arch/arm/mach-tegra/board-paz00.h | 2 +
> arch/arm/mach-tegra/board-seaboard.h | 2 +
> arch/arm/mach-tegra/board-trimslice.h | 2 +
> arch/arm/mach-tegra/include/mach/gpio-tegra.h | 39 +++++++++++++++++++++++++
> arch/arm/mach-tegra/include/mach/gpio.h | 39 -------------------------
> arch/arm/mach-tegra/usb_phy.c | 1 +
> drivers/gpio/gpio-tegra.c | 1 +
> drivers/mmc/host/sdhci-tegra.c | 2 +
> 9 files changed, 51 insertions(+), 39 deletions(-)
> create mode 100644 arch/arm/mach-tegra/include/mach/gpio-tegra.h
>
> diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h
> index 280d203..139d96c 100644
> --- a/arch/arm/mach-tegra/board-harmony.h
> +++ b/arch/arm/mach-tegra/board-harmony.h
> @@ -17,6 +17,8 @@
> #ifndef _MACH_TEGRA_BOARD_HARMONY_H
> #define _MACH_TEGRA_BOARD_HARMONY_H
>
> +#include <mach/gpio-tegra.h>
> +
> #define HARMONY_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_))
> #define HARMONY_GPIO_WM8903(_x_) (HARMONY_GPIO_TPS6586X(4) + (_x_))
>
> diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
> index 86057c3..2dc1899 100644
> --- a/arch/arm/mach-tegra/board-paz00.h
> +++ b/arch/arm/mach-tegra/board-paz00.h
> @@ -17,6 +17,8 @@
> #ifndef _MACH_TEGRA_BOARD_PAZ00_H
> #define _MACH_TEGRA_BOARD_PAZ00_H
>
> +#include <mach/gpio-tegra.h>
> +
> /* SDCARD */
> #define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
> #define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
> diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
> index d06c334..4c45d4c 100644
> --- a/arch/arm/mach-tegra/board-seaboard.h
> +++ b/arch/arm/mach-tegra/board-seaboard.h
> @@ -17,6 +17,8 @@
> #ifndef _MACH_TEGRA_BOARD_SEABOARD_H
> #define _MACH_TEGRA_BOARD_SEABOARD_H
>
> +#include <mach/gpio-tegra.h>
> +
> #define SEABOARD_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_))
> #define SEABOARD_GPIO_WM8903(_x_) (SEABOARD_GPIO_TPS6586X(4) + (_x_))
>
> diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
> index 7a7dee8..50f128d 100644
> --- a/arch/arm/mach-tegra/board-trimslice.h
> +++ b/arch/arm/mach-tegra/board-trimslice.h
> @@ -17,6 +17,8 @@
> #ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
> #define _MACH_TEGRA_BOARD_TRIMSLICE_H
>
> +#include <mach/gpio-tegra.h>
> +
> #define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */
> #define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */
>
> diff --git a/arch/arm/mach-tegra/include/mach/gpio-tegra.h b/arch/arm/mach-tegra/include/mach/gpio-tegra.h
> new file mode 100644
> index 0000000..87d37fd
> --- /dev/null
> +++ b/arch/arm/mach-tegra/include/mach/gpio-tegra.h
> @@ -0,0 +1,39 @@
> +/*
> + * arch/arm/mach-tegra/include/mach/gpio.h
> + *
> + * Copyright (C) 2010 Google, Inc.
> + *
> + * Author:
> + * Erik Gilling <konkers@google.com>
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#ifndef __MACH_TEGRA_GPIO_TEGRA_H
> +#define __MACH_TEGRA_GPIO_TEGRA_H
> +
> +#include <linux/types.h>
> +#include <mach/irqs.h>
> +
> +#define TEGRA_NR_GPIOS INT_GPIO_NR
> +
> +#define TEGRA_GPIO_TO_IRQ(gpio) (INT_GPIO_BASE + (gpio))
> +
> +struct tegra_gpio_table {
> + int gpio; /* GPIO number */
> + bool enable; /* Enable for GPIO at init? */
> +};
> +
> +void tegra_gpio_config(struct tegra_gpio_table *table, int num);
> +void tegra_gpio_enable(int gpio);
> +void tegra_gpio_disable(int gpio);
> +
> +#endif
> diff --git a/arch/arm/mach-tegra/include/mach/gpio.h b/arch/arm/mach-tegra/include/mach/gpio.h
> index 7910d26..e69de29 100644
> --- a/arch/arm/mach-tegra/include/mach/gpio.h
> +++ b/arch/arm/mach-tegra/include/mach/gpio.h
> @@ -1,39 +0,0 @@
> -/*
> - * arch/arm/mach-tegra/include/mach/gpio.h
> - *
> - * Copyright (C) 2010 Google, Inc.
> - *
> - * Author:
> - * Erik Gilling <konkers@google.com>
> - *
> - * This software is licensed under the terms of the GNU General Public
> - * License version 2, as published by the Free Software Foundation, and
> - * may be copied, distributed, and modified under those terms.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> - */
> -
> -#ifndef __MACH_TEGRA_GPIO_H
> -#define __MACH_TEGRA_GPIO_H
> -
> -#include <linux/types.h>
> -#include <mach/irqs.h>
> -
> -#define TEGRA_NR_GPIOS INT_GPIO_NR
> -
> -#define TEGRA_GPIO_TO_IRQ(gpio) (INT_GPIO_BASE + (gpio))
> -
> -struct tegra_gpio_table {
> - int gpio; /* GPIO number */
> - bool enable; /* Enable for GPIO at init? */
> -};
> -
> -void tegra_gpio_config(struct tegra_gpio_table *table, int num);
> -void tegra_gpio_enable(int gpio);
> -void tegra_gpio_disable(int gpio);
> -
> -#endif
> diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
> index 88081bb..37576a7 100644
> --- a/arch/arm/mach-tegra/usb_phy.c
> +++ b/arch/arm/mach-tegra/usb_phy.c
> @@ -28,6 +28,7 @@
> #include <linux/usb/otg.h>
> #include <linux/usb/ulpi.h>
> #include <asm/mach-types.h>
> +#include <mach/gpio-tegra.h>
> #include <mach/usb_phy.h>
> #include <mach/iomap.h>
>
> diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
> index df64536..6b65207 100644
> --- a/drivers/gpio/gpio-tegra.c
> +++ b/drivers/gpio/gpio-tegra.c
> @@ -27,6 +27,7 @@
>
> #include <asm/mach/irq.h>
>
> +#include <mach/gpio-tegra.h>
> #include <mach/iomap.h>
> #include <mach/suspend.h>
>
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 67176af..067a4cd 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -25,6 +25,8 @@
> #include <linux/module.h>
>
> #include <asm/gpio.h>
> +
> +#include <mach/gpio-tegra.h>
> #include <mach/sdhci.h>
>
> #include "sdhci-pltfm.h"
> --
> 1.7.0.4
>
^ permalink raw reply
* [PATCH] ARM: futex: fix clobbering oldval
From: Will Deacon @ 2011-09-22 17:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316660015.6872.1.camel@puffmine-laptop>
Hi,
On Thu, Sep 22, 2011 at 03:53:35AM +0100, mhban wrote:
> This patch fixes clobbering oldval bug. oldval should be preserved for next
> compare operation.
>
> Change-Id: I2a63bc1bdb8de330eb9e1ac02d7da1f77e6e8c3c
> Signed-off-by: Minho Ban <mhban@samsung.com>
It would have been nice to have been CC'd on this...
I ran LTP tests on this, so I'm surprised that this was broken (the tests
passed). Well spotted anyway!
> ---
> arch/arm/include/asm/futex.h | 6 +++---
> 1 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
> index d2d733c..b0f2e8e 100644
> --- a/arch/arm/include/asm/futex.h
> +++ b/arch/arm/include/asm/futex.h
> @@ -30,14 +30,14 @@
> __asm__ __volatile__( \
> "1: ldrex %1, [%2]\n" \
> " " insn "\n" \
> - "2: strex %1, %0, [%2]\n" \
> - " teq %1, #0\n" \
> + "2: strex r5, %0, [%2]\n" \
> + " teq r5, #0\n" \
> " bne 1b\n" \
> " mov %0, #0\n" \
> __futex_atomic_ex_table("%4") \
> : "=&r" (ret), "=&r" (oldval) \
> : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
> - : "cc", "memory")
> + : "r5", "cc", "memory")
You shouldn't reference r5 directly here, but due to the way the futex code
is laid out, you can't add an extra output operand without converting the
code to use named arguments.
I'll post a patch to do that.
Will
^ permalink raw reply
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