* [PATCH v3 2/2] at91: add Atmel ISI and ov2640 support on sam9m10/sam9g45 board.
From: Guennadi Liakhovetski @ 2011-09-26 9:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E804440.7030709@atmel.com>
Hi Nicolas
On Mon, 26 Sep 2011, Nicolas Ferre wrote:
> Le 24/09/2011 07:26, Jean-Christophe PLAGNIOL-VILLARD :
> > On 09:35 Thu 22 Sep , Guennadi Liakhovetski wrote:
> >> On Thu, 22 Sep 2011, Josh Wu wrote:
> >>
> >>> This patch
> >>> 1. add ISI_MCK parent setting code when add ISI device.
> >>> 2. add ov2640 support on board file.
> >>> 3. define isi_mck clock in sam9g45 chip file.
> >>>
> >>> Signed-off-by: Josh Wu <josh.wu@atmel.com>
> >>> ---
> >>> arch/arm/mach-at91/at91sam9g45.c | 3 +
> >>> arch/arm/mach-at91/at91sam9g45_devices.c | 105 +++++++++++++++++++++++++++++-
> >>> arch/arm/mach-at91/board-sam9m10g45ek.c | 85 ++++++++++++++++++++++++-
> >>> arch/arm/mach-at91/include/mach/board.h | 3 +-
> >>
> >> Personally, I think, it would be better to separate this into two patches
> >> at least: one for at91 core and one for the specific board, but that's up
> >> to arch maintainers to decide.
> >>
> >> You also want to patch arch/arm/mach-at91/at91sam9263_devices.c, don't
> >> you?
> > agreed
>
> No, I am not sure. The IP is not the same between 9263 and 9g45/9m10. So
> this inclusion will not apply.
Sorry, that's not what I meant. This patch changes a function declaration:
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index ed544a0..276d63a 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -183,7 +183,8 @@ extern void __init at91_add_device_lcdc(struct
atmel_lcdfb_info *data);
extern void __init at91_add_device_ac97(struct ac97c_platform_data
*data);
/* ISI */
-extern void __init at91_add_device_isi(void);
+struct isi_platform_data;
+extern void __init at91_add_device_isi(struct isi_platform_data *data);
/* Touchscreen Controller */
struct at91_tsadcc_data {
but doesn't change that function implementation in at91sam9263_devices.c,
which will break compilation, AFAICS.
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply related
* [PATCH v3 2/2] at91: add Atmel ISI and ov2640 support on sam9m10/sam9g45 board.
From: Nicolas Ferre @ 2011-09-26 9:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110924052609.GI29998@game.jcrosoft.org>
Le 24/09/2011 07:26, Jean-Christophe PLAGNIOL-VILLARD :
> On 09:35 Thu 22 Sep , Guennadi Liakhovetski wrote:
>> On Thu, 22 Sep 2011, Josh Wu wrote:
>>
>>> This patch
>>> 1. add ISI_MCK parent setting code when add ISI device.
>>> 2. add ov2640 support on board file.
>>> 3. define isi_mck clock in sam9g45 chip file.
>>>
>>> Signed-off-by: Josh Wu <josh.wu@atmel.com>
>>> ---
>>> arch/arm/mach-at91/at91sam9g45.c | 3 +
>>> arch/arm/mach-at91/at91sam9g45_devices.c | 105 +++++++++++++++++++++++++++++-
>>> arch/arm/mach-at91/board-sam9m10g45ek.c | 85 ++++++++++++++++++++++++-
>>> arch/arm/mach-at91/include/mach/board.h | 3 +-
>>
>> Personally, I think, it would be better to separate this into two patches
>> at least: one for at91 core and one for the specific board, but that's up
>> to arch maintainers to decide.
>>
>> You also want to patch arch/arm/mach-at91/at91sam9263_devices.c, don't
>> you?
> agreed
No, I am not sure. The IP is not the same between 9263 and 9g45/9m10. So
this inclusion will not apply.
Best regards,
--
Nicolas Ferre
^ permalink raw reply
* [PATCH-V3 0/4] Introducing TI's New SoC/board AM335XEVM
From: Hiremath, Vaibhav @ 2011-09-26 9:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316529142-27564-1-git-send-email-hvaibhav@ti.com>
> -----Original Message-----
> From: Hiremath, Vaibhav
> Sent: Tuesday, September 20, 2011 8:02 PM
> To: linux-omap at vger.kernel.org
> Cc: Hilman, Kevin; paul at pwsan.com; tony at atomide.com; linux-arm-
> kernel at lists.infradead.org; Hiremath, Vaibhav
> Subject: [PATCH-V3 0/4] Introducing TI's New SoC/board AM335XEVM
>
> From: Vaibhav Hiremath <hvaibhav@ti.com>
>
> This patch set adds support for AM335x device having
> Cortex-A8 MPU.
>
> AM335X is treated as another OMAP3 variant, where,
> along with existing cpu class OMAP34XX, new cpu class AM33XX is created
> and the respective type is AM335X, which is newly added device in the
> family.
> This means, cpu_is_omap34xx(), cpu_is_am33xx() and
> cpu_is_am335x() checks return success for AM335X.
>
> Also, I have validated OMAP3 boot test with this patch-series on OMAP3EVM.
>
> Changes from V1(RFC):
> - Created separate cpu/SoC class for AM33XX family of devices,
> due to all known facts. This is been mentioned in main-chain
> https://patchwork.kernel.org/patch/1056312/
> - BUG Fix in debug-macro.S, which was leading to build failure.
> https://patchwork.kernel.org/patch/1056302/
>
> Changes from V2(RFC):
> - Rebased against Paul's OMAP_CHIP* cleanup patches
> git://git.pwsan.com/linux-2.6 omap_chip_remove_cleanup_3.2
> - Removed dependancy on Hemant's submitted patches for TI814X
> support, in order to get it upstream.
>
> Afzal Mohammed (4):
> arm:omap:am33xx: Update common omap platform files
> arm:omap:am33xx: Update common OMAP machine specific sources
> arm:omap:am33xx: Create board support and enable build for AM335XEVM
> arm:omap:am33xx: Add low level debugging support
>
> arch/arm/mach-omap2/Kconfig | 10 ++++
> arch/arm/mach-omap2/Makefile | 2 +
> arch/arm/mach-omap2/board-am335xevm.c | 57
> ++++++++++++++++++++++++
> arch/arm/mach-omap2/clock.c | 2 +-
> arch/arm/mach-omap2/clock.h | 2 +-
> arch/arm/mach-omap2/clock3xxx_data.c | 6 ++-
> arch/arm/mach-omap2/common.c | 16 +++++++
> arch/arm/mach-omap2/id.c | 10 +++-
> arch/arm/mach-omap2/include/mach/debug-macro.S | 22 +++++++++
> arch/arm/mach-omap2/io.c | 25 ++++++++++
> arch/arm/mach-omap2/opp2xxx.h | 2 +-
> arch/arm/mach-omap2/serial.c | 6 +-
> arch/arm/plat-omap/include/plat/am33xx.h | 25 ++++++++++
> arch/arm/plat-omap/include/plat/clkdev_omap.h | 1 +
> arch/arm/plat-omap/include/plat/clock.h | 3 +-
> arch/arm/plat-omap/include/plat/common.h | 1 +
> arch/arm/plat-omap/include/plat/cpu.h | 25 ++++++++++
> arch/arm/plat-omap/include/plat/hardware.h | 1 +
> arch/arm/plat-omap/include/plat/io.h | 20 ++++++++
> arch/arm/plat-omap/include/plat/omap34xx.h | 2 +
> arch/arm/plat-omap/include/plat/serial.h | 4 ++
> arch/arm/plat-omap/include/plat/uncompress.h | 6 +++
> arch/arm/plat-omap/io.c | 5 ++
> 23 files changed, 243 insertions(+), 10 deletions(-)
> create mode 100644 arch/arm/mach-omap2/board-am335xevm.c
> create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h
Tony,
Any update or comment on this patch-set?
Thanks,
Vaibhav
^ permalink raw reply
* [PATCH 3/4] iommu/exynos: Add iommu driver for Exynos4 Platforms
From: KyongHo Cho @ 2011-09-26 9:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAK=Wgbazwz9PRJSpZjopwxJ-PO88FtajmbXL=pVKDHOr1t61fQ@mail.gmail.com>
On Mon, Sep 26, 2011 at 6:05 PM, Ohad Ben-Cohen <ohad@wizery.com> wrote:
> On Mon, Sep 26, 2011 at 11:58 AM, KyongHo Cho <pullip.cho@samsung.com> wrote:
>> As you've noticed, it is default behavior for iommu fault.
>
> Then why not add it to the IOMMU core ? it's quite generic and can be
> useful for others, too.
>
Every fault in IOMMU (System MMU) is an error logically
and must not happen in our multimedia device drivers
because, our device drivers always construct page table completely
before address translation in System MMU
and TLB loads translation information automatically when TLB miss.
I am not sure if the default behavior of MMU fault in our IOMMU driver
is also correct for other IOMMU drivers.
BTW,
I think we need more fault type than IOMMU_FAULT_READ and IOMMU_FAULT_WRITE.
We have page fault, access fault(read, write), security fault
and bus error (translated physical address is not available)
> Thanks,
> Ohad.
Thank you.
Cho KyongHo.
^ permalink raw reply
* [PATCHv2 0/3] Initial support for Picochip picoxcell
From: Jamie Iles @ 2011-09-26 9:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1314196906-20709-1-git-send-email-jamie@jamieiles.com>
On Wed, Aug 24, 2011 at 03:41:43PM +0100, Jamie Iles wrote:
> This series adds support for Picochip picoXcell (PC3X2 and PC3X3)
> ARM1176JZ-S based devices. This is a device tree only platform and
> currently supports interrupt controllers and UARTs.
>
> This series is based off of Grant's devicetree/test branch and also uses
> Russell's io and gpio cleanup patches to remove the definition of
> IO_SPACE_LIMIT and trivial gpio definitions.
>
> Changes since v1:
>
> - Cleanup empty headers
> - Use of_platform_populate() and the default match table
> - Split the VIC's into separate device nodes
>
> Jamie Iles (3):
> picoxcell: support for Picochip picoxcell devices
> picoxcell: add the DTS for pc3x2 and pc3x3 devices
> picoxcell: add the DTS for the PC7302 board
Hi Arnd,
Is there likely to be any chance of getting support for picoxcell
merged? This series can now be based on top of Nicolas' static IO
mapping patches to remove some more code but I'm not sure what else I
can do to make them easier to review!
Thanks,
Jamie
^ permalink raw reply
* [PATCH 1/2] ARM: pxa: fix building error by palm27x_lcd_init() when FB_PXA not defined
From: Marek Vasut @ 2011-09-26 9:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMPhdO-gZOnMjHog0t7cp74rs+Z+D76v2dPLBgp+jUGNG9J39A@mail.gmail.com>
On Monday, September 26, 2011 11:02:03 AM Eric Miao wrote:
> 2011/9/26 Marek Vasut <marek.vasut@gmail.com>:
> > On Monday, September 26, 2011 05:53:16 AM Eric Miao wrote:
> >> Cc: Marek Vasut <marek.vasut@gmail.com>
> >> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
> >> ---
> >> arch/arm/mach-pxa/include/mach/palm27x.h | 2 +-
> >> 1 files changed, 1 insertions(+), 1 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h
> >> b/arch/arm/mach-pxa/include/mach/palm27x.h index 0a5e5ea..f80bbe2 100644
> >> --- a/arch/arm/mach-pxa/include/mach/palm27x.h
> >> +++ b/arch/arm/mach-pxa/include/mach/palm27x.h
> >> @@ -34,7 +34,7 @@ extern struct pxafb_mode_info
> >> palm_320x320_new_lcd_mode; extern void __init palm27x_lcd_init(int
> >> power,
> >> struct pxafb_mode_info *mode);
> >> #else
> >> -static inline void palm27x_lcd_init(int power, struct pxafb_mode_info
> >> *mode) {} +#define palm27x_lcd_init(power, mode) do {} while (0)
> >> #endif
> >>
> >> #if defined(CONFIG_USB_GADGET_PXA27X) || \
> >
> > Hi Eric,
> >
> > NAK. Why do you do such a change ? Especially as this will likely
> > interfere with gcc4.6's unused-but-set variable checking.
>
> OK, I'll hold this one. Feel free to give me a solution.
Hang on, I'll run it through the cogs.
^ permalink raw reply
* [PATCH 3/4] iommu/exynos: Add iommu driver for Exynos4 Platforms
From: Ohad Ben-Cohen @ 2011-09-26 9:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHQjnOOtVHUS3KmBz7LdO88fLQyLA6f-w3ye9nAH0Bx+zh38XA@mail.gmail.com>
On Mon, Sep 26, 2011 at 11:58 AM, KyongHo Cho <pullip.cho@samsung.com> wrote:
> As you've noticed, it is default behavior for iommu fault.
Then why not add it to the IOMMU core ? it's quite generic and can be
useful for others, too.
Thanks,
Ohad.
^ permalink raw reply
* [PATCH 1/2] ARM: pxa: fix building error by palm27x_lcd_init() when FB_PXA not defined
From: Eric Miao @ 2011-09-26 9:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201109261100.07265.marek.vasut@gmail.com>
2011/9/26 Marek Vasut <marek.vasut@gmail.com>:
> On Monday, September 26, 2011 05:53:16 AM Eric Miao wrote:
>> Cc: Marek Vasut <marek.vasut@gmail.com>
>> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
>> ---
>> ?arch/arm/mach-pxa/include/mach/palm27x.h | ? ?2 +-
>> ?1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h
>> b/arch/arm/mach-pxa/include/mach/palm27x.h index 0a5e5ea..f80bbe2 100644
>> --- a/arch/arm/mach-pxa/include/mach/palm27x.h
>> +++ b/arch/arm/mach-pxa/include/mach/palm27x.h
>> @@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
>> ?extern void __init palm27x_lcd_init(int power,
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? struct pxafb_mode_info *mode);
>> ?#else
>> -static inline void palm27x_lcd_init(int power, struct pxafb_mode_info
>> *mode) {} +#define palm27x_lcd_init(power, mode) ? ? ?do {} while (0)
>> ?#endif
>>
>> ?#if ?defined(CONFIG_USB_GADGET_PXA27X) || \
>
> Hi Eric,
>
> NAK. Why do you do such a change ? Especially as this will likely interfere with
> gcc4.6's unused-but-set variable checking.
OK, I'll hold this one. Feel free to give me a solution.
^ permalink raw reply
* [PATCH 07/11] OMAP2+: board-generic: Add DT support to generic board
From: Cousson, Benoit @ 2011-09-26 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E801C62.5020700@ti.com>
On 9/26/2011 8:32 AM, Nayak, Rajendra wrote:
> Hi Benoit,
>
> On Saturday 24 September 2011 01:53 AM, Benoit Cousson wrote:
>> Re-cycle the original board-generic file to support Device Tree
>> for every OMAP2+ variants.
>> Note: Since it is a completely new content in the existing file
>> I removed the original copyright.
>>
>> The current approach is an intermediate step before having only
>> one machine descriptor that will use some generic DT aware
>> functions.
>
> What config does this work with currently? If I use omap2plus_defconfig
> should I explicitly disable everything other than say CONFIG_ARCH_OMAP4
> if I want it working on OMAP4?
Nope, in theory, omap2plus_defconfig should work as usual:-)
If uboot does not provide and dtb, then the legacy board file will be
used. If a dtb is present then only the board-generic can match with the
DT mechanism.
Regards,
Benoit
>
> regards,
> Rajendra
>
>>
>> Signed-off-by: Benoit Cousson<b-cousson@ti.com>
>> Cc: Tony Lindgren<tony@atomide.com>
>> ---
>> arch/arm/mach-omap2/Kconfig | 8 ++-
>> arch/arm/mach-omap2/board-generic.c | 129 ++++++++++++++++++++++------------
>> 2 files changed, 89 insertions(+), 48 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
>> index 7edf802..5934a27 100644
>> --- a/arch/arm/mach-omap2/Kconfig
>> +++ b/arch/arm/mach-omap2/Kconfig
>> @@ -106,9 +106,13 @@ comment "OMAP Board Type"
>> depends on ARCH_OMAP2PLUS
>>
>> config MACH_OMAP_GENERIC
>> - bool "Generic OMAP board"
>> - depends on ARCH_OMAP2
>> + bool "Generic OMAP2+ board"
>> + depends on ARCH_OMAP2PLUS
>> + select USE_OF
>> default y
>> + help
>> + Support for generic TI OMAP2+ boards using Flattened Device Tree.
>> + More information at Documentation/devicetree
>>
>> config MACH_OMAP2_TUSB6010
>> bool
>> diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
>> index e8d45d3..dcbd64c 100644
>> --- a/arch/arm/mach-omap2/board-generic.c
>> +++ b/arch/arm/mach-omap2/board-generic.c
>> @@ -1,76 +1,113 @@
>> /*
>> - * linux/arch/arm/mach-omap2/board-generic.c
>> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
>> *
>> - * Copyright (C) 2005 Nokia Corporation
>> - * Author: Paul Mundt<paul.mundt@nokia.com>
>> - *
>> - * Modified from mach-omap/omap1/board-generic.c
>> - *
>> - * Code for generic OMAP2 board. Should work on many OMAP2 systems where
>> - * the bootloader passes the board-specific data to the kernel.
>> - * Do not put any board specific code to this file; create a new machine
>> - * type if you need custom low-level initializations.
>> + * Support for generic OMAP2+ device tree boards.
>> *
>> * This program is free software; you can redistribute it and/or modify
>> * it under the terms of the GNU General Public License version 2 as
>> * published by the Free Software Foundation.
>> */
>>
>> -#include<linux/kernel.h>
>> -#include<linux/init.h>
>> -#include<linux/device.h>
>> +#include<linux/io.h>
>> +#include<linux/of_platform.h>
>> +#include<linux/irqdomain.h>
>>
>> #include<mach/hardware.h>
>> -#include<asm/mach-types.h>
>> #include<asm/mach/arch.h>
>> -#include<asm/mach/map.h>
>>
>> -#include<mach/gpio.h>
>> -#include<plat/usb.h>
>> #include<plat/board.h>
>> #include<plat/common.h>
>> +#include<mach/omap4-common.h>
>>
>> -static struct omap_board_config_kernel generic_config[] = {
>> +
>> +static struct of_device_id omap_dt_match_table[] __initdata = {
>> + { .compatible = "simple-bus", },
>> + { .compatible = "ti,omap-infra", },
>> + { }
>> };
>>
>> -static void __init omap_generic_init_early(void)
>> -{
>> - omap2_init_common_infrastructure();
>> -}
>> +static struct of_device_id intc_match[] __initdata = {
>> + { .compatible = "ti,omap3-intc", },
>> + { .compatible = "arm,cortex-a9-gic", },
>> + { }
>> +};
>>
>> static void __init omap_generic_init(void)
>> {
>> + struct device_node *node = of_find_matching_node(NULL, intc_match);
>> + if (node)
>> + irq_domain_add_simple(node, 0);
>> +
>> omap_serial_init();
>> omap_sdrc_init(NULL, NULL);
>> - omap_board_config = generic_config;
>> - omap_board_config_size = ARRAY_SIZE(generic_config);
>> -}
>>
>> -static void __init omap_generic_map_io(void)
>> -{
>> - if (cpu_is_omap242x()) {
>> - omap2_set_globals_242x();
>> - omap242x_map_common_io();
>> - } else if (cpu_is_omap243x()) {
>> - omap2_set_globals_243x();
>> - omap243x_map_common_io();
>> - } else if (cpu_is_omap34xx()) {
>> - omap2_set_globals_3xxx();
>> - omap34xx_map_common_io();
>> - } else if (cpu_is_omap44xx()) {
>> - omap2_set_globals_443x();
>> - omap44xx_map_common_io();
>> - }
>> + of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
>> }
>>
>> -/* XXX This machine entry name should be updated */
>> -MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
>> - /* Maintainer: Paul Mundt<paul.mundt@nokia.com> */
>> - .atag_offset = 0x100,
>> +#if defined(CONFIG_SOC_OMAP2420)
>> +static const char *omap242x_boards_compat[] __initdata = {
>> + "ti,omap2420",
>> + NULL,
>> +};
>> +
>> +DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
>> .reserve = omap_reserve,
>> - .map_io = omap_generic_map_io,
>> - .init_early = omap_generic_init_early,
>> + .map_io = omap242x_map_io,
>> + .init_early = omap2420_init_early,
>> .init_irq = omap2_init_irq,
>> .init_machine = omap_generic_init,
>> .timer =&omap2_timer,
>> + .dt_compat = omap242x_boards_compat,
>> +MACHINE_END
>> +#endif
>> +
>> +#if defined(CONFIG_SOC_OMAP2430)
>> +static const char *omap243x_boards_compat[] __initdata = {
>> + "ti,omap2430",
>> + NULL,
>> +};
>> +
>> +DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
>> + .reserve = omap_reserve,
>> + .map_io = omap243x_map_io,
>> + .init_early = omap2430_init_early,
>> + .init_irq = omap2_init_irq,
>> + .init_machine = omap_generic_init,
>> + .timer =&omap2_timer,
>> + .dt_compat = omap243x_boards_compat,
>> +MACHINE_END
>> +#endif
>> +
>> +#if defined(CONFIG_ARCH_OMAP3)
>> +static const char *omap3_boards_compat[] __initdata = {
>> + "ti,omap3",
>> + NULL,
>> +};
>> +
>> +DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
>> + .reserve = omap_reserve,
>> + .map_io = omap3_map_io,
>> + .init_early = omap3430_init_early,
>> + .init_irq = omap3_init_irq,
>> + .init_machine = omap_generic_init,
>> + .timer =&omap3_timer,
>> + .dt_compat = omap3_boards_compat,
>> +MACHINE_END
>> +#endif
>> +
>> +#if defined(CONFIG_ARCH_OMAP4)
>> +static const char *omap4_boards_compat[] __initdata = {
>> + "ti,omap4",
>> + NULL,
>> +};
>> +
>> +DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
>> + .reserve = omap_reserve,
>> + .map_io = omap4_map_io,
>> + .init_early = omap4430_init_early,
>> + .init_irq = gic_init_irq,
>> + .init_machine = omap_generic_init,
>> + .timer =&omap4_timer,
>> + .dt_compat = omap4_boards_compat,
>> MACHINE_END
>> +#endif
>
^ permalink raw reply
* [PATCH 1/2] ARM: pxa: fix building error by palm27x_lcd_init() when FB_PXA not defined
From: Marek Vasut @ 2011-09-26 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317009197-12578-1-git-send-email-eric.y.miao@gmail.com>
On Monday, September 26, 2011 05:53:16 AM Eric Miao wrote:
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
> ---
> arch/arm/mach-pxa/include/mach/palm27x.h | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h
> b/arch/arm/mach-pxa/include/mach/palm27x.h index 0a5e5ea..f80bbe2 100644
> --- a/arch/arm/mach-pxa/include/mach/palm27x.h
> +++ b/arch/arm/mach-pxa/include/mach/palm27x.h
> @@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
> extern void __init palm27x_lcd_init(int power,
> struct pxafb_mode_info *mode);
> #else
> -static inline void palm27x_lcd_init(int power, struct pxafb_mode_info
> *mode) {} +#define palm27x_lcd_init(power, mode) do {} while (0)
> #endif
>
> #if defined(CONFIG_USB_GADGET_PXA27X) || \
Hi Eric,
NAK. Why do you do such a change ? Especially as this will likely interfere with
gcc4.6's unused-but-set variable checking.
Cheer
^ permalink raw reply
* [PATCH 3/4] iommu/exynos: Add iommu driver for Exynos4 Platforms
From: KyongHo Cho @ 2011-09-26 8:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAK=WgbYnGjPKs6_nmFRGfMnbh_7wDR-0QcptAGaqDKVOo-x3cg@mail.gmail.com>
Hi.
On Mon, Sep 26, 2011 at 4:59 PM, Ohad Ben-Cohen <ohad@wizery.com> wrote:
> 2011/9/24 ??? <pullip.cho@samsung.com>:
>> This is the System MMU driver and IOMMU API implementation for
>> Exynos4 SOC platforms. Exynos4 platforms has more than 10 System
>> MMUs dedicated for each multimedia accellerators.
>>
>> Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
> ...
>> +static int exynos_iommu_fault_handler(struct iommu_domain *domain,
>> + ? ? ? ? ? ? ? ? ? ? ? struct device *dev, unsigned long iova, int flags)
>> +{
>> + ? ? ? struct exynos_iommu_domain *priv = domain->priv;
>> +
>> + ? ? ? dev_err(priv->dev, "%s occured at %p(Page table base: %p)\n",
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? sysmmu_fault_name[flags], (void *)iova,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (void *)(__pa(priv->pgtable)));
>> + ? ? ? dev_err(priv->dev, "\t\tGenerating Kernel OOPS...\n");
>> + ? ? ? dev_err(priv->dev, "\t\tbecause it is unrecoverable.\n");
>> + ? ? ? dev_err(priv->dev,
>> + ? ? ? ? ? ? ? "\t\tSet Fault handler with iommu_set_fault_handler().\n");
>> + ? ? ? dev_err(priv->dev, "\t\tto handle System MMU fault.\n");
>> +
>> + ? ? ? BUG();
>> +
>> + ? ? ? return 0;
>> +}
>> +
>> +static int exynos_iommu_domain_init(struct iommu_domain *domain)
>> +{
> ...
>> + ? ? ? iommu_set_fault_handler(domain, &exynos_iommu_fault_handler);
>
> It doesn't make a lot of sense to set an iommu fault handler here; the
> intention of iommu_set_fault_handler() is to allow upper layers to do
> that.
As you've noticed, it is default behavior for iommu fault.
If an upper layer calls iommu_set_fault_handler(),
it is replaced with the new one.
>
> Moreover, exynos_sysmmu_irq() anyway knows whenever a fault occurs, so
> calling report_iommu_fault() just to have it call into the driver
> again seems redundant.
>
I think calling report_iommu_fault() in exynos_sysmmu_irq() is rather simple.
To do the default behavior in exynos_sysmmu_irq(),
it must check if domain->handler is NULL or not.
But the checking is also performed in report_iommu_fault() also.
I think just calling report_iommu_fault() reduces redundancy.
> If you want an exynos-specific behavior to occur whenever there's an
> iommu fault, you should do that in exynos_sysmmu_irq itself. If you
> just want a generic default logging behavior to occur whenever there's
> no other fault handler installed, you might even want to consider
> adding it to the IOMMU core.
It is neither a specific behavior nor a generic logging.
Just a default MMU fault report that can be replaceable with a fault
handler that a device driver provides.
Regards,
Cho KyongHo.
^ permalink raw reply
* [PATCH] ARM i.MX gic: add handle_irq function
From: Sascha Hauer @ 2011-09-26 8:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316797284-21010-1-git-send-email-shawn.guo@linaro.org>
On Sat, Sep 24, 2011 at 01:01:24AM +0800, Shawn Guo wrote:
> This is a plain translation of assembly gic irq handler to C function
> for CONFIG_MULTI_IRQ_HANDLER support on imx family.
>
> As the speed of gic_handle_irq() is much more important than code
> clean, the patch chooses to plug the ifdef in the function to compile
> out the corresponding codes.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> Right, ideally the arch/arm/plat-mxc/gic.c should be merged into
> arch/arm/common/gic.c. But before rmk asks me to do that, I would
> let it stay in imx platform.
>
> arch/arm/plat-mxc/Makefile | 2 +-
> arch/arm/plat-mxc/gic.c | 47 ++++++++++++++++++++++++++
> arch/arm/plat-mxc/include/mach/common.h | 2 +
> arch/arm/plat-mxc/include/mach/entry-macro.S | 6 +++
> 4 files changed, 56 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/plat-mxc/gic.c
>
> diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
> index d53c35f..b9f0f5f 100644
> --- a/arch/arm/plat-mxc/Makefile
> +++ b/arch/arm/plat-mxc/Makefile
> @@ -5,7 +5,7 @@
> # Common support
> obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
>
> -# MX51 uses the TZIC interrupt controller, older platforms use AVIC
> +obj-$(CONFIG_ARM_GIC) += gic.o
> obj-$(CONFIG_MXC_TZIC) += tzic.o
> obj-$(CONFIG_MXC_AVIC) += avic.o
>
> diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
> new file mode 100644
> index 0000000..487d12c
> --- /dev/null
> +++ b/arch/arm/plat-mxc/gic.c
> @@ -0,0 +1,47 @@
> +/*
> + * Copyright 2011 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +#include <linux/io.h>
> +#include <asm/localtimer.h>
> +#include <asm/hardware/gic.h>
> +#ifdef CONFIG_SMP
> +#include <asm/smp.h>
> +#endif
> +
> +asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
> +{
> + u32 irqstat, irqnr;
> +
> + do {
> + irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
> + irqnr = irqstat & 0x3ff;
> + if (irqnr == 1023)
> + break;
> +
> + if (irqnr > 29 && irqnr < 1021)
> + handle_IRQ(irqnr, regs);
> +#ifdef CONFIG_SMP
> + else if (irqnr < 16) {
> + writel_relaxed(irqstat, gic_cpu_base_addr +
> + GIC_CPU_EOI);
> + do_IPI(irqnr, regs);
> + }
> +#endif
> +#ifdef CONFIG_LOCAL_TIMERS
> + else if (irqnr == 29) {
> + writel_relaxed(irqstat, gic_cpu_base_addr +
> + GIC_CPU_EOI);
> + do_local_timer(regs);
> + }
> +#endif
> + } while (1);
> +}
Shouldn't this code go to arch/arm/common/gic.c instead? The
corresponding assembly code is generic so I see no reason to make
this i.MX specific.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH] mmc: card: modify mmc_getgeo function
From: Uwe Kleine-König @ 2011-09-26 8:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <m2ty8520fb.fsf@bob.laptop.org>
Hello,
On Wed, Sep 21, 2011 at 02:52:08PM -0400, Chris Ball wrote:
> Hi,
>
> On Tue, Sep 20 2011, Girish K S wrote:
> > In the earlier code the cylinder, sector and head are assigned
> > independently. Current patch generates the cylinder number
> > with the values of sector and head.
> > This patch only makes they cylinder value to be dependent on
> > the sector and head.
> >
> > Signed-off-by: Girish K S <girish.shivananjappa@linaro.org>
> > ---
> > drivers/mmc/card/block.c | 3 ++-
> > 1 files changed, 2 insertions(+), 1 deletions(-)
> >
> > diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
> > index 1ff5486..bebb13b 100644
> > --- a/drivers/mmc/card/block.c
> > +++ b/drivers/mmc/card/block.c
> > @@ -226,9 +226,10 @@ static int mmc_blk_release(struct gendisk *disk, fmode_t mode)
> > static int
> > mmc_blk_getgeo(struct block_device *bdev, struct hd_geometry *geo)
> > {
> > - geo->cylinders = get_capacity(bdev->bd_disk) / (4 * 16);
> > geo->heads = 4;
> > geo->sectors = 16;
> > + geo->cylinders = get_capacity(bdev->bd_disk) /
> > + (geo->heads * geo->sectors);
> > return 0;
> > }
>
> Thanks, pushed to mmc-next for 3.2 with a reworded commit message:
This (i.e. ee9e0e0 (mmc: card: Remove duplicated constants) in next)
makes gcc emit a reference to __aeabi_uldivmod in one of my nightly
builds which isn't defined.
The final linking stage fails with:
LD .tmp_vmlinux1
drivers/built-in.o: In function `mmc_blk_getgeo':
clkdev.c:(.text+0xd1528): undefined reference to `__aeabi_uldivmod'
make[2]: *** [.tmp_vmlinux1] Error 1
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
(I don't know why clkdev.c is referenced here. I'm not using ccache.)
It seems gcc isn't smart enough to notice that it can just use the same
generated code ...
Having said that AFAIK the code used before wasn't ok, too. (I.e. an u64
division that was just noticed to be a shift by luck.)
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH 3/4] iommu/exynos: Add iommu driver for Exynos4 Platforms
From: Ohad Ben-Cohen @ 2011-09-26 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <15669786.49881316849426265.JavaMail.weblogic@epml24>
2011/9/24 ??? <pullip.cho@samsung.com>:
> This is the System MMU driver and IOMMU API implementation for
> Exynos4 SOC platforms. Exynos4 platforms has more than 10 System
> MMUs dedicated for each multimedia accellerators.
>
> Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
...
> +static int exynos_iommu_fault_handler(struct iommu_domain *domain,
> + struct device *dev, unsigned long iova, int flags)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> +
> + dev_err(priv->dev, "%s occured at %p(Page table base: %p)\n",
> + sysmmu_fault_name[flags], (void *)iova,
> + (void *)(__pa(priv->pgtable)));
> + dev_err(priv->dev, "\t\tGenerating Kernel OOPS...\n");
> + dev_err(priv->dev, "\t\tbecause it is unrecoverable.\n");
> + dev_err(priv->dev,
> + "\t\tSet Fault handler with iommu_set_fault_handler().\n");
> + dev_err(priv->dev, "\t\tto handle System MMU fault.\n");
> +
> + BUG();
> +
> + return 0;
> +}
> +
> +static int exynos_iommu_domain_init(struct iommu_domain *domain)
> +{
...
> + iommu_set_fault_handler(domain, &exynos_iommu_fault_handler);
It doesn't make a lot of sense to set an iommu fault handler here; the
intention of iommu_set_fault_handler() is to allow upper layers to do
that.
Moreover, exynos_sysmmu_irq() anyway knows whenever a fault occurs, so
calling report_iommu_fault() just to have it call into the driver
again seems redundant.
If you want an exynos-specific behavior to occur whenever there's an
iommu fault, you should do that in exynos_sysmmu_irq itself. If you
just want a generic default logging behavior to occur whenever there's
no other fault handler installed, you might even want to consider
adding it to the IOMMU core.
^ permalink raw reply
* [RFC PATCH 0/3] Add accurate boot timing to a Linux system
From: Matthieu CASTET @ 2011-09-26 7:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110924083203.GZ17169@n2100.arm.linux.org.uk>
Hi,
Russell King - ARM Linux a ?crit :
> On Fri, Sep 23, 2011 at 04:03:15PM -0700, Simon Glass wrote:
>> An accurate timer is required to make the numbers meaningful. Many
>> modern platforms have a microsecond timer. This patch set uses a
>> function called timer_get_us() to read the timer.
>
> Not another 'get a time value' function. Why do we need soo many?
> We have - at least:
>
> ktime_get (and various flavours of it)
> do_gettimeofday
> getnstimeofday
> sched_clock
>
> Do we really need yet another one which will have to be multiplexed
> amongst platforms, requiring scaling and so forth from whatever the
> platform provides?
>
> Remember that ARM timers are virtually all MMIO mapped, which means
> they don't work during early kernel bringup when the MMU mappings for
> the hardware have not been setup. (That's the reason stuff like
> sched_clock for printk doesn't work early.)
Doesn't cortexA-8 (and A9 ?) have a cycle counter that can be read by
coprocessor 15 ?
Couldn't we use that counter for early stuff on those architectures ?
Matthieu
^ permalink raw reply
* [PATCH resend 13/13] omap: mcbsp: Start generalize signal muxing functions
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
This generalizes the omap2_mcbsp1_mux_clkr_src and omap2_mcbsp1_mux_fsr_src
implementation between generic McBSP and OMAP2 specific McBSP code. These
functions are used to select source for CLKR and FSR signals on OMAP2+.
Start generalizing the code by implementing an optional mux_signal function
pointer in platform data that will implement the actual muxing and which is
called now from omap2_mcbsp1_mux_clkr_src and omap2_mcbsp1_mux_fsr_src.
These functions are to be removed later and cleanup the API so that
mux_signal gets its arguments directly from client code.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/mach-omap2/mcbsp.c | 43 +++++++++++++++++-------------
arch/arm/plat-omap/include/plat/mcbsp.h | 1 +
arch/arm/plat-omap/mcbsp.c | 36 ++++++++++++++++++++------
3 files changed, 53 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 3dd4c47..5063f25 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -34,33 +34,36 @@
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
-/* McBSP internal signal muxing functions */
-
-void omap2_mcbsp1_mux_clkr_src(u8 mux)
+/* McBSP internal signal muxing function */
+static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
+ const char *src)
{
u32 v;
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
- if (mux == CLKR_SRC_CLKR)
- v &= ~OMAP2_MCBSP1_CLKR_MASK;
- else if (mux == CLKR_SRC_CLKX)
- v |= OMAP2_MCBSP1_CLKR_MASK;
- omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
-}
-EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
-void omap2_mcbsp1_mux_fsr_src(u8 mux)
-{
- u32 v;
+ if (!strcmp(signal, "clkr")) {
+ if (!strcmp(src, "clkr"))
+ v &= ~OMAP2_MCBSP1_CLKR_MASK;
+ else if (!strcmp(src, "clkx"))
+ v |= OMAP2_MCBSP1_CLKR_MASK;
+ else
+ return -EINVAL;
+ } else if (!strcmp(signal, "fsr")) {
+ if (!strcmp(src, "fsr"))
+ v &= ~OMAP2_MCBSP1_FSR_MASK;
+ else if (!strcmp(src, "fsx"))
+ v |= OMAP2_MCBSP1_FSR_MASK;
+ else
+ return -EINVAL;
+ } else {
+ return -EINVAL;
+ }
- v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
- if (mux == FSR_SRC_FSR)
- v &= ~OMAP2_MCBSP1_FSR_MASK;
- else if (mux == FSR_SRC_FSX)
- v |= OMAP2_MCBSP1_FSR_MASK;
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
+
+ return 0;
}
-EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
/* McBSP CLKS source switching function */
static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
@@ -181,6 +184,8 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
return PTR_ERR(pdev);
}
pdata->set_clk_src = omap2_mcbsp_set_clk_src;
+ if (id == 1)
+ pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
omap_mcbsp_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index c8ebfc9..8fa74e2 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -309,6 +309,7 @@ struct omap_mcbsp_platform_data {
bool has_ccr; /* Transceiver has configuration control registers */
int (*enable_st_clock)(unsigned int, bool);
int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
+ int (*mux_signal)(struct device *dev, const char *signal, const char *src);
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 38b67d9..4b15cd7 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -922,21 +922,41 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
-#ifndef CONFIG_ARCH_OMAP2PLUS
void omap2_mcbsp1_mux_clkr_src(u8 mux)
{
- WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
- __func__);
- return;
+ struct omap_mcbsp *mcbsp;
+ const char *src;
+
+ if (mux == CLKR_SRC_CLKR)
+ src = "clkr";
+ else if (mux == CLKR_SRC_CLKX)
+ src = "clkx";
+ else
+ return;
+
+ mcbsp = id_to_mcbsp_ptr(0);
+ if (mcbsp->pdata->mux_signal)
+ mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src);
}
+EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
void omap2_mcbsp1_mux_fsr_src(u8 mux)
{
- WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
- __func__);
- return;
+ struct omap_mcbsp *mcbsp;
+ const char *src;
+
+ if (mux == FSR_SRC_FSR)
+ src = "fsr";
+ else if (mux == FSR_SRC_FSX)
+ src = "fsx";
+ else
+ return;
+
+ mcbsp = id_to_mcbsp_ptr(0);
+ if (mcbsp->pdata->mux_signal)
+ mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src);
}
-#endif
+EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
#define max_thres(m) (mcbsp->pdata->buffer_size)
#define valid_threshold(m, val) ((val) <= max_thres(m))
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 12/13] omap: mcbsp: Start generalize omap2_mcbsp_set_clks_src
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
This generalizes the omap2_mcbsp_set_clks_src implementation between generic
McBSP and OMAP2 specific McBSP code. Currently this function is used to
select either internal fclk or clks pin as a McBSP CLKS source on OMAP2+.
Implement generalization by having an optional set_clk_src function pointer
in platform data that is used to select parent for a given clock. Idea is to
pass higher level source clock name (later coming from client driver) that
platform specific code will map to platform specific clock name.
API cleanup between McBSP and client code comes later.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/mach-omap2/mcbsp.c | 25 ++++++++---------------
arch/arm/plat-omap/include/plat/mcbsp.h | 5 +---
arch/arm/plat-omap/mcbsp.c | 33 +++++++++++++++++++++++-------
3 files changed, 35 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 92bd5e2..3dd4c47 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -63,37 +63,30 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux)
EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
/* McBSP CLKS source switching function */
-
-int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
+static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
+ const char *src)
{
- struct omap_mcbsp *mcbsp;
struct clk *fck_src;
char *fck_src_name;
int r;
- if (!omap_mcbsp_check_valid_id(id)) {
- pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
- return -EINVAL;
- }
- mcbsp = id_to_mcbsp_ptr(id);
-
- if (fck_src_id == MCBSP_CLKS_PAD_SRC)
+ if (!strcmp(src, "clks_ext"))
fck_src_name = "pad_fck";
- else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
+ else if (!strcmp(src, "clks_fclk"))
fck_src_name = "prcm_fck";
else
return -EINVAL;
- fck_src = clk_get(mcbsp->dev, fck_src_name);
+ fck_src = clk_get(dev, fck_src_name);
if (IS_ERR_OR_NULL(fck_src)) {
pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
fck_src_name);
return -EINVAL;
}
- pm_runtime_put_sync(mcbsp->dev);
+ pm_runtime_put_sync(dev);
- r = clk_set_parent(mcbsp->fclk, fck_src);
+ r = clk_set_parent(clk, fck_src);
if (IS_ERR_VALUE(r)) {
pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
"clks", fck_src_name);
@@ -101,13 +94,12 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
return -EINVAL;
}
- pm_runtime_get_sync(mcbsp->dev);
+ pm_runtime_get_sync(dev);
clk_put(fck_src);
return 0;
}
-EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
static int omap3_enable_st_clock(unsigned int id, bool enable)
{
@@ -188,6 +180,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
name, oh->name);
return PTR_ERR(pdev);
}
+ pdata->set_clk_src = omap2_mcbsp_set_clk_src;
omap_mcbsp_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index af5824a..c8ebfc9 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -296,7 +296,6 @@ typedef enum {
struct omap_mcbsp_ops {
void (*request)(unsigned int);
void (*free)(unsigned int);
- int (*set_clks_src)(u8, u8);
};
struct omap_mcbsp_platform_data {
@@ -309,6 +308,7 @@ struct omap_mcbsp_platform_data {
bool has_wakeup; /* Wakeup capability */
bool has_ccr; /* Transceiver has configuration control registers */
int (*enable_st_clock)(unsigned int, bool);
+ int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
};
struct omap_mcbsp_st_data {
@@ -359,9 +359,6 @@ struct omap_mcbsp_dev_attr {
extern struct omap_mcbsp **mcbsp_ptr;
extern int omap_mcbsp_count;
-#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
-#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
-
int omap_mcbsp_init(void);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index f92227f..38b67d9 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -29,6 +29,9 @@
struct omap_mcbsp **mcbsp_ptr;
int omap_mcbsp_count;
+#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
+#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
+
static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
@@ -894,18 +897,32 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
}
EXPORT_SYMBOL(omap_mcbsp_stop);
-/*
- * The following functions are only required on an OMAP1-only build.
- * mach-omap2/mcbsp.c contains the real functions
- */
-#ifndef CONFIG_ARCH_OMAP2PLUS
int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
{
- WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
- __func__);
- return -EINVAL;
+ struct omap_mcbsp *mcbsp;
+ const char *src;
+
+ if (!omap_mcbsp_check_valid_id(id)) {
+ pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
+ return -EINVAL;
+ }
+ mcbsp = id_to_mcbsp_ptr(id);
+
+ if (fck_src_id == MCBSP_CLKS_PAD_SRC)
+ src = "clks_ext";
+ else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
+ src = "clks_fclk";
+ else
+ return -EINVAL;
+
+ if (mcbsp->pdata->set_clk_src)
+ return mcbsp->pdata->set_clk_src(mcbsp->dev, mcbsp->fclk, src);
+ else
+ return -EINVAL;
}
+EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
+#ifndef CONFIG_ARCH_OMAP2PLUS
void omap2_mcbsp1_mux_clkr_src(u8 mux)
{
WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 11/13] omap: mcbsp: Move address definitions to arch/arm/mach-omap1/mcbsp.c
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
These address definitions are OMAP1 specific can be in single source file.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/mach-omap1/mcbsp.c | 11 +++++++++++
arch/arm/plat-omap/include/plat/mcbsp.h | 11 -----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 36ab5d8..91f9abb 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -79,6 +79,17 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
.free = omap1_mcbsp_free,
};
+#define OMAP7XX_MCBSP1_BASE 0xfffb1000
+#define OMAP7XX_MCBSP2_BASE 0xfffb1800
+
+#define OMAP1510_MCBSP1_BASE 0xe1011800
+#define OMAP1510_MCBSP2_BASE 0xfffb1000
+#define OMAP1510_MCBSP3_BASE 0xe1017000
+
+#define OMAP1610_MCBSP1_BASE 0xe1011800
+#define OMAP1610_MCBSP2_BASE 0xfffb1000
+#define OMAP1610_MCBSP3_BASE 0xe1017000
+
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
struct resource omap7xx_mcbsp_res[][6] = {
{
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 5d657d9..af5824a 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -38,17 +38,6 @@ static struct platform_device omap_mcbsp##port_nr = { \
#define MCBSP_CONFIG_TYPE3 0x3
#define MCBSP_CONFIG_TYPE4 0x4
-#define OMAP7XX_MCBSP1_BASE 0xfffb1000
-#define OMAP7XX_MCBSP2_BASE 0xfffb1800
-
-#define OMAP1510_MCBSP1_BASE 0xe1011800
-#define OMAP1510_MCBSP2_BASE 0xfffb1000
-#define OMAP1510_MCBSP3_BASE 0xe1017000
-
-#define OMAP1610_MCBSP1_BASE 0xe1011800
-#define OMAP1610_MCBSP2_BASE 0xfffb1000
-#define OMAP1610_MCBSP3_BASE 0xe1017000
-
/* McBSP register numbers. Register address offset = num * reg_step */
enum {
/* Common registers */
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 10/13] omap: mcbsp: Update mcbsp.h include dependencies
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
hardware.h is not needed here and let the definition for struct clk to come
via linux/clk.h.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/plat-omap/include/plat/mcbsp.h | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 9802055..5d657d9 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -25,9 +25,7 @@
#define __ASM_ARCH_OMAP_MCBSP_H
#include <linux/spinlock.h>
-
-#include <mach/hardware.h>
-#include <plat/clock.h>
+#include <linux/clk.h>
/* macro for building platform_device for McBSP ports */
#define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 09/13] omap: mcbsp: Cleanup sidetone control initialization and make it generic
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
Sidetone resource is already registered for a device so there is no need
for cpu_is_omap34xx() and McBSP port number tests in the driver. We can
cleanup and make the code generic by dropping remaining CONFIG_ARCH_OMAP3
conditional compilations and then using sidetone resource and st_data
variable for runtime tests.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/plat-omap/include/plat/mcbsp.h | 12 ------
arch/arm/plat-omap/mcbsp.c | 67 ++++++++++---------------------
2 files changed, 22 insertions(+), 57 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index e451a6e..9802055 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -353,9 +353,7 @@ struct omap_mcbsp {
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
struct clk *fclk;
-#ifdef CONFIG_ARCH_OMAP3
struct omap_mcbsp_st_data *st_data;
-#endif
int dma_op_mode;
u16 max_tx_thres;
u16 max_rx_thres;
@@ -402,21 +400,11 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux);
int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);
-#ifdef CONFIG_ARCH_OMAP3
/* Sidetone specific API */
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain);
int omap_st_enable(unsigned int id);
int omap_st_disable(unsigned int id);
int omap_st_is_enabled(unsigned int id);
-#else
-static inline int omap_st_set_chgain(unsigned int id, int channel,
- s16 chgain) { return 0; }
-static inline int omap_st_get_chgain(unsigned int id, int channel,
- s16 *chgain) { return 0; }
-static inline int omap_st_enable(unsigned int id) { return 0; }
-static inline int omap_st_disable(unsigned int id) { return 0; }
-static inline int omap_st_is_enabled(unsigned int id) { return 0; }
-#endif
#endif
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e96d747..f92227f 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -55,7 +55,6 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
}
}
-#ifdef CONFIG_ARCH_OMAP3
static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
__raw_writel(val, mcbsp->st_data->io_base_st + reg);
@@ -65,7 +64,6 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
{
return __raw_readl(mcbsp->st_data->io_base_st + reg);
}
-#endif
#define MCBSP_READ(mcbsp, reg) \
omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
@@ -248,7 +246,6 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream)
}
EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
-#ifdef CONFIG_ARCH_OMAP3
static void omap_st_on(struct omap_mcbsp *mcbsp)
{
unsigned int w;
@@ -482,11 +479,6 @@ int omap_st_is_enabled(unsigned int id)
}
EXPORT_SYMBOL(omap_st_is_enabled);
-#else
-static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
-static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
-#endif
-
/*
* omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
* The threshold parameter is 1 based, and it is converted (threshold - 1)
@@ -802,7 +794,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
}
mcbsp = id_to_mcbsp_ptr(id);
- if (cpu_is_omap34xx())
+ if (mcbsp->st_data)
omap_st_start(mcbsp);
/* Only enable SRG, if McBSP is master */
@@ -897,7 +889,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
}
- if (cpu_is_omap34xx())
+ if (mcbsp->st_data)
omap_st_stop(mcbsp);
}
EXPORT_SYMBOL(omap_mcbsp_stop);
@@ -1030,7 +1022,6 @@ static const struct attribute_group additional_attr_group = {
.attrs = (struct attribute **)additional_attrs,
};
-#ifdef CONFIG_ARCH_OMAP3
static ssize_t st_taps_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1098,10 +1089,9 @@ static const struct attribute_group sidetone_attr_group = {
.attrs = (struct attribute **)sidetone_attrs,
};
-static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
+static int __devinit omap_st_add(struct omap_mcbsp *mcbsp,
+ struct resource *res)
{
- struct platform_device *pdev;
- struct resource *res;
struct omap_mcbsp_st_data *st_data;
int err;
@@ -1111,9 +1101,6 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
goto err1;
}
- pdev = container_of(mcbsp->dev, struct platform_device, dev);
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
st_data->io_base_st = ioremap(res->start, resource_size(res));
if (!st_data->io_base_st) {
err = -ENOMEM;
@@ -1140,32 +1127,10 @@ static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
{
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
- if (st_data) {
- sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
- iounmap(st_data->io_base_st);
- kfree(st_data);
- }
-}
-
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
-{
- if (cpu_is_omap34xx())
- if (mcbsp->id == 2 || mcbsp->id == 3)
- if (omap_st_add(mcbsp))
- dev_warn(mcbsp->dev,
- "Unable to create sidetone controls\n");
-}
-
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
-{
- if (cpu_is_omap34xx())
- if (mcbsp->id == 2 || mcbsp->id == 3)
- omap_st_remove(mcbsp);
+ sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
+ iounmap(st_data->io_base_st);
+ kfree(st_data);
}
-#else
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
-#endif /* CONFIG_ARCH_OMAP3 */
/*
* McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
@@ -1291,11 +1256,22 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
mcbsp->max_rx_thres = -EINVAL;
}
- /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
- omap34xx_device_init(mcbsp);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
+ if (res) {
+ ret = omap_st_add(mcbsp, res);
+ if (ret) {
+ dev_err(mcbsp->dev,
+ "Unable to create sidetone controls\n");
+ goto err_st;
+ }
+ }
return 0;
+err_st:
+ if (mcbsp->pdata->buffer_size)
+ sysfs_remove_group(&mcbsp->dev->kobj,
+ &additional_attr_group);
err_thres:
clk_put(mcbsp->fclk);
err_res:
@@ -1321,7 +1297,8 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
sysfs_remove_group(&mcbsp->dev->kobj,
&additional_attr_group);
- omap34xx_device_exit(mcbsp);
+ if (mcbsp->st_data)
+ omap_st_remove(mcbsp);
clk_put(mcbsp->fclk);
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 08/13] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
From: Jarkko Nikula <jhnikula@gmail.com>
Active sidetone requires that McBSP interface clock doesn't idle and there
is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and 3
in OMAP34xx share their interface clock with McBSP sidetone module and
that interface clock must be active when the sidetone is operating.
Sidetone has its own autoidle bit which should keep the interface clock
active but it is broken. Putting the McBSP core to no-idle mode when the
sidetone is active is no good either since it results to higher power
consumption when using the threshold based DMA transfers.
For making the McBSP code more generic, move this sidetone clock management
with fixme comments to mach-omap2/mcbsp.c and pass pointer to it via
platform data.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Cc: Paul Wamsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
Yep, just moving fixme code around but at least it can be fixing now under
right architecture. Even if plat/mcbsp.c is moved out.
---
arch/arm/mach-omap2/mcbsp.c | 26 ++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/mcbsp.h | 1 +
arch/arm/plat-omap/mcbsp.c | 18 ++++--------------
3 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index d6cce00..92bd5e2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -27,6 +27,13 @@
#include "control.h"
+/*
+ * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
+ * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
+ */
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-34xx.h"
+
/* McBSP internal signal muxing functions */
void omap2_mcbsp1_mux_clkr_src(u8 mux)
@@ -102,6 +109,24 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
+static int omap3_enable_st_clock(unsigned int id, bool enable)
+{
+ unsigned int w;
+
+ /*
+ * Sidetone uses McBSP ICLK - which must not idle when sidetones
+ * are enabled or sidetones start sounding ugly.
+ */
+ w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
+ if (enable)
+ w &= ~(1 << (id - 2));
+ else
+ w |= 1 << (id - 2);
+ omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+
+ return 0;
+}
+
struct omap_device_pm_latency omap2_mcbsp_latency[] = {
{
.deactivate_func = omap_device_idle_hwmods,
@@ -151,6 +176,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
if (oh->dev_attr) {
oh_device[1] = omap_hwmod_lookup((
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
+ pdata->enable_st_clock = omap3_enable_st_clock;
count++;
}
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 648344a..e451a6e 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -321,6 +321,7 @@ struct omap_mcbsp_platform_data {
/* McBSP platform and instance specific features */
bool has_wakeup; /* Wakeup capability */
bool has_ccr; /* Transceiver has configuration control registers */
+ int (*enable_st_clock)(unsigned int, bool);
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 3ad536e..e96d747 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -26,10 +26,6 @@
#include <plat/mcbsp.h>
#include <linux/pm_runtime.h>
-/* XXX These "sideways" includes are a sign that something is wrong */
-#include "../mach-omap2/cm2xxx_3xxx.h"
-#include "../mach-omap2/cm-regbits-34xx.h"
-
struct omap_mcbsp **mcbsp_ptr;
int omap_mcbsp_count;
@@ -257,13 +253,8 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
{
unsigned int w;
- /*
- * Sidetone uses McBSP ICLK - which must not idle when sidetones
- * are enabled or sidetones start sounding ugly.
- */
- w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
- w &= ~(1 << (mcbsp->id - 2));
- omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+ if (mcbsp->pdata->enable_st_clock)
+ mcbsp->pdata->enable_st_clock(mcbsp->id, 1);
/* Enable McBSP Sidetone */
w = MCBSP_READ(mcbsp, SSELCR);
@@ -284,9 +275,8 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
w = MCBSP_READ(mcbsp, SSELCR);
MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
- w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
- w |= 1 << (mcbsp->id - 2);
- omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+ if (mcbsp->pdata->enable_st_clock)
+ mcbsp->pdata->enable_st_clock(mcbsp->id, 0);
}
static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 07/13] omap: mcbsp: Use per instance register cache size
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
Rationale here is to remove one global variable and to make possible to have
variable size McBSP register maps inside SoC.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/plat-omap/include/plat/mcbsp.h | 3 ++-
arch/arm/plat-omap/mcbsp.c | 6 +++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 0fad63c..648344a 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -359,6 +359,7 @@ struct omap_mcbsp {
u16 max_tx_thres;
u16 max_rx_thres;
void *reg_cache;
+ int reg_cache_size;
};
/**
@@ -370,7 +371,7 @@ struct omap_mcbsp_dev_attr {
};
extern struct omap_mcbsp **mcbsp_ptr;
-extern int omap_mcbsp_count, omap_mcbsp_cache_size;
+extern int omap_mcbsp_count;
#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 234ab16..3ad536e 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -31,7 +31,7 @@
#include "../mach-omap2/cm-regbits-34xx.h"
struct omap_mcbsp **mcbsp_ptr;
-int omap_mcbsp_count, omap_mcbsp_cache_size;
+int omap_mcbsp_count;
static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
@@ -678,7 +678,7 @@ int omap_mcbsp_request(unsigned int id)
}
mcbsp = id_to_mcbsp_ptr(id);
- reg_cache = kzalloc(omap_mcbsp_cache_size, GFP_KERNEL);
+ reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL);
if (!reg_cache) {
return -ENOMEM;
}
@@ -1225,7 +1225,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
}
}
mcbsp->phys_base = res->start;
- omap_mcbsp_cache_size = resource_size(res);
+ mcbsp->reg_cache_size = resource_size(res);
mcbsp->io_base = ioremap(res->start, resource_size(res));
if (!mcbsp->io_base) {
ret = -ENOMEM;
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 06/13] omap: mcbsp: Make threshold based transfer code generic
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
Remove CONFIG_ARCH_OMAP3 conditional compilation and cpu_is_omap34xx test
around buffer threshold based transfer and DMA operating mode control. Use
instead the buffer_size in platform data to determine when these sysfs
controls are exposed and when to access related McBSP registers. Rationale
for this is to make code generic and to allow to use it on OMAP4 that also
supports threshold based transfers.
Currently buffer_size variable is set only for OMAP3 SoCs but it is easy
to extend to OMAP4 and any later OMAP version.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/plat-omap/include/plat/mcbsp.h | 15 +----
arch/arm/plat-omap/mcbsp.c | 120 +++++++++++++++----------------
2 files changed, 59 insertions(+), 76 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index eed20ef..0fad63c 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -354,10 +354,10 @@ struct omap_mcbsp {
struct clk *fclk;
#ifdef CONFIG_ARCH_OMAP3
struct omap_mcbsp_st_data *st_data;
+#endif
int dma_op_mode;
u16 max_tx_thres;
u16 max_rx_thres;
-#endif
void *reg_cache;
};
@@ -377,7 +377,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
int omap_mcbsp_init(void);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
-#ifdef CONFIG_ARCH_OMAP3
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
@@ -386,18 +385,6 @@ u16 omap_mcbsp_get_fifo_size(unsigned int id);
u16 omap_mcbsp_get_tx_delay(unsigned int id);
u16 omap_mcbsp_get_rx_delay(unsigned int id);
int omap_mcbsp_get_dma_op_mode(unsigned int id);
-#else
-static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
-{ }
-static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
-{ }
-static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
-static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
-#endif
int omap_mcbsp_request(unsigned int id);
void omap_mcbsp_free(unsigned int id);
void omap_mcbsp_start(unsigned int id, int tx, int rx);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 97bcbfa..234ab16 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -492,6 +492,11 @@ int omap_st_is_enabled(unsigned int id)
}
EXPORT_SYMBOL(omap_st_is_enabled);
+#else
+static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
+static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
+#endif
+
/*
* omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
* The threshold parameter is 1 based, and it is converted (threshold - 1)
@@ -501,14 +506,13 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
{
struct omap_mcbsp *mcbsp;
- if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
- return;
-
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
return;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return;
if (threshold && threshold <= mcbsp->max_tx_thres)
MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
@@ -524,14 +528,13 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
{
struct omap_mcbsp *mcbsp;
- if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
- return;
-
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
return;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return;
if (threshold && threshold <= mcbsp->max_rx_thres)
MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
@@ -601,6 +604,8 @@ u16 omap_mcbsp_get_tx_delay(unsigned int id)
return -ENODEV;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return 0;
/* Returns the number of free locations in the buffer */
buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
@@ -624,6 +629,8 @@ u16 omap_mcbsp_get_rx_delay(unsigned int id)
return -ENODEV;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return 0;
/* Returns the number of used locations in the buffer */
buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
@@ -659,11 +666,6 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id)
}
EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
-#else
-static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
-static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
-#endif
-
int omap_mcbsp_request(unsigned int id)
{
struct omap_mcbsp *mcbsp;
@@ -937,7 +939,6 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux)
}
#endif
-#ifdef CONFIG_ARCH_OMAP3
#define max_thres(m) (mcbsp->pdata->buffer_size)
#define valid_threshold(m, val) ((val) <= max_thres(m))
#define THRESHOLD_PROP_BUILDER(prop) \
@@ -1028,6 +1029,18 @@ unlock:
static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store);
+static const struct attribute *additional_attrs[] = {
+ &dev_attr_max_tx_thres.attr,
+ &dev_attr_max_rx_thres.attr,
+ &dev_attr_dma_op_mode.attr,
+ NULL,
+};
+
+static const struct attribute_group additional_attr_group = {
+ .attrs = (struct attribute **)additional_attrs,
+};
+
+#ifdef CONFIG_ARCH_OMAP3
static ssize_t st_taps_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1086,27 +1099,6 @@ out:
static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store);
-static const struct attribute *additional_attrs[] = {
- &dev_attr_max_tx_thres.attr,
- &dev_attr_max_rx_thres.attr,
- &dev_attr_dma_op_mode.attr,
- NULL,
-};
-
-static const struct attribute_group additional_attr_group = {
- .attrs = (struct attribute **)additional_attrs,
-};
-
-static inline int __devinit omap_additional_add(struct device *dev)
-{
- return sysfs_create_group(&dev->kobj, &additional_attr_group);
-}
-
-static inline void __devexit omap_additional_remove(struct device *dev)
-{
- sysfs_remove_group(&dev->kobj, &additional_attr_group);
-}
-
static const struct attribute *sidetone_attrs[] = {
&dev_attr_st_taps.attr,
NULL,
@@ -1167,45 +1159,18 @@ static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
{
- mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
- if (cpu_is_omap34xx()) {
- /*
- * Initially configure the maximum thresholds to a safe value.
- * The McBSP FIFO usage with these values should not go under
- * 16 locations.
- * If the whole FIFO without safety buffer is used, than there
- * is a possibility that the DMA will be not able to push the
- * new data on time, causing channel shifts in runtime.
- */
- mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
- mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
- /*
- * REVISIT: Set dmap_op_mode to THRESHOLD as default
- * for mcbsp2 instances.
- */
- if (omap_additional_add(mcbsp->dev))
- dev_warn(mcbsp->dev,
- "Unable to create additional controls\n");
-
+ if (cpu_is_omap34xx())
if (mcbsp->id == 2 || mcbsp->id == 3)
if (omap_st_add(mcbsp))
dev_warn(mcbsp->dev,
"Unable to create sidetone controls\n");
-
- } else {
- mcbsp->max_tx_thres = -EINVAL;
- mcbsp->max_rx_thres = -EINVAL;
- }
}
static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
{
- if (cpu_is_omap34xx()) {
- omap_additional_remove(mcbsp->dev);
-
+ if (cpu_is_omap34xx())
if (mcbsp->id == 2 || mcbsp->id == 3)
omap_st_remove(mcbsp);
- }
}
#else
static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
@@ -1311,11 +1276,38 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, mcbsp);
pm_runtime_enable(mcbsp->dev);
+ mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
+ if (mcbsp->pdata->buffer_size) {
+ /*
+ * Initially configure the maximum thresholds to a safe value.
+ * The McBSP FIFO usage with these values should not go under
+ * 16 locations.
+ * If the whole FIFO without safety buffer is used, than there
+ * is a possibility that the DMA will be not able to push the
+ * new data on time, causing channel shifts in runtime.
+ */
+ mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
+ mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
+
+ ret = sysfs_create_group(&mcbsp->dev->kobj,
+ &additional_attr_group);
+ if (ret) {
+ dev_err(mcbsp->dev,
+ "Unable to create additional controls\n");
+ goto err_thres;
+ }
+ } else {
+ mcbsp->max_tx_thres = -EINVAL;
+ mcbsp->max_rx_thres = -EINVAL;
+ }
+
/* Initialize mcbsp properties for OMAP34XX if needed / applicable */
omap34xx_device_init(mcbsp);
return 0;
+err_thres:
+ clk_put(mcbsp->fclk);
err_res:
iounmap(mcbsp->io_base);
err_ioremap:
@@ -1335,6 +1327,10 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(mcbsp->id);
+ if (mcbsp->pdata->buffer_size)
+ sysfs_remove_group(&mcbsp->dev->kobj,
+ &additional_attr_group);
+
omap34xx_device_exit(mcbsp);
clk_put(mcbsp->fclk);
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 05/13] omap: mcbsp: Make tranceiver configuration control register access generic
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
McBSP transmit and receive configuration control registers must be set up
for OMAP2430 and later. Replace is_omap tests in generic code with a new
feature flag has_ccr in platform data so that there is no need to change
code for any upcoming OMAP version.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/mach-omap2/mcbsp.c | 6 ++++--
arch/arm/plat-omap/include/plat/mcbsp.h | 1 +
arch/arm/plat-omap/mcbsp.c | 8 ++++----
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index de3457d..d6cce00 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -127,10 +127,12 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
}
pdata->reg_step = 4;
- if (oh->class->rev < MCBSP_CONFIG_TYPE2)
+ if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
pdata->reg_size = 2;
- else
+ } else {
pdata->reg_size = 4;
+ pdata->has_ccr = true;
+ }
if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index ac48d83..eed20ef 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -320,6 +320,7 @@ struct omap_mcbsp_platform_data {
/* McBSP platform and instance specific features */
bool has_wakeup; /* Wakeup capability */
+ bool has_ccr; /* Transceiver has configuration control registers */
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 0338ad0..97bcbfa 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -184,7 +184,7 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
MCBSP_WRITE(mcbsp, XCCR, config->xccr);
MCBSP_WRITE(mcbsp, RCCR, config->rccr);
}
@@ -848,7 +848,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
}
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
/* Release the transmitter and receiver */
w = MCBSP_READ_CACHE(mcbsp, XCCR);
w &= ~(tx ? XDISABLE : 0);
@@ -878,7 +878,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset transmitter */
tx &= 1;
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
w = MCBSP_READ_CACHE(mcbsp, XCCR);
w |= (tx ? XDISABLE : 0);
MCBSP_WRITE(mcbsp, XCCR, w);
@@ -888,7 +888,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset receiver */
rx &= 1;
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
w = MCBSP_READ_CACHE(mcbsp, RCCR);
w |= (rx ? RDISABLE : 0);
MCBSP_WRITE(mcbsp, RCCR, w);
--
1.7.6.3
^ permalink raw reply related
* [PATCH resend 04/13] omap: mcbsp: Make wakeup control generic
From: Jarkko Nikula @ 2011-09-26 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317023150-6730-1-git-send-email-jarkko.nikula@bitmer.com>
Currently wakeup control code is compiled only when CONFIG_ARCH_OMAP3 is
set even it should be available for CONFIG_ARCH_OMAP4 only builds also.
Fix this by making wakeup control generic so that it is executed whenever
new feature flag has_wakeup in platform data is set. Currently flag is set
for McBSP config types 3 and 4.
Remove also old comments about idle mode settings and HW bug workarounds
that were not updated during hwmod conversion.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
---
arch/arm/mach-omap2/mcbsp.c | 3 ++
arch/arm/plat-omap/include/plat/mcbsp.h | 3 ++
arch/arm/plat-omap/mcbsp.c | 43 ++++++------------------------
3 files changed, 15 insertions(+), 34 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 43b9ccf..de3457d 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -141,6 +141,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
pdata->buffer_size = 0x80;
}
+ if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
+ pdata->has_wakeup = true;
+
oh_device[0] = oh;
if (oh->dev_attr) {
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 14bc1cb..ac48d83 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -317,6 +317,9 @@ struct omap_mcbsp_platform_data {
u16 buffer_size;
u8 reg_size;
u8 reg_step;
+
+ /* McBSP platform and instance specific features */
+ bool has_wakeup; /* Wakeup capability */
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 623f2c1..0338ad0 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -659,35 +659,7 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id)
}
EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
-static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
-{
- /*
- * Enable wakup behavior, smart idle and all wakeups
- * REVISIT: some wakeups may be unnecessary
- */
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
- }
-}
-
-static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
-{
- /*
- * Disable wakup behavior, smart idle and all wakeups
- */
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- /*
- * HW bug workaround - If no_idle mode is taken, we need to
- * go to smart_idle before going to always_idle, or the
- * device will not hit retention anymore.
- */
-
- MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
- }
-}
#else
-static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
-static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
#endif
@@ -726,8 +698,9 @@ int omap_mcbsp_request(unsigned int id)
pm_runtime_get_sync(mcbsp->dev);
- /* Do procedure specific to omap34xx arch, if applicable */
- omap34xx_mcbsp_request(mcbsp);
+ /* Enable wakeup behavior */
+ if (mcbsp->pdata->has_wakeup)
+ MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
/*
* Make sure that transmitter, receiver and sample-rate generator are
@@ -764,8 +737,9 @@ err_clk_disable:
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(id);
- /* Do procedure specific to omap34xx arch, if applicable */
- omap34xx_mcbsp_free(mcbsp);
+ /* Disable wakeup behavior */
+ if (mcbsp->pdata->has_wakeup)
+ MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
pm_runtime_put_sync(mcbsp->dev);
@@ -794,8 +768,9 @@ void omap_mcbsp_free(unsigned int id)
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(id);
- /* Do procedure specific to omap34xx arch, if applicable */
- omap34xx_mcbsp_free(mcbsp);
+ /* Disable wakeup behavior */
+ if (mcbsp->pdata->has_wakeup)
+ MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
pm_runtime_put_sync(mcbsp->dev);
--
1.7.6.3
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