* [PATCH v2 07/16] ARM: GIC: Add global gic_handle_irq_offset() function
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Similar to gic_handle_irq(), gic_handle_irq_offset() is provided
for those platform who insist on having their GIC base interrupt
at something different from zero. At the moment, Exynos4 is the
only one...
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/common/gic.c | 24 ++++++++++++++++++++++++
arch/arm/include/asm/hardware/gic.h | 1 +
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 5a22896..ef803d2 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -232,6 +232,30 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
} while (1);
}
+asmlinkage void __exception_irq_entry gic_handle_irq_offset(struct pt_regs *regs)
+{
+ u32 irqstat, irqnr;
+ u32 offset = gic_data[0].irq_offset;
+
+ do {
+ irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
+ irqnr = irqstat & ~0x1c00;
+
+ if (likely(irqnr > 15 && irqnr < 1021)) {
+ handle_IRQ(irqnr + offset, regs);
+ continue;
+ }
+ if (irqnr < 16) {
+ writel_relaxed(irqstat, gic_cpu_base_addr + GIC_CPU_EOI);
+#ifdef CONFIG_SMP
+ handle_IPI(irqnr, regs);
+#endif
+ continue;
+ }
+ break;
+ } while (1);
+}
+
static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
{
struct gic_chip_data *chip_data = irq_get_handler_data(irq);
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 45e4ab4..0f454c6 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -39,6 +39,7 @@ extern struct irq_chip gic_arch_extn;
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
void gic_secondary_init(unsigned int);
void gic_handle_irq(struct pt_regs *regs);
+void gic_handle_irq_offset(struct pt_regs *regs);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 08/16] ARM: exynos4: convert to CONFIG_MULTI_IRQ_HANDLER
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the Exynos4 platforms to be using the gic_handle_irq_offset()
function as their primary interrupt handler.
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-exynos4/include/mach/entry-macro.S | 62 ----------------------
arch/arm/mach-exynos4/mach-armlex4210.c | 2 +
arch/arm/mach-exynos4/mach-nuri.c | 2 +
arch/arm/mach-exynos4/mach-origen.c | 2 +
arch/arm/mach-exynos4/mach-smdk4212.c | 2 +
arch/arm/mach-exynos4/mach-smdkv310.c | 2 +
arch/arm/mach-exynos4/mach-universal_c210.c | 2 +
8 files changed, 13 insertions(+), 62 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d3e246c..e32a4d3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -787,6 +787,7 @@ config ARCH_EXYNOS4
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
+ select MULTI_IRQ_HANDLER
help
Samsung EXYNOS4 series based systems
diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
index 807d05d..efe9a00 100644
--- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
@@ -9,71 +9,9 @@
* warranty of any kind, whether express or implied.
*/
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/hardware/gic.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =gic_cpu_base_addr
- ldr \base, [\base]
- mrc p15, 0, \tmp, c0, c0, 5
- and \tmp, \tmp, #3
- cmp \tmp, #1
- addeq \base, \base, #EXYNOS4_GIC_BANK_OFFSET
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
- /*
- * The interrupt numbering scheme is defined in the
- * interrupt controller spec. To wit:
- *
- * Interrupts 0-15 are IPI
- * 16-28 are reserved
- * 29-31 are local. We allow 30 to be used for the watchdog.
- * 32-1020 are global
- * 1021-1022 are reserved
- * 1023 is "spurious" (no interrupt)
- *
- * For now, we ignore all local interrupts so only return an interrupt if it's
- * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
- *
- * A simple read from the controller will tell us the number of the highest
- * priority enabled interrupt. We then just need to check whether it is in the
- * valid range for an IRQ (30-1020 inclusive).
- */
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
-
- ldr \tmp, =1021
-
- bic \irqnr, \irqstat, #0x1c00
-
- cmp \irqnr, #15
- cmpcc \irqnr, \irqnr
- cmpne \irqnr, \tmp
- cmpcs \irqnr, \irqnr
- addne \irqnr, \irqnr, #32
-
- .endm
-
- /* We assume that irqstat (the raw value of the IRQ acknowledge
- * register) is preserved from the macro above.
- * If there is an IPI, we immediately signal end of interrupt on the
- * controller, since this requires the original irqstat value which
- * we won't easily be able to recreate later.
- */
-
- .macro test_for_ipi, irqnr, irqstat, base, tmp
- bic \irqnr, \irqstat, #0x1c00
- cmp \irqnr, #16
- strcc \irqstat, [\base, #GIC_CPU_EOI]
- cmpcs \irqnr, \irqnr
- .endm
-
diff --git a/arch/arm/mach-exynos4/mach-armlex4210.c b/arch/arm/mach-exynos4/mach-armlex4210.c
index 8c82c6b..969e04c 100644
--- a/arch/arm/mach-exynos4/mach-armlex4210.c
+++ b/arch/arm/mach-exynos4/mach-armlex4210.c
@@ -15,6 +15,7 @@
#include <linux/serial_core.h>
#include <linux/smsc911x.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -213,6 +214,7 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
.soc = &exynos4_soc_desc,
.init_irq = exynos4_init_irq,
.map_io = armlex4210_map_io,
+ .handle_irq = gic_handle_irq_offset,
.init_machine = armlex4210_machine_init,
.timer = &exynos4_timer,
MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-nuri.c b/arch/arm/mach-exynos4/mach-nuri.c
index 5780ee3..5e133ae 100644
--- a/arch/arm/mach-exynos4/mach-nuri.c
+++ b/arch/arm/mach-exynos4/mach-nuri.c
@@ -28,6 +28,7 @@
#include <video/platform_lcd.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -1192,6 +1193,7 @@ MACHINE_START(NURI, "NURI")
.soc = &exynos4_soc_desc,
.init_irq = exynos4_init_irq,
.map_io = nuri_map_io,
+ .handle_irq = gic_handle_irq_offset,
.init_machine = nuri_machine_init,
.timer = &exynos4_timer,
.reserve = &nuri_reserve,
diff --git a/arch/arm/mach-exynos4/mach-origen.c b/arch/arm/mach-exynos4/mach-origen.c
index 06250fc..7ede5fc 100644
--- a/arch/arm/mach-exynos4/mach-origen.c
+++ b/arch/arm/mach-exynos4/mach-origen.c
@@ -17,6 +17,7 @@
#include <linux/pwm_backlight.h>
#include <linux/gpio_keys.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -215,6 +216,7 @@ MACHINE_START(ORIGEN, "ORIGEN")
.soc = &exynos4_soc_desc,
.init_irq = exynos4_init_irq,
.map_io = origen_map_io,
+ .handle_irq = gic_handle_irq_offset,
.init_machine = origen_machine_init,
.timer = &exynos4_timer,
MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-smdk4212.c b/arch/arm/mach-exynos4/mach-smdk4212.c
index cf92514..84a0446 100644
--- a/arch/arm/mach-exynos4/mach-smdk4212.c
+++ b/arch/arm/mach-exynos4/mach-smdk4212.c
@@ -20,6 +20,7 @@
#include <linux/regulator/machine.h>
#include <linux/serial_core.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -290,6 +291,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
.soc = &exynos4_soc_desc,
.init_irq = exynos4_init_irq,
.map_io = smdk4212_map_io,
+ .handle_irq = gic_handle_irq_offset,
.init_machine = smdk4212_machine_init,
.timer = &exynos4_timer,
MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index 088644e..8e11eaa 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -20,6 +20,7 @@
#include <linux/input.h>
#include <linux/pwm_backlight.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -351,6 +352,7 @@ MACHINE_START(SMDKC210, "SMDKC210")
.soc = &exynos4_soc_desc,
.init_irq = exynos4_init_irq,
.map_io = smdkv310_map_io,
+ .handle_irq = gic_handle_irq_offset,
.init_machine = smdkv310_machine_init,
.timer = &exynos4_timer,
MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c b/arch/arm/mach-exynos4/mach-universal_c210.c
index 39c34a1..43f156d 100644
--- a/arch/arm/mach-exynos4/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -23,6 +23,7 @@
#include <linux/i2c/mcs.h>
#include <linux/i2c/atmel_mxt_ts.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -876,6 +877,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
.soc = &exynos4_soc_desc,
.init_irq = exynos4_init_irq,
.map_io = universal_map_io,
+ .handle_irq = gic_handle_irq_offset,
.init_machine = universal_machine_init,
.timer = &exynos4_timer,
.reserve = &universal_reserve,
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 09/16] ARM: tegra2: convert to CONFIG_MULTI_IRQ_HANDLER
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the tegra2 platforms to be using the gic_handle_irq
function as their primary interrupt handler.
Tested on harmony.
Cc: Colin Cross <ccross@android.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-tegra/Kconfig | 1 +
arch/arm/mach-tegra/board-dt.c | 2 ++
arch/arm/mach-tegra/board-harmony.c | 2 ++
arch/arm/mach-tegra/board-paz00.c | 2 ++
arch/arm/mach-tegra/board-seaboard.c | 4 ++++
arch/arm/mach-tegra/board-trimslice.c | 2 ++
arch/arm/mach-tegra/include/mach/entry-macro.S | 22 ++--------------------
7 files changed, 15 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index d82ebab..ba0ac3f 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -13,6 +13,7 @@ config ARCH_TEGRA_2x_SOC
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
+ select MULTI_IRQ_HANDLER
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 0b3f937..cfa39c5 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -32,6 +32,7 @@
#include <linux/i2c.h>
#include <linux/i2c-tegra.h>
+#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
@@ -115,6 +116,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
.soc = &tegra_soc_desc,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_dt_init,
.dt_compat = tegra_dt_board_compat,
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index f2ef94f..eb65d68 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -31,6 +31,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <asm/hardware/gic.h>
#include <asm/setup.h>
#include <mach/tegra_wm8903_pdata.h>
@@ -189,6 +190,7 @@ MACHINE_START(HARMONY, "harmony")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_harmony_init,
MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 63595f0..fc7831f 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -28,6 +28,7 @@
#include <linux/i2c.h>
#include <linux/rfkill-gpio.h>
+#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
@@ -192,6 +193,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_paz00_init,
MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index dfd9c95..7fd71cf 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -34,6 +34,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
#include "board.h"
#include "board-seaboard.h"
@@ -286,6 +287,7 @@ MACHINE_START(SEABOARD, "seaboard")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_seaboard_init,
MACHINE_END
@@ -296,6 +298,7 @@ MACHINE_START(KAEN, "kaen")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_kaen_init,
MACHINE_END
@@ -306,6 +309,7 @@ MACHINE_START(WARIO, "wario")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_wario_init,
MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 16cfc39..c5aa9df 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -26,6 +26,7 @@
#include <linux/i2c.h>
#include <linux/gpio.h>
+#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/setup.h>
@@ -179,6 +180,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_irq = tegra_init_irq,
+ .handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_trimslice_init,
MACHINE_END
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c5..ac11262 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -12,30 +12,15 @@
* GNU General Public License for more details.
*
*/
-#include <mach/iomap.h>
-#include <mach/io.h>
-
-#if defined(CONFIG_ARM_GIC)
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-
- /* Uses the GIC interrupt controller built into the cpu */
-#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- movw \base, #(ICTRL_BASE & 0x0000ffff)
- movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
+ .macro arch_ret_to_user, tmp1, tmp2
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-#else
+#if !defined(CONFIG_ARM_GIC)
/* legacy interrupt controller for AP16 */
- .macro disable_fiq
- .endm
.macro get_irqnr_preamble, base, tmp
@ enable imprecise aborts
@@ -46,9 +31,6 @@
orr \base, #0x0000f000
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
cmp \irqnr, #0x80
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 10/16] ARM: ux500: convert to CONFIG_MULTI_IRQ_HANDLER
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the ux500 platforms to be using the gic_handle_irq
function as their primary interrupt handler.
Cc: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-ux500/Kconfig | 1 +
arch/arm/mach-ux500/board-mop500.c | 4 ++++
arch/arm/mach-ux500/board-u5500.c | 2 ++
arch/arm/mach-ux500/include/mach/entry-macro.S | 2 --
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index a3e0c86..bb2b52b 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,6 +7,7 @@ config UX500_SOC_COMMON
select HAS_MTU
select ARM_ERRATA_753970
select ARM_ERRATA_754322
+ select MULTI_IRQ_HANDLER
menu "Ux500 SoC"
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index f0b1a00..2539b0b 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,6 +33,7 @@
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
#include <plat/i2c.h>
#include <plat/ste_dma40.h>
@@ -696,6 +697,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
.timer = &ux500_timer,
+ .handle_irq = gic_handle_irq,
.init_machine = mop500_init_machine,
MACHINE_END
@@ -705,6 +707,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
.timer = &ux500_timer,
+ .handle_irq = gic_handle_irq,
.init_machine = hrefv60_init_machine,
MACHINE_END
@@ -715,5 +718,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
.timer = &ux500_timer,
+ .handle_irq = gic_handle_irq,
.init_machine = snowball_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index ddfad36..c4c90a3 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -11,6 +11,7 @@
#include <linux/irq.h>
#include <linux/i2c.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -123,5 +124,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
.map_io = u5500_map_io,
.init_irq = ux500_init_irq,
.timer = &ux500_timer,
+ .handle_irq = gic_handle_irq,
.init_machine = u5500_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 071bba9..e16299e 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -10,8 +10,6 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
.macro disable_fiq
.endm
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 11/16] ARM: shmobile: convert smp platforms to gic_handle_irq()
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the SMP shmobile platforms to use gic_handle_irq() instead
of the assembly macro.
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-shmobile/Makefile | 1 -
arch/arm/mach-shmobile/board-ag5evm.c | 2 +-
arch/arm/mach-shmobile/entry-gic.S | 18 ------------------
arch/arm/mach-shmobile/include/mach/common.h | 1 -
4 files changed, 1 insertions(+), 21 deletions(-)
delete mode 100644 arch/arm/mach-shmobile/entry-gic.S
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 612b270..f58ef1e 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -28,7 +28,6 @@ pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
obj-$(CONFIG_ARCH_SH7367) += entry-intc.o
obj-$(CONFIG_ARCH_SH7377) += entry-intc.o
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
-obj-$(CONFIG_ARCH_SH73A0) += entry-gic.o
# PM objects
obj-$(CONFIG_SUSPEND) += suspend.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 475342b..145473e 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -602,7 +602,7 @@ struct sys_timer ag5evm_timer = {
MACHINE_START(AG5EVM, "ag5evm")
.map_io = ag5evm_map_io,
.init_irq = ag5evm_init_irq,
- .handle_irq = shmobile_handle_irq_gic,
+ .handle_irq = gic_handle_irq,
.init_machine = ag5evm_init,
.timer = &ag5evm_timer,
MACHINE_END
diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S
deleted file mode 100644
index e20239b..0000000
--- a/arch/arm/mach-shmobile/entry-gic.S
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * ARM Interrupt demux handler using GIC
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2011 Paul Mundt
- * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/assembler.h>
-#include <asm/entry-macro-multi.S>
-#include <asm/hardware/gic.h>
-#include <asm/hardware/entry-macro-gic.S>
-
- arch_irq_handler shmobile_handle_irq_gic
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c0cdbf9..137ba2a 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -7,7 +7,6 @@ extern void shmobile_secondary_vector(void);
struct clk;
extern int clk_init(void);
extern void shmobile_handle_irq_intc(struct pt_regs *);
-extern void shmobile_handle_irq_gic(struct pt_regs *);
extern struct platform_suspend_ops shmobile_suspend_ops;
struct cpuidle_device;
extern void (*shmobile_cpuidle_modes[])(void);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 12/16] ARM: cns3xxx: convert to CONFIG_MULTI_IRQ_HANDLER
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the cns3xxx platform to be using the gic_handle_irq
function as its primary interrupt handler.
Cc: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-cns3xxx/cns3420vb.c | 2 ++
arch/arm/mach-cns3xxx/include/mach/entry-macro.S | 2 --
3 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e32a4d3..70a947e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -334,6 +334,7 @@ config ARCH_CNS3XXX
select ARM_GIC
select MIGHT_HAVE_PCI
select PCI_DOMAINS if PCI
+ select MULTI_IRQ_HANDLER
help
Support for Cavium Networks CNS3XXX platform.
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 55f7b4b..594852f 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -26,6 +26,7 @@
#include <linux/mtd/partitions.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
@@ -201,5 +202,6 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
.map_io = cns3420_map_io,
.init_irq = cns3xxx_init_irq,
.timer = &cns3xxx_timer,
+ .handle_irq = gic_handle_irq,
.init_machine = cns3420_init,
MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index d87bfc3..01c57df 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,8 +8,6 @@
* published by the Free Software Foundation.
*/
-#include <asm/hardware/entry-macro-gic.S>
-
.macro disable_fiq
.endm
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 13/16] ARM: zynq: convert to CONFIG_MULTI_IRQ_HANDLER
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the zynq platform to be using the gic_handle_irq
function as its primary interrupt handler.
Acked-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-zynq/common.c | 1 +
arch/arm/mach-zynq/include/mach/entry-macro.S | 3 ---
3 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 70a947e..0514264 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -911,6 +911,7 @@ config ARCH_ZYNQ
select ARM_AMBA
select ICST
select USE_OF
+ select MULTI_IRQ_HANDLER
help
Support for Xilinx Zynq ARM Cortex A9 Platform
endchoice
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 73e9368..ab5cfdd 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = {
MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
.map_io = xilinx_map_io,
.init_irq = xilinx_irq_init,
+ .handle_irq = gic_handle_irq,
.init_machine = xilinx_init_machine,
.timer = &xttcpss_sys_timer,
.dt_compat = xilinx_dt_match,
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
index 3cfc01b..d621fb7 100644
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ b/arch/arm/mach-zynq/include/mach/entry-macro.S
@@ -20,9 +20,6 @@
* GNU General Public License for more details.
*/
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
-
.macro disable_fiq
.endm
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 14/16] ARM: omap2/3: Add global omap2/3_intc_handle_irq() functions
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Provide the OMAP2/3 IRQ code with low level handlers that can be used
by platforms using CONFIG_MULTI_IRQ_HANDLER. Though the handlers are
written in C, the compiled code looks very similar to its assembly
counterpart (at least with my gcc 4.4.1).
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-omap2/irq.c | 49 ++++++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/irqs.h | 2 +
2 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 3a12f75..0a48b33 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -35,6 +35,11 @@
/* Number of IRQ state bits in each MIR register */
#define IRQ_BITS_PER_REG 32
+#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
+#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
+#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
+
/*
* OMAP2 has a number of different interrupt controllers, each interrupt
* controller is identified as its own "bank". Register definitions are
@@ -191,6 +196,44 @@ void __init ti816x_init_irq(void)
omap_init_irq(OMAP34XX_IC_BASE, 128);
}
+static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
+{
+ u32 irqnr;
+
+ do {
+ irqnr = readl_relaxed(base_addr + 0x98);
+ if (irqnr)
+ goto out;
+
+ irqnr = readl_relaxed(base_addr + 0xb8);
+ if (irqnr)
+ goto out;
+
+ irqnr = readl_relaxed(base_addr + 0xd8);
+#ifdef CONFIG_SOC_OMAPTI816X
+ if (irqnr)
+ goto out;
+ irqnr = readl_relaxed(base_addr + 0xf8);
+#endif
+
+out:
+ if (!irqnr)
+ break;
+
+ irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
+ irqnr &= ACTIVEIRQ_MASK;
+
+ if (irqnr)
+ handle_IRQ(irqnr, regs);
+ } while (irqnr);
+}
+
+asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
+{
+ void __iomem *base_addr = OMAP2_IRQ_BASE;
+ omap_intc_handle_irq(base_addr, regs);
+}
+
#ifdef CONFIG_ARCH_OMAP3
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
@@ -263,4 +306,10 @@ void omap3_intc_resume_idle(void)
/* Re-enable autoidle */
intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
}
+
+asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
+{
+ void __iomem *base_addr = OMAP3_IRQ_BASE;
+ omap_intc_handle_irq(base_addr, regs);
+}
#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 30e1071..8b19a63 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -448,6 +448,8 @@ void omap_intc_restore_context(void);
void omap3_intc_suspend(void);
void omap3_intc_prepare_idle(void);
void omap3_intc_resume_idle(void);
+void omap2_intc_handle_irq(struct pt_regs *regs);
+void omap3_intc_handle_irq(struct pt_regs *regs);
#endif
#include <mach/hardware.h>
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 15/16] ARM: omap2plus: convert to CONFIG_MULTI_IRQ_HANDLER
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Convert the omap2plus platforms to be using CONFIG_MULTI_IRQ_HANDLER.
Each machine is modified to provide either omap2_intc_handle_irq(),
omap3_intc_handle_irq() or gic_handle_irq().
This allows for a major cleanup, removing the MULTI_OMAP setup
from the interrupt path.
Tested on both Panda and IGEPv2 (single kernel image)
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-omap2/board-2430sdp.c | 1 +
arch/arm/mach-omap2/board-3430sdp.c | 1 +
arch/arm/mach-omap2/board-3630sdp.c | 1 +
arch/arm/mach-omap2/board-4430sdp.c | 2 +
arch/arm/mach-omap2/board-am3517crane.c | 1 +
arch/arm/mach-omap2/board-am3517evm.c | 1 +
arch/arm/mach-omap2/board-apollon.c | 1 +
arch/arm/mach-omap2/board-cm-t35.c | 2 +
arch/arm/mach-omap2/board-cm-t3517.c | 1 +
arch/arm/mach-omap2/board-devkit8000.c | 1 +
arch/arm/mach-omap2/board-generic.c | 1 +
arch/arm/mach-omap2/board-h4.c | 1 +
arch/arm/mach-omap2/board-igep0020.c | 2 +
arch/arm/mach-omap2/board-ldp.c | 1 +
arch/arm/mach-omap2/board-n8x0.c | 3 +
arch/arm/mach-omap2/board-omap3beagle.c | 1 +
arch/arm/mach-omap2/board-omap3evm.c | 1 +
arch/arm/mach-omap2/board-omap3logic.c | 2 +
arch/arm/mach-omap2/board-omap3pandora.c | 1 +
arch/arm/mach-omap2/board-omap3stalker.c | 1 +
arch/arm/mach-omap2/board-omap3touchbook.c | 1 +
arch/arm/mach-omap2/board-omap4panda.c | 2 +
arch/arm/mach-omap2/board-overo.c | 1 +
arch/arm/mach-omap2/board-rm680.c | 1 +
arch/arm/mach-omap2/board-rx51.c | 1 +
arch/arm/mach-omap2/board-zoom.c | 2 +
arch/arm/mach-omap2/include/mach/entry-macro.S | 137 ------------------------
arch/arm/plat-omap/Kconfig | 1 +
29 files changed, 36 insertions(+), 137 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 1aee224..4c5b01d 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2
depends on ARCH_OMAP2PLUS
default y
select CPU_V6
+ select MULTI_IRQ_HANDLER
config ARCH_OMAP3
bool "TI OMAP3"
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 4191743..56785c6 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -256,6 +256,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
.map_io = omap_2430sdp_map_io,
.init_early = omap2430_init_early,
.init_irq = omap2_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = omap_2430sdp_init,
.timer = &omap2_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 77142c1..1c17bd8 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -728,6 +728,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap_3430sdp_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index f552305..b27aa85 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -215,6 +215,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
.map_io = omap3_map_io,
.init_early = omap3630_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap_sdp_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index c404c5b..1b9e372 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <mach/omap4-common.h>
+#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -991,6 +992,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
.map_io = omap_4430sdp_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
+ .handle_irq = gic_handle_irq,
.init_machine = omap_4430sdp_init,
.timer = &omap4_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 7834536..0166f4e 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -98,6 +98,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
.map_io = omap3_map_io,
.init_early = am35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = am3517_crane_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index d314f03..18cf2ce 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -491,6 +491,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
.map_io = omap3_map_io,
.init_early = am35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = am3517_evm_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 868d5f0..ab6704f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -350,6 +350,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
.map_io = omap_apollon_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = omap_apollon_init,
.timer = &omap2_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index bd1bcac..21a2436 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -634,6 +634,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = cm_t35_init,
.timer = &omap3_timer,
MACHINE_END
@@ -644,6 +645,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
.map_io = omap3_map_io,
.init_early = omap3630_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = cm_t3730_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 3f4dc66..1e2c52b 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -299,6 +299,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
.map_io = omap3_map_io,
.init_early = am35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = cm_t3517_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 8d362dd..d8a02be 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -666,6 +666,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = devkit8000_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = devkit8000_init,
.timer = &omap3_secure_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 7ac5462..dd2a5c2 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -70,6 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
.map_io = omap_generic_map_io,
.init_early = omap_generic_init_early,
.init_irq = omap2_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = omap_generic_init,
.timer = &omap2_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index f0ddc27..e75f09f 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -381,6 +381,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
.map_io = omap_h4_map_io,
.init_early = omap2420_init_early,
.init_irq = omap_h4_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = omap_h4_init,
.timer = &omap2_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index d0a3f78..b45d48d 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -672,6 +672,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = igep_init,
.timer = &omap3_timer,
MACHINE_END
@@ -682,6 +683,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = igep_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 5797917..4a53582 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -332,6 +332,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap_ldp_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 4373a6a..49d9cc3 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -695,6 +695,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
.map_io = n8x0_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = n8x0_init_machine,
.timer = &omap2_timer,
MACHINE_END
@@ -705,6 +706,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
.map_io = n8x0_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = n8x0_init_machine,
.timer = &omap2_timer,
MACHINE_END
@@ -715,6 +717,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
.map_io = n8x0_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
+ .handle_irq = omap2_intc_handle_irq,
.init_machine = n8x0_init_machine,
.timer = &omap2_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 0c49ee7..03af775 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -569,6 +569,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
.map_io = omap3_map_io,
.init_early = omap3_beagle_init_early,
.init_irq = omap3_beagle_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3_beagle_init,
.timer = &omap3_secure_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index ec00b2e..f86c1e8 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -681,6 +681,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3_evm_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7c0f193..bd65196 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -208,6 +208,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3logic_init,
.timer = &omap3_timer,
MACHINE_END
@@ -217,6 +218,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3logic_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index f7811f4..caf607c 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -606,6 +606,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3pandora_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 8ab73af..ca02d2f 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -459,6 +459,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_stalker_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3_stalker_init,
.timer = &omap3_secure_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 5e3e22f..7586e2c 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -404,6 +404,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_touchbook_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap3_touchbook_init,
.timer = &omap3_secure_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 42d6168..41b2032 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -31,6 +31,7 @@
#include <mach/hardware.h>
#include <mach/omap4-common.h>
+#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -584,6 +585,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
.map_io = omap4_panda_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
+ .handle_irq = gic_handle_irq,
.init_machine = omap4_panda_init,
.timer = &omap4_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 4cf7aea..9865d8d 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -562,6 +562,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = overo_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index d7c8f60..cf9e2db 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -155,6 +155,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
.map_io = rm680_map_io,
.init_early = omap3630_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = rm680_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index e2e958a..f777d11 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -158,6 +158,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
.map_io = rx51_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = rx51_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index be6684d..011b2e3 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -135,6 +135,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap_zoom_init,
.timer = &omap3_timer,
MACHINE_END
@@ -145,6 +146,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
.map_io = omap3_map_io,
.init_early = omap3630_init_early,
.init_irq = omap3_init_irq,
+ .handle_irq = omap3_intc_handle_irq,
.init_machine = omap_zoom_init,
.timer = &omap3_timer,
MACHINE_END
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index feb90a1..56964a0 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -10,146 +10,9 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
-#include <mach/hardware.h>
-#include <mach/io.h>
-#include <mach/irqs.h>
-#include <asm/hardware/gic.h>
-
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-
-#include <plat/multi.h>
-
-#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
-#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
-#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
-#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
-#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
-/*
- * Unoptimized irq functions for multi-omap2, 3 and 4
- */
-
-#ifdef MULTI_OMAP2
- /*
- * Configure the interrupt base on the first interrupt.
- * See also omap_irq_base_init for setting omap_irq_base.
- */
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =omap_irq_base @ irq base address
- ldr \base, [\base, #0] @ irq base value
- .endm
-
- /* Check the pending interrupts. Note that base already set */
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- tst \base, #0x100 @ gic address?
- bne 4401f @ found gic
-
- /* Handle omap2 and omap3 */
- ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
- cmp \irqnr, #0x0
- bne 9998f
- ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
- cmp \irqnr, #0x0
- bne 9998f
- ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
- cmp \irqnr, #0x0
- bne 9998f
-
- /*
- * ti816x has additional IRQ pending register. Checking this
- * register on omap2 & omap3 has no effect (read as 0).
- */
- ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
- cmp \irqnr, #0x0
-9998:
- ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
- and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
- b 9999f
-
- /* Handle omap4 */
-4401: ldr \irqstat, [\base, #GIC_CPU_INTACK]
- ldr \tmp, =1021
- bic \irqnr, \irqstat, #0x1c00
- cmp \irqnr, #15
- cmpcc \irqnr, \irqnr
- cmpne \irqnr, \tmp
- cmpcs \irqnr, \irqnr
-9999:
- .endm
-
-#ifdef CONFIG_SMP
- /* We assume that irqstat (the raw value of the IRQ acknowledge
- * register) is preserved from the macro above.
- * If there is an IPI, we immediately signal end of interrupt
- * on the controller, since this requires the original irqstat
- * value which we won't easily be able to recreate later.
- */
-
- .macro test_for_ipi, irqnr, irqstat, base, tmp
- bic \irqnr, \irqstat, #0x1c00
- cmp \irqnr, #16
- it cc
- strcc \irqstat, [\base, #GIC_CPU_EOI]
- it cs
- cmpcs \irqnr, \irqnr
- .endm
-#endif /* CONFIG_SMP */
-
-#else /* MULTI_OMAP2 */
-
-
-/*
- * Optimized irq functions for omap2, 3 and 4
- */
-
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- .macro get_irqnr_preamble, base, tmp
-#ifdef CONFIG_ARCH_OMAP2
- ldr \base, =OMAP2_IRQ_BASE
-#else
- ldr \base, =OMAP3_IRQ_BASE
-#endif
- .endm
-
- /* Check the pending interrupts. Note that base already set */
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
- cmp \irqnr, #0x0
- bne 9999f
- ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
- cmp \irqnr, #0x0
- bne 9999f
- ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
- cmp \irqnr, #0x0
-#ifdef CONFIG_SOC_OMAPTI816X
- bne 9999f
- ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
- cmp \irqnr, #0x0
-#endif
-9999:
- ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
- and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
-
- .endm
-#endif
-
-
-#ifdef CONFIG_ARCH_OMAP4
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =OMAP4_IRQ_BASE
- .endm
-
-#endif
-
-#endif /* MULTI_OMAP2 */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index fa62037..c39cbca 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -22,6 +22,7 @@ config ARCH_OMAP2PLUS
select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP
select OMAP_DM_TIMER
+ select MULTI_IRQ_HANDLER
help
"Systems based on OMAP2, OMAP3 or OMAP4"
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 16/16] ARM: GIC: Make MULTI_IRQ_HANDLER mandatory
From: Marc Zyngier @ 2011-09-26 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317034955-1029-1-git-send-email-marc.zyngier@arm.com>
Now that MULTI_IRQ_HANDLER is selected by all the in-tree
GIC users, make it mandatory and remove the unused macros.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/Kconfig | 3 -
arch/arm/common/Kconfig | 1 +
arch/arm/common/gic.c | 2 +-
arch/arm/include/asm/hardware/entry-macro-gic.S | 60 -----------------------
arch/arm/include/asm/hardware/gic.h | 1 -
arch/arm/mach-msm/Kconfig | 2 -
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-tegra/Kconfig | 1 -
arch/arm/mach-ux500/Kconfig | 1 -
arch/arm/plat-omap/Kconfig | 1 -
10 files changed, 3 insertions(+), 70 deletions(-)
delete mode 100644 arch/arm/include/asm/hardware/entry-macro-gic.S
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0514264..d3e246c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -334,7 +334,6 @@ config ARCH_CNS3XXX
select ARM_GIC
select MIGHT_HAVE_PCI
select PCI_DOMAINS if PCI
- select MULTI_IRQ_HANDLER
help
Support for Cavium Networks CNS3XXX platform.
@@ -788,7 +787,6 @@ config ARCH_EXYNOS4
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
- select MULTI_IRQ_HANDLER
help
Samsung EXYNOS4 series based systems
@@ -911,7 +909,6 @@ config ARCH_ZYNQ
select ARM_AMBA
select ICST
select USE_OF
- select MULTI_IRQ_HANDLER
help
Support for Xilinx Zynq ARM Cortex A9 Platform
endchoice
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 114a432..de31997 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,5 +1,6 @@
config ARM_GIC
select IRQ_PERCPU_DEVID
+ select MULTI_IRQ_HANDLER
bool
config ARM_VIC
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index ef803d2..8f55cf3 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -39,7 +39,7 @@
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
/* Address of GIC 0 CPU interface */
-void __iomem *gic_cpu_base_addr __read_mostly;
+static void __iomem *gic_cpu_base_addr __read_mostly;
/*
* Supported arch specific GIC irq extension.
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc80..0000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/arm/include/asm/hardware/entry-macro-gic.S
- *
- * Low-level IRQ helper macros for GIC
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/hardware/gic.h>
-
-#ifndef HAVE_GET_IRQNR_PREAMBLE
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =gic_cpu_base_addr
- ldr \base, [\base]
- .endm
-#endif
-
-/*
- * The interrupt numbering scheme is defined in the
- * interrupt controller spec. To wit:
- *
- * Interrupts 0-15 are IPI
- * 16-31 are local. We allow 30 to be used for the watchdog.
- * 32-1020 are global
- * 1021-1022 are reserved
- * 1023 is "spurious" (no interrupt)
- *
- * A simple read from the controller will tell us the number of the highest
- * priority enabled interrupt. We then just need to check whether it is in the
- * valid range for an IRQ (30-1020 inclusive).
- */
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- ldr \irqstat, [\base, #GIC_CPU_INTACK]
- /* bits 12-10 = src CPU, 9-0 = int # */
-
- ldr \tmp, =1021
- bic \irqnr, \irqstat, #0x1c00
- cmp \irqnr, #15
- cmpcc \irqnr, \irqnr
- cmpne \irqnr, \tmp
- cmpcs \irqnr, \irqnr
- .endm
-
-/* We assume that irqstat (the raw value of the IRQ acknowledge
- * register) is preserved from the macro above.
- * If there is an IPI, we immediately signal end of interrupt on the
- * controller, since this requires the original irqstat value which
- * we won't easily be able to recreate later.
- */
-
- .macro test_for_ipi, irqnr, irqstat, base, tmp
- bic \irqnr, \irqstat, #0x1c00
- cmp \irqnr, #16
- strcc \irqstat, [\base, #GIC_CPU_EOI]
- cmpcs \irqnr, \irqnr
- .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 0f454c6..3411d37 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -33,7 +33,6 @@
#define GIC_DIST_SOFTINT 0xf00
#ifndef __ASSEMBLY__
-extern void __iomem *gic_cpu_base_addr;
extern struct irq_chip gic_arch_extn;
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ba36b74..ebde97f 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -50,7 +50,6 @@ config ARCH_MSM8X60
select GPIO_MSM_V2
select MSM_GPIOMUX
select MSM_SCM if SMP
- select MULTI_IRQ_HANDLER
config ARCH_MSM8960
bool "MSM8960"
@@ -61,7 +60,6 @@ config ARCH_MSM8960
select MSM_V2_TLMM
select MSM_GPIOMUX
select MSM_SCM if SMP
- select MULTI_IRQ_HANDLER
endchoice
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4c5b01d..9e29f9d 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -36,6 +36,7 @@ config ARCH_OMAP3
select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
select ARCH_HAS_OPP
select PM_OPP if PM
+ select MULTI_IRQ_HANDLER
config ARCH_OMAP4
bool "TI OMAP4"
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index ba0ac3f..d82ebab 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -13,7 +13,6 @@ config ARCH_TEGRA_2x_SOC
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
- select MULTI_IRQ_HANDLER
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index bb2b52b..a3e0c86 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,7 +7,6 @@ config UX500_SOC_COMMON
select HAS_MTU
select ARM_ERRATA_753970
select ARM_ERRATA_754322
- select MULTI_IRQ_HANDLER
menu "Ux500 SoC"
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index c39cbca..fa62037 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -22,7 +22,6 @@ config ARCH_OMAP2PLUS
select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP
select OMAP_DM_TIMER
- select MULTI_IRQ_HANDLER
help
"Systems based on OMAP2, OMAP3 or OMAP4"
--
1.7.0.4
^ permalink raw reply related
* [PATCH] merge i.MX3 and i.MX6
From: Sascha Hauer @ 2011-09-26 11:04 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/Makefile | 3 +--
arch/arm/mach-imx/Kconfig | 7 +++----
arch/arm/mach-imx/Makefile | 1 +
arch/arm/mm/Kconfig | 4 ++--
arch/arm/plat-mxc/Kconfig | 14 ++++++--------
5 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 89be85d..42ab385 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -155,9 +155,8 @@ machine-$(CONFIG_ARCH_MMP) := mmp
machine-$(CONFIG_ARCH_MSM) := msm
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
machine-$(CONFIG_ARCH_IMX_V4_V5) := imx
-machine-$(CONFIG_ARCH_MX3) := imx
+machine-$(CONFIG_ARCH_IMX_V6_V7) := imx
machine-$(CONFIG_ARCH_MX5) := mx5
-machine-$(CONFIG_ARCH_MX6) := imx
machine-$(CONFIG_ARCH_MXS) := mxs
machine-$(CONFIG_ARCH_NETX) := netx
machine-$(CONFIG_ARCH_NOMADIK) := nomadik
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 3852f45..27355cb 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -74,6 +74,7 @@ config SOC_IMX31
select ARCH_MXC_AUDMUX_V2
select ARCH_MX31
select MXC_AVIC
+ select SMP_ON_UP if SMP
config SOC_IMX35
bool
@@ -83,6 +84,7 @@ config SOC_IMX35
select HAVE_EPIT
select ARCH_MX35
select MXC_AVIC
+ select SMP_ON_UP if SMP
if ARCH_IMX_V4_V5
@@ -351,7 +353,7 @@ config MACH_IMX27IPCAM
endif
-if ARCH_MX3
+if ARCH_IMX_V6_V7
comment "MX31 platforms:"
@@ -601,9 +603,6 @@ config MACH_VPR200
Include support for VPR200 platform. This includes specific
configurations for the board and its peripherals.
-endif
-
-if ARCH_MX6
comment "i.MX6 family:"
config SOC_IMX6Q
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aa1cf0c..b9dffe5 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
+AFLAGS_head-v7.o :=-Wa,-march=armv7-a
obj-$(CONFIG_CPU_V7) += head-v7.o
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c3ce146..9ab5be0 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -819,10 +819,10 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
config CACHE_L2X0
bool "Enable the L2x0 outer cache controller"
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
- REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
+ REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
- ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_MX6
+ ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX
default y
select OUTER_CACHE
select OUTER_CACHE_SYNC
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 82b0d92..43efc3c 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -16,10 +16,13 @@ config ARCH_IMX_V4_V5
This enables support for systems based on the Freescale i.MX ARMv4
and ARMv5 SoCs
-config ARCH_MX3
- bool "MX3-based"
+config ARCH_IMX_V6_V7
+ bool "i.MX3, i.MX6"
+ select AUTO_ZRELADDR
+ select ARM_PATCH_PHYS_VIRT
help
- This enables support for systems based on the Freescale i.MX3 family
+ This enables support for systems based on the Freescale i.MX3 and i.MX6
+ family.
config ARCH_MX5
bool "i.MX50, i.MX51, i.MX53"
@@ -29,11 +32,6 @@ config ARCH_MX5
This enables support for machines using Freescale's i.MX50 and i.MX51
processors.
-config ARCH_MX6
- bool "i.MX6"
- help
- This enables support for systems based on the Freescale i.MX6 family
-
endchoice
source "arch/arm/mach-imx/Kconfig"
--
1.7.6.3
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply related
* [PATCH v3 4/6] arm/imx6q: add smp and cpu hotplug support
From: Sascha Hauer @ 2011-09-26 11:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317021651-17359-5-git-send-email-shawn.guo@linaro.org>
On Mon, Sep 26, 2011 at 03:20:49PM +0800, Shawn Guo wrote:
> It adds smp and cpu hotplug support for imx6q.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> arch/arm/mach-imx/Kconfig | 1 +
> arch/arm/mach-imx/Makefile | 4 ++
> arch/arm/mach-imx/head-v7.S | 71 ++++++++++++++++++++++++++
> arch/arm/mach-imx/hotplug.c | 44 ++++++++++++++++
> arch/arm/mach-imx/localtimer.c | 35 +++++++++++++
> arch/arm/mach-imx/platsmp.c | 85 +++++++++++++++++++++++++++++++
> arch/arm/plat-mxc/include/mach/common.h | 5 ++
> 7 files changed, 245 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-imx/head-v7.S
> create mode 100644 arch/arm/mach-imx/hotplug.c
> create mode 100644 arch/arm/mach-imx/localtimer.c
> create mode 100644 arch/arm/mach-imx/platsmp.c
>
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index af73b3e..6ec758d 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -623,6 +623,7 @@ config SOC_IMX6Q
> bool "i.MX6 Quad support"
> select ARM_GIC
> select CPU_V7
> + select HAVE_ARM_SCU
> select HAVE_IMX_GPC
> select HAVE_IMX_MMDC
> select HAVE_IMX_SRC
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index 8c21fda..d46b2e7 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -66,4 +66,8 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
> obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
> obj-$(CONFIG_HAVE_IMX_SRC) += src.o
> +obj-$(CONFIG_CPU_V7) += head-v7.o
Can we have a
AFLAGS_head-v7.o :=-Wa,-march=armv7-a
here?
Then you only have to adjust some Kconfig variables and can compile
i.MX3 and i.MX6 together. I just gave it a test and it works on i.MX3, I
don't have a i.MX6 platform to test on though.
The following patch could be a starting point. I merged the imx-features
branch into it so it probably won't apply cleanly on your series.
8<----------------------------------------
^ permalink raw reply
* [PATCH v3 2/2] at91: add Atmel ISI and ov2640 support on sam9m10/sam9g45 board.
From: Guennadi Liakhovetski @ 2011-09-26 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4C79549CB6F772498162A641D92D532802D2C262@penmb01.corp.atmel.com>
On Mon, 26 Sep 2011, Wu, Josh wrote:
> On Thu, 22 Sep 2011, Guennadi wrote:
>
> > On Thu, 22 Sep 2011, Josh Wu wrote:
[snip]
> >> diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> >> index e04c5fb..5e23d6d 100644
> >> --- a/arch/arm/mach-at91/at91sam9g45.c
> >> +++ b/arch/arm/mach-at91/at91sam9g45.c
> >> @@ -201,6 +201,7 @@ static struct clk *periph_clocks[] __initdata = {
> >> // irq0
> >> };
> >>
> >> +static struct clk pck1;
>
> > Hm, it really doesn't need any initialisation, not even for the .type
> > field? .type=0 doesn't seem to be valid.
>
> This line is only a forward declaration. Since the real definition is behind the code we use it.
> It defined in later lines:
>
> static struct clk pck1 = {
> .name = "pck1",
> .pmc_mask = AT91_PMC_PCK1,
> .type = CLK_TYPE_PROGRAMMABLE,
> .id = 1,
> };
Ehem, yes, that's why I'm not very fond of forward declarations of
structs... Without looking at the code - would it be possible to swap the
order while still preserving clean source-code structure?
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* [PATCH 1/4] ARM i.MX avic: add handle_irq function
From: Russell King - ARM Linux @ 2011-09-26 11:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317030369-29352-2-git-send-email-s.hauer@pengutronix.de>
On Mon, Sep 26, 2011 at 11:46:06AM +0200, Sascha Hauer wrote:
> +void avic_handle_irq(struct pt_regs *);
> +
> +#define imx1_handle_irq avic_handle_irq
> +#define imx21_handle_irq avic_handle_irq
> +#define imx25_handle_irq avic_handle_irq
> +#define imx27_handle_irq avic_handle_irq
> +#define imx31_handle_irq avic_handle_irq
> +#define imx35_handle_irq avic_handle_irq
Is there really something wrong in knowing (elsewhere) that mx1..mx35 all
use the avic irq handler?
^ permalink raw reply
* [PATCH v3 4/6] arm/imx6q: add smp and cpu hotplug support
From: Russell King - ARM Linux @ 2011-09-26 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110926110634.GR31404@pengutronix.de>
On Mon, Sep 26, 2011 at 01:06:34PM +0200, Sascha Hauer wrote:
> +config ARCH_IMX_V6_V7
> + bool "i.MX3, i.MX6"
> + select AUTO_ZRELADDR
It's not a good idea to select this symbol, because it prevents ZBOOT_ROM
being used (iow, you can't ROM-ify the decompressor if you select this
symbol.)
ZBOOT_ROM is still offered, but you end up breaking the dependencies for
AUTO_ZRELADDR if you select it.
^ permalink raw reply
* [PATCH] ARM: imx/mx31moboard: use mc13xxx structs instead of removed mc13783 structs
From: Uwe Kleine-König @ 2011-09-26 11:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110926100511.GH32263@sortiz-mobl>
Hi Samuel,
On Mon, Sep 26, 2011 at 12:05:11PM +0200, Samuel Ortiz wrote:
> On Mon, Sep 26, 2011 at 08:50:55AM +0200, Uwe Kleine-K?nig wrote:
> > This is needed with patch
> >
> > mfd: Remove mc13783 API functions and symbols
> >
> > (currently cde41c030 in next)
> Sorry, I missed this one.
> Applied now, thanks a lot.
It's me who missed it, isn't it?
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH 6/8] drivers: add Contiguous Memory Allocator
From: Marek Szyprowski @ 2011-09-26 12:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1312393430.2855.51.camel@mulgrave>
Hello,
I'm sorry for the late reply. I must have missed this mail...
On Wednesday, August 03, 2011 7:44 PM James Bottomley wrote:
> [cc to ks-discuss added, since this may be a relevant topic]
>
> On Tue, 2011-07-05 at 14:27 +0200, Arnd Bergmann wrote:
> > On Tuesday 05 July 2011, Russell King - ARM Linux wrote:
> > > On Tue, Jul 05, 2011 at 09:41:48AM +0200, Marek Szyprowski wrote:
> > > > The Contiguous Memory Allocator is a set of helper functions for DMA
> > > > mapping framework that improves allocations of contiguous memory chunks.
> > > >
> > > > CMA grabs memory on system boot, marks it with CMA_MIGRATE_TYPE and
> > > > gives back to the system. Kernel is allowed to allocate movable pages
> > > > within CMA's managed memory so that it can be used for example for page
> > > > cache when DMA mapping do not use it. On dma_alloc_from_contiguous()
> > > > request such pages are migrated out of CMA area to free required
> > > > contiguous block and fulfill the request. This allows to allocate large
> > > > contiguous chunks of memory at any time assuming that there is enough
> > > > free memory available in the system.
> > > >
> > > > This code is heavily based on earlier works by Michal Nazarewicz.
> > >
> > > And how are you addressing the technical concerns about aliasing of
> > > cache attributes which I keep bringing up with this and you keep
> > > ignoring and telling me that I'm standing in your way.
>
> Just to chime in here, parisc has an identical issue. If the CPU ever
> sees an alias with different attributes for the same page, it will HPMC
> the box (that's basically the bios will kill the system as being
> architecturally inconsistent), so an architecture neutral solution on
> this point is essential to us as well.
>
> > This is of course an important issue, and it's the one item listed as
> > TODO in the introductory mail that sent.
> >
> > It's also a preexisting problem as far as I can tell, and it needs
> > to be solved in __dma_alloc for both cases, dma_alloc_from_contiguous
> > and __alloc_system_pages as introduced in patch 7.
> >
> > We've discussed this back and forth, and it always comes down to
> > one of two ugly solutions:
> >
> > 1. Put all of the MIGRATE_CMA and pages into highmem and change
> > __alloc_system_pages so it also allocates only from highmem pages.
> > The consequences of this are that we always need to build kernels
> > with highmem enabled and that we have less lowmem on systems that
> > are already small, both of which can be fairly expensive unless
> > you have lots of highmem already.
>
> So this would require that systems using the API have a highmem? (parisc
> doesn't today).
Yes, such solution will require highmem. It will introduce the highmem
issues to systems that typically don't use highmem, that's why I searched
for other solutions.
> > 2. Add logic to unmap pages from the linear mapping, which is
> > very expensive because it forces the use of small pages in the
> > linear mapping (or in parts of it), and possibly means walking
> > all page tables to remove the PTEs on alloc and put them back
> > in on free.
> >
> > I believe that Chunsang Jeong from Linaro is planning to
> > implement both variants and post them for review, so we can
> > decide which one to merge, or even to merge both and make
> > it a configuration option. See also
> > https://blueprints.launchpad.net/linaro-mm-sig/+spec/engr-mm-dma-mapping-2011.07
> >
> > I don't think we need to make merging the CMA patches depending on
> > the other patches, it's clear that both need to be solved, and
> > they are independent enough.
>
> I assume from the above that ARM has a hardware page walker?
Right.
> The way I'd fix this on parisc, because we have a software based TLB, is
> to rely on the fact that a page may only be used either for DMA or for
> Page Cache, so the aliases should never be interleaved. Since you know
> the point at which the page flips from DMA to Cache (and vice versa),
> I'd purge the TLB entry and flush the page at that point and rely on the
> usage guarantees to ensure that the alias TLB entry doesn't reappear.
> This isn't inexpensive but the majority of the cost is the cache flush
> which is a requirement to clean the aliases anyway (a TLB entry purge is
> pretty cheap).
>
> Would this work for the ARM hardware walker as well? It would require
> you to have a TLB entry purge instruction as well as some architectural
> guarantees about not speculating the TLB.
The main problem with ARM linear mapping is the fact that it is created
using 2MiB sections, so entries for kernel linear mapping fits entirely in
first lever of process page table. This implies that direct changing this
linear mapping is not easy task and must be performed for all tasks in the
system. In my CMA v12+ patches I decided to use simpler way of solving this
issue. I rely on the fact that DMA memory is allocated only from CMA regions,
so during early boot I change the kernel linear mappings for these regions.
Instead of 2MiB sections, I use regular 4KiB pages which create 2 level of
page tables. Second level of page table for these regions can be easily
shared for all processes in the system.
This way I can easily update cache attributes for any single 4KiB page that
is used for DMA and avoid any aliasing at all. The only drawback of this
method is larger TLB pressure what might result in some slowdown during
heavy IO if pages with 4KiB linear mapping are used. However with my
hardware has only slow io (with eMMC I get only about 30MiB/s) so I cannot
notice any impact of the mapping method on the io speed.
Best regards
--
Marek Szyprowski
Samsung Poland R&D Center
^ permalink raw reply
* [PATCH 10/11] arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver
From: Cousson, Benoit @ 2011-09-26 12:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110923225825.GB6324@atomide.com>
On 9/24/2011 12:58 AM, Tony Lindgren wrote:
> * Benoit Cousson<b-cousson@ti.com> [110923 12:50]:
>> Used the main OCP node to add bindings with the l3_noc driver.
>> Remove l3_noc static device creation if DT is populated.
>> --- a/arch/arm/mach-omap2/devices.c
>> +++ b/arch/arm/mach-omap2/devices.c
>> @@ -16,6 +16,7 @@
>> #include<linux/clk.h>
>> #include<linux/err.h>
>> #include<linux/slab.h>
>> +#include<linux/of.h>
>>
>> #include<mach/hardware.h>
>> #include<mach/irqs.h>
>> @@ -77,6 +78,10 @@ static int __init omap4_l3_init(void)
>> struct platform_device *pdev;
>> char oh_name[L3_MODULES_MAX_LEN];
>>
>> + /* If dtb is there, the devices will be created dynamically */
>> + if (of_have_populated_dt())
>> + return -ENODEV;
>> +
>> /*
>> * To avoid code running on other OMAPs in
>> * multi-omap builds
>
> How about just remove omap3_l3_init and omap4_l3_init completely
> instead?
>
> There should not be any need for the platform glue code if the
> driver, it's OK for us to require that either DT is passed from
> the bootloader or as appended DT as soon as the appended DT patches
> are merged.
Yeah, but we should still allow the others board files to work in case
DT is not passed by the bootloader. Otherwise the DT support need to be
added to every other boards, and in that case that generic board become
useless. The effort / duplication will be much important if we start
hacking every boards with some DT code in them.
Whereas that code is simple and will be removed easily when the DT
migration will be completed.
Regards,
Benoit
^ permalink raw reply
* [PATCH] clk: Add initial WM831x clock driver
From: Mark Brown @ 2011-09-26 12:21 UTC (permalink / raw)
To: linux-arm-kernel
The WM831x and WM832x series of PMICs contain a flexible clocking
subsystem intended to provide always on and system core clocks. It
features:
- A 32.768kHz crystal oscillator which can optionally be used to pass
through an externally generated clock.
- A FLL which can be clocked from either the 32.768kHz oscillator or
the CLKIN pin.
- A CLKOUT pin which can bring out either the oscillator or the FLL
output.
- The 32.768kHz clock can also optionally be brought out on the GPIO
pins of the device.
This driver fully supports the 32.768kHz oscillator and CLKOUT. The FLL
is supported only in AUTO mode, the full flexibility of the FLL cannot
currently be used. The use of clock references other than the internal
oscillator is not currently supported, and since clk_set_parent() is not
implemented in the generic clock API the clock tree configuration cannot
be changed at runtime.
Due to a lack of access to systems where the core SoC has been converted
to use the generic clock API this driver has been compile tested only.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
Changed to use devm_kzalloc()
MAINTAINERS | 1 +
drivers/clk/Kconfig | 5 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-wm831x.c | 381 ++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 388 insertions(+), 0 deletions(-)
create mode 100644 drivers/clk/clk-wm831x.c
diff --git a/MAINTAINERS b/MAINTAINERS
index b95dd2e..686e25d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7281,6 +7281,7 @@ T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus
W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
S: Supported
F: Documentation/hwmon/wm83??
+F: drivers/clk/clk-wm83*.c
F: drivers/leds/leds-wm83*.c
F: drivers/input/misc/wm831x-on.c
F: drivers/input/touchscreen/wm831x-ts.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 95b42a3..8aca5ab 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -13,6 +13,7 @@ config GENERIC_CLK_BUILD_TEST
depends on EXPERIMENTAL && GENERIC_CLK
select GENERIC_CLK_FIXED
select GENERIC_CLK_GATE
+ select GENERIC_CLK_WM831X if MFD_WM831X=y
help
Enable all possible generic clock drivers. This is only
useful for improving build coverage, it is not useful for
@@ -25,3 +26,7 @@ config GENERIC_CLK_FIXED
config GENERIC_CLK_GATE
bool
depends on GENERIC_CLK
+
+config GENERIC_CLK_WM831X
+ tristate
+ depends on GENERIC_CLK && MFD_WM831X
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d186446..6628ad5 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
obj-$(CONFIG_GENERIC_CLK) += clk.o
obj-$(CONFIG_GENERIC_CLK_FIXED) += clk-fixed.o
obj-$(CONFIG_GENERIC_CLK_GATE) += clk-gate.o
+obj-$(CONFIG_GENERIC_CLK_WM831X) += clk-wm831x.o
diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c
new file mode 100644
index 0000000..8f3d143
--- /dev/null
+++ b/drivers/clk/clk-wm831x.c
@@ -0,0 +1,381 @@
+/*
+ * WM831x clock control
+ *
+ * Copyright 2011 Wolfson Microelectronics PLC.
+ *
+ * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/wm831x/core.h>
+
+struct wm831x_clk {
+ struct wm831x *wm831x;
+ struct clk_hw xtal_hw;
+ struct clk_hw fll_hw;
+ struct clk_hw clkout_hw;
+ bool xtal_ena;
+};
+
+static int wm831x_xtal_enable(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ xtal_hw);
+
+ if (clkdata->xtal_ena)
+ return 0;
+ else
+ return -EPERM;
+}
+
+static unsigned long wm831x_xtal_recalc_rate(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ xtal_hw);
+
+ if (clkdata->xtal_ena)
+ return 32768;
+ else
+ return 0;
+}
+
+static long wm831x_xtal_round_rate(struct clk_hw *hw, unsigned long rate)
+{
+ return wm831x_xtal_recalc_rate(hw);
+}
+
+static const struct clk_hw_ops wm831x_xtal_ops = {
+ .enable = wm831x_xtal_enable,
+ .recalc_rate = wm831x_xtal_recalc_rate,
+ .round_rate = wm831x_xtal_round_rate,
+};
+
+static const unsigned long wm831x_fll_auto_rates[] = {
+ 2048000,
+ 11289600,
+ 12000000,
+ 12288000,
+ 19200000,
+ 22579600,
+ 24000000,
+ 24576000,
+};
+
+static bool wm831x_fll_enabled(struct wm831x *wm831x)
+{
+ int ret;
+
+ ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_1);
+ if (ret < 0) {
+ dev_err(wm831x->dev, "Unable to read FLL_CONTROL_1: %d\n",
+ ret);
+ return true;
+ }
+
+ return ret & WM831X_FLL_ENA;
+}
+
+static int wm831x_fll_prepare(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ fll_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_2,
+ WM831X_FLL_ENA, WM831X_FLL_ENA);
+ if (ret != 0)
+ dev_crit(wm831x->dev, "Failed to enable FLL: %d\n", ret);
+
+ return ret;
+}
+
+static void wm831x_fll_unprepare(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ fll_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_2, WM831X_FLL_ENA, 0);
+ if (ret != 0)
+ dev_crit(wm831x->dev, "Failed to disaable FLL: %d\n", ret);
+}
+
+static unsigned long wm831x_fll_recalc_rate(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ fll_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
+ if (ret < 0) {
+ dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
+ ret);
+ return 0;
+ }
+
+ if (ret & WM831X_FLL_AUTO)
+ return wm831x_fll_auto_rates[ret & WM831X_FLL_AUTO_FREQ_MASK];
+
+ dev_err(wm831x->dev, "FLL only supported in AUTO mode\n");
+ return 0;
+}
+
+static int wm831x_fll_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ fll_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(wm831x_fll_auto_rates); i++)
+ if (wm831x_fll_auto_rates[i] == rate)
+ break;
+ if (i == ARRAY_SIZE(wm831x_fll_auto_rates))
+ return -EINVAL;
+
+ if (wm831x_fll_enabled(wm831x))
+ return -EPERM;
+
+ return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_2,
+ WM831X_FLL_AUTO_FREQ_MASK, i);
+}
+
+static struct clk *wm831x_fll_get_parent(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ fll_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ /* AUTO mode is always clocked from the crystal */
+ ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
+ if (ret < 0) {
+ dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
+ ret);
+ return NULL;
+ }
+
+ if (ret & WM831X_FLL_AUTO)
+ return clkdata->xtal_hw.clk;
+
+ ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_5);
+ if (ret < 0) {
+ dev_err(wm831x->dev, "Unable to read FLL_CONTROL_5: %d\n",
+ ret);
+ return NULL;
+ }
+
+ switch (ret & WM831X_FLL_CLK_SRC_MASK) {
+ case 0:
+ return clkdata->xtal_hw.clk;
+ case 1:
+ dev_warn(wm831x->dev,
+ "FLL clocked from CLKIN not yet supported\n");
+ return NULL;
+ default:
+ dev_err(wm831x->dev, "Unsupported FLL clock source %d\n",
+ ret & WM831X_FLL_CLK_SRC_MASK);
+ return NULL;
+ }
+}
+
+static const struct clk_hw_ops wm831x_fll_ops = {
+ .prepare = wm831x_fll_prepare,
+ .unprepare = wm831x_fll_unprepare,
+ .recalc_rate = wm831x_fll_recalc_rate,
+ .set_rate = wm831x_fll_set_rate,
+ .get_parent = wm831x_fll_get_parent,
+};
+
+static int wm831x_clkout_prepare(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ clkout_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ ret = wm831x_reg_unlock(wm831x);
+ if (ret != 0) {
+ dev_crit(wm831x->dev, "Failed to lock registers: %d\n", ret);
+ return ret;
+ }
+
+ ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
+ WM831X_CLKOUT_ENA, WM831X_CLKOUT_ENA);
+ if (ret != 0)
+ dev_crit(wm831x->dev, "Failed to enable CLKOUT: %d\n", ret);
+
+ wm831x_reg_lock(wm831x);
+
+ return ret;
+}
+
+static void wm831x_clkout_unprepare(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ clkout_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ ret = wm831x_reg_unlock(wm831x);
+ if (ret != 0) {
+ dev_crit(wm831x->dev, "Failed to lock registers: %d\n", ret);
+ return;
+ }
+
+ ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
+ WM831X_CLKOUT_ENA, 0);
+ if (ret != 0)
+ dev_crit(wm831x->dev, "Failed to disable CLKOUT: %d\n", ret);
+
+ wm831x_reg_lock(wm831x);
+}
+
+static unsigned long wm831x_clkout_recalc_rate(struct clk_hw *hw)
+{
+ return clk_get_rate(clk_get_parent(hw->clk));
+}
+
+static long wm831x_clkout_round_rate(struct clk_hw *hw, unsigned long rate)
+{
+ return clk_round_rate(clk_get_parent(hw->clk), rate);
+}
+
+static int wm831x_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ *parent_rate = rate;
+ return CLK_PARENT_RATE_CHANGE;
+}
+
+static struct clk *wm831x_clkout_get_parent(struct clk_hw *hw)
+{
+ struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+ clkout_hw);
+ struct wm831x *wm831x = clkdata->wm831x;
+ int ret;
+
+ ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1);
+ if (ret < 0) {
+ dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d\n",
+ ret);
+ return NULL;
+ }
+
+ if (ret & WM831X_CLKOUT_SRC)
+ return clkdata->xtal_hw.clk;
+ else
+ return clkdata->fll_hw.clk;
+}
+
+static const struct clk_hw_ops wm831x_clkout_ops = {
+ .prepare = wm831x_clkout_prepare,
+ .unprepare = wm831x_clkout_unprepare,
+ .recalc_rate = wm831x_clkout_recalc_rate,
+ .round_rate = wm831x_clkout_round_rate,
+ .set_rate = wm831x_clkout_set_rate,
+ .get_parent = wm831x_clkout_get_parent,
+};
+
+static __devinit int wm831x_clk_probe(struct platform_device *pdev)
+{
+ struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
+ struct wm831x_clk *clkdata;
+ int ret;
+
+ clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL);
+ if (!clkdata)
+ return -ENOMEM;
+
+ /* XTAL_ENA can only be set via OTP/InstantConfig so just read once */
+ ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
+ if (ret < 0) {
+ dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
+ ret);
+ return ret;
+ }
+ clkdata->xtal_ena = ret & WM831X_XTAL_ENA;
+
+ if (!clk_register(&wm831x_xtal_ops, &clkdata->xtal_hw,
+ "xtal"))
+ return -EINVAL;
+
+ if (!clk_register(&wm831x_fll_ops, &clkdata->fll_hw,
+ "fll")) {
+ ret = -EINVAL;
+ goto err_xtal;
+ }
+
+ if (!clk_register(&wm831x_clkout_ops, &clkdata->clkout_hw,
+ "clkout")) {
+ ret = -EINVAL;
+ goto err_fll;
+ }
+
+ dev_set_drvdata(&pdev->dev, clkdata);
+
+ return 0;
+
+err_fll:
+ clk_unregister(clkdata->fll_hw.clk);
+err_xtal:
+ clk_unregister(clkdata->xtal_hw.clk);
+ return ret;
+}
+
+static __devexit int wm831x_clk_remove(struct platform_device *pdev)
+{
+ struct wm831x_clk *clkdata = dev_get_drvdata(&pdev->dev);
+
+ clk_unregister(clkdata->clkout_hw.clk);
+ clk_unregister(clkdata->fll_hw.clk);
+ clk_unregister(clkdata->xtal_hw.clk);
+
+ return 0;
+}
+
+static struct platform_driver wm831x_clk_driver = {
+ .probe = wm831x_clk_probe,
+ .remove = __devexit_p(wm831x_clk_remove),
+ .driver = {
+ .name = "wm831x-clk",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init wm831x_clk_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(&wm831x_clk_driver);
+ if (ret != 0)
+ pr_err("Failed to register WM831x clock driver: %d\n", ret);
+
+ return ret;
+}
+module_init(wm831x_clk_init);
+
+static void __exit wm831x_clk_exit(void)
+{
+ platform_driver_unregister(&wm831x_clk_driver);
+}
+module_exit(wm831x_clk_exit);
+
+/* Module information */
+MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
+MODULE_DESCRIPTION("WM831x clock driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:wm831x-clk");
--
1.7.6.3
^ permalink raw reply related
* [PATCH 1/4] ARM i.MX avic: add handle_irq function
From: Sascha Hauer @ 2011-09-26 12:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110926112151.GE22455@n2100.arm.linux.org.uk>
On Mon, Sep 26, 2011 at 12:21:51PM +0100, Russell King - ARM Linux wrote:
> On Mon, Sep 26, 2011 at 11:46:06AM +0200, Sascha Hauer wrote:
> > +void avic_handle_irq(struct pt_regs *);
> > +
> > +#define imx1_handle_irq avic_handle_irq
> > +#define imx21_handle_irq avic_handle_irq
> > +#define imx25_handle_irq avic_handle_irq
> > +#define imx27_handle_irq avic_handle_irq
> > +#define imx31_handle_irq avic_handle_irq
> > +#define imx35_handle_irq avic_handle_irq
>
> Is there really something wrong in knowing (elsewhere) that mx1..mx35 all
> use the avic irq handler?
No technical reason. I copied this from the pxa code and thought
this way a board implementer does not need to know the interrupt
controller type but only the SoC type. We can use avic_/tzic_
directly if you like.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH 07/11] OMAP2+: board-generic: Add DT support to generic board
From: Cousson, Benoit @ 2011-09-26 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110923230845.GD6324@atomide.com>
On 9/24/2011 1:08 AM, Tony Lindgren wrote:
> * Benoit Cousson<b-cousson@ti.com> [110923 12:50]:
>> Re-cycle the original board-generic file to support Device Tree
>> for every OMAP2+ variants.
>> Note: Since it is a completely new content in the existing file
>> I removed the original copyright.
>
> I'd suggest just keeping it, maybe just update the comments
> accordingly?
Do you mean keeping it and adding the comment? Or removing it and adding
the comment?
> That's because Copyrights in general just don't "disappear".
OK, maybe, but I thought it is weird to keep an old copyright just
because we re-use an already existing file since the content is different.
> And the meaning of the board-generic is still the same as originally,
> that is do the booting based on board-specific data passed from
> the bootloader like the comments say:
>
>> - * Code for generic OMAP2 board. Should work on many OMAP2 systems where
>> - * the bootloader passes the board-specific data to the kernel.
>> - * Do not put any board specific code to this file; create a new machine
>> - * type if you need custom low-level initializations.
>> + * Support for generic OMAP2+ device tree boards.
Regards,
Benoit
^ permalink raw reply
* [PATCH 03/11] arm/dts: Add support for OMAP4 PandaBoard
From: Cousson, Benoit @ 2011-09-26 12:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110923232142.GG24631@ponder.secretlab.ca>
On 9/24/2011 1:21 AM, Grant Likely wrote:
> On Fri, Sep 23, 2011 at 10:23:11PM +0200, Benoit Cousson wrote:
>> Based on the original omap4-panda.dts file from Manju.
>> http://www.spinics.net/lists/linux-omap/msg55836.html
>>
>> Add memory information and a default bootargs to allow
>> a boot from RAMDISK.
>>
>> Signed-off-by: Benoit Cousson<b-cousson@ti.com>
>> Cc: Grant Likely<grant.likely@secretlab.ca>
>> Cc: G, Manjunath Kondaiah<manjugk@ti.com>
>> ---
>> arch/arm/boot/dts/omap4-panda.dts | 29 +++++++++++++++++++++++++++++
>> 1 files changed, 29 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/boot/dts/omap4-panda.dts
>>
>> diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
>> new file mode 100644
>> index 0000000..c702657
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/omap4-panda.dts
>> @@ -0,0 +1,29 @@
>> +/*
>> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +/dts-v1/;
>> +
>> +/include/ "omap4.dtsi"
>> +
>> +/ {
>> + model = "TI OMAP4 PandaBoard";
>> + compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
>> +
>> + /*
>> + * Since the initial device tree board file does not create any
>> + * devices (MMC, network...), the only way to boot is to provide a
>> + * ramdisk.
>> + */
>> + chosen {
>> + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug";
>
> Generally, we don't want bootargs in the .dts files; we want them
> added to the .dtb by the boot firmware. However, we are bootstrapping
> here, so I'm okay with it in the short term until firmware matures a
> bit more.
Yeah, I had to to that because an old uboot with appended dtb seems to
ignore the original bootargs.
Benoit
^ permalink raw reply
* [PATCH] mmc: card: modify mmc_getgeo function
From: Chris Ball @ 2011-09-26 12:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110926082814.GA28149@pengutronix.de>
Hi,
On Mon, Sep 26 2011, Uwe Kleine-K?nig wrote:
>> Thanks, pushed to mmc-next for 3.2 with a reworded commit message:
> This (i.e. ee9e0e0 (mmc: card: Remove duplicated constants) in next)
> makes gcc emit a reference to __aeabi_uldivmod in one of my nightly
> builds which isn't defined.
>
> The final linking stage fails with:
>
> LD .tmp_vmlinux1
> drivers/built-in.o: In function `mmc_blk_getgeo':
> clkdev.c:(.text+0xd1528): undefined reference to `__aeabi_uldivmod'
> make[2]: *** [.tmp_vmlinux1] Error 1
> make[1]: *** [sub-make] Error 2
> make: *** [all] Error 2
Interesting, thanks. It builds fine here on my (gcc-4.6) ARM toolchains.
Looking online, I think you're hitting an old gcc-4.3 bug?
- Chris.
--
Chris Ball <cjb@laptop.org> <http://printf.net/>
One Laptop Per Child
^ permalink raw reply
* [PATCH 6/8] drivers: add Contiguous Memory Allocator
From: Russell King - ARM Linux @ 2011-09-26 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1312393430.2855.51.camel@mulgrave>
On Wed, Aug 03, 2011 at 12:43:50PM -0500, James Bottomley wrote:
> I assume from the above that ARM has a hardware page walker?
Correct, and speculative prefetch (which isn't prevented by not having
TLB entries), so you can't keep entries out of the TLB. If it's in
the page tables it can end up in the TLB.
The problem is that we could end up with conflicting attributes available
to the hardware for the same physical page, and it is _completely_
undefined how hardware behaves with that (except that it does not halt -
and there's no exception path for the condition because there's no
detection of the problem case.)
So, if you had one mapping which was fully cacheable and another mapping
which wasn't, you can flush the TLB all you like - it could be possible
that you still up with an access through the non-cacheable mapping being
cached (either hitting speculatively prefetched cache lines via the
cacheable mapping, or the cacheable attributes being applied to the
non-cacheable mapping - or conversely uncacheable attributes applied to
the cacheable mapping.)
Essentially, the condition is labelled 'unpredictable' in the TRMs,
which basically means that not even observed behaviour can be relied
upon, because there may be cases where the observed behaviour fails.
^ permalink raw reply
* [PATCH] mmc: card: modify mmc_getgeo function
From: Russell King - ARM Linux @ 2011-09-26 13:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <m2k48vtr12.fsf@bob.laptop.org>
On Mon, Sep 26, 2011 at 08:41:13AM -0400, Chris Ball wrote:
> Hi,
>
> On Mon, Sep 26 2011, Uwe Kleine-K?nig wrote:
> >> Thanks, pushed to mmc-next for 3.2 with a reworded commit message:
> > This (i.e. ee9e0e0 (mmc: card: Remove duplicated constants) in next)
> > makes gcc emit a reference to __aeabi_uldivmod in one of my nightly
> > builds which isn't defined.
> >
> > The final linking stage fails with:
> >
> > LD .tmp_vmlinux1
> > drivers/built-in.o: In function `mmc_blk_getgeo':
> > clkdev.c:(.text+0xd1528): undefined reference to `__aeabi_uldivmod'
> > make[2]: *** [.tmp_vmlinux1] Error 1
> > make[1]: *** [sub-make] Error 2
> > make: *** [all] Error 2
>
> Interesting, thanks. It builds fine here on my (gcc-4.6) ARM toolchains.
> Looking online, I think you're hitting an old gcc-4.3 bug?
Check your setting of CONFIG_LBDAF - the return type from get_capacity
depends on this (which may be either unsigned long or u64).
Now, the thing about a constant division by (16*4) is that its relatively
easy for gcc to spot that this is the same as a shift - and use a shift
instead of a divide for both the unsigned long and u64 cases.
However, the change may result in gcc no longer realizing that it's a
constant division by a power-of-2, and that optimization can be applied.
If you want to eliminate these constants, I'd suggest two definitions
MMC_GEO_SECTORS
MMC_GEO_HEADS
and just subsituting the '4' and '16' in the function with the appropriate
symbolic constants. That'd avoid causing this regression.
^ permalink raw reply
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