* [PATCH v2 6/6] OMAP4: Clock: Correct the name of SLIMBUS interface clocks
From: Cousson, Benoit @ 2011-10-07 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1110061941100.4611@utopia.booyaka.com>
Hi Paul & Jon,
On 10/7/2011 3:42 AM, Paul Walmsley wrote:
> + Beno?t
>
> On Fri, 16 Sep 2011, Jon Hunter wrote:
>
>> From: Jon Hunter<jon-hunter@ti.com>
>>
>> Currently the interface clocks for the two SLIMBUS peripherals are
>> named slimbus1_fck and slimbus2_fck. Rename these clocks to be
>> slimbus1_ick and slimbus2_ick so it is clear that these are
>> interface clocks and not functional clocks.
>>
>> Signed-off-by: Jon Hunter<jon-hunter@ti.com>
>
> This one, I don't quite understand. We should probably be removing these
> MODULEMODE-only clocks from the OMAP4 tree, and using their parent clock
> as the main_clk. That would be a good cleanup for 3.3...
Yes, but in order to remove that from the clock data we must ensure that
the hwmod entry is there.
I kept a lot of legacy MODULEMODE clocks just because of missing hwmod /
runtime_pm adaptation on some drivers.
In the case of slimbus, there is no main_clk but a bunch of optional
clocks. It looks similar to the DSS case. So we should not use the
parent clock as a main_clk.
We should probably promote one of the opt_clk as the main_clk. The
slimbus_clk seems to be the good candidate for both instances.
static struct omap_hwmod_opt_clk slimbus1_opt_clks[] = {
{ .role = "fclk_1", .clk = "slimbus1_fclk_1" },
{ .role = "fclk_0", .clk = "slimbus1_fclk_0" },
{ .role = "fclk_2", .clk = "slimbus1_fclk_2" },
{ .role = "slimbus_clk", .clk = "slimbus1_slimbus_clk" },
};
static struct omap_hwmod_opt_clk slimbus2_opt_clks[] = {
{ .role = "fclk_1", .clk = "slimbus2_fclk_1" },
{ .role = "fclk_0", .clk = "slimbus2_fclk_0" },
{ .role = "slimbus_clk", .clk = "slimbus2_slimbus_clk" },
};
Jon,
Do you know if that one is indeed mandatory to use the slimbus IP?
Thanks,
Benoit
^ permalink raw reply
* [PATCH 1/3] sam9g20ek/9m10g45ek/stam9g20: unbreak build after 'use -EINVAL for invalid gpio'
From: Nicolas Ferre @ 2011-10-07 8:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317915587-27474-1-git-send-email-jacmet@sunsite.dk>
On 10/06/2011 05:39 PM, Peter Korsgaard :
> Commit 36706ab70b26 (ARM: at91/boards: use -EINVAL for invalid gpio)
> broke the build as it used ';' rather than ',' in structure initializers.
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
OMG...
Thanks a lot Peter. I include it immediately in at91-l2 and at91-next!
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Best regards,
> ---
> arch/arm/mach-at91/board-sam9g20ek.c | 2 +-
> arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
> arch/arm/mach-at91/board-stamp9g20.c | 4 ++--
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
> index 1c6dfbb..27943c2 100644
> --- a/arch/arm/mach-at91/board-sam9g20ek.c
> +++ b/arch/arm/mach-at91/board-sam9g20ek.c
> @@ -212,7 +212,7 @@ static struct mci_platform_data __initdata ek_mmc_data = {
> .slot[1] = {
> .bus_width = 4,
> .detect_pin = AT91_PIN_PC9,
> - .wp_pin = -1;
> + .wp_pin = -1,
> },
>
> };
> diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
> index 3d68ead..008088a 100644
> --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
> +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
> @@ -100,7 +100,7 @@ static struct mci_platform_data __initdata mci0_data = {
> .slot[0] = {
> .bus_width = 4,
> .detect_pin = AT91_PIN_PD10,
> - .wp_pin = -1;
> + .wp_pin = -1,
> },
> };
>
> diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
> index 3c0cc86..cb4a840 100644
> --- a/arch/arm/mach-at91/board-stamp9g20.c
> +++ b/arch/arm/mach-at91/board-stamp9g20.c
> @@ -123,8 +123,8 @@ static void __init add_device_nand(void)
> static struct mci_platform_data __initdata mmc_data = {
> .slot[0] = {
> .bus_width = 4,
> - .detect_pin = -1;
> - .wp_pin = -1;
> + .detect_pin = -1,
> + .wp_pin = -1,
> },
> };
> #else
--
Nicolas Ferre
^ permalink raw reply
* [PATCH v3] omap: dmtimer: convert printk to pr_err
From: Víctor Manuel Jáquez Leal @ 2011-10-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111006201827.GT6324@atomide.com>
Convert a printk(KERN_ERR) message in the driver to pr_err().
v2:
* Replaced dump_stack() with WARN()
v3:
* Rebased against omap/master
Signed-off-by: V?ctor Manuel J?quez Leal <vjaquez@igalia.com>
---
arch/arm/plat-omap/dmtimer.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index de7896f..5492ae1 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -111,7 +111,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
while (!(__raw_readl(timer->sys_stat) & 1)) {
c++;
if (c > 100000) {
- printk(KERN_ERR "Timer failed to reset\n");
+ pr_err("Timer failed to reset\n");
return;
}
}
--
1.7.6.3
^ permalink raw reply related
* [PATCH 13/26] ARM: pxa: use correct __iomem annotations
From: Russell King - ARM Linux @ 2011-10-07 8:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMPhdO_CGvoc8GZQS3TWpv0gqOXhmHyEbamcQr28K5iLgOBnuw@mail.gmail.com>
On Fri, Oct 07, 2011 at 04:11:01PM +0800, Eric Miao wrote:
> To be honest, I'd really like to keep the *_VIRT_BASE definitions to be
> type independent.
>
> And have the actual register definitions to be casted to void __iomem *
> when being defined, e.g.
>
> #define APBC_REG(x) IOMEM(APBC_VIRT_BASE + (x))
>
> #define APBC_UART1 APBC_REG(0x000)
>
> Arnd, do we have some standard guidelines on this for all SoCs
> to follow? As I know, it's currently still being a mess.
It makes much more sense for the base address to be correctly typed (even
though it does mean a cast in the map_desc tables). It avoids type
problems if someone does readl(APBC_VIRT_BASE + reg) somewhere, and
also avoids type problems should someone decide to pass the base address
around.
^ permalink raw reply
* [PATCH 0/14] Sparse fixes for tegra
From: Arnd Bergmann @ 2011-10-07 8:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317956064-17650-1-git-send-email-olof@lixom.net>
On Thursday 06 October 2011 19:54:10 Olof Johansson wrote:
> Some trivial fixes removing sparse warnings on tegra code.
Hi Olof,
That's a very nice series. I had a go at this across platforms before,
but had not finished it yet.
One thing I would recommend instead of having a type cast in IO_ADDRESS
is to change the definition of IO_{IRAM,CPU,PPSB,APB}_VIRT to be
an iomem pointer from the start, so any calculation you do based on
that automatically gets the right type.
In the long run, I would hope to be able to get rid of basically
all uses of IO_ADDRESS and IO_TO_VIRT in the tegra code and replace
that with device tree lookups, but that is clearly a separate issue.
Arnd
^ permalink raw reply
* [PATCH v5 1/3] AM35x: Using OMAP3 generic hwmods
From: Paul Walmsley @ 2011-10-07 9:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317363153-10259-2-git-send-email-abhilash.kv@ti.com>
Hi,
On Fri, 30 Sep 2011, Abhilash K V wrote:
> From: Abhilash K V <abhilash.kv@ti.com>
>
> Removing modules iva, sr1_hwmod, sr2_hwmod, mailbox from
> the base omap3xxx_hwmods list, so that they can be excluded
> for am35x.
>
> Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
I've dropped the mailbox class comments from this patch -- updated patch
below:
- Paul
From: Abhilash K V <abhilash.kv@ti.com>
Date: Fri, 7 Oct 2011 03:08:56 -0600
Subject: [PATCH] AM35x: Using OMAP3 generic hwmods
Removing modules iva, sr1_hwmod, sr2_hwmod, mailbox from
the base omap3xxx_hwmods list, so that they can be excluded
for am35x.
Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
[paul at pwsan.com: dropped 'mailbox class' comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 13 ++++++++-----
1 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index ab35acb..ac12cd5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3132,7 +3132,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_mmc2_hwmod,
&omap3xxx_mmc3_hwmod,
&omap3xxx_mpu_hwmod,
- &omap3xxx_iva_hwmod,
&omap3xxx_timer1_hwmod,
&omap3xxx_timer2_hwmod,
@@ -3161,8 +3160,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_i2c1_hwmod,
&omap3xxx_i2c2_hwmod,
&omap3xxx_i2c3_hwmod,
- &omap34xx_sr1_hwmod,
- &omap34xx_sr2_hwmod,
/* gpio class */
&omap3xxx_gpio1_hwmod,
@@ -3184,8 +3181,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
&omap3xxx_mcbsp2_sidetone_hwmod,
&omap3xxx_mcbsp3_sidetone_hwmod,
- /* mailbox class */
- &omap3xxx_mailbox_hwmod,
/* mcspi class */
&omap34xx_mcspi1,
@@ -3198,31 +3193,39 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
/* 3430ES1-only hwmods */
static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
+ &omap3xxx_iva_hwmod,
&omap3430es1_dss_core_hwmod,
+ &omap3xxx_mailbox_hwmod,
NULL
};
/* 3430ES2+-only hwmods */
static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
+ &omap3xxx_iva_hwmod,
&omap3xxx_dss_core_hwmod,
&omap3xxx_usbhsotg_hwmod,
+ &omap3xxx_mailbox_hwmod,
NULL
};
/* 34xx-only hwmods (all ES revisions) */
static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
+ &omap3xxx_iva_hwmod,
&omap34xx_sr1_hwmod,
&omap34xx_sr2_hwmod,
+ &omap3xxx_mailbox_hwmod,
NULL
};
/* 36xx-only hwmods (all ES revisions) */
static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
+ &omap3xxx_iva_hwmod,
&omap3xxx_uart4_hwmod,
&omap3xxx_dss_core_hwmod,
&omap36xx_sr1_hwmod,
&omap36xx_sr2_hwmod,
&omap3xxx_usbhsotg_hwmod,
+ &omap3xxx_mailbox_hwmod,
NULL
};
--
1.7.6.3
^ permalink raw reply related
* [GIT PULL] ARM: OMAP: PRCM/SCM/hwmod miscellaneous fixes for 3.2
From: Paul Walmsley @ 2011-10-07 9:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tony,
The following changes since commit be73246058737beec52ae232bcab7776332a9e06:
ARM: OMAP2+: Remove custom init_irq for remaining boards (2011-09-26 17:50:37 -0700)
are available in the git repository at:
git://git.pwsan.com/linux-2.6 prcm_scm_misc_fixes_3.2
Abhilash K V (1):
ARM: OMAP: AM35x: remove hwmods that aren't generic
Archit Taneja (1):
ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields
.../include/mach/ctrl_module_pad_core_44xx.h | 8 ++++----
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 13 ++++++++-----
2 files changed, 12 insertions(+), 9 deletions(-)
- Paul
^ permalink raw reply
* [PATCHv2] hw_random: add driver for atmel true hardware random number generator
From: Jamie Iles @ 2011-10-07 9:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317923791-31200-1-git-send-email-jacmet@sunsite.dk>
On Thu, Oct 06, 2011 at 07:56:30PM +0200, Peter Korsgaard wrote:
> For the IP block on 9g45/9g46/9m10/9m11.
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Looks nice to me Peter.
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Jamie
^ permalink raw reply
* [PATCH v3] omap: dmtimer: convert printk to pr_err
From: Russell King - ARM Linux @ 2011-10-07 9:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317977417-17874-1-git-send-email-vjaquez@igalia.com>
On Fri, Oct 07, 2011 at 10:50:16AM +0200, V?ctor Manuel J?quez Leal wrote:
> Convert a printk(KERN_ERR) message in the driver to pr_err().
...
> @@ -111,7 +111,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
> while (!(__raw_readl(timer->sys_stat) & 1)) {
> c++;
> if (c > 100000) {
> - printk(KERN_ERR "Timer failed to reset\n");
> + pr_err("Timer failed to reset\n");
What is the reason behind this change? It looks like it's to use the
latest and greatest function.
If so, please don't make these changes - we have on many occasions been
blamed for size of diffstat, churn, needless change, and this patch is
exactly that.
By all means fix printk's without KERN_ constants, possibly converting
them to pr_*, but don't go around replacing printk(KERN_* with pr_*(
without ensuring that there's a real benefit to the change.
^ permalink raw reply
* [PATCH] ARM: gic: allow GIC to support non-banked setups
From: Marc Zyngier @ 2011-10-07 9:23 UTC (permalink / raw)
To: linux-arm-kernel
The GIC support code is heavily using the fact that hardware
implementations are exposing banked registers. Unfortunately, it
looks like at least one GIC implementation (EXYNOS4) offers both
the distributor and the CPU interfaces at different addresses,
depending on the CPU.
This problem is solved by turning the distributor and CPU interface
addresses into per-cpu variables. The EXYNOS4 code is updated not
to mess with the GIC internals while handling interrupts, and
struct gic_chip_data is back to being private.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/common/gic.c | 76 +++++++++++++++++++++++++++----=
----
arch/arm/include/asm/hardware/gic.h | 17 +------
arch/arm/mach-exynos4/cpu.c | 14 ------
arch/arm/mach-exynos4/platsmp.c | 28 ++-----------
4 files changed, 66 insertions(+), 69 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index b574931..c7521dd 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -37,6 +37,20 @@
#include <asm/mach/irq.h>
#include <asm/hardware/gic.h>
=20
+struct gic_chip_data {
+=09unsigned int irq_offset;
+=09void __percpu __iomem **dist_base;
+=09void __percpu __iomem **cpu_base;
+#ifdef CONFIG_CPU_PM
+=09u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
+=09u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
+=09u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
+=09u32 __percpu *saved_ppi_enable;
+=09u32 __percpu *saved_ppi_conf;
+#endif
+=09unsigned int gic_irqs;
+};
+
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
=20
/* Address of GIC 0 CPU interface */
@@ -61,16 +75,26 @@ struct irq_chip gic_arch_extn =3D {
=20
static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
=20
+static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
+{
+=09return *__this_cpu_ptr(data->dist_base);
+}
+
static inline void __iomem *gic_dist_base(struct irq_data *d)
{
=09struct gic_chip_data *gic_data =3D irq_data_get_irq_chip_data(d);
-=09return gic_data->dist_base;
+=09return gic_data_dist_base(gic_data);
+}
+
+static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
+{
+=09return *__this_cpu_ptr(data->cpu_base);
}
=20
static inline void __iomem *gic_cpu_base(struct irq_data *d)
{
=09struct gic_chip_data *gic_data =3D irq_data_get_irq_chip_data(d);
-=09return gic_data->cpu_base;
+=09return gic_data_cpu_base(gic_data);
}
=20
static inline unsigned int gic_irq(struct irq_data *d)
@@ -243,7 +267,7 @@ static void gic_handle_cascade_irq(unsigned int irq, st=
ruct irq_desc *desc)
=09chained_irq_enter(chip, desc);
=20
=09raw_spin_lock(&irq_controller_lock);
-=09status =3D readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK);
+=09status =3D readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK)=
;
=09raw_spin_unlock(&irq_controller_lock);
=20
=09gic_irq =3D (status & 0x3ff);
@@ -287,7 +311,7 @@ static void __init gic_dist_init(struct gic_chip_data *=
gic,
{
=09unsigned int gic_irqs, irq_limit, i;
=09u32 cpumask;
-=09void __iomem *base =3D gic->dist_base;
+=09void __iomem *base =3D gic_data_dist_base(gic);
=09u32 cpu =3D 0;
=09u32 nrppis =3D 0, ppi_base =3D 0;
=20
@@ -380,8 +404,8 @@ static void __init gic_dist_init(struct gic_chip_data *=
gic,
=20
static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
{
-=09void __iomem *dist_base =3D gic->dist_base;
-=09void __iomem *base =3D gic->cpu_base;
+=09void __iomem *dist_base =3D gic_data_dist_base(gic);
+=09void __iomem *base =3D gic_data_cpu_base(gic);
=09int i;
=20
=09/*
@@ -418,7 +442,7 @@ static void gic_dist_save(unsigned int gic_nr)
=09=09BUG();
=20
=09gic_irqs =3D gic_data[gic_nr].gic_irqs;
-=09dist_base =3D gic_data[gic_nr].dist_base;
+=09dist_base =3D gic_data_dist_base(&gic_data[gic_nr]);
=20
=09if (!dist_base)
=09=09return;
@@ -453,7 +477,7 @@ static void gic_dist_restore(unsigned int gic_nr)
=09=09BUG();
=20
=09gic_irqs =3D gic_data[gic_nr].gic_irqs;
-=09dist_base =3D gic_data[gic_nr].dist_base;
+=09dist_base =3D gic_data_dist_base(&gic_data[gic_nr]);
=20
=09if (!dist_base)
=09=09return;
@@ -489,8 +513,8 @@ static void gic_cpu_save(unsigned int gic_nr)
=09if (gic_nr >=3D MAX_GIC_NR)
=09=09BUG();
=20
-=09dist_base =3D gic_data[gic_nr].dist_base;
-=09cpu_base =3D gic_data[gic_nr].cpu_base;
+=09dist_base =3D gic_data_dist_base(&gic_data[gic_nr]);
+=09cpu_base =3D gic_data_cpu_base(&gic_data[gic_nr]);
=20
=09if (!dist_base || !cpu_base)
=09=09return;
@@ -515,8 +539,8 @@ static void gic_cpu_restore(unsigned int gic_nr)
=09if (gic_nr >=3D MAX_GIC_NR)
=09=09BUG();
=20
-=09dist_base =3D gic_data[gic_nr].dist_base;
-=09cpu_base =3D gic_data[gic_nr].cpu_base;
+=09dist_base =3D gic_data_dist_base(&gic_data[gic_nr]);
+=09cpu_base =3D gic_data_cpu_base(&gic_data[gic_nr]);
=20
=09if (!dist_base || !cpu_base)
=09=09return;
@@ -588,12 +612,24 @@ void __init gic_init(unsigned int gic_nr, unsigned in=
t irq_start,
=09void __iomem *dist_base, void __iomem *cpu_base)
{
=09struct gic_chip_data *gic;
+=09int cpu;
=20
=09BUG_ON(gic_nr >=3D MAX_GIC_NR);
=20
=09gic =3D &gic_data[gic_nr];
-=09gic->dist_base =3D dist_base;
-=09gic->cpu_base =3D cpu_base;
+=09gic->dist_base =3D alloc_percpu(void __iomem *);
+=09gic->cpu_base =3D alloc_percpu(void __iomem *);
+=09if (WARN_ON(!gic->dist_base || !gic->cpu_base)) {
+=09=09free_percpu(gic->dist_base);
+=09=09free_percpu(gic->cpu_base);
+=09=09return;
+=09}
+
+=09for_each_possible_cpu(cpu) {
+=09=09*per_cpu_ptr(gic->dist_base, cpu) =3D dist_base;
+=09=09*per_cpu_ptr(gic->cpu_base, cpu) =3D cpu_base;
+=09}
+
=09gic->irq_offset =3D (irq_start - 1) & ~31;
=20
=09if (gic_nr =3D=3D 0)
@@ -605,11 +641,17 @@ void __init gic_init(unsigned int gic_nr, unsigned in=
t irq_start,
=09gic_pm_init(gic);
}
=20
-void __cpuinit gic_secondary_init(unsigned int gic_nr)
+void __cpuinit gic_secondary_init_base(unsigned int gic_nr,
+=09=09=09=09 void __iomem *dist_base,
+=09=09=09=09 void __iomem *cpu_base)
{
=09BUG_ON(gic_nr >=3D MAX_GIC_NR);
=20
-=09gic_cpu_init(&gic_data[gic_nr]);
+=09if (dist_base)
+=09=09*__this_cpu_ptr(gic_data[gic_nr].dist_base) =3D dist_base;
+=09if (cpu_base)
+=09=09*__this_cpu_ptr(gic_data[gic_nr].cpu_base) =3D cpu_base;
+=09gic_cpu_init(&gic_data[gic_nr]);=09
}
=20
#ifdef CONFIG_SMP
@@ -629,6 +671,6 @@ void gic_raise_softirq(const struct cpumask *mask, unsi=
gned int irq)
=09dsb();
=20
=09/* this always happens on GIC0 */
-=09writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTIN=
T);
+=09writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_=
DIST_SOFTINT);
}
#endif
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/har=
dware/gic.h
index 2b7ec2b..d45d78b 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,24 +36,13 @@
extern struct irq_chip gic_arch_extn;
=20
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
-void gic_secondary_init(unsigned int);
+void gic_secondary_init_base(unsigned int, void __iomem *, void __iomem *)=
;
void gic_handle_irq(struct pt_regs *regs);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
=20
-struct gic_chip_data {
-=09unsigned int irq_offset;
-=09void __iomem *dist_base;
-=09void __iomem *cpu_base;
-#ifdef CONFIG_CPU_PM
-=09u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
-=09u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
-=09u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
-=09u32 __percpu *saved_ppi_enable;
-=09u32 __percpu *saved_ppi_conf;
-#endif
-=09unsigned int gic_irqs;
-};
+#define gic_secondary_init(n)=09gic_secondary_init_base((n), NULL, NULL)
+
#endif
=20
#endif
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index c682887..09e2760 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -204,17 +204,6 @@ void __init exynos4_init_clocks(int xtal)
=09exynos4_setup_clocks();
}
=20
-static void exynos4_gic_irq_fix_base(struct irq_data *d)
-{
-=09struct gic_chip_data *gic_data =3D irq_data_get_irq_chip_data(d);
-
-=09gic_data->cpu_base =3D S5P_VA_GIC_CPU +
-=09=09=09 (gic_bank_offset * smp_processor_id());
-
-=09gic_data->dist_base =3D S5P_VA_GIC_DIST +
-=09=09=09 (gic_bank_offset * smp_processor_id());
-}
-
void __init exynos4_init_irq(void)
{
=09int irq;
@@ -222,9 +211,6 @@ void __init exynos4_init_irq(void)
=09gic_bank_offset =3D soc_is_exynos4412() ? 0x4000 : 0x8000;
=20
=09gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
-=09gic_arch_extn.irq_eoi =3D exynos4_gic_irq_fix_base;
-=09gic_arch_extn.irq_unmask =3D exynos4_gic_irq_fix_base;
-=09gic_arch_extn.irq_mask =3D exynos4_gic_irq_fix_base;
=20
=09for (irq =3D 0; irq < MAX_COMBINER_NR; irq++) {
=20
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsm=
p.c
index 56377d2..76cb2ba 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -67,39 +67,19 @@ static void __iomem *scu_base_addr(void)
=20
static DEFINE_SPINLOCK(boot_lock);
=20
-static void __cpuinit exynos4_gic_secondary_init(void)
+static void __cpuinit exynos4_secondary_init(unsigned int cpu)
{
=09void __iomem *dist_base =3D S5P_VA_GIC_DIST +
-=09=09=09=09(gic_bank_offset * smp_processor_id());
+=09=09=09=09(gic_bank_offset * cpu_logical_map(cpu));
=09void __iomem *cpu_base =3D S5P_VA_GIC_CPU +
-=09=09=09=09(gic_bank_offset * smp_processor_id());
-=09int i;
-
-=09/*
-=09 * Deal with the banked PPI and SGI interrupts - disable all
-=09 * PPI interrupts, ensure all SGI interrupts are enabled.
-=09 */
-=09__raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
-=09__raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
+=09=09=09=09(gic_bank_offset * cpu_logical_map(cpu));
=20
=09/*
-=09 * Set priority on PPI and SGI interrupts
-=09 */
-=09for (i =3D 0; i < 32; i +=3D 4)
-=09=09__raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
-
-=09__raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK);
-=09__raw_writel(1, cpu_base + GIC_CPU_CTRL);
-}
-
-static void __cpuinit exynos4_secondary_init(unsigned int cpu)
-{
-=09/*
=09 * if any interrupts are already enabled for the primary
=09 * core (e.g. timer irq), then they will not have been enabled
=09 * for us: do so
=09 */
-=09exynos4_gic_secondary_init();
+=09gic_secondary_init_base(0, dist_base, cpu_base);
=20
=09/*
=09 * let the primary processor know we're out of the
--=20
1.7.0.4
--------------080509090809010207090900--
^ permalink raw reply related
* [PATCH RESEND] ARM: smp_twd: Reconfigure clockevents after cpufreq change
From: Thomas Gleixner @ 2011-10-07 9:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdaQNA_n7haRCU++26CLuaZ=eRb7iAS+mm0fQV244G1S4g@mail.gmail.com>
On Fri, 7 Oct 2011, Linus Walleij wrote:
> On Thu, Oct 6, 2011 at 7:25 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
> > On Thu, 6 Oct 2011, Linus Walleij wrote:
> >> Here is the entire patch i Russells tracker:
> >> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
> >
> > The only thing what puzzles me is:
> >
> >> + ? ? if (!IS_ERR_OR_NULL(twd_clk))
> >> + ? ? ? ? ? ? twd_timer_rate = clk_get_rate(twd_clk);
> >> + ? ? else
> >> + ? ? ? ? ? ? twd_calibrate_rate();
> >
> > How is made sure that the cpu freq update thing is not called when
> > twd_clk is not available or am I missing something ?
>
> The CPUfreq transition notifier is only registered if twd_clk is
> not error or NULL in this #ifdef CONFIG_CPU_FREQ snippet
> above that code, but executed later:
>
> +static int twd_cpufreq_init(void)
> +{
> + if (!IS_ERR_OR_NULL(twd_clk))
> + return cpufreq_register_notifier(&twd_cpufreq_nb,
> + CPUFREQ_TRANSITION_NOTIFIER);
> +
> + return 0;
> +}
> +core_initcall(twd_cpufreq_init);
Duh. Could have seen that myself :)
Thans for clarification. Please add my Acked-by.
Thanks,
tglx
^ permalink raw reply
* [PATCH 5/7] ARM: EXYNOS4: Add support external GIC
From: Marc Zyngier @ 2011-10-07 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E8D645D.4020601@arm.com>
On 06/10/11 09:18, Marc Zyngier wrote:
> On 06/10/11 07:30, Kukjin Kim wrote:
>> Marc Zyngier wrote:
>>>
>>> Hi Changhwan,
>>>
>> Hi Marc,
>>
>> (Cc'ed Will Deacon and Russell King)
>>
>>> On 20/06/11 08:34, Changhwan Youn wrote:
>>>> For full support of power modes, this patch adds implementation
>>>> external GIC on EXYNOS4.
>>>>
>>>> External GIC of Exynos4 cannot support register banking so
>>>> several interrupt related code for CPU1 should be different
>>>> from that of CPU0.
>>>
>>> I just realized that patch has made it to mainline... Unfortunately, it
>>> seems quite broken to me:
>>>
>>>> Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
>>>> ---
>>>> arch/arm/mach-exynos4/cpu.c | 10 ++++++++
>>>> arch/arm/mach-exynos4/include/mach/entry-macro.S | 5 ++++
>>>> arch/arm/mach-exynos4/include/mach/map.h | 1 +
>>>> arch/arm/mach-exynos4/platsmp.c | 27
>>> +++++++++++++++++++++-
>>>> 4 files changed, 42 insertions(+), 1 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
>>>> index fa33294..40a866c 100644
>>>> --- a/arch/arm/mach-exynos4/cpu.c
>>>> +++ b/arch/arm/mach-exynos4/cpu.c
>>>> @@ -16,6 +16,7 @@
>>>>
>>>> #include <asm/proc-fns.h>
>>>> #include <asm/hardware/cache-l2x0.h>
>>>> +#include <asm/hardware/gic.h>
>>>>
>>>> #include <plat/cpu.h>
>>>> #include <plat/clock.h>
>>>> @@ -159,11 +160,20 @@ void __init exynos4_init_clocks(int xtal)
>>>> exynos4_setup_clocks();
>>>> }
>>>>
>>>> +static void exynos4_gic_irq_eoi(struct irq_data *d)
>>>> +{
>>>> + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
>>>> +
>>>> + gic_data->cpu_base = S5P_VA_GIC_CPU +
>>>> + (EXYNOS4_GIC_BANK_OFFSET *
>>> smp_processor_id());
>>>
>>> Here, you're overwriting a field that is shared among *all* the
>>> interrupts in the system. What if an interrupt comes up on another CPU?
>>> If you look at the implementation of gic_eoi_irq(), you'll definitely
>>> see the race.
>>>
>> Hmm...as you can see in git log, the EXYNOS4210 cannot support register
>> banking in GIC so this is needed.
>
> I don't dispute the need. I claim that the implementation is wrong, and
> will fail given the right timings.
>
>>>> +}
>>>> +
>>>> void __init exynos4_init_irq(void)
>>>> {
>>>> int irq;
>>>>
>>>> gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
>>>> + gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi;
>>>
>>> And here you're abusing the GIC extension feature.
>>>
>> I think gic_arch_extn.irq_eoi can be overwritten in each architecture to
>> support own specific extensions like in the EXYNOS4 case.
>
> Sure. My point is you are diverting the GIC extension from its purpose,
> which is mostly to be able to control wake-up sources (as for example in
> the Tegra case). Here, you use this hooks to work around the fact that
> the GIC driver is written with banking in mind, which is quite a
> different thing.
>
>>> I've also had a look at -next, and this has been extended further to
>>> support 4412. The problem with that is without banking, you're painfully
>>> working around the GIC driver. At that stage, I wonder if you wouldn't
>>> be better off with a separate driver instead of abusing the existing
>> one...
>>>
>> Well, in this case, you mean separate driver is better to us even though
>> there is a gic driver in arch/arm/common? I don't think so because separate
>> driver will probably have many duplicated codes and if common gic driver can
>> support every silicons which have different version's gic it's better to us
>> and should do.
>
> If you really insist on using the GIC common code, then I'd suggest to
> adapt it to your needs instead of working around the problem.
> What about making cpu_base a percpu field inside struct gic_chip_data?
> No hook abuse, and no race conditions. You could also do that for
> dist_base, as it looks to be required for the 4412.
So to make my suggestion completely clear, here's a patch I'm now
carrying in my tree. It's only been test compiled on EXYNOS4, but works
nicely on my 11MP. It turns both dist_base and cpu_base into per-cpu
variables, removes these callbacks, removes your private copy of
gic_cpu_init, and makes struct gic_chip_data private again.
What do you think?
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [patch] ARM: smpboot: Enable interrupts after marking CPU online/active
From: Kukjin Kim @ 2011-10-07 9:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110923084001.GP17169@n2100.arm.linux.org.uk>
Kukjin Kim wrote:
>
> Russell King - ARM Linux wrote:
> >
> > On Tue, Sep 13, 2011 at 06:53:12PM +0100, Russell King - ARM Linux
wrote:
> > > So, we must have the setting of CPU online _after_ we've setup the
> > > scheduler domain information etc - so the following is a strict
> > > ordering:
> > >
> > > 1. calibrate_delay()
> > > 2. smp_store_cpu_info()
> > > 3. set_cpu_online()
> > >
> > > Now, the question is do we need interrupts enabled to setup timers
> > > via percpu_timer_setup() and calibrate delay. Can we move enabling
> > > interrupts after smp_store_cpu_info(). IOW, instead of moving the
> > > setting of cpu online before all this, can we move
notify_cpu_starting()
> > > and the enabling of _both_ interrupts after smp_store_cpu_info()...
> > > No idea at the moment.
> >
> > And to make things worse... 4bd0fe1c78623062263cf5ae875fd484c5b8256d
> > has appeared in mainline today.
> >
> > diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-
> exynos4/platsmp.c
> > index 7c2282c..df6ef1b 100644
> > --- a/arch/arm/mach-exynos4/platsmp.c
> > +++ b/arch/arm/mach-exynos4/platsmp.c
> > @@ -106,6 +106,8 @@ void __cpuinit platform_secondary_init(unsigned int
cpu)
> > */
> > spin_lock(&boot_lock);
> > spin_unlock(&boot_lock);
> > +
> > + set_cpu_online(cpu, true);
> > }
> >
> > int __cpuinit boot_secondary(unsigned int cpu, struct task_struct
*idle)
> >
> > I think some work needs to be done to eliminate some of the dependencies
> > in this code so that we can have a *sane* order for bringup of secondary
> > CPUs.
> >
> Hi Russell,
>
> Oops, as you said, it seems not proper place, platform_secondary_init() to
make
> secondary CPU online so I will submit its revert patch.
>
> But as Amit said, current EXYNOS4 SoCs which are using SPI for local
timers has
> problem that the irq_set_affinity() method is called in
percpu_timer_setup() before
> CPU1 becomes online with the commit
> 5dfc54e087c15f823ee9b6541d2f0f314e69cbed ("ARM: GIC: avoid routing
> interrupts to offline CPUs"). So I will check again.
>
> If you have any ideas, please kindly let me know.
>
Hi Russell,
Hmm...I have no idea :(
I think, basically, if SPIs in GIC are used in local timer, the routing
interrupt like calling irq_set_affinity() to offline CPUs should be
available when boot time before calling set_cpu_online() because as you know
the local_timer_setup() which includes setup interrupt is called in
percpu_timer_setup() now...
Is there any way to get the flags of struct irqaction from struct irq_data
in gic_set_affinity()? Or?
> > I'm just going to sit on the fence and watch what platform people do
> > during the next merge window when the support for the topological
> > scheduler goes in.
>
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCHv2] hw_random: add driver for atmel true hardware random number generator
From: Nicolas Ferre @ 2011-10-07 9:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317923791-31200-1-git-send-email-jacmet@sunsite.dk>
On 10/06/2011 07:56 PM, Peter Korsgaard :
> For the IP block on 9g45/9g46/9m10/9m11.
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Thanks, I am delighted to see this driver!
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Herbert,
I will handle the board specific part but should the driver part go
through the Crypto API tree?
Will you expect that I resend the patch with Jamie's and my signatures?
> ---
> Changes since v1:
> - Embed struct hwrng in struct atmel_trng as suggested by Jamie Iles.
>
> drivers/char/hw_random/Kconfig | 13 +++
> drivers/char/hw_random/Makefile | 1 +
> drivers/char/hw_random/atmel-rng.c | 158 ++++++++++++++++++++++++++++++++++++
> 3 files changed, 172 insertions(+), 0 deletions(-)
> create mode 100644 drivers/char/hw_random/atmel-rng.c
>
> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
> index 1d2ebc7..e013587 100644
> --- a/drivers/char/hw_random/Kconfig
> +++ b/drivers/char/hw_random/Kconfig
> @@ -60,6 +60,19 @@ config HW_RANDOM_AMD
>
> If unsure, say Y.
>
> +config HW_RANDOM_ATMEL
> + tristate "Atmel Random Number Generator support"
> + depends on HW_RANDOM && ARCH_AT91SAM9G45
> + default HW_RANDOM
> + ---help---
> + This driver provides kernel-side support for the Random Number
> + Generator hardware found on Atmel AT91 devices.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called atmel-rng.
> +
> + If unsure, say Y.
> +
> config HW_RANDOM_GEODE
> tristate "AMD Geode HW Random Number Generator support"
> depends on HW_RANDOM && X86_32 && PCI
> diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
> index c88f244..b2ff526 100644
> --- a/drivers/char/hw_random/Makefile
> +++ b/drivers/char/hw_random/Makefile
> @@ -7,6 +7,7 @@ rng-core-y := core.o
> obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o
> obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
> obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
> +obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o
> obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
> obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
> n2-rng-y := n2-drv.o n2-asm.o
> diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c
> new file mode 100644
> index 0000000..241df2e
> --- /dev/null
> +++ b/drivers/char/hw_random/atmel-rng.c
> @@ -0,0 +1,158 @@
> +/*
> + * Copyright (c) 2011 Peter Korsgaard <jacmet@sunsite.dk>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/err.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/hw_random.h>
> +#include <linux/platform_device.h>
> +
> +#define TRNG_CR 0x00
> +#define TRNG_ISR 0x1c
> +#define TRNG_ODATA 0x50
> +
> +#define TRNG_KEY 0x524e4700 /* RNG */
> +
> +struct atmel_trng {
> + struct clk *clk;
> + void __iomem *base;
> + struct hwrng rng;
> +};
> +
> +static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max,
> + bool wait)
> +{
> + struct atmel_trng *trng = container_of(rng, struct atmel_trng, rng);
> + u32 *data = buf;
> +
> + /* data ready? */
> + if (readl(trng->base + TRNG_ODATA) & 1) {
> + *data = readl(trng->base + TRNG_ODATA);
> + return 4;
> + } else
> + return 0;
> +}
> +
> +static int atmel_trng_probe(struct platform_device *pdev)
> +{
> + struct atmel_trng *trng;
> + struct resource *res;
> + int ret;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res)
> + return -EINVAL;
> +
> + trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
> + if (!trng)
> + return -ENOMEM;
> +
> + if (!devm_request_mem_region(&pdev->dev, res->start,
> + resource_size(res), pdev->name))
> + return -EBUSY;
> +
> + trng->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
> + if (!trng->base)
> + return -EBUSY;
> +
> + trng->clk = clk_get(&pdev->dev, NULL);
> + if (IS_ERR(trng->clk))
> + return PTR_ERR(trng->clk);
> +
> + ret = clk_enable(trng->clk);
> + if (ret)
> + goto err_enable;
> +
> + writel(TRNG_KEY | 1, trng->base + TRNG_CR);
> + trng->rng.name = pdev->name;
> + trng->rng.read = atmel_trng_read;
> +
> + ret = hwrng_register(&trng->rng);
> + if (ret)
> + goto err_register;
> +
> + platform_set_drvdata(pdev, trng);
> +
> + return 0;
> +
> +err_register:
> + clk_disable(trng->clk);
> +err_enable:
> + clk_put(trng->clk);
> +
> + return ret;
> +}
> +
> +static int __devexit atmel_trng_remove(struct platform_device *pdev)
> +{
> + struct atmel_trng *trng = platform_get_drvdata(pdev);
> +
> + hwrng_unregister(&trng->rng);
> +
> + writel(TRNG_KEY, trng->base + TRNG_CR);
> + clk_disable(trng->clk);
> + clk_put(trng->clk);
> +
> + platform_set_drvdata(pdev, NULL);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int atmel_trng_suspend(struct device *dev)
> +{
> + struct atmel_trng *trng = dev_get_drvdata(dev);
> +
> + clk_disable(trng->clk);
> +
> + return 0;
> +}
> +
> +static int atmel_trng_resume(struct device *dev)
> +{
> + struct atmel_trng *trng = dev_get_drvdata(dev);
> +
> + return clk_enable(trng->clk);
> +}
> +
> +static const struct dev_pm_ops atmel_trng_pm_ops = {
> + .suspend = atmel_trng_suspend,
> + .resume = atmel_trng_resume,
> +};
> +#endif /* CONFIG_PM */
> +
> +static struct platform_driver atmel_trng_driver = {
> + .probe = atmel_trng_probe,
> + .remove = __devexit_p(atmel_trng_remove),
> + .driver = {
> + .name = "atmel-trng",
> + .owner = THIS_MODULE,
> +#ifdef CONFIG_PM
> + .pm = &atmel_trng_pm_ops,
> +#endif /* CONFIG_PM */
> + },
> +};
> +
> +static int __init atmel_trng_init(void)
> +{
> + return platform_driver_register(&atmel_trng_driver);
> +}
> +module_init(atmel_trng_init);
> +
> +static void __exit atmel_trng_exit(void)
> +{
> + platform_driver_unregister(&atmel_trng_driver);
> +}
> +module_exit(atmel_trng_exit);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
> +MODULE_DESCRIPTION("Atmel true random number generator driver");
Best regards,
--
Nicolas Ferre
^ permalink raw reply
* [PATCH V2 0/2] Add a common macro for creating struct clk_lookup entries
From: Rajeshwari Shinde @ 2011-10-07 9:53 UTC (permalink / raw)
To: linux-arm-kernel
This patchset consolidates the macro that creates 'struct clk_lookup'
entries by introducing a common macro 'CLKDEV_INIT' as suggested by
Russell King. Few of the platforms have been modified to use this new macro.
I have done the replacement by using python script. I have only build tested
for below platforms with existing defconfigs.
Changes since V1:
- Removed "&" and "," from the CLKDEV_INIT macro.
- Replaced the platform specific macros to use the new CLKDEV_INIT macro.
- Rebased the patches on the latest master branch of Linux-Next.
Rajeshwari Shinde (2):
ARM: CLKDEV: Add Common Macro for clk_lookup
ARM: Using CLKDEV_INIT for creating clk_lookup instance
arch/arm/mach-davinci/board-dm646x-evm.c | 5 +-
arch/arm/mach-davinci/clock.h | 7 --
arch/arm/mach-davinci/da830.c | 101 ++++++++++----------
arch/arm/mach-davinci/da850.c | 95 ++++++++++----------
arch/arm/mach-davinci/dm355.c | 87 +++++++++---------
arch/arm/mach-davinci/dm365.c | 113 +++++++++++-----------
arch/arm/mach-davinci/dm644x.c | 77 ++++++++--------
arch/arm/mach-davinci/dm646x.c | 81 ++++++++--------
arch/arm/mach-davinci/tnetv107x.c | 133 +++++++++++++-------------
arch/arm/mach-ep93xx/clock.c | 61 ++++++-------
arch/arm/mach-imx/clock-imx1.c | 38 +++-----
arch/arm/mach-imx/clock-imx21.c | 91 +++++++++----------
arch/arm/mach-imx/clock-imx25.c | 79 +++++++---------
arch/arm/mach-imx/clock-imx27.c | 111 ++++++++++------------
arch/arm/mach-imx/clock-imx31.c | 103 ++++++++++-----------
arch/arm/mach-imx/clock-imx35.c | 117 +++++++++++------------
arch/arm/mach-lpc32xx/clock.c | 75 +++++++--------
arch/arm/mach-mx5/clock-mx51-mx53.c | 149 ++++++++++++++----------------
arch/arm/mach-mxs/clock-mx23.c | 39 +++-----
arch/arm/mach-mxs/clock-mx28.c | 71 +++++++--------
arch/arm/mach-tcc8k/clock.c | 107 ++++++++++-----------
include/linux/clkdev.h | 7 ++
22 files changed, 838 insertions(+), 909 deletions(-)
--
1.7.4.4
^ permalink raw reply
* [PATCH V2 1/2] ARM: CLKDEV: Add Common Macro for clk_lookup
From: Rajeshwari Shinde @ 2011-10-07 9:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317981211-15745-1-git-send-email-rajeshwari.s@samsung.com>
Added a standardized macro CLKDEV_INIT which can used across all
the platforms to support clkdev
Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
---
include/linux/clkdev.h | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/include/linux/clkdev.h b/include/linux/clkdev.h
index 457bcb0..34c9918 100644
--- a/include/linux/clkdev.h
+++ b/include/linux/clkdev.h
@@ -24,6 +24,13 @@ struct clk_lookup {
struct clk *clk;
};
+#define CLKDEV_INIT(d, n, c) \
+ { \
+ .dev_id = d, \
+ .con_id = n, \
+ .clk = c, \
+ }
+
struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
const char *dev_fmt, ...);
--
1.7.4.4
^ permalink raw reply related
* [PATCH V2 2/2] ARM: Using CLKDEV_INIT for creating clk_lookup instance
From: Rajeshwari Shinde @ 2011-10-07 9:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317981211-15745-1-git-send-email-rajeshwari.s@samsung.com>
Replace platform specific macros that creates struct clk_lookup
instance with the new common CLKDEV_INIT macro
Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Hans J. Koch <hjk@hansjkoch.de>
Acked-by: Amit Kucheria <amit.kucheria@canonical.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
---
arch/arm/mach-davinci/board-dm646x-evm.c | 5 +-
arch/arm/mach-davinci/clock.h | 7 --
arch/arm/mach-davinci/da830.c | 101 ++++++++++----------
arch/arm/mach-davinci/da850.c | 95 ++++++++++----------
arch/arm/mach-davinci/dm355.c | 87 +++++++++---------
arch/arm/mach-davinci/dm365.c | 113 +++++++++++-----------
arch/arm/mach-davinci/dm644x.c | 77 ++++++++--------
arch/arm/mach-davinci/dm646x.c | 81 ++++++++--------
arch/arm/mach-davinci/tnetv107x.c | 133 +++++++++++++-------------
arch/arm/mach-ep93xx/clock.c | 61 ++++++-------
arch/arm/mach-imx/clock-imx1.c | 38 +++-----
arch/arm/mach-imx/clock-imx21.c | 91 +++++++++----------
arch/arm/mach-imx/clock-imx25.c | 79 +++++++---------
arch/arm/mach-imx/clock-imx27.c | 111 ++++++++++------------
arch/arm/mach-imx/clock-imx31.c | 103 ++++++++++-----------
arch/arm/mach-imx/clock-imx35.c | 117 +++++++++++------------
arch/arm/mach-lpc32xx/clock.c | 75 +++++++--------
arch/arm/mach-mx5/clock-mx51-mx53.c | 149 ++++++++++++++----------------
arch/arm/mach-mxs/clock-mx23.c | 39 +++-----
arch/arm/mach-mxs/clock-mx28.c | 71 +++++++--------
arch/arm/mach-tcc8k/clock.c | 107 ++++++++++-----------
21 files changed, 831 insertions(+), 909 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f..63951d0 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -24,6 +24,7 @@
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/pcf857x.h>
+#include <linux/clkdev.h>
#include <media/tvp514x.h>
@@ -704,8 +705,8 @@ static struct clk cdce_clk_in = {
};
static struct clk_lookup cdce_clks[] = {
- CLK(NULL, "xin", &cdce_clk_in),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "xin", &cdce_clk_in),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
static void __init cdce_clk_init(void)
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index a705f36..df153d5 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -113,13 +113,6 @@ struct clk {
#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */
#define PSC_FORCE BIT(7) /* Force module state transtition */
-#define CLK(dev, con, ck) \
- { \
- .dev_id = dev, \
- .con_id = con, \
- .clk = ck, \
- } \
-
int davinci_clk_init(struct clk_lookup *clocks);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a6bf5dc..f2f359b 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -11,6 +11,7 @@
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/clk.h>
+#include <linux/clkdev.h>
#include <asm/mach/map.h>
@@ -374,56 +375,56 @@ static struct clk rmii_clk = {
};
static struct clk_lookup da830_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("watchdog", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "scr0_ss", &scr0_ss_clk),
- CLK(NULL, "scr1_ss", &scr1_ss_clk),
- CLK(NULL, "scr2_ss", &scr2_ss_clk),
- CLK(NULL, "dmax", &dmax_clk),
- CLK(NULL, "tpcc", &tpcc_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK(NULL, "ecap0", &ecap0_clk),
- CLK(NULL, "ecap1", &ecap1_clk),
- CLK(NULL, "ecap2", &ecap2_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK("eqep.0", NULL, &eqep0_clk),
- CLK("eqep.1", NULL, &eqep1_clk),
- CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
- CLK(NULL, "usb20", &usb20_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "secu_mgr", &secu_mgr_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "usb11", &usb11_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "ref", &ref_clk),
+ CLKDEV_INIT(NULL, "pll0", &pll0_clk),
+ CLKDEV_INIT(NULL, "pll0_aux", &pll0_aux_clk),
+ CLKDEV_INIT(NULL, "pll0_sysclk2", &pll0_sysclk2),
+ CLKDEV_INIT(NULL, "pll0_sysclk3", &pll0_sysclk3),
+ CLKDEV_INIT(NULL, "pll0_sysclk4", &pll0_sysclk4),
+ CLKDEV_INIT(NULL, "pll0_sysclk5", &pll0_sysclk5),
+ CLKDEV_INIT(NULL, "pll0_sysclk6", &pll0_sysclk6),
+ CLKDEV_INIT(NULL, "pll0_sysclk7", &pll0_sysclk7),
+ CLKDEV_INIT("i2c_davinci.1", NULL, &i2c0_clk),
+ CLKDEV_INIT(NULL, "timer0", &timerp64_0_clk),
+ CLKDEV_INIT("watchdog", NULL, &timerp64_1_clk),
+ CLKDEV_INIT(NULL, "arm_rom", &arm_rom_clk),
+ CLKDEV_INIT(NULL, "scr0_ss", &scr0_ss_clk),
+ CLKDEV_INIT(NULL, "scr1_ss", &scr1_ss_clk),
+ CLKDEV_INIT(NULL, "scr2_ss", &scr2_ss_clk),
+ CLKDEV_INIT(NULL, "dmax", &dmax_clk),
+ CLKDEV_INIT(NULL, "tpcc", &tpcc_clk),
+ CLKDEV_INIT(NULL, "tptc0", &tptc0_clk),
+ CLKDEV_INIT(NULL, "tptc1", &tptc1_clk),
+ CLKDEV_INIT("davinci_mmc.0", NULL, &mmcsd_clk),
+ CLKDEV_INIT(NULL, "uart0", &uart0_clk),
+ CLKDEV_INIT(NULL, "uart1", &uart1_clk),
+ CLKDEV_INIT(NULL, "uart2", &uart2_clk),
+ CLKDEV_INIT("spi_davinci.0", NULL, &spi0_clk),
+ CLKDEV_INIT("spi_davinci.1", NULL, &spi1_clk),
+ CLKDEV_INIT(NULL, "ecap0", &ecap0_clk),
+ CLKDEV_INIT(NULL, "ecap1", &ecap1_clk),
+ CLKDEV_INIT(NULL, "ecap2", &ecap2_clk),
+ CLKDEV_INIT(NULL, "pwm0", &pwm0_clk),
+ CLKDEV_INIT(NULL, "pwm1", &pwm1_clk),
+ CLKDEV_INIT(NULL, "pwm2", &pwm2_clk),
+ CLKDEV_INIT("eqep.0", NULL, &eqep0_clk),
+ CLKDEV_INIT("eqep.1", NULL, &eqep1_clk),
+ CLKDEV_INIT("da8xx_lcdc.0", NULL, &lcdc_clk),
+ CLKDEV_INIT("davinci-mcasp.0", NULL, &mcasp0_clk),
+ CLKDEV_INIT("davinci-mcasp.1", NULL, &mcasp1_clk),
+ CLKDEV_INIT("davinci-mcasp.2", NULL, &mcasp2_clk),
+ CLKDEV_INIT(NULL, "usb20", &usb20_clk),
+ CLKDEV_INIT(NULL, "aemif", &aemif_clk),
+ CLKDEV_INIT(NULL, "aintc", &aintc_clk),
+ CLKDEV_INIT(NULL, "secu_mgr", &secu_mgr_clk),
+ CLKDEV_INIT("davinci_emac.1", NULL, &emac_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT("i2c_davinci.2", NULL, &i2c1_clk),
+ CLKDEV_INIT(NULL, "usb11", &usb11_clk),
+ CLKDEV_INIT(NULL, "emif3", &emif3_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "rmii", &rmii_clk),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
/*
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b047f87..1d6d511 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -17,6 +17,7 @@
#include <linux/platform_device.h>
#include <linux/cpufreq.h>
#include <linux/regulator/consumer.h>
+#include <linux/clkdev.h>
#include <asm/mach/map.h>
@@ -384,53 +385,53 @@ static struct clk sata_clk = {
};
static struct clk_lookup da850_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("watchdog", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "tpcc0", &tpcc0_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK(NULL, "tpcc1", &tpcc1_clk),
- CLK(NULL, "tptc2", &tptc2_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp_clk),
- CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
- CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "usb11", &usb11_clk),
- CLK(NULL, "usb20", &usb20_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("ahci", NULL, &sata_clk),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "ref", &ref_clk),
+ CLKDEV_INIT(NULL, "pll0", &pll0_clk),
+ CLKDEV_INIT(NULL, "pll0_aux", &pll0_aux_clk),
+ CLKDEV_INIT(NULL, "pll0_sysclk2", &pll0_sysclk2),
+ CLKDEV_INIT(NULL, "pll0_sysclk3", &pll0_sysclk3),
+ CLKDEV_INIT(NULL, "pll0_sysclk4", &pll0_sysclk4),
+ CLKDEV_INIT(NULL, "pll0_sysclk5", &pll0_sysclk5),
+ CLKDEV_INIT(NULL, "pll0_sysclk6", &pll0_sysclk6),
+ CLKDEV_INIT(NULL, "pll0_sysclk7", &pll0_sysclk7),
+ CLKDEV_INIT(NULL, "pll1", &pll1_clk),
+ CLKDEV_INIT(NULL, "pll1_aux", &pll1_aux_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclk2", &pll1_sysclk2),
+ CLKDEV_INIT(NULL, "pll1_sysclk3", &pll1_sysclk3),
+ CLKDEV_INIT(NULL, "pll1_sysclk4", &pll1_sysclk4),
+ CLKDEV_INIT(NULL, "pll1_sysclk5", &pll1_sysclk5),
+ CLKDEV_INIT(NULL, "pll1_sysclk6", &pll1_sysclk6),
+ CLKDEV_INIT(NULL, "pll1_sysclk7", &pll1_sysclk7),
+ CLKDEV_INIT("i2c_davinci.1", NULL, &i2c0_clk),
+ CLKDEV_INIT(NULL, "timer0", &timerp64_0_clk),
+ CLKDEV_INIT("watchdog", NULL, &timerp64_1_clk),
+ CLKDEV_INIT(NULL, "arm_rom", &arm_rom_clk),
+ CLKDEV_INIT(NULL, "tpcc0", &tpcc0_clk),
+ CLKDEV_INIT(NULL, "tptc0", &tptc0_clk),
+ CLKDEV_INIT(NULL, "tptc1", &tptc1_clk),
+ CLKDEV_INIT(NULL, "tpcc1", &tpcc1_clk),
+ CLKDEV_INIT(NULL, "tptc2", &tptc2_clk),
+ CLKDEV_INIT(NULL, "uart0", &uart0_clk),
+ CLKDEV_INIT(NULL, "uart1", &uart1_clk),
+ CLKDEV_INIT(NULL, "uart2", &uart2_clk),
+ CLKDEV_INIT(NULL, "aintc", &aintc_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT("i2c_davinci.2", NULL, &i2c1_clk),
+ CLKDEV_INIT(NULL, "emif3", &emif3_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "rmii", &rmii_clk),
+ CLKDEV_INIT("davinci_emac.1", NULL, &emac_clk),
+ CLKDEV_INIT("davinci-mcasp.0", NULL, &mcasp_clk),
+ CLKDEV_INIT("da8xx_lcdc.0", NULL, &lcdc_clk),
+ CLKDEV_INIT("davinci_mmc.0", NULL, &mmcsd0_clk),
+ CLKDEV_INIT("davinci_mmc.1", NULL, &mmcsd1_clk),
+ CLKDEV_INIT(NULL, "aemif", &aemif_clk),
+ CLKDEV_INIT(NULL, "usb11", &usb11_clk),
+ CLKDEV_INIT(NULL, "usb20", &usb20_clk),
+ CLKDEV_INIT("spi_davinci.0", NULL, &spi0_clk),
+ CLKDEV_INIT("spi_davinci.1", NULL, &spi1_clk),
+ CLKDEV_INIT("ahci", NULL, &sata_clk),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
/*
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index fe520d4..1df71e0 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -13,6 +13,7 @@
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
+#include <linux/clkdev.h>
#include <linux/spi/spi.h>
@@ -336,49 +337,49 @@ static struct clk usb_clk = {
};
static struct clk_lookup dm355_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK(NULL, "vpss_master", &vpss_master_clk),
- CLK(NULL, "vpss_slave", &vpss_slave_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "clkout2", &clkout2_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "clkout3", &clkout3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci-mcbsp.0", NULL, &asp0_clk),
- CLK("davinci-mcbsp.1", NULL, &asp1_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
- CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("watchdog", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "ref", &ref_clk),
+ CLKDEV_INIT(NULL, "pll1", &pll1_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclk1", &pll1_sysclk1),
+ CLKDEV_INIT(NULL, "pll1_sysclk2", &pll1_sysclk2),
+ CLKDEV_INIT(NULL, "pll1_sysclk3", &pll1_sysclk3),
+ CLKDEV_INIT(NULL, "pll1_sysclk4", &pll1_sysclk4),
+ CLKDEV_INIT(NULL, "pll1_aux", &pll1_aux_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
+ CLKDEV_INIT(NULL, "vpss_dac", &vpss_dac_clk),
+ CLKDEV_INIT(NULL, "vpss_master", &vpss_master_clk),
+ CLKDEV_INIT(NULL, "vpss_slave", &vpss_slave_clk),
+ CLKDEV_INIT(NULL, "clkout1", &clkout1_clk),
+ CLKDEV_INIT(NULL, "clkout2", &clkout2_clk),
+ CLKDEV_INIT(NULL, "pll2", &pll2_clk),
+ CLKDEV_INIT(NULL, "pll2_sysclk1", &pll2_sysclk1),
+ CLKDEV_INIT(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
+ CLKDEV_INIT(NULL, "clkout3", &clkout3_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "mjcp", &mjcp_clk),
+ CLKDEV_INIT(NULL, "uart0", &uart0_clk),
+ CLKDEV_INIT(NULL, "uart1", &uart1_clk),
+ CLKDEV_INIT(NULL, "uart2", &uart2_clk),
+ CLKDEV_INIT("i2c_davinci.1", NULL, &i2c_clk),
+ CLKDEV_INIT("davinci-mcbsp.0", NULL, &asp0_clk),
+ CLKDEV_INIT("davinci-mcbsp.1", NULL, &asp1_clk),
+ CLKDEV_INIT("davinci_mmc.0", NULL, &mmcsd0_clk),
+ CLKDEV_INIT("davinci_mmc.1", NULL, &mmcsd1_clk),
+ CLKDEV_INIT("spi_davinci.0", NULL, &spi0_clk),
+ CLKDEV_INIT("spi_davinci.1", NULL, &spi1_clk),
+ CLKDEV_INIT("spi_davinci.2", NULL, &spi2_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT(NULL, "aemif", &aemif_clk),
+ CLKDEV_INIT(NULL, "pwm0", &pwm0_clk),
+ CLKDEV_INIT(NULL, "pwm1", &pwm1_clk),
+ CLKDEV_INIT(NULL, "pwm2", &pwm2_clk),
+ CLKDEV_INIT(NULL, "pwm3", &pwm3_clk),
+ CLKDEV_INIT(NULL, "timer0", &timer0_clk),
+ CLKDEV_INIT(NULL, "timer1", &timer1_clk),
+ CLKDEV_INIT("watchdog", NULL, &timer2_clk),
+ CLKDEV_INIT(NULL, "timer3", &timer3_clk),
+ CLKDEV_INIT(NULL, "rto", &rto_clk),
+ CLKDEV_INIT(NULL, "usb", &usb_clk),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
/*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 679e168..b0637b4 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,6 +18,7 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/clkdev.h>
#include <asm/mach/map.h>
@@ -406,62 +407,62 @@ static struct clk mjcp_clk = {
};
static struct clk_lookup dm365_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "clkout0", &clkout0_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
- CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_aux", &pll2_aux_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclk3", &pll2_sysclk3),
- CLK(NULL, "pll2_sysclk4", &pll2_sysclk4),
- CLK(NULL, "pll2_sysclk5", &pll2_sysclk5),
- CLK(NULL, "pll2_sysclk6", &pll2_sysclk6),
- CLK(NULL, "pll2_sysclk7", &pll2_sysclk7),
- CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
- CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK(NULL, "vpss_master", &vpss_master_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
- CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK("spi_davinci.3", NULL, &spi3_clk),
- CLK("spi_davinci.4", NULL, &spi4_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("watchdog", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_voicecodec", NULL, &voicecodec_clk),
- CLK("davinci-mcbsp", NULL, &asp0_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "ref", &ref_clk),
+ CLKDEV_INIT(NULL, "pll1", &pll1_clk),
+ CLKDEV_INIT(NULL, "pll1_aux", &pll1_aux_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
+ CLKDEV_INIT(NULL, "clkout0", &clkout0_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclk1", &pll1_sysclk1),
+ CLKDEV_INIT(NULL, "pll1_sysclk2", &pll1_sysclk2),
+ CLKDEV_INIT(NULL, "pll1_sysclk3", &pll1_sysclk3),
+ CLKDEV_INIT(NULL, "pll1_sysclk4", &pll1_sysclk4),
+ CLKDEV_INIT(NULL, "pll1_sysclk5", &pll1_sysclk5),
+ CLKDEV_INIT(NULL, "pll1_sysclk6", &pll1_sysclk6),
+ CLKDEV_INIT(NULL, "pll1_sysclk7", &pll1_sysclk7),
+ CLKDEV_INIT(NULL, "pll1_sysclk8", &pll1_sysclk8),
+ CLKDEV_INIT(NULL, "pll1_sysclk9", &pll1_sysclk9),
+ CLKDEV_INIT(NULL, "pll2", &pll2_clk),
+ CLKDEV_INIT(NULL, "pll2_aux", &pll2_aux_clk),
+ CLKDEV_INIT(NULL, "clkout1", &clkout1_clk),
+ CLKDEV_INIT(NULL, "pll2_sysclk1", &pll2_sysclk1),
+ CLKDEV_INIT(NULL, "pll2_sysclk2", &pll2_sysclk2),
+ CLKDEV_INIT(NULL, "pll2_sysclk3", &pll2_sysclk3),
+ CLKDEV_INIT(NULL, "pll2_sysclk4", &pll2_sysclk4),
+ CLKDEV_INIT(NULL, "pll2_sysclk5", &pll2_sysclk5),
+ CLKDEV_INIT(NULL, "pll2_sysclk6", &pll2_sysclk6),
+ CLKDEV_INIT(NULL, "pll2_sysclk7", &pll2_sysclk7),
+ CLKDEV_INIT(NULL, "pll2_sysclk8", &pll2_sysclk8),
+ CLKDEV_INIT(NULL, "pll2_sysclk9", &pll2_sysclk9),
+ CLKDEV_INIT(NULL, "vpss_dac", &vpss_dac_clk),
+ CLKDEV_INIT(NULL, "vpss_master", &vpss_master_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "uart0", &uart0_clk),
+ CLKDEV_INIT(NULL, "uart1", &uart1_clk),
+ CLKDEV_INIT("i2c_davinci.1", NULL, &i2c_clk),
+ CLKDEV_INIT("davinci_mmc.0", NULL, &mmcsd0_clk),
+ CLKDEV_INIT("davinci_mmc.1", NULL, &mmcsd1_clk),
+ CLKDEV_INIT("spi_davinci.0", NULL, &spi0_clk),
+ CLKDEV_INIT("spi_davinci.1", NULL, &spi1_clk),
+ CLKDEV_INIT("spi_davinci.2", NULL, &spi2_clk),
+ CLKDEV_INIT("spi_davinci.3", NULL, &spi3_clk),
+ CLKDEV_INIT("spi_davinci.4", NULL, &spi4_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT(NULL, "aemif", &aemif_clk),
+ CLKDEV_INIT(NULL, "pwm0", &pwm0_clk),
+ CLKDEV_INIT(NULL, "pwm1", &pwm1_clk),
+ CLKDEV_INIT(NULL, "pwm2", &pwm2_clk),
+ CLKDEV_INIT(NULL, "pwm3", &pwm3_clk),
+ CLKDEV_INIT(NULL, "timer0", &timer0_clk),
+ CLKDEV_INIT(NULL, "timer1", &timer1_clk),
+ CLKDEV_INIT("watchdog", NULL, &timer2_clk),
+ CLKDEV_INIT(NULL, "timer3", &timer3_clk),
+ CLKDEV_INIT(NULL, "usb", &usb_clk),
+ CLKDEV_INIT("davinci_emac.1", NULL, &emac_clk),
+ CLKDEV_INIT("davinci_voicecodec", NULL, &voicecodec_clk),
+ CLKDEV_INIT("davinci-mcbsp", NULL, &asp0_clk),
+ CLKDEV_INIT(NULL, "rto", &rto_clk),
+ CLKDEV_INIT(NULL, "mjcp", &mjcp_clk),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
/*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 3470983..f61610e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,6 +12,7 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/clkdev.h>
#include <asm/mach/map.h>
@@ -278,44 +279,44 @@ static struct clk timer2_clk = {
};
static struct clk_lookup dm644x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "vicp", &vicp_clk),
- CLK(NULL, "vpss_master", &vpss_master_clk),
- CLK(NULL, "vpss_slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK("davinci-mcbsp", NULL, &asp_clk),
- CLK("davinci_mmc.0", NULL, &mmcsd_clk),
- CLK(NULL, "spi", &spi_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, "vlynq", &vlynq_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("watchdog", NULL, &timer2_clk),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "ref", &ref_clk),
+ CLKDEV_INIT(NULL, "pll1", &pll1_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclk1", &pll1_sysclk1),
+ CLKDEV_INIT(NULL, "pll1_sysclk2", &pll1_sysclk2),
+ CLKDEV_INIT(NULL, "pll1_sysclk3", &pll1_sysclk3),
+ CLKDEV_INIT(NULL, "pll1_sysclk5", &pll1_sysclk5),
+ CLKDEV_INIT(NULL, "pll1_aux", &pll1_aux_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
+ CLKDEV_INIT(NULL, "pll2", &pll2_clk),
+ CLKDEV_INIT(NULL, "pll2_sysclk1", &pll2_sysclk1),
+ CLKDEV_INIT(NULL, "pll2_sysclk2", &pll2_sysclk2),
+ CLKDEV_INIT(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
+ CLKDEV_INIT(NULL, "dsp", &dsp_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "vicp", &vicp_clk),
+ CLKDEV_INIT(NULL, "vpss_master", &vpss_master_clk),
+ CLKDEV_INIT(NULL, "vpss_slave", &vpss_slave_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "uart0", &uart0_clk),
+ CLKDEV_INIT(NULL, "uart1", &uart1_clk),
+ CLKDEV_INIT(NULL, "uart2", &uart2_clk),
+ CLKDEV_INIT("davinci_emac.1", NULL, &emac_clk),
+ CLKDEV_INIT("i2c_davinci.1", NULL, &i2c_clk),
+ CLKDEV_INIT("palm_bk3710", NULL, &ide_clk),
+ CLKDEV_INIT("davinci-mcbsp", NULL, &asp_clk),
+ CLKDEV_INIT("davinci_mmc.0", NULL, &mmcsd_clk),
+ CLKDEV_INIT(NULL, "spi", &spi_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT(NULL, "usb", &usb_clk),
+ CLKDEV_INIT(NULL, "vlynq", &vlynq_clk),
+ CLKDEV_INIT(NULL, "aemif", &aemif_clk),
+ CLKDEV_INIT(NULL, "pwm0", &pwm0_clk),
+ CLKDEV_INIT(NULL, "pwm1", &pwm1_clk),
+ CLKDEV_INIT(NULL, "pwm2", &pwm2_clk),
+ CLKDEV_INIT(NULL, "timer0", &timer0_clk),
+ CLKDEV_INIT(NULL, "timer1", &timer1_clk),
+ CLKDEV_INIT("watchdog", NULL, &timer2_clk),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
static struct emac_platform_data dm644x_emac_pdata = {
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed5..ad9b71b 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,6 +13,7 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/clkdev.h>
#include <asm/mach/map.h>
@@ -316,46 +317,46 @@ static struct clk vpif1_clk = {
};
static struct clk_lookup dm646x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "aux", &aux_clkin),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
- CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "edma_cc", &edma_cc_clk),
- CLK(NULL, "edma_tc0", &edma_tc0_clk),
- CLK(NULL, "edma_tc1", &edma_tc1_clk),
- CLK(NULL, "edma_tc2", &edma_tc2_clk),
- CLK(NULL, "edma_tc3", &edma_tc3_clk),
- CLK(NULL, "uart0", &uart0_clk),
- CLK(NULL, "uart1", &uart1_clk),
- CLK(NULL, "uart2", &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("watchdog", NULL, &timer2_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK(NULL, "vpif0", &vpif0_clk),
- CLK(NULL, "vpif1", &vpif1_clk),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "ref", &ref_clk),
+ CLKDEV_INIT(NULL, "aux", &aux_clkin),
+ CLKDEV_INIT(NULL, "pll1", &pll1_clk),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk1),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk2),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk3),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk4),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk5),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk6),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk8),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclk9),
+ CLKDEV_INIT(NULL, "pll1_sysclk", &pll1_sysclkbp),
+ CLKDEV_INIT(NULL, "pll1_aux", &pll1_aux_clk),
+ CLKDEV_INIT(NULL, "pll2", &pll2_clk),
+ CLKDEV_INIT(NULL, "pll2_sysclk1", &pll2_sysclk1),
+ CLKDEV_INIT(NULL, "dsp", &dsp_clk),
+ CLKDEV_INIT(NULL, "arm", &arm_clk),
+ CLKDEV_INIT(NULL, "edma_cc", &edma_cc_clk),
+ CLKDEV_INIT(NULL, "edma_tc0", &edma_tc0_clk),
+ CLKDEV_INIT(NULL, "edma_tc1", &edma_tc1_clk),
+ CLKDEV_INIT(NULL, "edma_tc2", &edma_tc2_clk),
+ CLKDEV_INIT(NULL, "edma_tc3", &edma_tc3_clk),
+ CLKDEV_INIT(NULL, "uart0", &uart0_clk),
+ CLKDEV_INIT(NULL, "uart1", &uart1_clk),
+ CLKDEV_INIT(NULL, "uart2", &uart2_clk),
+ CLKDEV_INIT("i2c_davinci.1", NULL, &i2c_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT("davinci-mcasp.0", NULL, &mcasp0_clk),
+ CLKDEV_INIT("davinci-mcasp.1", NULL, &mcasp1_clk),
+ CLKDEV_INIT(NULL, "aemif", &aemif_clk),
+ CLKDEV_INIT("davinci_emac.1", NULL, &emac_clk),
+ CLKDEV_INIT(NULL, "pwm0", &pwm0_clk),
+ CLKDEV_INIT(NULL, "pwm1", &pwm1_clk),
+ CLKDEV_INIT(NULL, "timer0", &timer0_clk),
+ CLKDEV_INIT(NULL, "timer1", &timer1_clk),
+ CLKDEV_INIT("watchdog", NULL, &timer2_clk),
+ CLKDEV_INIT("palm_bk3710", NULL, &ide_clk),
+ CLKDEV_INIT(NULL, "vpif0", &vpif0_clk),
+ CLKDEV_INIT(NULL, "vpif1", &vpif1_clk),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
static struct emac_platform_data dm646x_emac_pdata = {
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 409bb86..c2f53f0 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -19,6 +19,7 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/platform_device.h>
+#include <linux/clkdev.h>
#include <asm/mach/map.h>
@@ -230,72 +231,72 @@ static struct clk clk_rng = { .name = "rng", .parent = &clk_pktsec };
static struct clk clk_pka = { .name = "pka", .parent = &clk_pktsec };
static struct clk_lookup clks[] = {
- CLK(NULL, "pll_sys_clk", &pll_sys_clk),
- CLK(NULL, "pll_eth_clk", &pll_eth_clk),
- CLK(NULL, "pll_tdm_clk", &pll_tdm_clk),
- CLK(NULL, "sys_arm1176_clk", &sys_arm1176_clk),
- CLK(NULL, "sys_dsp_clk", &sys_dsp_clk),
- CLK(NULL, "sys_ddr_clk", &sys_ddr_clk),
- CLK(NULL, "sys_full_clk", &sys_full_clk),
- CLK(NULL, "sys_lcd_clk", &sys_lcd_clk),
- CLK(NULL, "sys_vlynq_ref_clk", &sys_vlynq_ref_clk),
- CLK(NULL, "sys_tsc_clk", &sys_tsc_clk),
- CLK(NULL, "sys_half_clk", &sys_half_clk),
- CLK(NULL, "eth_5mhz_clk", ð_5mhz_clk),
- CLK(NULL, "eth_50mhz_clk", ð_50mhz_clk),
- CLK(NULL, "eth_125mhz_clk", ð_125mhz_clk),
- CLK(NULL, "eth_250mhz_clk", ð_250mhz_clk),
- CLK(NULL, "eth_25mhz_clk", ð_25mhz_clk),
- CLK(NULL, "tdm_0_clk", &tdm_0_clk),
- CLK(NULL, "tdm_extra_clk", &tdm_extra_clk),
- CLK(NULL, "tdm_1_clk", &tdm_1_clk),
- CLK(NULL, "clk_arm", &clk_arm),
- CLK(NULL, "clk_gem", &clk_gem),
- CLK(NULL, "clk_ddr2_phy", &clk_ddr2_phy),
- CLK(NULL, "clk_tpcc", &clk_tpcc),
- CLK(NULL, "clk_tptc0", &clk_tptc0),
- CLK(NULL, "clk_tptc1", &clk_tptc1),
- CLK(NULL, "clk_ram", &clk_ram),
- CLK(NULL, "clk_mbx_lite", &clk_mbx_lite),
- CLK("tnetv107x-fb.0", NULL, &clk_lcd),
- CLK(NULL, "clk_ethss", &clk_ethss),
- CLK(NULL, "aemif", &clk_aemif),
- CLK(NULL, "clk_chipcfg", &clk_chipcfg),
- CLK("tnetv107x-ts.0", NULL, &clk_tsc),
- CLK(NULL, "clk_rom", &clk_rom),
- CLK(NULL, "uart2", &clk_uart2),
- CLK(NULL, "clk_pktsec", &clk_pktsec),
- CLK("tnetv107x-rng.0", NULL, &clk_rng),
- CLK("tnetv107x-pka.0", NULL, &clk_pka),
- CLK(NULL, "clk_secctl", &clk_secctl),
- CLK(NULL, "clk_keymgr", &clk_keymgr),
- CLK("tnetv107x-keypad.0", NULL, &clk_keypad),
- CLK(NULL, "clk_gpio", &clk_gpio),
- CLK(NULL, "clk_mdio", &clk_mdio),
- CLK("davinci_mmc.0", NULL, &clk_sdio0),
- CLK(NULL, "uart0", &clk_uart0),
- CLK(NULL, "uart1", &clk_uart1),
- CLK(NULL, "timer0", &clk_timer0),
- CLK(NULL, "timer1", &clk_timer1),
- CLK("tnetv107x_wdt.0", NULL, &clk_wdt_arm),
- CLK(NULL, "clk_wdt_dsp", &clk_wdt_dsp),
- CLK("ti-ssp", NULL, &clk_ssp),
- CLK(NULL, "clk_tdm0", &clk_tdm0),
- CLK(NULL, "clk_vlynq", &clk_vlynq),
- CLK(NULL, "clk_mcdma", &clk_mcdma),
- CLK(NULL, "clk_usbss", &clk_usbss),
- CLK(NULL, "clk_usb0", &clk_usb0),
- CLK(NULL, "clk_usb1", &clk_usb1),
- CLK(NULL, "clk_tdm1", &clk_tdm1),
- CLK(NULL, "clk_debugss", &clk_debugss),
- CLK(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii),
- CLK(NULL, "clk_system", &clk_system),
- CLK(NULL, "clk_imcop", &clk_imcop),
- CLK(NULL, "clk_spare", &clk_spare),
- CLK("davinci_mmc.1", NULL, &clk_sdio1),
- CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst),
- CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst),
- CLK(NULL, NULL, NULL),
+ CLKDEV_INIT(NULL, "pll_sys_clk", &pll_sys_clk),
+ CLKDEV_INIT(NULL, "pll_eth_clk", &pll_eth_clk),
+ CLKDEV_INIT(NULL, "pll_tdm_clk", &pll_tdm_clk),
+ CLKDEV_INIT(NULL, "sys_arm1176_clk", &sys_arm1176_clk),
+ CLKDEV_INIT(NULL, "sys_dsp_clk", &sys_dsp_clk),
+ CLKDEV_INIT(NULL, "sys_ddr_clk", &sys_ddr_clk),
+ CLKDEV_INIT(NULL, "sys_full_clk", &sys_full_clk),
+ CLKDEV_INIT(NULL, "sys_lcd_clk", &sys_lcd_clk),
+ CLKDEV_INIT(NULL, "sys_vlynq_ref_clk", &sys_vlynq_ref_clk),
+ CLKDEV_INIT(NULL, "sys_tsc_clk", &sys_tsc_clk),
+ CLKDEV_INIT(NULL, "sys_half_clk", &sys_half_clk),
+ CLKDEV_INIT(NULL, "eth_5mhz_clk", ð_5mhz_clk),
+ CLKDEV_INIT(NULL, "eth_50mhz_clk", ð_50mhz_clk),
+ CLKDEV_INIT(NULL, "eth_125mhz_clk", ð_125mhz_clk),
+ CLKDEV_INIT(NULL, "eth_250mhz_clk", ð_250mhz_clk),
+ CLKDEV_INIT(NULL, "eth_25mhz_clk", ð_25mhz_clk),
+ CLKDEV_INIT(NULL, "tdm_0_clk", &tdm_0_clk),
+ CLKDEV_INIT(NULL, "tdm_extra_clk", &tdm_extra_clk),
+ CLKDEV_INIT(NULL, "tdm_1_clk", &tdm_1_clk),
+ CLKDEV_INIT(NULL, "clk_arm", &clk_arm),
+ CLKDEV_INIT(NULL, "clk_gem", &clk_gem),
+ CLKDEV_INIT(NULL, "clk_ddr2_phy", &clk_ddr2_phy),
+ CLKDEV_INIT(NULL, "clk_tpcc", &clk_tpcc),
+ CLKDEV_INIT(NULL, "clk_tptc0", &clk_tptc0),
+ CLKDEV_INIT(NULL, "clk_tptc1", &clk_tptc1),
+ CLKDEV_INIT(NULL, "clk_ram", &clk_ram),
+ CLKDEV_INIT(NULL, "clk_mbx_lite", &clk_mbx_lite),
+ CLKDEV_INIT("tnetv107x-fb.0", NULL, &clk_lcd),
+ CLKDEV_INIT(NULL, "clk_ethss", &clk_ethss),
+ CLKDEV_INIT(NULL, "aemif", &clk_aemif),
+ CLKDEV_INIT(NULL, "clk_chipcfg", &clk_chipcfg),
+ CLKDEV_INIT("tnetv107x-ts.0", NULL, &clk_tsc),
+ CLKDEV_INIT(NULL, "clk_rom", &clk_rom),
+ CLKDEV_INIT(NULL, "uart2", &clk_uart2),
+ CLKDEV_INIT(NULL, "clk_pktsec", &clk_pktsec),
+ CLKDEV_INIT("tnetv107x-rng.0", NULL, &clk_rng),
+ CLKDEV_INIT("tnetv107x-pka.0", NULL, &clk_pka),
+ CLKDEV_INIT(NULL, "clk_secctl", &clk_secctl),
+ CLKDEV_INIT(NULL, "clk_keymgr", &clk_keymgr),
+ CLKDEV_INIT("tnetv107x-keypad.0", NULL, &clk_keypad),
+ CLKDEV_INIT(NULL, "clk_gpio", &clk_gpio),
+ CLKDEV_INIT(NULL, "clk_mdio", &clk_mdio),
+ CLKDEV_INIT("davinci_mmc.0", NULL, &clk_sdio0),
+ CLKDEV_INIT(NULL, "uart0", &clk_uart0),
+ CLKDEV_INIT(NULL, "uart1", &clk_uart1),
+ CLKDEV_INIT(NULL, "timer0", &clk_timer0),
+ CLKDEV_INIT(NULL, "timer1", &clk_timer1),
+ CLKDEV_INIT("tnetv107x_wdt.0", NULL, &clk_wdt_arm),
+ CLKDEV_INIT(NULL, "clk_wdt_dsp", &clk_wdt_dsp),
+ CLKDEV_INIT("ti-ssp", NULL, &clk_ssp),
+ CLKDEV_INIT(NULL, "clk_tdm0", &clk_tdm0),
+ CLKDEV_INIT(NULL, "clk_vlynq", &clk_vlynq),
+ CLKDEV_INIT(NULL, "clk_mcdma", &clk_mcdma),
+ CLKDEV_INIT(NULL, "clk_usbss", &clk_usbss),
+ CLKDEV_INIT(NULL, "clk_usb0", &clk_usb0),
+ CLKDEV_INIT(NULL, "clk_usb1", &clk_usb1),
+ CLKDEV_INIT(NULL, "clk_tdm1", &clk_tdm1),
+ CLKDEV_INIT(NULL, "clk_debugss", &clk_debugss),
+ CLKDEV_INIT(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii),
+ CLKDEV_INIT(NULL, "clk_system", &clk_system),
+ CLKDEV_INIT(NULL, "clk_imcop", &clk_imcop),
+ CLKDEV_INIT(NULL, "clk_spare", &clk_spare),
+ CLKDEV_INIT("davinci_mmc.1", NULL, &clk_sdio1),
+ CLKDEV_INIT(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst),
+ CLKDEV_INIT(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst),
+ CLKDEV_INIT(NULL, NULL, NULL),
};
static const struct mux_config pins[] = {
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index ca4de71..60fc2f3 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -198,39 +198,36 @@ static struct clk clk_m2m1 = {
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1,
};
-#define INIT_CK(dev,con,ck) \
- { .dev_id = dev, .con_id = con, .clk = ck }
-
static struct clk_lookup clocks[] = {
- INIT_CK(NULL, "xtali", &clk_xtali),
- INIT_CK("apb:uart1", NULL, &clk_uart1),
- INIT_CK("apb:uart2", NULL, &clk_uart2),
- INIT_CK("apb:uart3", NULL, &clk_uart3),
- INIT_CK(NULL, "pll1", &clk_pll1),
- INIT_CK(NULL, "fclk", &clk_f),
- INIT_CK(NULL, "hclk", &clk_h),
- INIT_CK(NULL, "apb_pclk", &clk_p),
- INIT_CK(NULL, "pll2", &clk_pll2),
- INIT_CK("ep93xx-ohci", NULL, &clk_usb_host),
- INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
- INIT_CK("ep93xx-fb", NULL, &clk_video),
- INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
- INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk),
- INIT_CK("ep93xx-i2s", "sclk", &clk_i2s_sclk),
- INIT_CK("ep93xx-i2s", "lrclk", &clk_i2s_lrclk),
- INIT_CK(NULL, "pwm_clk", &clk_pwm),
- INIT_CK(NULL, "m2p0", &clk_m2p0),
- INIT_CK(NULL, "m2p1", &clk_m2p1),
- INIT_CK(NULL, "m2p2", &clk_m2p2),
- INIT_CK(NULL, "m2p3", &clk_m2p3),
- INIT_CK(NULL, "m2p4", &clk_m2p4),
- INIT_CK(NULL, "m2p5", &clk_m2p5),
- INIT_CK(NULL, "m2p6", &clk_m2p6),
- INIT_CK(NULL, "m2p7", &clk_m2p7),
- INIT_CK(NULL, "m2p8", &clk_m2p8),
- INIT_CK(NULL, "m2p9", &clk_m2p9),
- INIT_CK(NULL, "m2m0", &clk_m2m0),
- INIT_CK(NULL, "m2m1", &clk_m2m1),
+ CLKDEV_INIT(NULL, "xtali", &clk_xtali),
+ CLKDEV_INIT("apb:uart1", NULL, &clk_uart1),
+ CLKDEV_INIT("apb:uart2", NULL, &clk_uart2),
+ CLKDEV_INIT("apb:uart3", NULL, &clk_uart3),
+ CLKDEV_INIT(NULL, "pll1", &clk_pll1),
+ CLKDEV_INIT(NULL, "fclk", &clk_f),
+ CLKDEV_INIT(NULL, "hclk", &clk_h),
+ CLKDEV_INIT(NULL, "apb_pclk", &clk_p),
+ CLKDEV_INIT(NULL, "pll2", &clk_pll2),
+ CLKDEV_INIT("ep93xx-ohci", NULL, &clk_usb_host),
+ CLKDEV_INIT("ep93xx-keypad", NULL, &clk_keypad),
+ CLKDEV_INIT("ep93xx-fb", NULL, &clk_video),
+ CLKDEV_INIT("ep93xx-spi.0", NULL, &clk_spi),
+ CLKDEV_INIT("ep93xx-i2s", "mclk", &clk_i2s_mclk),
+ CLKDEV_INIT("ep93xx-i2s", "sclk", &clk_i2s_sclk),
+ CLKDEV_INIT("ep93xx-i2s", "lrclk", &clk_i2s_lrclk),
+ CLKDEV_INIT(NULL, "pwm_clk", &clk_pwm),
+ CLKDEV_INIT(NULL, "m2p0", &clk_m2p0),
+ CLKDEV_INIT(NULL, "m2p1", &clk_m2p1),
+ CLKDEV_INIT(NULL, "m2p2", &clk_m2p2),
+ CLKDEV_INIT(NULL, "m2p3", &clk_m2p3),
+ CLKDEV_INIT(NULL, "m2p4", &clk_m2p4),
+ CLKDEV_INIT(NULL, "m2p5", &clk_m2p5),
+ CLKDEV_INIT(NULL, "m2p6", &clk_m2p6),
+ CLKDEV_INIT(NULL, "m2p7", &clk_m2p7),
+ CLKDEV_INIT(NULL, "m2p8", &clk_m2p8),
+ CLKDEV_INIT(NULL, "m2p9", &clk_m2p9),
+ CLKDEV_INIT(NULL, "m2m0", &clk_m2m0),
+ CLKDEV_INIT(NULL, "m2m1", &clk_m2m1),
};
static DEFINE_SPINLOCK(clk_lock);
diff --git a/arch/arm/mach-imx/clock-imx1.c b/arch/arm/mach-imx/clock-imx1.c
index 4aabeb2..8bdcfa2 100644
--- a/arch/arm/mach-imx/clock-imx1.c
+++ b/arch/arm/mach-imx/clock-imx1.c
@@ -575,29 +575,23 @@ static struct clk rtc_clk = {
.parent = &clk32,
};
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
static struct clk_lookup lookups[] __initdata = {
- _REGISTER_CLOCK(NULL, "dma", dma_clk)
- _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk)
- _REGISTER_CLOCK(NULL, "mma", mma_clk)
- _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk)
- _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
- _REGISTER_CLOCK("imx1-uart.0", NULL, uart_clk)
- _REGISTER_CLOCK("imx1-uart.1", NULL, uart_clk)
- _REGISTER_CLOCK("imx1-uart.2", NULL, uart_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
- _REGISTER_CLOCK("imx1-cspi.0", NULL, spi_clk)
- _REGISTER_CLOCK("imx1-cspi.1", NULL, spi_clk)
- _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk)
- _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
- _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
- _REGISTER_CLOCK(NULL, "ssi", ssi_clk)
- _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk)
+ CLKDEV_INIT(NULL, "dma", &dma_clk),
+ CLKDEV_INIT("mx1-camera.0", NULL, &csi_clk),
+ CLKDEV_INIT(NULL, "mma", &mma_clk),
+ CLKDEV_INIT("imx_udc.0", NULL, &usbd_clk),
+ CLKDEV_INIT(NULL, "gpt", &gpt_clk),
+ CLKDEV_INIT("imx1-uart.0", NULL, &uart_clk),
+ CLKDEV_INIT("imx1-uart.1", NULL, &uart_clk),
+ CLKDEV_INIT("imx1-uart.2", NULL, &uart_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c_clk),
+ CLKDEV_INIT("imx1-cspi.0", NULL, &spi_clk),
+ CLKDEV_INIT("imx1-cspi.1", NULL, &spi_clk),
+ CLKDEV_INIT("imx-mmc.0", NULL, &sdhc_clk),
+ CLKDEV_INIT("imx-fb.0", NULL, &lcdc_clk),
+ CLKDEV_INIT(NULL, "mshc", &mshc_clk),
+ CLKDEV_INIT(NULL, "ssi", &ssi_clk),
+ CLKDEV_INIT("mxc_rtc.0", NULL, &rtc_clk),
};
int __init mx1_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-imx/clock-imx21.c b/arch/arm/mach-imx/clock-imx21.c
index ee15d8c..2a7747d 100644
--- a/arch/arm/mach-imx/clock-imx21.c
+++ b/arch/arm/mach-imx/clock-imx21.c
@@ -1139,58 +1139,51 @@ static struct clk clko_clk = {
.set_parent = _clk_clko_set_parent,
};
-
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
static struct clk_lookup lookups[] = {
/* It's unlikely that any driver wants one of them directly:
- _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
- _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
- _REGISTER_CLOCK(NULL, "fpm", fpm_clk)
- _REGISTER_CLOCK(NULL, "mpll", mpll_clk)
- _REGISTER_CLOCK(NULL, "spll", spll_clk)
- _REGISTER_CLOCK(NULL, "fclk", fclk_clk)
- _REGISTER_CLOCK(NULL, "hclk", hclk_clk)
- _REGISTER_CLOCK(NULL, "ipg", ipg_clk)
+ CLKDEV_INIT(NULL, "ckih", &ckih_clk),
+ CLKDEV_INIT(NULL, "ckil", &ckil_clk),
+ CLKDEV_INIT(NULL, "fpm", &fpm_clk),
+ CLKDEV_INIT(NULL, "mpll", &mpll_clk),
+ CLKDEV_INIT(NULL, "spll", &spll_clk),
+ CLKDEV_INIT(NULL, "fclk", &fclk_clk),
+ CLKDEV_INIT(NULL, "hclk", &hclk_clk),
+ CLKDEV_INIT(NULL, "ipg", &ipg_clk),
*/
- _REGISTER_CLOCK(NULL, "perclk1", per_clk[0])
- _REGISTER_CLOCK(NULL, "perclk2", per_clk[1])
- _REGISTER_CLOCK(NULL, "perclk3", per_clk[2])
- _REGISTER_CLOCK(NULL, "perclk4", per_clk[3])
- _REGISTER_CLOCK(NULL, "clko", clko_clk)
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart_clk[0])
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart_clk[1])
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart_clk[2])
- _REGISTER_CLOCK("imx21-uart.3", NULL, uart_clk[3])
- _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[0])
- _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[1])
- _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[2])
- _REGISTER_CLOCK(NULL, "pwm", pwm_clk[0])
- _REGISTER_CLOCK(NULL, "sdhc1", sdhc_clk[0])
- _REGISTER_CLOCK(NULL, "sdhc2", sdhc_clk[1])
- _REGISTER_CLOCK("imx21-cspi.0", NULL, cspi_clk[0])
- _REGISTER_CLOCK("imx21-cspi.1", NULL, cspi_clk[1])
- _REGISTER_CLOCK("imx21-cspi.2", NULL, cspi_clk[2])
- _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0])
- _REGISTER_CLOCK(NULL, "csi", csi_clk[0])
- _REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0])
- _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0])
- _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1])
- _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
- _REGISTER_CLOCK(NULL, "dma", dma_clk[0])
- _REGISTER_CLOCK(NULL, "brom", brom_clk)
- _REGISTER_CLOCK(NULL, "emma", emma_clk[0])
- _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0])
- _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
- _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
- _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
- _REGISTER_CLOCK(NULL, "owire", owire_clk)
- _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
+ CLKDEV_INIT(NULL, "perclk1", &per_clk[0]),
+ CLKDEV_INIT(NULL, "perclk2", &per_clk[1]),
+ CLKDEV_INIT(NULL, "perclk3", &per_clk[2]),
+ CLKDEV_INIT(NULL, "perclk4", &per_clk[3]),
+ CLKDEV_INIT(NULL, "clko", &clko_clk),
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart_clk[0]),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart_clk[1]),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart_clk[2]),
+ CLKDEV_INIT("imx21-uart.3", NULL, &uart_clk[3]),
+ CLKDEV_INIT(NULL, "gpt1", &gpt_clk[0]),
+ CLKDEV_INIT(NULL, "gpt1", &gpt_clk[1]),
+ CLKDEV_INIT(NULL, "gpt1", &gpt_clk[2]),
+ CLKDEV_INIT(NULL, "pwm", &pwm_clk[0]),
+ CLKDEV_INIT(NULL, "sdhc1", &sdhc_clk[0]),
+ CLKDEV_INIT(NULL, "sdhc2", &sdhc_clk[1]),
+ CLKDEV_INIT("imx21-cspi.0", NULL, &cspi_clk[0]),
+ CLKDEV_INIT("imx21-cspi.1", NULL, &cspi_clk[1]),
+ CLKDEV_INIT("imx21-cspi.2", NULL, &cspi_clk[2]),
+ CLKDEV_INIT("imx-fb.0", NULL, &lcdc_clk[0]),
+ CLKDEV_INIT(NULL, "csi", &csi_clk[0]),
+ CLKDEV_INIT("imx21-hcd.0", NULL, &usb_clk[0]),
+ CLKDEV_INIT(NULL, "ssi1", &ssi_clk[0]),
+ CLKDEV_INIT(NULL, "ssi2", &ssi_clk[1]),
+ CLKDEV_INIT("mxc_nand.0", NULL, &nfc_clk),
+ CLKDEV_INIT(NULL, "dma", &dma_clk[0]),
+ CLKDEV_INIT(NULL, "brom", &brom_clk),
+ CLKDEV_INIT(NULL, "emma", &emma_clk[0]),
+ CLKDEV_INIT(NULL, "slcdc", &slcdc_clk[0]),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &wdog_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c_clk),
+ CLKDEV_INIT("mxc-keypad", NULL, &kpp_clk),
+ CLKDEV_INIT(NULL, "owire", &owire_clk),
+ CLKDEV_INIT(NULL, "rtc", &rtc_clk),
};
/*
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
index b0fec74c..85508f4 100644
--- a/arch/arm/mach-imx/clock-imx25.c
+++ b/arch/arm/mach-imx/clock-imx25.c
@@ -265,53 +265,46 @@ DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(iim_clk, 0, CCM_CGCR1, 26, NULL, NULL, NULL);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
/* i.mx25 has the i.mx21 type uart */
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
- _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
- _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
- _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
- _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
- _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart1_clk),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart2_clk),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart3_clk),
+ CLKDEV_INIT("imx21-uart.3", NULL, &uart4_clk),
+ CLKDEV_INIT("imx21-uart.4", NULL, &uart5_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb", &usbotg_clk),
+ CLKDEV_INIT("mxc-ehci.1", "usb", &usbotg_clk),
+ CLKDEV_INIT("mxc-ehci.2", "usb", &usbotg_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb", &usbotg_clk),
+ CLKDEV_INIT("mxc_nand.0", NULL, &nfc_clk),
/* i.mx25 has the i.mx35 type cspi */
- _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
- _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)
- _REGISTER_CLOCK("imx35-cspi.2", NULL, cspi3_clk)
- _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk)
- _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
- _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
- _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
- _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
- _REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
- _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
- _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
- _REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)
- _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
- _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
- _REGISTER_CLOCK("imx2-wdt.0", NULL, wdt_clk)
- _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
- _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx25.0", NULL, esdhc1_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx25.1", NULL, esdhc2_clk)
- _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
- _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
- _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
- _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
+ CLKDEV_INIT("imx35-cspi.0", NULL, &cspi1_clk),
+ CLKDEV_INIT("imx35-cspi.1", NULL, &cspi2_clk),
+ CLKDEV_INIT("imx35-cspi.2", NULL, &cspi3_clk),
+ CLKDEV_INIT("mxc_pwm.0", NULL, &pwm1_clk),
+ CLKDEV_INIT("mxc_pwm.1", NULL, &pwm2_clk),
+ CLKDEV_INIT("mxc_pwm.2", NULL, &pwm3_clk),
+ CLKDEV_INIT("mxc_pwm.3", NULL, &pwm4_clk),
+ CLKDEV_INIT("imx-keypad", NULL, &kpp_clk),
+ CLKDEV_INIT("mx25-adc", NULL, &tsc_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c_clk),
+ CLKDEV_INIT("imx-i2c.1", NULL, &i2c_clk),
+ CLKDEV_INIT("imx-i2c.2", NULL, &i2c_clk),
+ CLKDEV_INIT("imx25-fec.0", NULL, &fec_clk),
+ CLKDEV_INIT("imxdi_rtc.0", NULL, &dryice_clk),
+ CLKDEV_INIT("imx-fb.0", NULL, &lcdc_clk),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &wdt_clk),
+ CLKDEV_INIT("imx-ssi.0", NULL, &ssi1_clk),
+ CLKDEV_INIT("imx-ssi.1", NULL, &ssi2_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx25.0", NULL, &esdhc1_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx25.1", NULL, &esdhc2_clk),
+ CLKDEV_INIT("mx2-camera.0", NULL, &csi_clk),
+ CLKDEV_INIT(NULL, "audmux", &audmux_clk),
+ CLKDEV_INIT("flexcan.0", NULL, &can1_clk),
+ CLKDEV_INIT("flexcan.1", NULL, &can2_clk),
/* i.mx25 has the i.mx35 type sdma */
- _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
- _REGISTER_CLOCK(NULL, "iim", iim_clk)
+ CLKDEV_INIT("imx35-sdma", NULL, &sdma_clk),
+ CLKDEV_INIT(NULL, "iim", &iim_clk),
};
int __init mx25_clocks_init(void)
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 88fe00a..940a8cb 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -616,67 +616,60 @@ DEFINE_CLOCK(uart6_clk, 5, NULL, 0, NULL, &uart6_clk1, &per1_clk);
DEFINE_CLOCK1(lcdc_clk, 0, NULL, 0, parent, &lcdc_clk1, &per3_clk);
DEFINE_CLOCK1(csi_clk, 0, NULL, 0, parent, &csi_clk1, &per4_clk);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
/* i.mx27 has the i.mx21 type uart */
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
- _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
- _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
- _REGISTER_CLOCK("imx21-uart.5", NULL, uart6_clk)
- _REGISTER_CLOCK(NULL, "gpt1", gpt1_clk)
- _REGISTER_CLOCK(NULL, "gpt2", gpt2_clk)
- _REGISTER_CLOCK(NULL, "gpt3", gpt3_clk)
- _REGISTER_CLOCK(NULL, "gpt4", gpt4_clk)
- _REGISTER_CLOCK(NULL, "gpt5", gpt5_clk)
- _REGISTER_CLOCK(NULL, "gpt6", gpt6_clk)
- _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm_clk)
- _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
- _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
- _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk)
- _REGISTER_CLOCK("imx27-cspi.0", NULL, cspi1_clk)
- _REGISTER_CLOCK("imx27-cspi.1", NULL, cspi2_clk)
- _REGISTER_CLOCK("imx27-cspi.2", NULL, cspi3_clk)
- _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
- _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk1)
- _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk1)
- _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk)
- _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1)
- _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk)
- _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1)
- _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
- _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
- _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
- _REGISTER_CLOCK(NULL, "vpu", vpu_clk)
- _REGISTER_CLOCK(NULL, "dma", dma_clk)
- _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
- _REGISTER_CLOCK(NULL, "brom", brom_clk)
- _REGISTER_CLOCK(NULL, "emma", emma_clk)
- _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
- _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
- _REGISTER_CLOCK(NULL, "emi", emi_clk)
- _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
- _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
- _REGISTER_CLOCK(NULL, "mstick", mstick_clk)
- _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
- _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
- _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
- _REGISTER_CLOCK(NULL, "iim", iim_clk)
- _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
- _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)
- _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
- _REGISTER_CLOCK(NULL, "scc", scc_clk)
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart1_clk),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart2_clk),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart3_clk),
+ CLKDEV_INIT("imx21-uart.3", NULL, &uart4_clk),
+ CLKDEV_INIT("imx21-uart.4", NULL, &uart5_clk),
+ CLKDEV_INIT("imx21-uart.5", NULL, &uart6_clk),
+ CLKDEV_INIT(NULL, "gpt1", &gpt1_clk),
+ CLKDEV_INIT(NULL, "gpt2", &gpt2_clk),
+ CLKDEV_INIT(NULL, "gpt3", &gpt3_clk),
+ CLKDEV_INIT(NULL, "gpt4", &gpt4_clk),
+ CLKDEV_INIT(NULL, "gpt5", &gpt5_clk),
+ CLKDEV_INIT(NULL, "gpt6", &gpt6_clk),
+ CLKDEV_INIT("mxc_pwm.0", NULL, &pwm_clk),
+ CLKDEV_INIT("mxc-mmc.0", NULL, &sdhc1_clk),
+ CLKDEV_INIT("mxc-mmc.1", NULL, &sdhc2_clk),
+ CLKDEV_INIT("mxc-mmc.2", NULL, &sdhc3_clk),
+ CLKDEV_INIT("imx27-cspi.0", NULL, &cspi1_clk),
+ CLKDEV_INIT("imx27-cspi.1", NULL, &cspi2_clk),
+ CLKDEV_INIT("imx27-cspi.2", NULL, &cspi3_clk),
+ CLKDEV_INIT("imx-fb.0", NULL, &lcdc_clk),
+ CLKDEV_INIT("mx2-camera.0", NULL, &csi_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb", &usb_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", &usb_clk1),
+ CLKDEV_INIT("mxc-ehci.0", "usb", &usb_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb_ahb", &usb_clk1),
+ CLKDEV_INIT("mxc-ehci.1", "usb", &usb_clk),
+ CLKDEV_INIT("mxc-ehci.1", "usb_ahb", &usb_clk1),
+ CLKDEV_INIT("mxc-ehci.2", "usb", &usb_clk),
+ CLKDEV_INIT("mxc-ehci.2", "usb_ahb", &usb_clk1),
+ CLKDEV_INIT("imx-ssi.0", NULL, &ssi1_clk),
+ CLKDEV_INIT("imx-ssi.1", NULL, &ssi2_clk),
+ CLKDEV_INIT("mxc_nand.0", NULL, &nfc_clk),
+ CLKDEV_INIT(NULL, "vpu", &vpu_clk),
+ CLKDEV_INIT(NULL, "dma", &dma_clk),
+ CLKDEV_INIT(NULL, "rtic", &rtic_clk),
+ CLKDEV_INIT(NULL, "brom", &brom_clk),
+ CLKDEV_INIT(NULL, "emma", &emma_clk),
+ CLKDEV_INIT(NULL, "slcdc", &slcdc_clk),
+ CLKDEV_INIT("imx27-fec.0", NULL, &fec_clk),
+ CLKDEV_INIT(NULL, "emi", &emi_clk),
+ CLKDEV_INIT(NULL, "sahara2", &sahara2_clk),
+ CLKDEV_INIT("pata_imx", NULL, &pata_clk),
+ CLKDEV_INIT(NULL, "mstick", &mstick_clk),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &wdog_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c1_clk),
+ CLKDEV_INIT("imx-i2c.1", NULL, &i2c2_clk),
+ CLKDEV_INIT(NULL, "iim", &iim_clk),
+ CLKDEV_INIT(NULL, "kpp", &kpp_clk),
+ CLKDEV_INIT("mxc_w1.0", NULL, &owire_clk),
+ CLKDEV_INIT(NULL, "rtc", &rtc_clk),
+ CLKDEV_INIT(NULL, "scc", &scc_clk),
};
/* Adjust the clock path for TO2 and later */
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index 988a281..56510c5 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -516,63 +516,56 @@ DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk);
DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK(NULL, "emi", emi_clk)
- _REGISTER_CLOCK("imx31-cspi.0", NULL, cspi1_clk)
- _REGISTER_CLOCK("imx31-cspi.1", NULL, cspi2_clk)
- _REGISTER_CLOCK("imx31-cspi.2", NULL, cspi3_clk)
- _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
- _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
- _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
- _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
- _REGISTER_CLOCK(NULL, "epit", epit1_clk)
- _REGISTER_CLOCK(NULL, "epit", epit2_clk)
- _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
- _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
- _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
- _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk1)
- _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk2)
- _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk1)
- _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk2)
- _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk1)
- _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk2)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
- _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
+ CLKDEV_INIT(NULL, "emi", &emi_clk),
+ CLKDEV_INIT("imx31-cspi.0", NULL, &cspi1_clk),
+ CLKDEV_INIT("imx31-cspi.1", NULL, &cspi2_clk),
+ CLKDEV_INIT("imx31-cspi.2", NULL, &cspi3_clk),
+ CLKDEV_INIT(NULL, "gpt", &gpt_clk),
+ CLKDEV_INIT(NULL, "pwm", &pwm_clk),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &wdog_clk),
+ CLKDEV_INIT(NULL, "rtc", &rtc_clk),
+ CLKDEV_INIT(NULL, "epit", &epit1_clk),
+ CLKDEV_INIT(NULL, "epit", &epit2_clk),
+ CLKDEV_INIT("mxc_nand.0", NULL, &nfc_clk),
+ CLKDEV_INIT("ipu-core", NULL, &ipu_clk),
+ CLKDEV_INIT("mx3_sdc_fb", NULL, &ipu_clk),
+ CLKDEV_INIT(NULL, "kpp", &kpp_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb", &usb_clk1),
+ CLKDEV_INIT("mxc-ehci.0", "usb_ahb", &usb_clk2),
+ CLKDEV_INIT("mxc-ehci.1", "usb", &usb_clk1),
+ CLKDEV_INIT("mxc-ehci.1", "usb_ahb", &usb_clk2),
+ CLKDEV_INIT("mxc-ehci.2", "usb", &usb_clk1),
+ CLKDEV_INIT("mxc-ehci.2", "usb_ahb", &usb_clk2),
+ CLKDEV_INIT("fsl-usb2-udc", "usb", &usb_clk1),
+ CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", &usb_clk2),
+ CLKDEV_INIT("mx3-camera.0", NULL, &csi_clk),
/* i.mx31 has the i.mx21 type uart */
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
- _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
- _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
- _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
- _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)
- _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)
- _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
- _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
- _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
- _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
- _REGISTER_CLOCK(NULL, "firi", firi_clk)
- _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
- _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
- _REGISTER_CLOCK(NULL, "rng", rng_clk)
- _REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1)
- _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)
- _REGISTER_CLOCK(NULL, "mstick", mstick1_clk)
- _REGISTER_CLOCK(NULL, "mstick", mstick2_clk)
- _REGISTER_CLOCK(NULL, "scc", scc_clk)
- _REGISTER_CLOCK(NULL, "iim", iim_clk)
- _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
- _REGISTER_CLOCK(NULL, "mbx", mbx_clk)
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart1_clk),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart2_clk),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart3_clk),
+ CLKDEV_INIT("imx21-uart.3", NULL, &uart4_clk),
+ CLKDEV_INIT("imx21-uart.4", NULL, &uart5_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c1_clk),
+ CLKDEV_INIT("imx-i2c.1", NULL, &i2c2_clk),
+ CLKDEV_INIT("imx-i2c.2", NULL, &i2c3_clk),
+ CLKDEV_INIT("mxc_w1.0", NULL, &owire_clk),
+ CLKDEV_INIT("mxc-mmc.0", NULL, &sdhc1_clk),
+ CLKDEV_INIT("mxc-mmc.1", NULL, &sdhc2_clk),
+ CLKDEV_INIT("imx-ssi.0", NULL, &ssi1_clk),
+ CLKDEV_INIT("imx-ssi.1", NULL, &ssi2_clk),
+ CLKDEV_INIT(NULL, "firi", &firi_clk),
+ CLKDEV_INIT("pata_imx", NULL, &pata_clk),
+ CLKDEV_INIT(NULL, "rtic", &rtic_clk),
+ CLKDEV_INIT(NULL, "rng", &rng_clk),
+ CLKDEV_INIT("imx31-sdma", NULL, &sdma_clk1),
+ CLKDEV_INIT(NULL, "sdma_ipg", &sdma_clk2),
+ CLKDEV_INIT(NULL, "mstick", &mstick1_clk),
+ CLKDEV_INIT(NULL, "mstick", &mstick2_clk),
+ CLKDEV_INIT(NULL, "scc", &scc_clk),
+ CLKDEV_INIT(NULL, "iim", &iim_clk),
+ CLKDEV_INIT(NULL, "mpeg4", &mpeg4_clk),
+ CLKDEV_INIT(NULL, "mbx", &mbx_clk),
};
int __init mx31_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 8116f11..8f5e1d9 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -438,71 +438,64 @@ static struct clk nfc_clk = {
.disable = clk_dummy_disable
};
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
- _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
- _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
- _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
- _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
- _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)
- _REGISTER_CLOCK(NULL, "ect", ect_clk)
- _REGISTER_CLOCK(NULL, "edio", edio_clk)
- _REGISTER_CLOCK(NULL, "emi", emi_clk)
- _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)
- _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)
- _REGISTER_CLOCK(NULL, "esai", esai_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx35.0", NULL, esdhc1_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx35.1", NULL, esdhc2_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx35.2", NULL, esdhc3_clk)
+ CLKDEV_INIT(NULL, "asrc", &asrc_clk),
+ CLKDEV_INIT("pata_imx", NULL, &pata_clk),
+ CLKDEV_INIT("flexcan.0", NULL, &can1_clk),
+ CLKDEV_INIT("flexcan.1", NULL, &can2_clk),
+ CLKDEV_INIT("imx35-cspi.0", NULL, &cspi1_clk),
+ CLKDEV_INIT("imx35-cspi.1", NULL, &cspi2_clk),
+ CLKDEV_INIT(NULL, "ect", &ect_clk),
+ CLKDEV_INIT(NULL, "edio", &edio_clk),
+ CLKDEV_INIT(NULL, "emi", &emi_clk),
+ CLKDEV_INIT("imx-epit.0", NULL, &epit1_clk),
+ CLKDEV_INIT("imx-epit.1", NULL, &epit2_clk),
+ CLKDEV_INIT(NULL, "esai", &esai_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx35.0", NULL, &esdhc1_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx35.1", NULL, &esdhc2_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx35.2", NULL, &esdhc3_clk),
/* i.mx35 has the i.mx27 type fec */
- _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
- _REGISTER_CLOCK(NULL, "gpio", gpio1_clk)
- _REGISTER_CLOCK(NULL, "gpio", gpio2_clk)
- _REGISTER_CLOCK(NULL, "gpio", gpio3_clk)
- _REGISTER_CLOCK("gpt.0", NULL, gpt_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
- _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
- _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)
- _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk)
- _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
- _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
- _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
- _REGISTER_CLOCK(NULL, "mlb", mlb_clk)
- _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
- _REGISTER_CLOCK("mxc_w1", NULL, owire_clk)
- _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
- _REGISTER_CLOCK(NULL, "rngc", rngc_clk)
- _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
- _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
- _REGISTER_CLOCK(NULL, "scc", scc_clk)
- _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
- _REGISTER_CLOCK(NULL, "spba", spba_clk)
- _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
- _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
- _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
+ CLKDEV_INIT("imx27-fec.0", NULL, &fec_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio1_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio2_clk),
+ CLKDEV_INIT(NULL, "gpio", &gpio3_clk),
+ CLKDEV_INIT("gpt.0", NULL, &gpt_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c1_clk),
+ CLKDEV_INIT("imx-i2c.1", NULL, &i2c2_clk),
+ CLKDEV_INIT("imx-i2c.2", NULL, &i2c3_clk),
+ CLKDEV_INIT(NULL, "iomuxc", &iomuxc_clk),
+ CLKDEV_INIT("ipu-core", NULL, &ipu_clk),
+ CLKDEV_INIT("mx3_sdc_fb", NULL, &ipu_clk),
+ CLKDEV_INIT(NULL, "kpp", &kpp_clk),
+ CLKDEV_INIT(NULL, "mlb", &mlb_clk),
+ CLKDEV_INIT(NULL, "mshc", &mshc_clk),
+ CLKDEV_INIT("mxc_w1", NULL, &owire_clk),
+ CLKDEV_INIT(NULL, "pwm", &pwm_clk),
+ CLKDEV_INIT(NULL, "rngc", &rngc_clk),
+ CLKDEV_INIT(NULL, "rtc", &rtc_clk),
+ CLKDEV_INIT(NULL, "rtic", &rtic_clk),
+ CLKDEV_INIT(NULL, "scc", &scc_clk),
+ CLKDEV_INIT("imx35-sdma", NULL, &sdma_clk),
+ CLKDEV_INIT(NULL, "spba", &spba_clk),
+ CLKDEV_INIT(NULL, "spdif", &spdif_clk),
+ CLKDEV_INIT("imx-ssi.0", NULL, &ssi1_clk),
+ CLKDEV_INIT("imx-ssi.1", NULL, &ssi2_clk),
/* i.mx35 has the i.mx21 type uart */
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
- _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
- _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usbahb_clk)
- _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
- _REGISTER_CLOCK(NULL, "max", max_clk)
- _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
- _REGISTER_CLOCK(NULL, "csi", csi_clk)
- _REGISTER_CLOCK(NULL, "iim", iim_clk)
- _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
- _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart1_clk),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart2_clk),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart3_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb", &usbotg_clk),
+ CLKDEV_INIT("mxc-ehci.1", "usb", &usbotg_clk),
+ CLKDEV_INIT("mxc-ehci.2", "usb", &usbotg_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb", &usbotg_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", &usbahb_clk),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &wdog_clk),
+ CLKDEV_INIT(NULL, "max", &max_clk),
+ CLKDEV_INIT(NULL, "audmux", &audmux_clk),
+ CLKDEV_INIT(NULL, "csi", &csi_clk),
+ CLKDEV_INIT(NULL, "iim", &iim_clk),
+ CLKDEV_INIT(NULL, "gpu2d", &gpu2d_clk),
+ CLKDEV_INIT("mxc_nand.0", NULL, &nfc_clk),
};
int __init mx35_clocks_init()
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index 1e02751..37034c2 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -1041,48 +1041,41 @@ struct clk *clk_get_parent(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_parent);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = (d), \
- .con_id = (n), \
- .clk = &(c), \
- },
-
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK(NULL, "osc_32KHz", osc_32KHz)
- _REGISTER_CLOCK(NULL, "osc_pll397", osc_pll397)
- _REGISTER_CLOCK(NULL, "osc_main", osc_main)
- _REGISTER_CLOCK(NULL, "sys_ck", clk_sys)
- _REGISTER_CLOCK(NULL, "arm_pll_ck", clk_armpll)
- _REGISTER_CLOCK(NULL, "ck_pll5", clk_usbpll)
- _REGISTER_CLOCK(NULL, "hclk_ck", clk_hclk)
- _REGISTER_CLOCK(NULL, "pclk_ck", clk_pclk)
- _REGISTER_CLOCK(NULL, "timer0_ck", clk_timer0)
- _REGISTER_CLOCK(NULL, "timer1_ck", clk_timer1)
- _REGISTER_CLOCK(NULL, "timer2_ck", clk_timer2)
- _REGISTER_CLOCK(NULL, "timer3_ck", clk_timer3)
- _REGISTER_CLOCK(NULL, "vfp9_ck", clk_vfp9)
- _REGISTER_CLOCK(NULL, "clk_dmac", clk_dma)
- _REGISTER_CLOCK("pnx4008-watchdog", NULL, clk_wdt)
- _REGISTER_CLOCK(NULL, "uart3_ck", clk_uart3)
- _REGISTER_CLOCK(NULL, "uart4_ck", clk_uart4)
- _REGISTER_CLOCK(NULL, "uart5_ck", clk_uart5)
- _REGISTER_CLOCK(NULL, "uart6_ck", clk_uart6)
- _REGISTER_CLOCK("pnx-i2c.0", NULL, clk_i2c0)
- _REGISTER_CLOCK("pnx-i2c.1", NULL, clk_i2c1)
- _REGISTER_CLOCK("pnx-i2c.2", NULL, clk_i2c2)
- _REGISTER_CLOCK("dev:ssp0", NULL, clk_ssp0)
- _REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
- _REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
- _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
- _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)
- _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)
- _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
- _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc)
- _REGISTER_CLOCK("lpc-net.0", NULL, clk_net)
- _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
- _REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
- _REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)
+ CLKDEV_INIT(NULL, "osc_32KHz", &osc_32KHz),
+ CLKDEV_INIT(NULL, "osc_pll397", &osc_pll397),
+ CLKDEV_INIT(NULL, "osc_main", &osc_main),
+ CLKDEV_INIT(NULL, "sys_ck", &clk_sys),
+ CLKDEV_INIT(NULL, "arm_pll_ck", &clk_armpll),
+ CLKDEV_INIT(NULL, "ck_pll5", &clk_usbpll),
+ CLKDEV_INIT(NULL, "hclk_ck", &clk_hclk),
+ CLKDEV_INIT(NULL, "pclk_ck", &clk_pclk),
+ CLKDEV_INIT(NULL, "timer0_ck", &clk_timer0),
+ CLKDEV_INIT(NULL, "timer1_ck", &clk_timer1),
+ CLKDEV_INIT(NULL, "timer2_ck", &clk_timer2),
+ CLKDEV_INIT(NULL, "timer3_ck", &clk_timer3),
+ CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),
+ CLKDEV_INIT(NULL, "clk_dmac", &clk_dma),
+ CLKDEV_INIT("pnx4008-watchdog", NULL, &clk_wdt),
+ CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
+ CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
+ CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),
+ CLKDEV_INIT(NULL, "uart6_ck", &clk_uart6),
+ CLKDEV_INIT("pnx-i2c.0", NULL, &clk_i2c0),
+ CLKDEV_INIT("pnx-i2c.1", NULL, &clk_i2c1),
+ CLKDEV_INIT("pnx-i2c.2", NULL, &clk_i2c2),
+ CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0),
+ CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1),
+ CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan),
+ CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand),
+ CLKDEV_INIT("tbd", "i2s0_ck", &clk_i2s0),
+ CLKDEV_INIT("tbd", "i2s1_ck", &clk_i2s1),
+ CLKDEV_INIT("ts-lpc32xx", NULL, &clk_tsc),
+ CLKDEV_INIT("dev:mmc0", "MCLK", &clk_mmc),
+ CLKDEV_INIT("lpc-net.0", NULL, &clk_net),
+ CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),
+ CLKDEV_INIT("lpc32xx_udc", "ck_usbd", &clk_usbd),
+ CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),
};
static int __init clk_init(void)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 2b9bd1f..d198515 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1422,97 +1422,90 @@ DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG0_OFFSET,
NULL, NULL, &ipg_clk, &spba_clk);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup mx51_lookups[] = {
/* i.mx51 has the i.mx21 type uart */
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
- _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart1_clk),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart2_clk),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart3_clk),
+ CLKDEV_INIT(NULL, "gpt", &gpt_clk),
/* i.mx51 has the i.mx27 type fec */
- _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
- _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
- _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
- _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
- _REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_ahb_clk)
- _REGISTER_CLOCK("mxc-ehci.0", "usb_phy1", usb_phy1_clk)
- _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk)
- _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_ahb_clk)
- _REGISTER_CLOCK("mxc-ehci.2", "usb", usboh3_clk)
- _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_ahb_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk)
- _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk)
- _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
- _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)
- _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
- _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
- _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
+ CLKDEV_INIT("imx27-fec.0", NULL, &fec_clk),
+ CLKDEV_INIT("mxc_pwm.0", "pwm", &pwm1_clk),
+ CLKDEV_INIT("mxc_pwm.1", "pwm", &pwm2_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c1_clk),
+ CLKDEV_INIT("imx-i2c.1", NULL, &i2c2_clk),
+ CLKDEV_INIT("imx-i2c.2", NULL, &hsi2c_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb", &usboh3_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb_ahb", &usb_ahb_clk),
+ CLKDEV_INIT("mxc-ehci.0", "usb_phy1", &usb_phy1_clk),
+ CLKDEV_INIT("mxc-ehci.1", "usb", &usboh3_clk),
+ CLKDEV_INIT("mxc-ehci.1", "usb_ahb", &usb_ahb_clk),
+ CLKDEV_INIT("mxc-ehci.2", "usb", &usboh3_clk),
+ CLKDEV_INIT("mxc-ehci.2", "usb_ahb", &usb_ahb_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb", &usboh3_clk),
+ CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", &ahb_clk),
+ CLKDEV_INIT("imx-keypad", NULL, &dummy_clk),
+ CLKDEV_INIT("mxc_nand", NULL, &nfc_clk),
+ CLKDEV_INIT("imx-ssi.0", NULL, &ssi1_clk),
+ CLKDEV_INIT("imx-ssi.1", NULL, &ssi2_clk),
+ CLKDEV_INIT("imx-ssi.2", NULL, &ssi3_clk),
/* i.mx51 has the i.mx35 type sdma */
- _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
- _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
- _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
- _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)
- _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)
- _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)
+ CLKDEV_INIT("imx35-sdma", NULL, &sdma_clk),
+ CLKDEV_INIT(NULL, "ckih", &ckih_clk),
+ CLKDEV_INIT(NULL, "ckih2", &ckih2_clk),
+ CLKDEV_INIT(NULL, "gpt_32k", &gpt_32k_clk),
+ CLKDEV_INIT("imx51-ecspi.0", NULL, &ecspi1_clk),
+ CLKDEV_INIT("imx51-ecspi.1", NULL, &ecspi2_clk),
/* i.mx51 has the i.mx35 type cspi */
- _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx51.0", NULL, esdhc1_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx51.1", NULL, esdhc2_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx51.2", NULL, esdhc3_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx51.3", NULL, esdhc4_clk)
- _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk)
- _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
- _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
- _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
- _REGISTER_CLOCK(NULL, "mipi_hsp", mipi_hsp_clk)
- _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
- _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
- _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
- _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
- _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
+ CLKDEV_INIT("imx35-cspi.0", NULL, &cspi_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx51.0", NULL, &esdhc1_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx51.1", NULL, &esdhc2_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx51.2", NULL, &esdhc3_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx51.3", NULL, &esdhc4_clk),
+ CLKDEV_INIT(NULL, "cpu_clk", &cpu_clk),
+ CLKDEV_INIT(NULL, "iim_clk", &iim_clk),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &dummy_clk),
+ CLKDEV_INIT("imx2-wdt.1", NULL, &dummy_clk),
+ CLKDEV_INIT(NULL, "mipi_hsp", &mipi_hsp_clk),
+ CLKDEV_INIT("imx-ipuv3", NULL, &ipu_clk),
+ CLKDEV_INIT("imx-ipuv3", "di0", &ipu_di0_clk),
+ CLKDEV_INIT("imx-ipuv3", "di1", &ipu_di1_clk),
+ CLKDEV_INIT(NULL, "gpc_dvfs", &gpc_dvfs_clk),
+ CLKDEV_INIT("pata_imx", NULL, &pata_clk),
};
static struct clk_lookup mx53_lookups[] = {
/* i.mx53 has the i.mx21 type uart */
- _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
- _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
- _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
- _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
- _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
- _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
+ CLKDEV_INIT("imx21-uart.0", NULL, &uart1_clk),
+ CLKDEV_INIT("imx21-uart.1", NULL, &uart2_clk),
+ CLKDEV_INIT("imx21-uart.2", NULL, &uart3_clk),
+ CLKDEV_INIT("imx21-uart.3", NULL, &uart4_clk),
+ CLKDEV_INIT("imx21-uart.4", NULL, &uart5_clk),
+ CLKDEV_INIT(NULL, "gpt", &gpt_clk),
/* i.mx53 has the i.mx25 type fec */
- _REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)
- _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
- _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
- _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
- _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk)
+ CLKDEV_INIT("imx25-fec.0", NULL, &fec_clk),
+ CLKDEV_INIT(NULL, "iim_clk", &iim_clk),
+ CLKDEV_INIT("imx-i2c.0", NULL, &i2c1_clk),
+ CLKDEV_INIT("imx-i2c.1", NULL, &i2c2_clk),
+ CLKDEV_INIT("imx-i2c.2", NULL, &i2c3_mx53_clk),
/* i.mx53 has the i.mx51 type ecspi */
- _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)
- _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)
+ CLKDEV_INIT("imx51-ecspi.0", NULL, &ecspi1_clk),
+ CLKDEV_INIT("imx51-ecspi.1", NULL, &ecspi2_clk),
/* i.mx53 has the i.mx25 type cspi */
- _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx53.0", NULL, esdhc1_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx53.1", NULL, esdhc2_mx53_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx53.2", NULL, esdhc3_mx53_clk)
- _REGISTER_CLOCK("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk)
- _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
- _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
+ CLKDEV_INIT("imx35-cspi.0", NULL, &cspi_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx53.0", NULL, &esdhc1_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx53.1", NULL, &esdhc2_mx53_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx53.2", NULL, &esdhc3_mx53_clk),
+ CLKDEV_INIT("sdhci-esdhc-imx53.3", NULL, &esdhc4_mx53_clk),
+ CLKDEV_INIT("imx2-wdt.0", NULL, &dummy_clk),
+ CLKDEV_INIT("imx2-wdt.1", NULL, &dummy_clk),
/* i.mx53 has the i.mx35 type sdma */
- _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
- _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
- _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
- _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
- _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
- _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
+ CLKDEV_INIT("imx35-sdma", NULL, &sdma_clk),
+ CLKDEV_INIT("imx-ssi.0", NULL, &ssi1_clk),
+ CLKDEV_INIT("imx-ssi.1", NULL, &ssi2_clk),
+ CLKDEV_INIT("imx-ssi.2", NULL, &ssi3_clk),
+ CLKDEV_INIT("imx-keypad", NULL, &dummy_clk),
+ CLKDEV_INIT("pata_imx", NULL, &pata_clk),
};
static void clk_tree_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index 0163b6d..7714dc2 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -430,32 +430,25 @@ _DEFINE_CLOCK(audio_clk, XTAL, FILT_CLK24M_GATE, &ref_xtal_clk);
_DEFINE_CLOCK(pwm_clk, XTAL, PWM_CLK24M_GATE, &ref_xtal_clk);
_DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &ref_xtal_clk);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
/* for amba bus driver */
- _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)
+ CLKDEV_INIT("duart", "apb_pclk", &xbus_clk),
/* for amba-pl011 driver */
- _REGISTER_CLOCK("duart", NULL, uart_clk)
- _REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)
- _REGISTER_CLOCK("rtc", NULL, rtc_clk)
- _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
- _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
- _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp_clk)
- _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp_clk)
- _REGISTER_CLOCK(NULL, "usb", usb_clk)
- _REGISTER_CLOCK(NULL, "audio", audio_clk)
- _REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)
- _REGISTER_CLOCK("imx23-fb", NULL, lcdif_clk)
+ CLKDEV_INIT("duart", NULL, &uart_clk),
+ CLKDEV_INIT("mxs-auart.0", NULL, &uart_clk),
+ CLKDEV_INIT("rtc", NULL, &rtc_clk),
+ CLKDEV_INIT("mxs-dma-apbh", NULL, &hbus_clk),
+ CLKDEV_INIT("mxs-dma-apbx", NULL, &xbus_clk),
+ CLKDEV_INIT("mxs-mmc.0", NULL, &ssp_clk),
+ CLKDEV_INIT("mxs-mmc.1", NULL, &ssp_clk),
+ CLKDEV_INIT(NULL, "usb", &usb_clk),
+ CLKDEV_INIT(NULL, "audio", &audio_clk),
+ CLKDEV_INIT("mxs-pwm.0", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.1", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.2", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.3", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.4", NULL, &pwm_clk),
+ CLKDEV_INIT("imx23-fb", NULL, &lcdif_clk),
};
static int clk_misc_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 7b28c2a..1c5c929 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -604,48 +604,41 @@ _DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &ref_xtal_clk);
_DEFINE_CLOCK(spdif_clk, SPDIF, CLKGATE, &pll0_clk);
_DEFINE_CLOCK(fec_clk, ENET, DISABLE, &hbus_clk);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
/* for amba bus driver */
- _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)
+ CLKDEV_INIT("duart", "apb_pclk", &xbus_clk),
/* for amba-pl011 driver */
- _REGISTER_CLOCK("duart", NULL, uart_clk)
- _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
- _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
- _REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)
- _REGISTER_CLOCK("mxs-auart.1", NULL, uart_clk)
- _REGISTER_CLOCK("mxs-auart.2", NULL, uart_clk)
- _REGISTER_CLOCK("mxs-auart.3", NULL, uart_clk)
- _REGISTER_CLOCK("mxs-auart.4", NULL, uart_clk)
- _REGISTER_CLOCK("rtc", NULL, rtc_clk)
- _REGISTER_CLOCK("pll2", NULL, pll2_clk)
- _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
- _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
- _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk)
- _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)
- _REGISTER_CLOCK("flexcan.0", NULL, can0_clk)
- _REGISTER_CLOCK("flexcan.1", NULL, can1_clk)
- _REGISTER_CLOCK(NULL, "usb0", usb0_clk)
- _REGISTER_CLOCK(NULL, "usb1", usb1_clk)
- _REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.5", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.6", NULL, pwm_clk)
- _REGISTER_CLOCK("mxs-pwm.7", NULL, pwm_clk)
- _REGISTER_CLOCK(NULL, "lradc", lradc_clk)
- _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
- _REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk)
- _REGISTER_CLOCK("mxs-saif.0", NULL, saif0_clk)
- _REGISTER_CLOCK("mxs-saif.1", NULL, saif1_clk)
+ CLKDEV_INIT("duart", NULL, &uart_clk),
+ CLKDEV_INIT("imx28-fec.0", NULL, &fec_clk),
+ CLKDEV_INIT("imx28-fec.1", NULL, &fec_clk),
+ CLKDEV_INIT("mxs-auart.0", NULL, &uart_clk),
+ CLKDEV_INIT("mxs-auart.1", NULL, &uart_clk),
+ CLKDEV_INIT("mxs-auart.2", NULL, &uart_clk),
+ CLKDEV_INIT("mxs-auart.3", NULL, &uart_clk),
+ CLKDEV_INIT("mxs-auart.4", NULL, &uart_clk),
+ CLKDEV_INIT("rtc", NULL, &rtc_clk),
+ CLKDEV_INIT("pll2", NULL, &pll2_clk),
+ CLKDEV_INIT("mxs-dma-apbh", NULL, &hbus_clk),
+ CLKDEV_INIT("mxs-dma-apbx", NULL, &xbus_clk),
+ CLKDEV_INIT("mxs-mmc.0", NULL, &ssp0_clk),
+ CLKDEV_INIT("mxs-mmc.1", NULL, &ssp1_clk),
+ CLKDEV_INIT("flexcan.0", NULL, &can0_clk),
+ CLKDEV_INIT("flexcan.1", NULL, &can1_clk),
+ CLKDEV_INIT(NULL, "usb0", &usb0_clk),
+ CLKDEV_INIT(NULL, "usb1", &usb1_clk),
+ CLKDEV_INIT("mxs-pwm.0", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.1", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.2", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.3", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.4", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.5", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.6", NULL, &pwm_clk),
+ CLKDEV_INIT("mxs-pwm.7", NULL, &pwm_clk),
+ CLKDEV_INIT(NULL, "lradc", &lradc_clk),
+ CLKDEV_INIT(NULL, "spdif", &spdif_clk),
+ CLKDEV_INIT("imx28-fb", NULL, &lcdif_clk),
+ CLKDEV_INIT("mxs-saif.0", NULL, &saif0_clk),
+ CLKDEV_INIT("mxs-saif.1", NULL, &saif1_clk),
};
static int clk_misc_init(void)
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
index e7cdae5..6b3dd06 100644
--- a/arch/arm/mach-tcc8k/clock.c
+++ b/arch/arm/mach-tcc8k/clock.c
@@ -468,64 +468,57 @@ DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = d, \
- .con_id = n, \
- .clk = &c, \
- },
-
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK(NULL, "bus", bus)
- _REGISTER_CLOCK(NULL, "cpu", cpu)
- _REGISTER_CLOCK(NULL, "tct", tct)
- _REGISTER_CLOCK(NULL, "tcx", tcx)
- _REGISTER_CLOCK(NULL, "tcz", tcz)
- _REGISTER_CLOCK(NULL, "ref", ref)
- _REGISTER_CLOCK(NULL, "dai0", dai0)
- _REGISTER_CLOCK(NULL, "pic", pic)
- _REGISTER_CLOCK(NULL, "tc", tc)
- _REGISTER_CLOCK(NULL, "gpio", gpio)
- _REGISTER_CLOCK(NULL, "usbd", usbd)
- _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
- _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
- _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
- _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
- _REGISTER_CLOCK(NULL, "ecc", ecc)
- _REGISTER_CLOCK(NULL, "adc", adc)
- _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
- _REGISTER_CLOCK(NULL, "gdma0", gdma0)
- _REGISTER_CLOCK(NULL, "lcd", lcd)
- _REGISTER_CLOCK(NULL, "rtc", rtc)
- _REGISTER_CLOCK(NULL, "nfc", nfc)
- _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
- _REGISTER_CLOCK(NULL, "g2d", g2d)
- _REGISTER_CLOCK(NULL, "gdma1", gdma1)
- _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
- _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
- _REGISTER_CLOCK(NULL, "mscl", mscl)
- _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
- _REGISTER_CLOCK(NULL, "bdma", bdma)
- _REGISTER_CLOCK(NULL, "adma0", adma0)
- _REGISTER_CLOCK(NULL, "spdif", spdif)
- _REGISTER_CLOCK(NULL, "scfg", scfg)
- _REGISTER_CLOCK(NULL, "cid", cid)
- _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
- _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
- _REGISTER_CLOCK(NULL, "dai1", dai1)
- _REGISTER_CLOCK(NULL, "adma1", adma1)
- _REGISTER_CLOCK(NULL, "c3dec", c3dec)
- _REGISTER_CLOCK("tcc-can.0", NULL, can0)
- _REGISTER_CLOCK("tcc-can.1", NULL, can1)
- _REGISTER_CLOCK(NULL, "gps", gps)
- _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
- _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
- _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
- _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
- _REGISTER_CLOCK(NULL, "gdma2", gdma2)
- _REGISTER_CLOCK(NULL, "gdma3", gdma3)
- _REGISTER_CLOCK(NULL, "ddrc", ddrc)
- _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
+ CLKDEV_INIT(NULL, "bus", &bus),
+ CLKDEV_INIT(NULL, "cpu", &cpu),
+ CLKDEV_INIT(NULL, "tct", &tct),
+ CLKDEV_INIT(NULL, "tcx", &tcx),
+ CLKDEV_INIT(NULL, "tcz", &tcz),
+ CLKDEV_INIT(NULL, "ref", &ref),
+ CLKDEV_INIT(NULL, "dai0", &dai0),
+ CLKDEV_INIT(NULL, "pic", &pic),
+ CLKDEV_INIT(NULL, "tc", &tc),
+ CLKDEV_INIT(NULL, "gpio", &gpio),
+ CLKDEV_INIT(NULL, "usbd", &usbd),
+ CLKDEV_INIT("tcc-uart.0", NULL, &uart0),
+ CLKDEV_INIT("tcc-uart.2", NULL, &uart2),
+ CLKDEV_INIT("tcc-i2c", NULL, &i2c),
+ CLKDEV_INIT("tcc-uart.3", NULL, &uart3),
+ CLKDEV_INIT(NULL, "ecc", &ecc),
+ CLKDEV_INIT(NULL, "adc", &adc),
+ CLKDEV_INIT("tcc-usbh.0", "usb", &usbh0),
+ CLKDEV_INIT(NULL, "gdma0", &gdma0),
+ CLKDEV_INIT(NULL, "lcd", &lcd),
+ CLKDEV_INIT(NULL, "rtc", &rtc),
+ CLKDEV_INIT(NULL, "nfc", &nfc),
+ CLKDEV_INIT("tcc-mmc.0", NULL, &sd0),
+ CLKDEV_INIT(NULL, "g2d", &g2d),
+ CLKDEV_INIT(NULL, "gdma1", &gdma1),
+ CLKDEV_INIT("tcc-uart.1", NULL, &uart1),
+ CLKDEV_INIT("tcc-spi.0", NULL, &spi0),
+ CLKDEV_INIT(NULL, "mscl", &mscl),
+ CLKDEV_INIT("tcc-spi.1", NULL, &spi1),
+ CLKDEV_INIT(NULL, "bdma", &bdma),
+ CLKDEV_INIT(NULL, "adma0", &adma0),
+ CLKDEV_INIT(NULL, "spdif", &spdif),
+ CLKDEV_INIT(NULL, "scfg", &scfg),
+ CLKDEV_INIT(NULL, "cid", &cid),
+ CLKDEV_INIT("tcc-mmc.1", NULL, &sd1),
+ CLKDEV_INIT("tcc-uart.4", NULL, &uart4),
+ CLKDEV_INIT(NULL, "dai1", &dai1),
+ CLKDEV_INIT(NULL, "adma1", &adma1),
+ CLKDEV_INIT(NULL, "c3dec", &c3dec),
+ CLKDEV_INIT("tcc-can.0", NULL, &can0),
+ CLKDEV_INIT("tcc-can.1", NULL, &can1),
+ CLKDEV_INIT(NULL, "gps", &gps),
+ CLKDEV_INIT("tcc-gsb.0", NULL, &gsb0),
+ CLKDEV_INIT("tcc-gsb.1", NULL, &gsb1),
+ CLKDEV_INIT("tcc-gsb.2", NULL, &gsb2),
+ CLKDEV_INIT("tcc-gsb.3", NULL, &gsb3),
+ CLKDEV_INIT(NULL, "gdma2", &gdma2),
+ CLKDEV_INIT(NULL, "gdma3", &gdma3),
+ CLKDEV_INIT(NULL, "ddrc", &ddrc),
+ CLKDEV_INIT("tcc-usbh.1", "usb", &usbh1),
};
static struct clk *root_clk_by_index(enum root_clks src)
--
1.7.4.4
^ permalink raw reply related
* [PATCH v3 0/2] iommu/exynos: Add IOMMU and Enhance System MMU driver for Exynos4
From: Kukjin Kim @ 2011-10-07 9:56 UTC (permalink / raw)
To: linux-arm-kernel
Hi.
This is the third try of submitting patches about IOMMU/System MMU
Patch Summary:
[PATCH v3 1/2] ARM: EXYNOS4: Change System MMU device definition
[PATCH v3 2/2] iommu/exynos: Add iommu driver for Exynos Platforms
The first patche enhances System MMU platform device definition:
- Removed System MMU for MDMA0 in LCD block because it is not used.
Use MDMA2 in TOP block.
- Removed System MMU ID. Instead a System MMU is bound to a device that
the System MMU is dedicated during machin initialization. If a device
driver wants to handle System MMU, it must bind its device with System
MMU with sysmmu_set_owner().
- clkdev
The last patch implements IOMMU API:
- System MMU device driver is removed from arch/arm/plat-s5p to move it
to driver/iommu directory.
- Implements IOMMU API and System MMU driver that is moved from
arch/arm/plat-s5p.
- Implements fault handling that is suggested by Ohad.
- Used bus_set_iommu instead of register_iommu that is suggested by Joerg.
NOTE: the my git --compose has some problems so I'm sending without it.
Changes since v2:
- Add lock for System MMU private data.
And fixes the following problems pointed by Joerg Rodel:
- Fix wrong argument to kmalloc() and get_free_pages()
- Merged patches into 2 due to bisectability
Changes since v1:
Fixes of the following problems pointed by Russell King.:
- Missing unlocking a spinlock in exynos_iommu_attach_dev().
- atomic_t -> int in sysmmu_drvdata.activations
- sysmmu_platdata -> sysmmu_drvdata
- Change in error messages in irq handler
- Removed casting in format of error message
- omap_iommu_ops -> exynos_iommu_ops in the last patch.
arch/arm/mach-exynos4/Kconfig | 2 -
arch/arm/mach-exynos4/clock.c | 43 +-
arch/arm/mach-exynos4/dev-sysmmu.c | 267 ++------
arch/arm/mach-exynos4/include/mach/irqs.h | 1 -
arch/arm/mach-exynos4/include/mach/map.h | 1 -
arch/arm/mach-exynos4/include/mach/sysmmu.h | 85 ++-
arch/arm/mach-exynos4/mach-armlex4210.c | 24 +-
arch/arm/mach-exynos4/mach-smdkv310.c | 28 +-
arch/arm/plat-s5p/Kconfig | 8 -
arch/arm/plat-s5p/Makefile | 1 -
arch/arm/plat-s5p/include/plat/sysmmu.h | 95 ---
arch/arm/plat-s5p/sysmmu.c | 312 ---------
drivers/iommu/Kconfig | 14 +
drivers/iommu/Makefile | 1 +
drivers/iommu/exynos_iommu.c | 963
+++++++++++++++++++++++++++
15 files changed, 1161 insertions(+), 684 deletions(-)
^ permalink raw reply
* [PATCH v3 1/2] ARM: EXYNOS4: Change System MMU device definition
From: Kukjin Kim @ 2011-10-07 9:56 UTC (permalink / raw)
To: linux-arm-kernel
From: KyongHo Cho <pullip.cho@samsung.com>
This patch contains a lot of changes of System MMU device definition.
1. Removed sysmmu_ips enumeration that are definitions of ID of System MMU
Instead, a System MMU device descriptor must be bound with a device
descriptor that needs System MMU in machine initialization.
2. Removed MDMA that is included in LCD0 block because it is not used
anymore. Use MDMA in TOP block.
3. Changed System MMU definitions of platform device. It is not an array
anymore.
Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-exynos4/Kconfig | 2 -
arch/arm/mach-exynos4/clock.c | 43 +++--
arch/arm/mach-exynos4/dev-sysmmu.c | 267
++++++---------------------
arch/arm/mach-exynos4/include/mach/irqs.h | 1 -
arch/arm/mach-exynos4/include/mach/map.h | 1 -
arch/arm/mach-exynos4/include/mach/sysmmu.h | 85 +++++----
arch/arm/mach-exynos4/mach-armlex4210.c | 24 +++-
arch/arm/mach-exynos4/mach-smdkv310.c | 28 +++-
8 files changed, 183 insertions(+), 268 deletions(-)
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index dd660eb..2f4a032 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -157,7 +157,6 @@ config MACH_SMDKV310
select SAMSUNG_DEV_KEYPAD
select EXYNOS4_DEV_PD
select SAMSUNG_DEV_PWM
- select EXYNOS4_DEV_SYSMMU
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_KEYPAD
@@ -175,7 +174,6 @@ config MACH_ARMLEX4210
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
select EXYNOS4_DEV_AHCI
- select EXYNOS4_DEV_SYSMMU
select EXYNOS4_SETUP_SDHCI
help
Machine support for Samsung ARMLEX4210 based on EXYNOS4210
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index db61691..1fc508c 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -691,59 +691,68 @@ static struct clk init_clocks_off[] = {
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 14),
}, {
- .name = "SYSMMU_MDMA",
- .enable = exynos4_clk_ip_image_ctrl,
- .ctrlbit = (1 << 5),
- }, {
- .name = "SYSMMU_FIMC0",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(fimc0, 1),
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 7),
}, {
- .name = "SYSMMU_FIMC1",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(fimc1, 2),
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 8),
}, {
- .name = "SYSMMU_FIMC2",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(fimc2, 3),
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 9),
}, {
- .name = "SYSMMU_FIMC3",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(fimc3, 4),
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 10),
}, {
- .name = "SYSMMU_JPEG",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(jpeg, 5),
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 11),
}, {
- .name = "SYSMMU_FIMD0",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(fimd0, 6),
.enable = exynos4_clk_ip_lcd0_ctrl,
.ctrlbit = (1 << 4),
}, {
- .name = "SYSMMU_FIMD1",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(fimd1, 7),
.enable = exynos4_clk_ip_lcd1_ctrl,
.ctrlbit = (1 << 4),
}, {
- .name = "SYSMMU_PCIe",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(pcie, 8),
.enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 18),
}, {
- .name = "SYSMMU_G2D",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(g2d, 9),
.enable = exynos4_clk_ip_image_ctrl,
.ctrlbit = (1 << 3),
}, {
- .name = "SYSMMU_ROTATOR",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(rot, 10),
.enable = exynos4_clk_ip_image_ctrl,
.ctrlbit = (1 << 4),
}, {
- .name = "SYSMMU_TV",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(tv, 12),
.enable = exynos4_clk_ip_tv_ctrl,
.ctrlbit = (1 << 4),
}, {
- .name = "SYSMMU_MFC_L",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(mfc_l, 13),
.enable = exynos4_clk_ip_mfc_ctrl,
.ctrlbit = (1 << 1),
}, {
- .name = "SYSMMU_MFC_R",
+ .name = "sysmmu",
+ .devname = SYSMMU_CLOCK_NAME(mfc_r, 14),
.enable = exynos4_clk_ip_mfc_ctrl,
.ctrlbit = (1 << 2),
}
diff --git a/arch/arm/mach-exynos4/dev-sysmmu.c
b/arch/arm/mach-exynos4/dev-sysmmu.c
index 3b7cae0..a62b172 100644
--- a/arch/arm/mach-exynos4/dev-sysmmu.c
+++ b/arch/arm/mach-exynos4/dev-sysmmu.c
@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-exynos4/dev-sysmmu.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* EXYNOS4 - System MMU support
@@ -16,217 +16,64 @@
#include <mach/map.h>
#include <mach/irqs.h>
#include <mach/sysmmu.h>
-#include <plat/s5p-clock.h>
-/* These names must be equal to the clock names in mach-exynos4/clock.c */
-const char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM] = {
- "SYSMMU_MDMA" ,
- "SYSMMU_SSS" ,
- "SYSMMU_FIMC0" ,
- "SYSMMU_FIMC1" ,
- "SYSMMU_FIMC2" ,
- "SYSMMU_FIMC3" ,
- "SYSMMU_JPEG" ,
- "SYSMMU_FIMD0" ,
- "SYSMMU_FIMD1" ,
- "SYSMMU_PCIe" ,
- "SYSMMU_G2D" ,
- "SYSMMU_ROTATOR",
- "SYSMMU_MDMA2" ,
- "SYSMMU_TV" ,
- "SYSMMU_MFC_L" ,
- "SYSMMU_MFC_R" ,
-};
-
-static struct resource exynos4_sysmmu_resource[] = {
- [0] = {
- .start = EXYNOS4_PA_SYSMMU_MDMA,
- .end = EXYNOS4_PA_SYSMMU_MDMA + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_SYSMMU_MDMA0_0,
- .end = IRQ_SYSMMU_MDMA0_0,
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- .start = EXYNOS4_PA_SYSMMU_SSS,
- .end = EXYNOS4_PA_SYSMMU_SSS + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [3] = {
- .start = IRQ_SYSMMU_SSS_0,
- .end = IRQ_SYSMMU_SSS_0,
- .flags = IORESOURCE_IRQ,
- },
- [4] = {
- .start = EXYNOS4_PA_SYSMMU_FIMC0,
- .end = EXYNOS4_PA_SYSMMU_FIMC0 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [5] = {
- .start = IRQ_SYSMMU_FIMC0_0,
- .end = IRQ_SYSMMU_FIMC0_0,
- .flags = IORESOURCE_IRQ,
- },
- [6] = {
- .start = EXYNOS4_PA_SYSMMU_FIMC1,
- .end = EXYNOS4_PA_SYSMMU_FIMC1 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [7] = {
- .start = IRQ_SYSMMU_FIMC1_0,
- .end = IRQ_SYSMMU_FIMC1_0,
- .flags = IORESOURCE_IRQ,
- },
- [8] = {
- .start = EXYNOS4_PA_SYSMMU_FIMC2,
- .end = EXYNOS4_PA_SYSMMU_FIMC2 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [9] = {
- .start = IRQ_SYSMMU_FIMC2_0,
- .end = IRQ_SYSMMU_FIMC2_0,
- .flags = IORESOURCE_IRQ,
- },
- [10] = {
- .start = EXYNOS4_PA_SYSMMU_FIMC3,
- .end = EXYNOS4_PA_SYSMMU_FIMC3 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [11] = {
- .start = IRQ_SYSMMU_FIMC3_0,
- .end = IRQ_SYSMMU_FIMC3_0,
- .flags = IORESOURCE_IRQ,
- },
- [12] = {
- .start = EXYNOS4_PA_SYSMMU_JPEG,
- .end = EXYNOS4_PA_SYSMMU_JPEG + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [13] = {
- .start = IRQ_SYSMMU_JPEG_0,
- .end = IRQ_SYSMMU_JPEG_0,
- .flags = IORESOURCE_IRQ,
- },
- [14] = {
- .start = EXYNOS4_PA_SYSMMU_FIMD0,
- .end = EXYNOS4_PA_SYSMMU_FIMD0 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [15] = {
- .start = IRQ_SYSMMU_LCD0_M0_0,
- .end = IRQ_SYSMMU_LCD0_M0_0,
- .flags = IORESOURCE_IRQ,
- },
- [16] = {
- .start = EXYNOS4_PA_SYSMMU_FIMD1,
- .end = EXYNOS4_PA_SYSMMU_FIMD1 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [17] = {
- .start = IRQ_SYSMMU_LCD1_M1_0,
- .end = IRQ_SYSMMU_LCD1_M1_0,
- .flags = IORESOURCE_IRQ,
- },
- [18] = {
- .start = EXYNOS4_PA_SYSMMU_PCIe,
- .end = EXYNOS4_PA_SYSMMU_PCIe + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [19] = {
- .start = IRQ_SYSMMU_PCIE_0,
- .end = IRQ_SYSMMU_PCIE_0,
- .flags = IORESOURCE_IRQ,
- },
- [20] = {
- .start = EXYNOS4_PA_SYSMMU_G2D,
- .end = EXYNOS4_PA_SYSMMU_G2D + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [21] = {
- .start = IRQ_SYSMMU_2D_0,
- .end = IRQ_SYSMMU_2D_0,
- .flags = IORESOURCE_IRQ,
- },
- [22] = {
- .start = EXYNOS4_PA_SYSMMU_ROTATOR,
- .end = EXYNOS4_PA_SYSMMU_ROTATOR + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [23] = {
- .start = IRQ_SYSMMU_ROTATOR_0,
- .end = IRQ_SYSMMU_ROTATOR_0,
- .flags = IORESOURCE_IRQ,
- },
- [24] = {
- .start = EXYNOS4_PA_SYSMMU_MDMA2,
- .end = EXYNOS4_PA_SYSMMU_MDMA2 + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [25] = {
- .start = IRQ_SYSMMU_MDMA1_0,
- .end = IRQ_SYSMMU_MDMA1_0,
- .flags = IORESOURCE_IRQ,
- },
- [26] = {
- .start = EXYNOS4_PA_SYSMMU_TV,
- .end = EXYNOS4_PA_SYSMMU_TV + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [27] = {
- .start = IRQ_SYSMMU_TV_M0_0,
- .end = IRQ_SYSMMU_TV_M0_0,
- .flags = IORESOURCE_IRQ,
- },
- [28] = {
- .start = EXYNOS4_PA_SYSMMU_MFC_L,
- .end = EXYNOS4_PA_SYSMMU_MFC_L + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [29] = {
- .start = IRQ_SYSMMU_MFC_M0_0,
- .end = IRQ_SYSMMU_MFC_M0_0,
- .flags = IORESOURCE_IRQ,
- },
- [30] = {
- .start = EXYNOS4_PA_SYSMMU_MFC_R,
- .end = EXYNOS4_PA_SYSMMU_MFC_R + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [31] = {
- .start = IRQ_SYSMMU_MFC_M1_0,
- .end = IRQ_SYSMMU_MFC_M1_0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device exynos4_device_sysmmu = {
- .name = "s5p-sysmmu",
- .id = 32,
- .num_resources = ARRAY_SIZE(exynos4_sysmmu_resource),
- .resource = exynos4_sysmmu_resource,
-};
-EXPORT_SYMBOL(exynos4_device_sysmmu);
-
-static struct clk *sysmmu_clk[S5P_SYSMMU_TOTAL_IPNUM];
-void sysmmu_clk_init(struct device *dev, sysmmu_ips ips)
-{
- sysmmu_clk[ips] = clk_get(dev, sysmmu_ips_name[ips]);
- if (IS_ERR(sysmmu_clk[ips]))
- sysmmu_clk[ips] = NULL;
- else
- clk_put(sysmmu_clk[ips]);
+#define SYSMMU_RESOURCE(ipname, base, irq) \
+static struct resource sysmmu_resource_##ipname[] =\
+{\
+ {\
+ .start = EXYNOS4_PA_SYSMMU_##base,\
+ .end = EXYNOS4_PA_SYSMMU_##base + SZ_4K - 1,\
+ .flags = IORESOURCE_MEM,\
+ }, {\
+ .start = IRQ_SYSMMU_##irq##_0,\
+ .end = IRQ_SYSMMU_##irq##_0,\
+ .flags = IORESOURCE_IRQ,\
+ },\
}
-void sysmmu_clk_enable(sysmmu_ips ips)
-{
- if (sysmmu_clk[ips])
- clk_enable(sysmmu_clk[ips]);
+#define SYSMMU_PLATFORM_DEVICE(ipname, devid) \
+struct platform_device SYSMMU_PLATDEV(ipname) =\
+{\
+ .name = SYSMMU_DEVNAME_BASE,\
+ .id = devid,\
+ .num_resources = ARRAY_SIZE(sysmmu_resource_##ipname),\
+ .resource = sysmmu_resource_##ipname,\
+ .dev = {\
+ .dma_mask = &exynos_sysmmu_dma_mask,\
+ .coherent_dma_mask = DMA_BIT_MASK(32),\
+ },\
}
-void sysmmu_clk_disable(sysmmu_ips ips)
-{
- if (sysmmu_clk[ips])
- clk_disable(sysmmu_clk[ips]);
-}
+static u64 exynos_sysmmu_dma_mask = DMA_BIT_MASK(32);
+
+SYSMMU_RESOURCE(sss, SSS, SSS);
+SYSMMU_RESOURCE(fimc0, FIMC0, FIMC0);
+SYSMMU_RESOURCE(fimc1, FIMC1, FIMC1);
+SYSMMU_RESOURCE(fimc2, FIMC2, FIMC2);
+SYSMMU_RESOURCE(fimc3, FIMC3, FIMC3);
+SYSMMU_RESOURCE(jpeg, JPEG, JPEG);
+SYSMMU_RESOURCE(fimd0, FIMD0, LCD0_M0);
+SYSMMU_RESOURCE(fimd1, FIMD1, LCD1_M1);
+SYSMMU_RESOURCE(pcie, PCIe, PCIE);
+SYSMMU_RESOURCE(g2d, G2D, 2D);
+SYSMMU_RESOURCE(rot, ROTATOR, ROTATOR);
+SYSMMU_RESOURCE(mdma, MDMA2, MDMA1);
+SYSMMU_RESOURCE(tv, TV, TV_M0);
+SYSMMU_RESOURCE(mfc_l, MFC_L, MFC_M0);
+SYSMMU_RESOURCE(mfc_r, MFC_R, MFC_M1);
+
+SYSMMU_PLATFORM_DEVICE(sss, 0);
+SYSMMU_PLATFORM_DEVICE(fimc0, 1);
+SYSMMU_PLATFORM_DEVICE(fimc1, 2);
+SYSMMU_PLATFORM_DEVICE(fimc2, 3);
+SYSMMU_PLATFORM_DEVICE(fimc3, 4);
+SYSMMU_PLATFORM_DEVICE(jpeg, 5);
+SYSMMU_PLATFORM_DEVICE(fimd0, 6);
+SYSMMU_PLATFORM_DEVICE(fimd1, 7);
+SYSMMU_PLATFORM_DEVICE(pcie, 8);
+SYSMMU_PLATFORM_DEVICE(g2d, 9);
+SYSMMU_PLATFORM_DEVICE(rot, 10);
+SYSMMU_PLATFORM_DEVICE(mdma, 11);
+SYSMMU_PLATFORM_DEVICE(tv, 12);
+SYSMMU_PLATFORM_DEVICE(mfc_l, 13);
+SYSMMU_PLATFORM_DEVICE(mfc_r, 14);
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h
b/arch/arm/mach-exynos4/include/mach/irqs.h
index dfd4b7e..a33fdd1 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -125,7 +125,6 @@
#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y)
-#define IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
#define IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
#define IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
#define IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3)
diff --git a/arch/arm/mach-exynos4/include/mach/map.h
b/arch/arm/mach-exynos4/include/mach/map.h
index 918a979..aaf492c 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -71,7 +71,6 @@
#define EXYNOS4_PA_PDMA0 0x12680000
#define EXYNOS4_PA_PDMA1 0x12690000
-#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
#define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000
#define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000
diff --git a/arch/arm/mach-exynos4/include/mach/sysmmu.h
b/arch/arm/mach-exynos4/include/mach/sysmmu.h
index 6a5fbb5..1811c20 100644
--- a/arch/arm/mach-exynos4/include/mach/sysmmu.h
+++ b/arch/arm/mach-exynos4/include/mach/sysmmu.h
@@ -3,44 +3,59 @@
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * Samsung sysmmu driver for EXYNOS4
+ * Exynos - System MMU Support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __ASM_ARM_ARCH_SYSMMU_H
-#define __ASM_ARM_ARCH_SYSMMU_H __FILE__
-
-enum exynos4_sysmmu_ips {
- SYSMMU_MDMA,
- SYSMMU_SSS,
- SYSMMU_FIMC0,
- SYSMMU_FIMC1,
- SYSMMU_FIMC2,
- SYSMMU_FIMC3,
- SYSMMU_JPEG,
- SYSMMU_FIMD0,
- SYSMMU_FIMD1,
- SYSMMU_PCIe,
- SYSMMU_G2D,
- SYSMMU_ROTATOR,
- SYSMMU_MDMA2,
- SYSMMU_TV,
- SYSMMU_MFC_L,
- SYSMMU_MFC_R,
- EXYNOS4_SYSMMU_TOTAL_IPNUM,
-};
-
-#define S5P_SYSMMU_TOTAL_IPNUM EXYNOS4_SYSMMU_TOTAL_IPNUM
-
-extern const char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM];
-
-typedef enum exynos4_sysmmu_ips sysmmu_ips;
-
-void sysmmu_clk_init(struct device *dev, sysmmu_ips ips);
-void sysmmu_clk_enable(sysmmu_ips ips);
-void sysmmu_clk_disable(sysmmu_ips ips);
-
-#endif /* __ASM_ARM_ARCH_SYSMMU_H */
+#ifndef _ARM_MACH_EXYNOS_SYSMMU_H_
+#define _ARM_MACH_EXYNOS_SYSMMU_H_
+
+#include <linux/device.h>
+
+#define SYSMMU_DEVNAME_BASE "s5p-sysmmu"
+#define SYSMMU_CLOCK_NAME(ipname, id) SYSMMU_DEVNAME_BASE "." #id
+
+#ifdef CONFIG_EXYNOS4_DEV_SYSMMU
+
+#define SYSMMU_PLATDEV(ipname) exynos_device_sysmmu_##ipname
+
+#ifdef CONFIG_EXYNOS4_DEV_PD
+#define ASSIGN_SYSMMU_POWERDOMAIN(ipname, powerdomain) \
+ SYSMMU_PLATDEV(mfc_l).dev.parent = powerdomain
+#else
+#define ASSIGN_SYSMMU_POWERDOMAIN(ipname, powerdomain) do { } while (0)
+#endif
+
+extern struct platform_device SYSMMU_PLATDEV(sss);
+extern struct platform_device SYSMMU_PLATDEV(fimc0);
+extern struct platform_device SYSMMU_PLATDEV(fimc1);
+extern struct platform_device SYSMMU_PLATDEV(fimc2);
+extern struct platform_device SYSMMU_PLATDEV(fimc3);
+extern struct platform_device SYSMMU_PLATDEV(jpeg);
+extern struct platform_device SYSMMU_PLATDEV(fimd0);
+extern struct platform_device SYSMMU_PLATDEV(fimd1);
+extern struct platform_device SYSMMU_PLATDEV(pcie);
+extern struct platform_device SYSMMU_PLATDEV(g2d);
+extern struct platform_device SYSMMU_PLATDEV(rot);
+extern struct platform_device SYSMMU_PLATDEV(mdma);
+extern struct platform_device SYSMMU_PLATDEV(tv);
+extern struct platform_device SYSMMU_PLATDEV(mfc_l);
+extern struct platform_device SYSMMU_PLATDEV(mfc_r);
+extern struct platform_device SYSMMU_PLATDEV(g2d_acp);
+
+static inline void sysmmu_set_owner(struct device *sysmmu, struct device
*owner)
+{
+ sysmmu->platform_data = owner;
+}
+
+#else /* CONFIG_EXYNOS4_DEV_SYSMMU */
+
+#define sysmmu_set_owner(sysmmu, owner) do { } while (0)
+#define ASSIGN_SYSMMU_POWERDOMAIN(ipname, powerdomain) do { } while (0)
+
+#endif /* CONFIG_EXYNOS4_DEV_SYSMMU */
+
+#endif /* _ARM_MACH_EXYNOS_SYSMMU_H_ */
diff --git a/arch/arm/mach-exynos4/mach-armlex4210.c
b/arch/arm/mach-exynos4/mach-armlex4210.c
index b482c62..d7d2ff5 100644
--- a/arch/arm/mach-exynos4/mach-armlex4210.c
+++ b/arch/arm/mach-exynos4/mach-armlex4210.c
@@ -155,7 +155,23 @@ static struct platform_device *armlex4210_devices[]
__initdata = {
&s3c_device_hsmmc3,
&s3c_device_rtc,
&s3c_device_wdt,
- &exynos4_device_sysmmu,
+#ifdef CONFIG_EXYNOS4_DEV_SYSMMU
+ &SYSMMU_PLATDEV(sss),
+ &SYSMMU_PLATDEV(fimc0),
+ &SYSMMU_PLATDEV(fimc1),
+ &SYSMMU_PLATDEV(fimc2),
+ &SYSMMU_PLATDEV(fimc3),
+ &SYSMMU_PLATDEV(jpeg),
+ &SYSMMU_PLATDEV(fimd0),
+ &SYSMMU_PLATDEV(fimd1),
+ &SYSMMU_PLATDEV(pcie),
+ &SYSMMU_PLATDEV(g2d),
+ &SYSMMU_PLATDEV(rot),
+ &SYSMMU_PLATDEV(mdma),
+ &SYSMMU_PLATDEV(tv),
+ &SYSMMU_PLATDEV(mfc_l),
+ &SYSMMU_PLATDEV(mfc_r),
+#endif
&samsung_asoc_dma,
&armlex4210_smsc911x,
&exynos4_device_ahci,
@@ -193,6 +209,10 @@ static void __init armlex4210_map_io(void)
ARRAY_SIZE(armlex4210_uartcfgs));
}
+static void __init sysmmu_init(void)
+{
+}
+
static void __init armlex4210_machine_init(void)
{
armlex4210_smsc911x_init();
@@ -201,6 +221,8 @@ static void __init armlex4210_machine_init(void)
armlex4210_wlan_init();
+ sysmmu_init();
+
platform_add_devices(armlex4210_devices,
ARRAY_SIZE(armlex4210_devices));
}
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c
b/arch/arm/mach-exynos4/mach-smdkv310.c
index cec2afa..341ee39 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -42,6 +42,7 @@
#include <plat/clock.h>
#include <mach/map.h>
+#include <mach/sysmmu.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -273,7 +274,23 @@ static struct platform_device *smdkv310_devices[]
__initdata = {
&exynos4_device_pd[PD_TV],
&exynos4_device_pd[PD_GPS],
&exynos4_device_spdif,
- &exynos4_device_sysmmu,
+#ifdef CONFIG_S5P_SYSTEM_MMU
+ &SYSMMU_PLATDEV(sss),
+ &SYSMMU_PLATDEV(fimc0),
+ &SYSMMU_PLATDEV(fimc1),
+ &SYSMMU_PLATDEV(fimc2),
+ &SYSMMU_PLATDEV(fimc3),
+ &SYSMMU_PLATDEV(jpeg),
+ &SYSMMU_PLATDEV(fimd0),
+ &SYSMMU_PLATDEV(fimd1),
+ &SYSMMU_PLATDEV(pcie),
+ &SYSMMU_PLATDEV(g2d),
+ &SYSMMU_PLATDEV(rot),
+ &SYSMMU_PLATDEV(mdma),
+ &SYSMMU_PLATDEV(tv),
+ &SYSMMU_PLATDEV(mfc_l),
+ &SYSMMU_PLATDEV(mfc_r),
+#endif
&samsung_asoc_dma,
&samsung_asoc_idma,
&s5p_device_fimd0,
@@ -342,6 +359,13 @@ static void __init smdkv310_reserve(void)
s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
}
+static void __init sysmmu_init(void)
+{
+ ASSIGN_SYSMMU_POWERDOMAIN(mfc, &exynos4_device_pd[PD_MFC].dev);
+ sysmmu_set_owner(&SYSMMU_PLATDEV(mfc_l).dev, &s5p_device_mfc.dev);
+ sysmmu_set_owner(&SYSMMU_PLATDEV(mfc_r).dev, &s5p_device_mfc.dev);
+}
+
static void __init smdkv310_machine_init(void)
{
s3c_i2c1_set_platdata(NULL);
@@ -365,6 +389,8 @@ static void __init smdkv310_machine_init(void)
smdkv310_ehci_init();
clk_xusbxti.rate = 24000000;
+ sysmmu_init();
+
platform_add_devices(smdkv310_devices,
ARRAY_SIZE(smdkv310_devices));
s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
}
--
1.7.1
^ permalink raw reply related
* [PATCH 08/26] ARM: pxa: move z2 to generic cpu_suspend
From: Arnd Bergmann @ 2011-10-07 9:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMPhdO-tz2HgBYQGOUW6hrA6fC=x+CQJ3dwbW_0AazFB=cjvbA@mail.gmail.com>
On Friday 07 October 2011, Eric Miao wrote:
> commit 3f7961cbd3428c8639d42d1a51870466e4cbb0eb
> Author: Eric Miao <eric.y.miao@gmail.com>
> Date: Sun Sep 11 17:19:11 2011 +0800
>
> ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available
>
> Cc: Vasily Khoruzhick <anarsoul@gmail.com>
> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
>
> diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
> index 6c9275a..6fa4e74 100644
> --- a/arch/arm/mach-pxa/z2.c
> +++ b/arch/arm/mach-pxa/z2.c
> @@ -679,6 +679,8 @@ static inline void z2_pmic_init(void) {}
> #endif
>
> #ifdef CONFIG_PM
> +extern void pxa27x_cpu_pm_enter(suspend_state_t state);
> +
> static void z2_power_off(void)
> {
> /* We're using deep sleep as poweroff, so clear PSPR to ensure that
You really shouldn't have an extern declaration in a .c file. Otherwise
looks good to me.
Arnd
^ permalink raw reply
* [PATCH v3 2/2] iommu/exynos: Add iommu driver for Exynos Platforms
From: Kukjin Kim @ 2011-10-07 9:56 UTC (permalink / raw)
To: linux-arm-kernel
From: KyongHo Cho <pullip.cho@samsung.com>
This is the System MMU driver and IOMMU API implementation for
Exynos SOC platforms. Exynos platforms has more than 10 System
MMUs dedicated for each multimedia accellerators.
The System MMU driver is already in arc/arm/plat-s5p but it is
moved to drivers/iommu due to Ohad Ben-Cohen gathered IOMMU drivers
there
This patch also includes fault handling feature in IOMMU driver
suggested by Ohad.
Users of IOMMU API can register its own fault handler with
iommu_set_fault_handler() and the handler is called by IRQ handler
of System MMU.
If no user installs fault handler, IOMMU driver prints debugging
message and generates kernel oops.
This IOMMU driver calls bus_set_iommu() instead of register_iommu()
since Joerg suggested that installing iommu_ops in bus_type.
Cc: Joerg Roedel <joerg.roedel@amd.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/plat-s5p/Kconfig | 14 -
arch/arm/plat-s5p/Makefile | 1 -
arch/arm/plat-s5p/sysmmu.c | 312 ---------
arch/arm/plat-samsung/include/plat/sysmmu.h | 95 ---
drivers/iommu/Kconfig | 14 +
drivers/iommu/Makefile | 1 +
drivers/iommu/exynos_iommu.c | 963
+++++++++++++++++++++++++++
7 files changed, 978 insertions(+), 422 deletions(-)
delete mode 100644 arch/arm/plat-s5p/sysmmu.c
delete mode 100644 arch/arm/plat-samsung/include/plat/sysmmu.h
create mode 100644 drivers/iommu/exynos_iommu.c
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 7b9dada..fa374cc 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -46,20 +46,6 @@ config S5P_PM
Common code for power management support on S5P and newer SoCs
Note: Do not select this for S5P6440 and S5P6450.
-comment "System MMU"
-
-config S5P_SYSTEM_MMU
- bool "S5P SYSTEM MMU"
- depends on ARCH_EXYNOS4
- help
- Say Y here if you want to enable System MMU
-
-config S5P_SLEEP
- bool
- help
- Internal config node to apply common S5P sleep management code.
- Can be selected by S5P and newer SoCs with similar sleep
procedure.
-
config S5P_DEV_FIMC0
bool
help
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 06401dc..7a9c4fc 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -19,7 +19,6 @@ obj-y += clock.o
obj-y += irq.o
obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o
-obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o
obj-$(CONFIG_S5P_PM) += pm.o irq-pm.o
obj-$(CONFIG_S5P_SLEEP) += sleep.o
obj-$(CONFIG_S5P_HRT) += s5p-time.o
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
deleted file mode 100644
index e1cbc72..0000000
--- a/arch/arm/plat-s5p/sysmmu.c
+++ /dev/null
@@ -1,312 +0,0 @@
-/* linux/arch/arm/plat-s5p/sysmmu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-
-#include <asm/pgtable.h>
-
-#include <mach/map.h>
-#include <mach/regs-sysmmu.h>
-#include <plat/sysmmu.h>
-
-#define CTRL_ENABLE 0x5
-#define CTRL_BLOCK 0x7
-#define CTRL_DISABLE 0x0
-
-static struct device *dev;
-
-static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {
- S5P_PAGE_FAULT_ADDR,
- S5P_AR_FAULT_ADDR,
- S5P_AW_FAULT_ADDR,
- S5P_DEFAULT_SLAVE_ADDR,
- S5P_AR_FAULT_ADDR,
- S5P_AR_FAULT_ADDR,
- S5P_AW_FAULT_ADDR,
- S5P_AW_FAULT_ADDR
-};
-
-static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
- "PAGE FAULT",
- "AR MULTI-HIT FAULT",
- "AW MULTI-HIT FAULT",
- "BUS ERROR",
- "AR SECURITY PROTECTION FAULT",
- "AR ACCESS PROTECTION FAULT",
- "AW SECURITY PROTECTION FAULT",
- "AW ACCESS PROTECTION FAULT"
-};
-
-static int (*fault_handlers[S5P_SYSMMU_TOTAL_IPNUM])(
- enum S5P_SYSMMU_INTERRUPT_TYPE itype,
- unsigned long pgtable_base,
- unsigned long fault_addr);
-
-/*
- * If adjacent 2 bits are true, the system MMU is enabled.
- * The system MMU is disabled, otherwise.
- */
-static unsigned long sysmmu_states;
-
-static inline void set_sysmmu_active(sysmmu_ips ips)
-{
- sysmmu_states |= 3 << (ips * 2);
-}
-
-static inline void set_sysmmu_inactive(sysmmu_ips ips)
-{
- sysmmu_states &= ~(3 << (ips * 2));
-}
-
-static inline int is_sysmmu_active(sysmmu_ips ips)
-{
- return sysmmu_states & (3 << (ips * 2));
-}
-
-static void __iomem *sysmmusfrs[S5P_SYSMMU_TOTAL_IPNUM];
-
-static inline void sysmmu_block(sysmmu_ips ips)
-{
- __raw_writel(CTRL_BLOCK, sysmmusfrs[ips] + S5P_MMU_CTRL);
- dev_dbg(dev, "%s is blocked.\n", sysmmu_ips_name[ips]);
-}
-
-static inline void sysmmu_unblock(sysmmu_ips ips)
-{
- __raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
- dev_dbg(dev, "%s is unblocked.\n", sysmmu_ips_name[ips]);
-}
-
-static inline void __sysmmu_tlb_invalidate(sysmmu_ips ips)
-{
- __raw_writel(0x1, sysmmusfrs[ips] + S5P_MMU_FLUSH);
- dev_dbg(dev, "TLB of %s is invalidated.\n", sysmmu_ips_name[ips]);
-}
-
-static inline void __sysmmu_set_ptbase(sysmmu_ips ips, unsigned long pgd)
-{
- if (unlikely(pgd == 0)) {
- pgd = (unsigned long)ZERO_PAGE(0);
- __raw_writel(0x20, sysmmusfrs[ips] + S5P_MMU_CFG); /* 4KB
LV1 */
- } else {
- __raw_writel(0x0, sysmmusfrs[ips] + S5P_MMU_CFG); /* 16KB
LV1 */
- }
-
- __raw_writel(pgd, sysmmusfrs[ips] + S5P_PT_BASE_ADDR);
-
- dev_dbg(dev, "Page table base of %s is initialized with 0x%08lX.\n",
- sysmmu_ips_name[ips], pgd);
- __sysmmu_tlb_invalidate(ips);
-}
-
-void sysmmu_set_fault_handler(sysmmu_ips ips,
- int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
- unsigned long pgtable_base,
- unsigned long fault_addr))
-{
- BUG_ON(!((ips >= SYSMMU_MDMA) && (ips < S5P_SYSMMU_TOTAL_IPNUM)));
- fault_handlers[ips] = handler;
-}
-
-static irqreturn_t s5p_sysmmu_irq(int irq, void *dev_id)
-{
- /* SYSMMU is in blocked when interrupt occurred. */
- unsigned long base = 0;
- sysmmu_ips ips = (sysmmu_ips)dev_id;
- enum S5P_SYSMMU_INTERRUPT_TYPE itype;
-
- itype = (enum S5P_SYSMMU_INTERRUPT_TYPE)
- __ffs(__raw_readl(sysmmusfrs[ips] + S5P_INT_STATUS));
-
- BUG_ON(!((itype >= 0) && (itype < 8)));
-
- dev_alert(dev, "%s occurred by %s.\n", sysmmu_fault_name[itype],
-
sysmmu_ips_name[ips]);
-
- if (fault_handlers[ips]) {
- unsigned long addr;
-
- base = __raw_readl(sysmmusfrs[ips] + S5P_PT_BASE_ADDR);
- addr = __raw_readl(sysmmusfrs[ips] +
fault_reg_offset[itype]);
-
- if (fault_handlers[ips](itype, base, addr)) {
- __raw_writel(1 << itype,
- sysmmusfrs[ips] + S5P_INT_CLEAR);
- dev_notice(dev, "%s from %s is resolved."
- " Retrying translation.\n",
- sysmmu_fault_name[itype],
sysmmu_ips_name[ips]);
- } else {
- base = 0;
- }
- }
-
- sysmmu_unblock(ips);
-
- if (!base)
- dev_notice(dev, "%s from %s is not handled.\n",
- sysmmu_fault_name[itype], sysmmu_ips_name[ips]);
-
- return IRQ_HANDLED;
-}
-
-void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd)
-{
- if (is_sysmmu_active(ips)) {
- sysmmu_block(ips);
- __sysmmu_set_ptbase(ips, pgd);
- sysmmu_unblock(ips);
- } else {
- dev_dbg(dev, "%s is disabled. "
- "Skipping initializing page table base.\n",
- sysmmu_ips_name[ips]);
- }
-}
-
-void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd)
-{
- if (!is_sysmmu_active(ips)) {
- sysmmu_clk_enable(ips);
-
- __sysmmu_set_ptbase(ips, pgd);
-
- __raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
-
- set_sysmmu_active(ips);
- dev_dbg(dev, "%s is enabled.\n", sysmmu_ips_name[ips]);
- } else {
- dev_dbg(dev, "%s is already enabled.\n",
sysmmu_ips_name[ips]);
- }
-}
-
-void s5p_sysmmu_disable(sysmmu_ips ips)
-{
- if (is_sysmmu_active(ips)) {
- __raw_writel(CTRL_DISABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
- set_sysmmu_inactive(ips);
- sysmmu_clk_disable(ips);
- dev_dbg(dev, "%s is disabled.\n", sysmmu_ips_name[ips]);
- } else {
- dev_dbg(dev, "%s is already disabled.\n",
sysmmu_ips_name[ips]);
- }
-}
-
-void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips)
-{
- if (is_sysmmu_active(ips)) {
- sysmmu_block(ips);
- __sysmmu_tlb_invalidate(ips);
- sysmmu_unblock(ips);
- } else {
- dev_dbg(dev, "%s is disabled. "
- "Skipping invalidating TLB.\n",
sysmmu_ips_name[ips]);
- }
-}
-
-static int s5p_sysmmu_probe(struct platform_device *pdev)
-{
- int i, ret;
- struct resource *res, *mem;
-
- dev = &pdev->dev;
-
- for (i = 0; i < S5P_SYSMMU_TOTAL_IPNUM; i++) {
- int irq;
-
- sysmmu_clk_init(dev, i);
- sysmmu_clk_disable(i);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, i);
- if (!res) {
- dev_err(dev, "Failed to get the resource of %s.\n",
- sysmmu_ips_name[i]);
- ret = -ENODEV;
- goto err_res;
- }
-
- mem = request_mem_region(res->start, resource_size(res),
- pdev->name);
- if (!mem) {
- dev_err(dev, "Failed to request the memory region of
%s.\n",
- sysmmu_ips_name[i]);
- ret = -EBUSY;
- goto err_res;
- }
-
- sysmmusfrs[i] = ioremap(res->start, resource_size(res));
- if (!sysmmusfrs[i]) {
- dev_err(dev, "Failed to ioremap() for %s.\n",
- sysmmu_ips_name[i]);
- ret = -ENXIO;
- goto err_reg;
- }
-
- irq = platform_get_irq(pdev, i);
- if (irq <= 0) {
- dev_err(dev, "Failed to get the IRQ resource of
%s.\n",
- sysmmu_ips_name[i]);
- ret = -ENOENT;
- goto err_map;
- }
-
- if (request_irq(irq, s5p_sysmmu_irq, IRQF_DISABLED,
- pdev->name, (void *)i)) {
- dev_err(dev, "Failed to request IRQ for %s.\n",
- sysmmu_ips_name[i]);
- ret = -ENOENT;
- goto err_map;
- }
- }
-
- return 0;
-
-err_map:
- iounmap(sysmmusfrs[i]);
-err_reg:
- release_mem_region(mem->start, resource_size(mem));
-err_res:
- return ret;
-}
-
-static int s5p_sysmmu_remove(struct platform_device *pdev)
-{
- return 0;
-}
-int s5p_sysmmu_runtime_suspend(struct device *dev)
-{
- return 0;
-}
-
-int s5p_sysmmu_runtime_resume(struct device *dev)
-{
- return 0;
-}
-
-const struct dev_pm_ops s5p_sysmmu_pm_ops = {
- .runtime_suspend = s5p_sysmmu_runtime_suspend,
- .runtime_resume = s5p_sysmmu_runtime_resume,
-};
-
-static struct platform_driver s5p_sysmmu_driver = {
- .probe = s5p_sysmmu_probe,
- .remove = s5p_sysmmu_remove,
- .driver = {
- .owner = THIS_MODULE,
- .name = "s5p-sysmmu",
- .pm = &s5p_sysmmu_pm_ops,
- }
-};
-
-static int __init s5p_sysmmu_init(void)
-{
- return platform_driver_register(&s5p_sysmmu_driver);
-}
-arch_initcall(s5p_sysmmu_init);
diff --git a/arch/arm/plat-samsung/include/plat/sysmmu.h
b/arch/arm/plat-samsung/include/plat/sysmmu.h
deleted file mode 100644
index 5fe8ee0..0000000
--- a/arch/arm/plat-samsung/include/plat/sysmmu.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/sysmmu.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Samsung System MMU driver for S5P platform
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_SAMSUNG_SYSMMU_H
-#define __PLAT_SAMSUNG_SYSMMU_H __FILE__
-
-enum S5P_SYSMMU_INTERRUPT_TYPE {
- SYSMMU_PAGEFAULT,
- SYSMMU_AR_MULTIHIT,
- SYSMMU_AW_MULTIHIT,
- SYSMMU_BUSERROR,
- SYSMMU_AR_SECURITY,
- SYSMMU_AR_ACCESS,
- SYSMMU_AW_SECURITY,
- SYSMMU_AW_PROTECTION, /* 7 */
- SYSMMU_FAULTS_NUM
-};
-
-#ifdef CONFIG_S5P_SYSTEM_MMU
-
-#include <mach/sysmmu.h>
-
-/**
- * s5p_sysmmu_enable() - enable system mmu of ip
- * @ips: The ip connected system mmu.
- * #pgd: Base physical address of the 1st level page table
- *
- * This function enable system mmu to transfer address
- * from virtual address to physical address
- */
-void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd);
-
-/**
- * s5p_sysmmu_disable() - disable sysmmu mmu of ip
- * @ips: The ip connected system mmu.
- *
- * This function disable system mmu to transfer address
- * from virtual address to physical address
- */
-void s5p_sysmmu_disable(sysmmu_ips ips);
-
-/**
- * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer
page table
- * @ips: The ip connected system mmu.
- * @pgd: The page table base address.
- *
- * This function set page table base address
- * When system mmu transfer address from virtaul address to physical
address,
- * system mmu refer address information from page table
- */
-void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd);
-
-/**
- * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu
- * @ips: The ip connected system mmu.
- *
- * This function flush all TLB entry in system mmu
- */
-void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips);
-
-/** s5p_sysmmu_set_fault_handler() - Fault handler for System MMUs
- * @itype: type of fault.
- * @pgtable_base: the physical address of page table base. This is 0 if
@ips is
- * SYSMMU_BUSERROR.
- * @fault_addr: the device (virtual) address that the System MMU tried to
- * translated. This is 0 if @ips is SYSMMU_BUSERROR.
- * Called when interrupt occurred by the System MMUs
- * The device drivers of peripheral devices that has a System MMU can
implement
- * a fault handler to resolve address translation fault by System MMU.
- * The meanings of return value and parameters are described below.
-
- * return value: non-zero if the fault is correctly resolved.
- * zero if the fault is not handled.
- */
-void s5p_sysmmu_set_fault_handler(sysmmu_ips ips,
- int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
- unsigned long pgtable_base,
- unsigned long fault_addr));
-#else
-#define s5p_sysmmu_enable(ips, pgd) do { } while (0)
-#define s5p_sysmmu_disable(ips) do { } while (0)
-#define s5p_sysmmu_set_tablebase_pgd(ips, pgd) do { } while (0)
-#define s5p_sysmmu_tlb_invalidate(ips) do { } while (0)
-#define s5p_sysmmu_set_fault_handler(ips, handler) do { } while (0)
-#endif
-#endif /* __ASM_PLAT_SYSMMU_H */
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index b57b3fa..1c754cd 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -107,4 +107,18 @@ config INTR_REMAP
To use x2apic mode in the CPU's which support x2APIC enhancements
or
to support platforms with CPU's having > 8 bit APIC ID, say Y.
+# EXYNOS IOMMU support
+config EXYNOS_IOMMU
+ bool "Exynos IOMMU Support"
+ depends on ARCH_EXYNOS4
+ select IOMMU_API
+ select EXYNOS4_DEV_SYSMMU
+ help
+ Support for the IOMMUs (System MMUs) Samsung Exynos application
+ processor family. This enables H/W multimedia accellerators to
view
+ non-linear physical memory chunks as a linear memory in their
virtual
+ address spaces.
+
+ If unsure, say N here.
+
endif # IOMMU_SUPPORT
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 4d4d77d..1eb924f 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o msm_iommu_dev.o
obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o
obj-$(CONFIG_DMAR) += dmar.o iova.o intel-iommu.o
obj-$(CONFIG_INTR_REMAP) += dmar.o intr_remapping.o
+obj-$(CONFIG_EXYNOS_IOMMU) += exynos_iommu.o
diff --git a/drivers/iommu/exynos_iommu.c b/drivers/iommu/exynos_iommu.c
new file mode 100644
index 0000000..b01345d
--- /dev/null
+++ b/drivers/iommu/exynos_iommu.c
@@ -0,0 +1,963 @@
+/* linux/drivers/iommu/exynos_iommu.c
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/iommu.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/list.h>
+#include <linux/atomic.h>
+#include <linux/spinlock.h>
+
+#include <asm/cacheflush.h>
+#include <asm/pgtable.h>
+
+#include <mach/map.h>
+#include <mach/regs-sysmmu.h>
+#include <mach/sysmmu.h>
+
+#define CTRL_ENABLE 0x5
+#define CTRL_BLOCK 0x7
+#define CTRL_DISABLE 0x0
+
+enum S5P_SYSMMU_INTERRUPT_TYPE {
+ SYSMMU_PAGEFAULT,
+ SYSMMU_AR_MULTIHIT,
+ SYSMMU_AW_MULTIHIT,
+ SYSMMU_BUSERROR,
+ SYSMMU_AR_SECURITY,
+ SYSMMU_AR_ACCESS,
+ SYSMMU_AW_SECURITY,
+ SYSMMU_AW_PROTECTION, /* 7 */
+ SYSMMU_FAULT_UNKNOWN,
+ SYSMMU_FAULTS_NUM
+};
+
+static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {
+ S5P_PAGE_FAULT_ADDR,
+ S5P_AR_FAULT_ADDR,
+ S5P_AW_FAULT_ADDR,
+ S5P_DEFAULT_SLAVE_ADDR,
+ S5P_AR_FAULT_ADDR,
+ S5P_AR_FAULT_ADDR,
+ S5P_AW_FAULT_ADDR,
+ S5P_AW_FAULT_ADDR
+};
+
+static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM + 1] = {
+ "PAGE FAULT",
+ "AR MULTI-HIT FAULT",
+ "AW MULTI-HIT FAULT",
+ "BUS ERROR",
+ "AR SECURITY PROTECTION FAULT",
+ "AR ACCESS PROTECTION FAULT",
+ "AW SECURITY PROTECTION FAULT",
+ "AW ACCESS PROTECTION FAULT",
+ "UNKOWN FAULT"
+};
+
+struct exynos_iommu_domain {
+ struct device *dev;
+ unsigned long *pgtable;
+ spinlock_t lock;
+ spinlock_t pgtablelock;
+};
+
+typedef int (*s5p_sysmmu_fault_handler_t)(enum S5P_SYSMMU_INTERRUPT_TYPE
itype,
+ unsigned long pgtable_base,
+ unsigned long fault_addr);
+struct sysmmu_drvdata {
+ struct list_head node;
+ struct device *dev;
+ struct device *owner;
+ void __iomem *sfrbase;
+ struct clk *clk;
+ int activations;
+ rwlock_t lock;
+ struct iommu_domain *domain;
+ s5p_sysmmu_fault_handler_t fault_handler;
+};
+
+
+/* List of sysmmu_drvdata */
+static LIST_HEAD(sysmmu_list);
+
+static struct sysmmu_drvdata *get_sysmmu_data(struct device *owner,
+ struct sysmmu_drvdata
*start)
+{
+ if (start) {
+ list_for_each_entry_continue(start, &sysmmu_list, node)
+ if (start->owner == owner)
+ return start;
+ } else {
+ list_for_each_entry(start, &sysmmu_list, node)
+ if (start->owner == owner)
+ return start;
+ }
+
+ return NULL;
+}
+
+static struct sysmmu_drvdata *get_sysmmu_data_rollback(struct device
*owner,
+ struct sysmmu_drvdata
*start)
+{
+ if (start) {
+ list_for_each_entry_continue_reverse(start, &sysmmu_list,
node)
+ if (start->owner == owner)
+ return start;
+ }
+
+ return NULL;
+}
+
+static bool set_sysmmu_active(struct sysmmu_drvdata *data)
+{
+ /* return true if the System MMU was not active previously
+ and it needs to be initialized */
+ data->activations++;
+ return data->activations == 1;
+}
+
+static bool set_sysmmu_inactive(struct sysmmu_drvdata *data)
+{
+ /* return true if the System MMU is needed to be disabled */
+ data->activations--;
+
+ WARN_ON(data->activations < 0);
+
+ return data->activations == 0;
+}
+
+static bool is_sysmmu_active(struct sysmmu_drvdata *data)
+{
+ return data->activations != 0;
+}
+
+static void sysmmu_block(void __iomem *sfrbase)
+{
+ __raw_writel(CTRL_BLOCK, sfrbase + S5P_MMU_CTRL);
+}
+
+static void sysmmu_unblock(void __iomem *sfrbase)
+{
+ __raw_writel(CTRL_ENABLE, sfrbase + S5P_MMU_CTRL);
+}
+
+static void __sysmmu_tlb_invalidate(void __iomem *sfrbase)
+{
+ __raw_writel(0x1, sfrbase + S5P_MMU_FLUSH);
+}
+
+static void __sysmmu_set_ptbase(void __iomem *sfrbase,
+ unsigned long pgd)
+{
+ if (unlikely(pgd == 0)) {
+ pgd = (unsigned long)ZERO_PAGE(0);
+ __raw_writel(0x20, sfrbase + S5P_MMU_CFG); /* 4KB LV1 */
+ } else {
+ __raw_writel(0x0, sfrbase + S5P_MMU_CFG); /* 16KB LV1 */
+ }
+
+ __raw_writel(pgd, sfrbase + S5P_PT_BASE_ADDR);
+
+ __sysmmu_tlb_invalidate(sfrbase);
+}
+
+static void __set_fault_handler(struct sysmmu_drvdata *data,
+ s5p_sysmmu_fault_handler_t handler)
+{
+ unsigned long flags;
+
+ write_lock_irqsave(&data->lock, flags);
+ data->fault_handler = handler;
+ write_unlock_irqrestore(&data->lock, flags);
+}
+
+void s5p_sysmmu_set_fault_handler(struct device *owner,
+ s5p_sysmmu_fault_handler_t handler)
+{
+ struct sysmmu_drvdata *data = NULL;
+
+ while ((data = get_sysmmu_data(owner, data)))
+ __set_fault_handler(data, handler);
+}
+
+static int default_fault_handler(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
+ unsigned long pgtable_base, unsigned long
fault_addr)
+{
+ if ((itype >= SYSMMU_FAULTS_NUM) || (itype < SYSMMU_PAGEFAULT))
+ itype = SYSMMU_FAULT_UNKNOWN;
+
+ pr_err("%s occured@0x%08lx(Page table base: 0x%08lx)\n",
+ sysmmu_fault_name[itype], fault_addr, pgtable_base);
+ pr_err("\t\tGenerating Kernel OOPS... because it is
unrecoverable.\n");
+
+ BUG();
+
+ return 0;
+}
+
+static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
+{
+ /* SYSMMU is in blocked when interrupt occurred. */
+ struct sysmmu_drvdata *data = dev_id;
+ enum S5P_SYSMMU_INTERRUPT_TYPE itype;
+ unsigned long addr;
+ int ret = -ENOSYS;
+
+ read_lock(&data->lock);
+
+ WARN_ON(!is_sysmmu_active(data));
+
+ itype = (enum S5P_SYSMMU_INTERRUPT_TYPE)
+ __ffs(__raw_readl(data->sfrbase + S5P_INT_STATUS));
+
+ if (WARN_ON((itype < 0) && (itype >= 8)))
+ itype = SYSMMU_FAULT_UNKNOWN;
+
+ addr = __raw_readl(data->sfrbase + fault_reg_offset[itype]);
+
+ if (data->domain)
+ ret = report_iommu_fault(data->domain, data->owner, addr,
+
itype);
+
+ if ((ret == -ENOSYS) && (data->fault_handler)) {
+ unsigned long base;
+ base = __raw_readl(data->sfrbase + S5P_PT_BASE_ADDR);
+
+ ret = data->fault_handler(itype, base, addr);
+ }
+
+ if (!ret)
+ __raw_writel(1 << itype, data->sfrbase + S5P_INT_CLEAR);
+ else
+ dev_dbg(data->dev, "%s is not handled.\n",
+ sysmmu_fault_name[itype]);
+
+ sysmmu_unblock(data->sfrbase);
+
+ read_unlock(&data->lock);
+
+ return IRQ_HANDLED;
+}
+
+void exynos_sysmmu_set_tablebase_pgd(struct device *owner, unsigned long
pgd)
+{
+ struct sysmmu_drvdata *data = NULL;
+
+ while ((data = get_sysmmu_data(owner, data))) {
+ unsigned long flags;
+
+ read_lock_irqsave(&data->lock, flags);
+
+ if (is_sysmmu_active(data)) {
+ sysmmu_block(data->sfrbase);
+ __sysmmu_set_ptbase(data->sfrbase, pgd);
+ sysmmu_unblock(data->sfrbase);
+ dev_dbg(data->dev,
+ "New page table base is 0x%08lx\n", pgd);
+ } else {
+ dev_dbg(data->dev,
+ "Disabled: Skipping setting page table base.\n");
+ }
+
+ read_unlock_irqrestore(&data->lock, flags);
+ }
+}
+
+static int __exynos_sysmmu_enable(struct device *owner, unsigned long
pgtable,
+ struct iommu_domain *domain)
+{
+ int ret = 0;
+ unsigned long flags;
+ struct sysmmu_drvdata *data = NULL;
+
+ /* There are some devices that control more System MMUs than one
such
+ * as MFC.
+ */
+ while ((data = get_sysmmu_data(owner, data))) {
+ ret = pm_runtime_get_sync(data->dev);
+ if (ret) {
+ set_sysmmu_active(data); /* for rollback */
+ break;
+ }
+
+ write_lock_irqsave(&data->lock, flags);
+
+ if (set_sysmmu_active(data)) {
+ __sysmmu_set_ptbase(data->sfrbase, pgtable);
+
+ __raw_writel(CTRL_ENABLE, data->sfrbase +
S5P_MMU_CTRL);
+
+ data->domain = domain;
+
+ dev_dbg(data->dev, "Enabled.\n");
+ } else {
+ dev_dbg(data->dev, "Already enabled.\n");
+ }
+
+ write_unlock_irqrestore(&data->lock, flags);
+ }
+
+ if (ret) {
+ do {
+ write_lock_irqsave(&data->lock, flags);
+ set_sysmmu_inactive(data);
+ data->domain = NULL;
+ /* deinitialization is not required actually. */
+ write_unlock_irqrestore(&data->lock, flags);
+
+ pm_runtime_put_sync(data->dev);
+
+ dev_dbg(data->dev, "Failed to enable.\n");
+ } while ((data = get_sysmmu_data_rollback(owner, data)));
+ }
+
+ return ret;
+}
+
+static int exynos_iommu_enable(struct iommu_domain *domain)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+
+ if (!priv || !priv->dev)
+ return -EINVAL;
+
+ return __exynos_sysmmu_enable(priv->dev, __pa(priv->pgtable),
domain);
+}
+
+int exynos_sysmmu_enable(struct device *owner, unsigned long pgtable)
+{
+ return __exynos_sysmmu_enable(owner, pgtable, NULL);
+}
+
+void exynos_sysmmu_disable(struct device *owner)
+{
+ struct sysmmu_drvdata *data = NULL;
+
+ while ((data = get_sysmmu_data(owner, data))) {
+ unsigned long flags;
+
+ write_lock_irqsave(&data->lock, flags);
+
+ if (set_sysmmu_inactive(data)) {
+ __raw_writel(CTRL_DISABLE,
+ data->sfrbase +
S5P_MMU_CTRL);
+
+ dev_dbg(data->dev, "Disabled.\n");
+ } else {
+ dev_dbg(data->dev, "Inactivation request
ignorred\n");
+ }
+
+ __raw_writel(CTRL_DISABLE, data->sfrbase + S5P_MMU_CTRL);
+
+ data->domain = NULL;
+
+ write_unlock_irqrestore(&data->lock, flags);
+
+ pm_runtime_put_sync(data->dev);
+ }
+}
+
+static void exynos_iommu_disable(struct iommu_domain *domain)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+
+ if (priv && priv->dev)
+ exynos_sysmmu_disable(priv->dev);
+}
+
+void exynos_sysmmu_tlb_invalidate(struct device *owner)
+{
+ struct sysmmu_drvdata *data = NULL;
+
+ while ((data = get_sysmmu_data(owner, data))) {
+ unsigned long flags;
+
+ read_lock_irqsave(&data->lock, flags);
+
+ if (is_sysmmu_active(data)) {
+ sysmmu_block(data->sfrbase);
+ __sysmmu_tlb_invalidate(data->sfrbase);
+ sysmmu_unblock(data->sfrbase);
+ } else {
+ dev_dbg(data->dev,
+ "Disabled: Skipping invalidating TLB.\n");
+ }
+
+ read_unlock_irqrestore(&data->lock, flags);
+ }
+}
+
+static int exynos_sysmmu_probe(struct platform_device *pdev)
+{
+ struct resource *res, *ioarea;
+ int ret = 0;
+ int irq;
+ struct device *dev;
+ void *sfr;
+ struct sysmmu_drvdata *data;
+ struct clk *clk;
+
+ dev = &pdev->dev;
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ dev_err(dev, "Failed to probing System MMU: "
+ "Not enough memory");
+ return -ENOMEM;
+ }
+
+ if (!dev_get_platdata(dev)) {
+ dev_err(dev, "Failed to probing system MMU: "
+ "Owner device is not set.");
+
+ ret = -ENODEV;
+ goto err_init;
+ }
+
+ ret = dev_set_drvdata(dev, data);
+ if (ret) {
+ dev_err(dev, "Failed to probing system MMU: "
+ "Unable to set driver
data.");
+ goto err_init;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev,
+ "Failed probing system MMU: failed to get
resource.");
+ ret = -ENOENT;
+ goto err_init;
+ }
+
+ ioarea = request_mem_region(res->start, resource_size(res),
+
dev_name(dev));
+ if (ioarea == NULL) {
+ dev_err(dev, "Failed probing system MMU: "
+ "failed to request memory region.");
+ ret = -ENOENT;
+ goto err_init;
+ }
+
+ sfr = ioremap(res->start, resource_size(res));
+ if (!sfr) {
+ dev_err(dev, "Failed probing system MMU: "
+ "failed to call
ioremap().");
+ ret = -ENOENT;
+ goto err_ioremap;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq <= 0) {
+ dev_err(dev, "Failed probing system MMU: "
+ "failed to get irq
resource.");
+ ret = irq;
+ goto err_irq;
+ }
+
+ ret = request_irq(irq, exynos_sysmmu_irq, 0, dev_name(dev), data);
+ if (ret) {
+ dev_err(dev, "Failed probing system MMU: "
+ "failed to request irq.");
+ goto err_irq;
+ }
+
+ clk = clk_get(dev, "sysmmu");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "Failed to probing System MMU: "
+ "failed to get clock descriptor");
+ ret = PTR_ERR(clk);
+ goto err_clk;
+ }
+
+ data->dev = dev;
+ data->owner = dev_get_platdata(dev);
+ data->clk = clk;
+ data->sfrbase = sfr;
+ __set_fault_handler(data, &default_fault_handler);
+ rwlock_init(&data->lock);
+ INIT_LIST_HEAD(&data->node);
+
+ list_add(&data->node, &sysmmu_list);
+
+ if (dev->parent)
+ pm_runtime_enable(dev);
+
+ dev_dbg(dev, "Initialized for %s.\n", dev_name(data->owner));
+ return 0;
+err_clk:
+ free_irq(irq, data);
+err_irq:
+ iounmap(sfr);
+err_ioremap:
+ release_resource(ioarea);
+ kfree(ioarea);
+err_init:
+ kfree(data);
+ dev_err(dev, "Probing system MMU failed.");
+ return ret;
+}
+
+int exynos_sysmmu_runtime_suspend(struct device *dev)
+{
+ struct sysmmu_drvdata *data = dev_get_drvdata(dev);
+
+ clk_disable(data->clk);
+
+ return 0;
+}
+
+int exynos_sysmmu_runtime_resume(struct device *dev)
+{
+ struct sysmmu_drvdata *data = dev_get_drvdata(dev);
+
+ return clk_enable(data->clk);
+}
+
+const struct dev_pm_ops exynos_sysmmu_pm_ops = {
+ .runtime_suspend = exynos_sysmmu_runtime_suspend,
+ .runtime_resume = exynos_sysmmu_runtime_resume,
+};
+
+static struct platform_driver exynos_sysmmu_driver = {
+ .probe = exynos_sysmmu_probe,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "s5p-sysmmu",
+ .pm = &exynos_sysmmu_pm_ops,
+ }
+};
+
+static int __init exynos_sysmmu_init(void)
+{
+ return platform_driver_register(&exynos_sysmmu_driver);
+}
+arch_initcall(exynos_sysmmu_init);
+
+/* We does not consider super section mapping (16MB) */
+#define S5P_SPAGE_SHIFT 12
+#define S5P_LPAGE_SHIFT 16
+#define S5P_SECTION_SHIFT 20
+
+#define S5P_SPAGE_SIZE (1 << S5P_SPAGE_SHIFT)
+#define S5P_LPAGE_SIZE (1 << S5P_LPAGE_SHIFT)
+#define S5P_SECTION_SIZE (1 << S5P_SECTION_SHIFT)
+
+#define S5P_SPAGE_MASK (~(S5P_SPAGE_SIZE - 1))
+#define S5P_LPAGE_MASK (~(S5P_LPAGE_SIZE - 1))
+#define S5P_SECTION_MASK (~(S5P_SECTION_SIZE - 1))
+
+#define S5P_SPAGE_ORDER (S5P_SPAGE_SHIFT - PAGE_SHIFT)
+#define S5P_LPAGE_ORDER (S5P_LPAGE_SHIFT - S5P_SPAGE_SHIFT)
+#define S5P_SECTION_ORDER (S5P_SECTION_SHIFT - S5P_SPAGE_SHIFT)
+
+#define S5P_LV1TABLE_ENTRIES (1 << (BITS_PER_LONG - S5P_SECTION_SHIFT))
+#define S5P_LV1TABLE_ORDER 2 /* get_order(S5P_LV1TABLE_ENTRIES) */
+
+#define S5P_LV2TABLE_ENTRIES (1 << S5P_SECTION_ORDER)
+#define S5P_LV2TABLE_SIZE (S5P_LV2TABLE_ENTRIES * sizeof(long))
+#define S5P_LV2TABLE_MASK (~(S5P_LV2TABLE_SIZE - 1)) /* 0xFFFFFC00 */
+
+#define S5P_SECTION_LV1_ENTRY(entry) ((entry & 0x40003) == 2)
+#define S5P_SUPSECT_LV1_ENTRY(entry) ((entry & 0x40003) == 0x40002)
+#define S5P_PAGE_LV1_ENTRY(entry) ((entry & 3) == 1)
+#define S5P_FAULT_LV1_ENTRY(entry) (((entry & 3) == 0) || (entry & 3) == 3)
+
+#define S5P_LPAGE_LV2_ENTRY(entry) ((entry & 3) == 1)
+#define S5P_SPAGE_LV2_ENTRY(entry) ((entry & 2) == 2)
+#define S5P_FAULT_LV2_ENTRY(entry) ((entry & 3) == 0)
+
+#define MAKE_FAULT_ENTRY(entry) do { entry = 0; } while (0)
+#define MAKE_SECTION_ENTRY(entry, pa) do { entry = pa | 2; } while (0)
+#define MAKE_SUPSECT_ENTRY(entry, pa) do { entry = pa | 0x40002; } while
(0)
+#define MAKE_LV2TABLE_ENTRY(entry, pa) do { entry = pa | 1; } while (0)
+
+#define MAKE_LPAGE_ENTRY(entry, pa) do { entry = pa | 1; } while (0)
+#define MAKE_SPAGE_ENTRY(entry, pa) do { entry = pa | 3; } while (0)
+
+#define GET_LV2ENTRY(entry, iova) (\
+ (unsigned long *)phys_to_virt(entry & S5P_LV2TABLE_MASK) +\
+ ((iova & (~S5P_SECTION_MASK)) >> S5P_SPAGE_SHIFT))
+
+/* slab cache for level 2 page tables */
+static struct kmem_cache *l2table_cachep;
+
+static void pgtable_flush(void *vastart, void *vaend)
+{
+ dmac_flush_range(vastart, vaend);
+ outer_flush_range(virt_to_phys(vastart),
+ virt_to_phys(vaend));
+}
+
+static int exynos_iommu_domain_init(struct iommu_domain *domain)
+{
+ struct exynos_iommu_domain *priv;
+
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->pgtable = (unsigned long *)
+ __get_free_pages(S5P_LV1TABLE_ORDER, GFP_KERNEL);
+ if (!priv->pgtable) {
+ kfree(priv);
+ return -ENOMEM;
+ }
+
+ memset(priv->pgtable, 0, S5P_LV1TABLE_ENTRIES * sizeof(unsigned
long));
+ pgtable_flush(priv->pgtable, priv->pgtable + S5P_LV1TABLE_ENTRIES);
+
+ spin_lock_init(&priv->lock);
+ spin_lock_init(&priv->pgtablelock);
+
+ domain->priv = priv;
+
+ return 0;
+}
+
+static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+
+ free_pages((unsigned long)priv->pgtable, S5P_LV1TABLE_ORDER);
+
+ kfree(priv);
+
+ domain->priv = NULL;
+}
+
+static int exynos_iommu_attach_device(struct iommu_domain *domain,
+ struct device *dev)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+ int ret;
+
+ spin_lock(&priv->lock);
+
+ priv->dev = dev;
+
+ spin_unlock(&priv->lock);
+
+ ret = exynos_iommu_enable(domain);
+
+ return ret;
+}
+
+static void exynos_iommu_detach_device(struct iommu_domain *domain,
+ struct device *dev)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+
+ spin_lock(&priv->lock);
+
+ if (priv->dev == dev) {
+ priv->dev = NULL;
+
+ spin_unlock(&priv->lock);
+
+ exynos_iommu_disable(domain);
+ } else {
+ spin_unlock(&priv->lock);
+ }
+}
+
+static bool section_available(struct iommu_domain *domain,
+ unsigned long *lv1entry)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+
+ if (S5P_SECTION_LV1_ENTRY(*lv1entry)) {
+ dev_err(priv->dev, "1MB entry alread exists at 0x%08x\n",
+ (lv1entry - priv->pgtable) * SZ_1M);
+ return false;
+ }
+
+ if (S5P_PAGE_LV1_ENTRY(*lv1entry)) {
+ unsigned long *lv2end, *lv2base;
+
+ lv2base = phys_to_virt(*lv1entry & S5P_LV2TABLE_MASK);
+ lv2end = lv2base + S5P_LV2TABLE_ENTRIES;
+ while (lv2base != lv2end) {
+ if (!S5P_FAULT_LV2_ENTRY(*lv2base)) {
+ dev_err(priv->dev, "Failed to free L2 page "
+ "table for section
mapping.\n");
+ return false;
+ }
+ lv2base++;
+ }
+
+ kmem_cache_free(l2table_cachep,
+ phys_to_virt(*lv1entry &
S5P_LV2TABLE_MASK));
+
+ MAKE_FAULT_ENTRY(*lv1entry);
+ }
+
+ return true;
+}
+
+static bool write_lpage(unsigned long *head_entry, unsigned long phys_addr)
+{
+ unsigned long *entry, *end;
+
+ entry = head_entry;
+ end = entry + (1 << S5P_LPAGE_ORDER);
+
+ while (entry != end) {
+ if (!S5P_FAULT_LV2_ENTRY(*entry))
+ break;
+
+ MAKE_LPAGE_ENTRY(*entry, phys_addr);
+
+ entry++;
+ }
+
+ if (entry != end) {
+ end = entry;
+ while (entry != head_entry)
+ MAKE_FAULT_ENTRY(*(--entry));
+
+ return false;
+ }
+
+ return true;
+}
+
+static int exynos_iommu_map(struct iommu_domain *domain, unsigned long
iova,
+ phys_addr_t paddr, int gfp_order, int prot)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+ unsigned long *start_entry, *entry, *end_entry;
+ int num_entry;
+ int ret = 0;
+ unsigned long flags;
+
+ BUG_ON(priv->pgtable == NULL);
+
+ spin_lock_irqsave(&priv->pgtablelock, flags);
+
+ start_entry = entry = priv->pgtable + (iova >> S5P_SECTION_SHIFT);
+
+ if (gfp_order >= S5P_SECTION_ORDER) {
+ BUG_ON(!IS_ALIGNED(paddr | iova, S5P_SECTION_SIZE));
+ /* 1MiB mapping */
+
+ num_entry = 1 << (gfp_order - S5P_SECTION_ORDER);
+ end_entry = entry + num_entry;
+
+ while (entry != end_entry) {
+ if (!section_available(domain, entry))
+ break;
+
+ MAKE_SECTION_ENTRY(*entry, paddr);
+
+ paddr += S5P_SECTION_SIZE;
+ entry++;
+ }
+
+ if (entry != end_entry)
+ goto mapping_error;
+
+ pgtable_flush(start_entry, entry);
+ goto mapping_done;
+ }
+
+ if (S5P_FAULT_LV1_ENTRY(*entry)) {
+ unsigned long *l2table;
+
+ l2table = kmem_cache_zalloc(l2table_cachep, GFP_KERNEL);
+ if (!l2table) {
+ ret = -ENOMEM;
+ goto nomem_error;
+ }
+
+ pgtable_flush(entry, entry + S5P_LV2TABLE_ENTRIES);
+
+ MAKE_LV2TABLE_ENTRY(*entry, virt_to_phys(l2table));
+ pgtable_flush(entry, entry + 1);
+ }
+
+ /* 'entry' points level 2 entries, hereafter */
+ entry = GET_LV2ENTRY(*entry, iova);
+
+ start_entry = entry;
+ num_entry = 1 << gfp_order;
+ end_entry = entry + num_entry;
+
+ if (gfp_order >= S5P_LPAGE_ORDER) {
+ /* large page(64KiB) mapping */
+ BUG_ON(!IS_ALIGNED(paddr | iova, S5P_LPAGE_SIZE));
+
+ while (entry != end_entry) {
+ if (!write_lpage(entry, paddr)) {
+ pr_err("%s: "
+ "Failed to allocate large page
entry."
+ "\n", __func__);
+ break;
+ }
+
+ paddr += S5P_LPAGE_SIZE;
+ entry += (1 << S5P_LPAGE_ORDER);
+ }
+
+ if (entry != end_entry) {
+ entry -= 1 << S5P_LPAGE_ORDER;
+ goto mapping_error;
+ }
+ } else {
+ /* page (4KiB) mapping */
+ while (entry != end_entry && S5P_FAULT_LV2_ENTRY(*entry)) {
+
+ MAKE_SPAGE_ENTRY(*entry, paddr);
+
+ entry++;
+ paddr += S5P_SPAGE_SIZE;
+ }
+
+ if (entry != end_entry) {
+ pr_err("%s: Failed to allocate small page entry.\n",
+ __func__);
+ goto mapping_error;
+ }
+ }
+
+ pgtable_flush(start_entry, entry);
+mapping_error:
+ if (entry != end_entry) {
+ unsigned long *current_entry = entry;
+ while (entry != start_entry)
+ MAKE_FAULT_ENTRY(*(--entry));
+ pgtable_flush(start_entry, current_entry);
+ ret = -EADDRINUSE;
+ }
+
+nomem_error:
+mapping_done:
+ spin_unlock_irqrestore(&priv->pgtablelock, flags);
+
+ return 0;
+}
+
+static int exynos_iommu_unmap(struct iommu_domain *domain, unsigned long
iova,
+ int gfp_order)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+ unsigned long *entry;
+ int num_entry;
+ unsigned long flags;
+
+ BUG_ON(priv->pgtable == NULL);
+
+ spin_lock_irqsave(&priv->pgtablelock, flags);
+
+ entry = priv->pgtable + (iova >> S5P_SECTION_SHIFT);
+
+ if (gfp_order >= S5P_SECTION_ORDER) {
+ gfp_order -= S5P_SECTION_ORDER;
+ num_entry = 1 << (gfp_order - S5P_SECTION_ORDER);
+ while (num_entry--) {
+ if (S5P_SECTION_LV1_ENTRY(*entry)) {
+ MAKE_FAULT_ENTRY(*entry);
+ } else if (S5P_PAGE_LV1_ENTRY(*entry)) {
+ unsigned long *lv2beg, *lv2end;
+ lv2beg = phys_to_virt(
+ *entry & S5P_LV2TABLE_MASK);
+ lv2end = lv2beg + S5P_LV2TABLE_ENTRIES;
+ while (lv2beg != lv2end) {
+ MAKE_FAULT_ENTRY(*lv2beg);
+ lv2beg++;
+ }
+ }
+ entry++;
+ }
+ } else {
+ entry = GET_LV2ENTRY(*entry, iova);
+
+ BUG_ON(S5P_LPAGE_LV2_ENTRY(*entry) &&
+ (gfp_order <
S5P_LPAGE_ORDER));
+
+ num_entry = 1 << gfp_order;
+
+ while (num_entry--) {
+ MAKE_FAULT_ENTRY(*entry);
+ entry++;
+ }
+ }
+
+ spin_unlock_irqrestore(&priv->pgtablelock, flags);
+
+ if (priv->dev)
+ exynos_sysmmu_tlb_invalidate(priv->dev);
+
+ return 0;
+}
+
+static phys_addr_t exynos_iommu_iova_to_phys(struct iommu_domain *domain,
+ unsigned long iova)
+{
+ struct exynos_iommu_domain *priv = domain->priv;
+ unsigned long *entry;
+ unsigned long offset;
+
+ entry = priv->pgtable + (iova >> S5P_SECTION_SHIFT);
+
+ if (S5P_FAULT_LV1_ENTRY(*entry))
+ return 0;
+
+ offset = iova & ~S5P_SECTION_MASK;
+
+ if (S5P_SECTION_LV1_ENTRY(*entry))
+ return (*entry & S5P_SECTION_MASK) + offset;
+
+ entry = GET_LV2ENTRY(*entry, iova);
+
+ if (S5P_SPAGE_LV2_ENTRY(*entry))
+ return (*entry & S5P_SPAGE_MASK) + (iova & ~S5P_SPAGE_MASK);
+
+ if (S5P_LPAGE_LV2_ENTRY(*entry))
+ return (*entry & S5P_LPAGE_MASK) + (iova & ~S5P_LPAGE_MASK);
+
+ return 0;
+}
+
+static int exynos_iommu_domain_has_cap(struct iommu_domain *domain,
+ unsigned long cap)
+{
+ return 0;
+}
+
+static struct iommu_ops exynos_iommu_ops = {
+ .domain_init = &exynos_iommu_domain_init,
+ .domain_destroy = &exynos_iommu_domain_destroy,
+ .attach_dev = &exynos_iommu_attach_device,
+ .detach_dev = &exynos_iommu_detach_device,
+ .map = &exynos_iommu_map,
+ .unmap = &exynos_iommu_unmap,
+ .iova_to_phys = &exynos_iommu_iova_to_phys,
+ .domain_has_cap = &exynos_iommu_domain_has_cap,
+};
+
+static int __init exynos_iommu_init(void)
+{
+ l2table_cachep = kmem_cache_create("SysMMU Lv2 Tables",
+ S5P_LV2TABLE_SIZE, S5P_LV2TABLE_SIZE, 0,
NULL);
+ if (!l2table_cachep)
+ return -ENOMEM;
+
+ bus_set_iommu(&platform_bus_type, &exynos_iommu_ops);
+
+ return 0;
+}
+arch_initcall(exynos_iommu_init);
--
1.7.1
^ permalink raw reply related
* [PATCH 11/26] ARM: pxa: allow building palm27x without pxafb
From: Arnd Bergmann @ 2011-10-07 9:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMPhdO_bKPxEEmBzSKvgYooG5YwweSYJVMdCxwYtQKJMyiWggg@mail.gmail.com>
On Friday 07 October 2011, Eric Miao wrote:
> Marek and I actually came up with a patch to fix this as below, this
> way to cover the declarations of those modes in the CONFIG_FB_PXA
> as well.
>
> commit e227e88ae46e921f608b056e27e1d8704b7d12fa
> Author: Eric Miao <eric.y.miao@gmail.com>
> Date: Sun Sep 11 16:56:58 2011 +0800
>
> ARM: pxa: fix building error by palm27x_lcd_init() when FB_PXA not defined
>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Yes, that looks better than my solution
Arnd
^ permalink raw reply
* [PATCH 12/26] ARM: pxa: pxa95x/saarb depends on pxa3xx code
From: Arnd Bergmann @ 2011-10-07 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMPhdO-1ZZ28Z7affqgXWqwnbbAEhyC3_Tbgtdp2v+s4bqqQRQ@mail.gmail.com>
On Friday 07 October 2011, Eric Miao wrote:
> PXA95x is actually PJ4 based, which is ARMv7/v6 compatible, not
> like it's predecessor PXA93x. Although they are currently sharing
> some code, I expect a fork in the near future. To cause less confusion
> here, I'd propose to further introduce pxa95x.h, and to remove
> the unnecessary #include of <mach/mfp.h> and <mach/mfp-pxa930.h>
Yes, looks good.
Arnd
^ permalink raw reply
* [PATCH 1/5] drivercore: add new error value for deferred probe
From: Mark Brown @ 2011-10-07 10:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111007064349.GD27508@kroah.com>
On Thu, Oct 06, 2011 at 11:43:49PM -0700, Greg KH wrote:
> On Fri, Oct 07, 2011 at 10:33:06AM +0500, G, Manjunath Kondaiah wrote:
> > +#define EPROBE_DEFER 517 /* restart probe again after some time */
> Can we really do this? Isn't this some user/kernel api here?
> What's wrong with just "overloading" on top of an existing error code?
> Surely one of the other 516 types could be used here, right?
There was some discussion of this in the previous patch round before the
code was changed - it does end up adding an externally visible error
code but it doesn't really make any difference, especially if we don't
propagate it externally. We've already got some other codes in a
similar style, though I can't remember the examples that were quoted
offhand. Adding the new code avoids confusion about exactly what the
intent of the driver is.
^ permalink raw reply
* [PATCH 2/4] ARM: OMAP4 PM: Add IO Daisychain support
From: Vishwanath Sripathy @ 2011-10-07 10:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1110070209480.4611@utopia.booyaka.com>
> -----Original Message-----
> From: Paul Walmsley [mailto:paul at pwsan.com]
> Sent: Friday, October 07, 2011 1:44 PM
> To: Vishwanath BS
> Cc: linux-omap at vger.kernel.org; khilman at ti.com; linux-arm-
> kernel at lists.infradead.org; Rajendra Nayak
> Subject: Re: [PATCH 2/4] ARM: OMAP4 PM: Add IO Daisychain support
>
> Hi
>
> some comments:
>
> On Tue, 4 Oct 2011, Vishwanath BS wrote:
>
> > From: Rajendra Nayak <rnayak@ti.com>
> >
> > patch adds IO Daisychain support for OMAP4 as per section 3.9.4 in
> OMAP4430
> > Public TRM.
> >
> > Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> > Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
> > ---
> > arch/arm/mach-omap2/pm.h | 1 +
> > arch/arm/mach-omap2/pm44xx.c | 36
> ++++++++++++++++++++++++++++++++++++
> > 2 files changed, 37 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
> > index 9a36a7c..2e09d72 100644
> > --- a/arch/arm/mach-omap2/pm.h
> > +++ b/arch/arm/mach-omap2/pm.h
> > @@ -22,6 +22,7 @@ extern int omap3_can_sleep(void);
> > extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32
> state);
> > extern int omap3_idle_init(void);
> > extern void omap3_enable_io_chain(void);
> > +extern void omap4_trigger_wuclk_ctrl(void);
> >
> > #if defined(CONFIG_PM_OPP)
> > extern int omap3_opp_init(void);
> > diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-
> omap2/pm44xx.c
> > index 59a870b..aa7cff4 100644
> > --- a/arch/arm/mach-omap2/pm44xx.c
> > +++ b/arch/arm/mach-omap2/pm44xx.c
> > @@ -16,8 +16,17 @@
> > #include <linux/err.h>
> > #include <linux/slab.h>
> >
> > +#include <plat/common.h>
> > +
> > #include "powerdomain.h"
> > #include <mach/omap4-common.h>
> > +#include "pm.h"
> > +#include "cm-regbits-44xx.h"
> > +#include "cminst44xx.h"
> > +#include "prm-regbits-44xx.h"
> > +#include "prcm44xx.h"
> > +#include "prm44xx.h"
> > +#include "prminst44xx.h"
> >
> > struct power_state {
> > struct powerdomain *pwrdm;
> > @@ -30,6 +39,33 @@ struct power_state {
> >
> > static LIST_HEAD(pwrst_list);
> >
> > +#define MAX_IOPAD_LATCH_TIME 1000
>
> This macro is missing a comment, which should precede it, describing
> what
> this value is.
OK
>
> > +
> > +void omap4_trigger_wuclk_ctrl(void)
> > +{
> > + int i = 0;
> > +
> > + /* Enable GLOBAL_WUEN */
> > + if (!omap4_cminst_read_inst_reg_bits(OMAP4430_PRM_PARTITION,
> > + OMAP4430_PRM_DEVICE_INST,
> OMAP4_PRM_IO_PMCTRL_OFFSET,
> > + OMAP4430_GLOBAL_WUEN_MASK))
>
> The above line doesn't look right. It's accessing a PRM instance
> register
> with omap4_cminst_*()? Shouldn't that be omap4_prminst_*()?
Ya, it would make sense to use omap4_prminst_* though functionally both
have the same effect.
>
> > +
> omap4_prminst_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
> > + OMAP4430_GLOBAL_WUEN_MASK, OMAP4430_PRM_PARTITION,
> > + OMAP4430_PRM_DEVICE_INST,
> OMAP4_PRM_IO_PMCTRL_OFFSET);
> > +
> > + /* Trigger WUCLKIN enable */
> > + omap4_prminst_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
> OMAP4430_WUCLK_CTRL_MASK,
> > + OMAP4430_PRM_PARTITION, OMAP4430_PRM_DEVICE_INST,
> OMAP4_PRM_IO_PMCTRL_OFFSET);
> > + omap_test_timeout(
> > + ((omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
> OMAP4430_PRM_DEVICE_INST, OMAP4_PRM_IO_PMCTRL_OFFSET)
> > + >> OMAP4430_WUCLK_STATUS_SHIFT) == 1),
> > + MAX_IOPAD_LATCH_TIME, i);
> > + /* Trigger WUCLKIN disable */
> > + omap4_prminst_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
> > + OMAP4430_PRM_PARTITION, OMAP4430_PRM_DEVICE_INST,
> OMAP4_PRM_IO_PMCTRL_OFFSET);
> > + return;
> > +}
>
> This function belongs in mach-omap2/prminst44xx.c. I still think it
> would
> be good if we moved all PRM/CM direct register accesses into prm*.c
> or
> cm*.c files in mach-omap2/. Then none of those prm*.h includes
> would be
> needed in pm44xx.c either.
OK. Let me explore that.
Regards
Vishwa
>
> > +
> > #ifdef CONFIG_SUSPEND
> > static int omap4_pm_suspend(void)
> > {
> > --
> > 1.7.0.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-
> omap" in
> > the body of a message to majordomo at vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
>
>
> - Paul
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