* [PATCH v5 04/10] ARM: SoC: convert OMAP4 to SoC descriptor
From: Marc Zyngier @ 2011-10-10 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318255342-17451-1-git-send-email-marc.zyngier@arm.com>
Convert OMAP4 to use the SoC descriptor to provide its SMP
and CPU hotplug operations.
Tested on both Panda and IGEPv2 (MULTI_OMAP kernel)
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-omap2/board-4430sdp.c | 1 +
arch/arm/mach-omap2/board-omap4panda.c | 1 +
arch/arm/mach-omap2/include/mach/omap4-common.h | 14 +++++++++++++
arch/arm/mach-omap2/omap-hotplug.c | 6 ++--
arch/arm/mach-omap2/omap-smp.c | 24 +++++++++++++++++++---
arch/arm/mach-omap2/omap4-common.c | 7 ++++++
6 files changed, 46 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 4d0c8b9..c404c5b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -986,6 +986,7 @@ static void __init omap_4430sdp_map_io(void)
MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
.atag_offset = 0x100,
+ .soc = &omap4_soc_desc,
.reserve = omap_reserve,
.map_io = omap_4430sdp_map_io,
.init_early = omap4430_init_early,
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 201c0c2..42d6168 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -579,6 +579,7 @@ static void __init omap4_panda_map_io(void)
MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
/* Maintainer: David Anders - Texas Instruments Inc */
.atag_offset = 0x100,
+ .soc = &omap4_soc_desc,
.reserve = omap_reserve,
.map_io = omap4_panda_map_io,
.init_early = omap4430_init_early,
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h
index e4bd876..1db7941 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -39,5 +39,19 @@ extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);
+
+extern int omap4_cpu_kill(unsigned int cpu);
+extern void omap4_cpu_die(unsigned int cpu);
+extern int omap4_cpu_disable(unsigned int cpu);
+
+struct arm_soc_smp_init_ops;
+struct arm_soc_smp_ops;
+
+extern struct arm_soc_smp_init_ops omap4_soc_smp_init_ops;
+extern struct arm_soc_smp_ops omap4_soc_smp_ops;
#endif
+
+struct arm_soc_desc;
+extern struct arm_soc_desc omap4_soc_desc;
+
#endif
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 4976b93..40982c6 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -21,7 +21,7 @@
#include <asm/cacheflush.h>
#include <mach/omap4-common.h>
-int platform_cpu_kill(unsigned int cpu)
+int omap4_cpu_kill(unsigned int cpu)
{
return 1;
}
@@ -30,7 +30,7 @@ int platform_cpu_kill(unsigned int cpu)
* platform-specific code to shutdown a CPU
* Called with IRQs disabled
*/
-void platform_cpu_die(unsigned int cpu)
+void omap4_cpu_die(unsigned int cpu)
{
flush_cache_all();
dsb();
@@ -57,7 +57,7 @@ void platform_cpu_die(unsigned int cpu)
}
}
-int platform_cpu_disable(unsigned int cpu)
+int omap4_cpu_disable(unsigned int cpu)
{
/*
* we don't allow CPU 0 to be shutdown (it is still too special
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index ce65e93..061ed7f 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -23,6 +23,7 @@
#include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h>
+#include <asm/soc.h>
#include <mach/hardware.h>
#include <mach/omap4-common.h>
@@ -31,7 +32,7 @@ static void __iomem *scu_base;
static DEFINE_SPINLOCK(boot_lock);
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit omap4_secondary_init(unsigned int cpu)
{
/*
* If any interrupts are already enabled for the primary
@@ -47,7 +48,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
/*
* Set synchronisation state between this boot processor
@@ -98,7 +99,7 @@ static void __init wakeup_secondary(void)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init omap4_smp_init_cpus(void)
{
unsigned int i, ncores;
@@ -123,7 +124,7 @@ void __init smp_init_cpus(void)
set_smp_cross_call(gic_raise_softirq);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
{
/*
@@ -133,3 +134,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
scu_enable(scu_base);
wakeup_secondary();
}
+
+struct arm_soc_smp_init_ops omap4_soc_smp_init_ops __initdata = {
+ .smp_init_cpus = omap4_smp_init_cpus,
+ .smp_prepare_cpus = omap4_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops omap4_soc_smp_ops __initdata = {
+ .smp_secondary_init = omap4_secondary_init,
+ .smp_boot_secondary = omap4_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_kill = omap4_cpu_kill,
+ .cpu_die = omap4_cpu_die,
+ .cpu_disable = omap4_cpu_disable,
+#endif
+};
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 35ac3e5..de39fd4 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -16,6 +16,7 @@
#include <linux/io.h>
#include <linux/platform_device.h>
+#include <asm/soc.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
@@ -111,3 +112,9 @@ static int __init omap_l2_cache_init(void)
}
early_initcall(omap_l2_cache_init);
#endif
+
+struct arm_soc_desc omap4_soc_desc __initdata = {
+ .name = "TI OMAP4",
+ soc_smp_init_ops(omap4_soc_smp_init_ops)
+ soc_smp_ops(omap4_soc_smp_ops)
+};
--
1.7.0.4
^ permalink raw reply related
* [PATCH v5 03/10] ARM: SoC: convert VExpress/RealView to SoC descriptor
From: Marc Zyngier @ 2011-10-10 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318255342-17451-1-git-send-email-marc.zyngier@arm.com>
Convert both Realview and VExpress to use the SoC descriptor to
provide their SMP and CPU hotplug operation.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-realview/core.c | 7 +++++++
arch/arm/mach-realview/core.h | 9 +++++++++
arch/arm/mach-realview/hotplug.c | 6 +++---
arch/arm/mach-realview/platsmp.c | 24 ++++++++++++++++++++----
arch/arm/mach-realview/realview_eb.c | 1 +
arch/arm/mach-realview/realview_pb1176.c | 1 +
arch/arm/mach-realview/realview_pb11mp.c | 1 +
arch/arm/mach-realview/realview_pba8.c | 1 +
arch/arm/mach-realview/realview_pbx.c | 1 +
arch/arm/mach-vexpress/core.h | 10 ++++++++++
arch/arm/mach-vexpress/hotplug.c | 6 +++---
arch/arm/mach-vexpress/platsmp.c | 24 ++++++++++++++++++++----
arch/arm/mach-vexpress/v2m.c | 9 +++++++++
arch/arm/plat-versatile/include/plat/platsmp.h | 14 ++++++++++++++
arch/arm/plat-versatile/platsmp.c | 4 ++--
15 files changed, 102 insertions(+), 16 deletions(-)
create mode 100644 arch/arm/plat-versatile/include/plat/platsmp.h
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index d5ed5d4..e84e6b2 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -33,6 +33,7 @@
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>
+#include <asm/soc.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/irq.h>
@@ -533,3 +534,9 @@ void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
meminfo->nr_banks = 1;
#endif
}
+
+struct arm_soc_desc realview_soc_desc __initdata = {
+ .name = "ARM RealView Platform",
+ soc_smp_init_ops(realview_soc_smp_init_ops)
+ soc_smp_ops(realview_soc_smp_ops)
+};
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 47259c8..a262e4e 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -27,6 +27,7 @@
#include <asm/setup.h>
#include <asm/leds.h>
+#include <asm/soc.h>
#define AMBA_DEVICE(name,busid,base,plat) \
static struct amba_device name##_device = { \
@@ -67,4 +68,12 @@ extern void realview_fixup(struct tag *tags, char **from,
struct meminfo *meminfo);
extern void (*realview_reset)(char);
+extern struct arm_soc_desc realview_soc_desc;
+extern struct arm_soc_smp_init_ops realview_soc_smp_init_ops;
+extern struct arm_soc_smp_ops realview_soc_smp_ops;
+
+extern int realview_cpu_kill(unsigned int cpu);
+extern void realview_cpu_die(unsigned int cpu);
+extern int realview_cpu_disable(unsigned int cpu);
+
#endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index ac1aed2..c8adf5c 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -87,7 +87,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
}
}
-int platform_cpu_kill(unsigned int cpu)
+int realview_cpu_kill(unsigned int cpu)
{
return 1;
}
@@ -97,7 +97,7 @@ int platform_cpu_kill(unsigned int cpu)
*
* Called with IRQs disabled
*/
-void platform_cpu_die(unsigned int cpu)
+void realview_cpu_die(unsigned int cpu)
{
int spurious = 0;
@@ -117,7 +117,7 @@ void platform_cpu_die(unsigned int cpu)
pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
}
-int platform_cpu_disable(unsigned int cpu)
+int realview_cpu_disable(unsigned int cpu)
{
/*
* we don't allow CPU 0 to be shutdown (it is still too special
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 4ae943b..92be3eb 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -18,14 +18,15 @@
#include <asm/mach-types.h>
#include <asm/smp_scu.h>
#include <asm/unified.h>
+#include <asm/soc.h>
#include <mach/board-eb.h>
#include <mach/board-pb11mp.h>
#include <mach/board-pbx.h>
-#include "core.h"
+#include <plat/platsmp.h>
-extern void versatile_secondary_startup(void);
+#include "core.h"
static void __iomem *scu_base_addr(void)
{
@@ -44,7 +45,7 @@ static void __iomem *scu_base_addr(void)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init realview_smp_init_cpus(void)
{
void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
@@ -66,7 +67,7 @@ void __init smp_init_cpus(void)
set_smp_cross_call(gic_raise_softirq);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
{
scu_enable(scu_base_addr());
@@ -80,3 +81,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
__raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)),
__io_address(REALVIEW_SYS_FLAGSSET));
}
+
+struct arm_soc_smp_init_ops realview_soc_smp_init_ops __initdata = {
+ .smp_init_cpus = realview_smp_init_cpus,
+ .smp_prepare_cpus = realview_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops realview_soc_smp_ops __initdata = {
+ .smp_secondary_init = versatile_secondary_init,
+ .smp_boot_secondary = versatile_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_kill = realview_cpu_kill,
+ .cpu_die = realview_cpu_die,
+ .cpu_disable = realview_cpu_disable,
+#endif
+};
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 026c66a..427e44e 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -464,6 +464,7 @@ static void __init realview_eb_init(void)
MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.atag_offset = 0x100,
+ .soc = &realview_soc_desc,
.fixup = realview_fixup,
.map_io = realview_eb_map_io,
.init_early = realview_init_early,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 7ead14f..99ea1c0 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -358,6 +358,7 @@ static void __init realview_pb1176_init(void)
MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.atag_offset = 0x100,
+ .soc = &realview_soc_desc,
.fixup = realview_pb1176_fixup,
.map_io = realview_pb1176_map_io,
.init_early = realview_init_early,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 671ad6d..6cb8318 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -361,6 +361,7 @@ static void __init realview_pb11mp_init(void)
MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.atag_offset = 0x100,
+ .soc = &realview_soc_desc,
.fixup = realview_fixup,
.map_io = realview_pb11mp_map_io,
.init_early = realview_init_early,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index cbf22df..3db72c5 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -311,6 +311,7 @@ static void __init realview_pba8_init(void)
MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.atag_offset = 0x100,
+ .soc = &realview_soc_desc,
.fixup = realview_fixup,
.map_io = realview_pba8_map_io,
.init_early = realview_init_early,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 63c4114..bea4212 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -394,6 +394,7 @@ static void __init realview_pbx_init(void)
MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.atag_offset = 0x100,
+ .soc = &realview_soc_desc,
.fixup = realview_pbx_fixup,
.map_io = realview_pbx_map_io,
.init_early = realview_init_early,
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index f439715..bd9065a 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -17,3 +17,13 @@ struct amba_device name##_device = { \
.irq = IRQ_##base, \
/* .dma = DMA_##base,*/ \
}
+
+struct arm_soc_smp_init_ops;
+struct arm_soc_smp_ops;
+
+extern struct arm_soc_smp_init_ops vexpress_soc_smp_init_ops;
+extern struct arm_soc_smp_ops vexpress_soc_smp_ops;
+
+extern int vexpress_cpu_kill(unsigned int cpu);
+extern void vexpress_cpu_die(unsigned int cpu);
+extern int vexpress_cpu_disable(unsigned int cpu);
diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c
index 813ee08..08e5e42 100644
--- a/arch/arm/mach-vexpress/hotplug.c
+++ b/arch/arm/mach-vexpress/hotplug.c
@@ -83,7 +83,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
}
}
-int platform_cpu_kill(unsigned int cpu)
+int vexpress_cpu_kill(unsigned int cpu)
{
return 1;
}
@@ -93,7 +93,7 @@ int platform_cpu_kill(unsigned int cpu)
*
* Called with IRQs disabled
*/
-void platform_cpu_die(unsigned int cpu)
+void vexpress_cpu_die(unsigned int cpu)
{
int spurious = 0;
@@ -113,7 +113,7 @@ void platform_cpu_die(unsigned int cpu)
pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
}
-int platform_cpu_disable(unsigned int cpu)
+int vexpress_cpu_disable(unsigned int cpu)
{
/*
* we don't allow CPU 0 to be shutdown (it is still too special
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 2b5f7ac..523d226 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -13,25 +13,26 @@
#include <linux/smp.h>
#include <linux/io.h>
+#include <asm/soc.h>
#include <asm/unified.h>
#include <mach/motherboard.h>
#define V2M_PA_CS7 0x10000000
-#include "core.h"
+#include <plat/platsmp.h>
-extern void versatile_secondary_startup(void);
+#include "core.h"
/*
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init vexpress_smp_init_cpus(void)
{
ct_desc->init_cpu_map();
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init vexpress_smp_prepare_cpus(unsigned int max_cpus)
{
/*
* Initialise the present map, which describes the set of CPUs
@@ -49,3 +50,18 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
writel(BSYM(virt_to_phys(versatile_secondary_startup)),
MMIO_P2V(V2M_SYS_FLAGSSET));
}
+
+struct arm_soc_smp_init_ops vexpress_soc_smp_init_ops __initdata = {
+ .smp_init_cpus = vexpress_smp_init_cpus,
+ .smp_prepare_cpus = vexpress_smp_prepare_cpus,
+};
+
+struct arm_soc_smp_ops vexpress_soc_smp_ops __initdata = {
+ .smp_secondary_init = versatile_secondary_init,
+ .smp_boot_secondary = versatile_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_kill = vexpress_cpu_kill,
+ .cpu_die = vexpress_cpu_die,
+ .cpu_disable = vexpress_cpu_disable,
+#endif
+};
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1fafc32..47bca2a 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -16,6 +16,7 @@
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
+#include <asm/soc.h>
#include <asm/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -28,6 +29,7 @@
#include <mach/motherboard.h>
#include <plat/sched_clock.h>
+#include <plat/platsmp.h>
#include "core.h"
@@ -442,8 +444,15 @@ static void __init v2m_init(void)
ct_desc->init_tile();
}
+static struct arm_soc_desc vexpress_soc_desc __initdata = {
+ .name = "ARM VE Platform",
+ soc_smp_init_ops(vexpress_soc_smp_init_ops)
+ soc_smp_ops(vexpress_soc_smp_ops)
+};
+
MACHINE_START(VEXPRESS, "ARM-Versatile Express")
.atag_offset = 0x100,
+ .soc = &vexpress_soc_desc,
.map_io = v2m_map_io,
.init_early = v2m_init_early,
.init_irq = v2m_init_irq,
diff --git a/arch/arm/plat-versatile/include/plat/platsmp.h b/arch/arm/plat-versatile/include/plat/platsmp.h
new file mode 100644
index 0000000..50fb830
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/platsmp.h
@@ -0,0 +1,14 @@
+/*
+ * linux/arch/arm/plat-versatile/include/plat/platsmp.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+extern void versatile_secondary_startup(void);
+extern void versatile_secondary_init(unsigned int cpu);
+extern int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle);
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 92f18d3..d403022 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -39,7 +39,7 @@ static void __cpuinit write_pen_release(int val)
static DEFINE_SPINLOCK(boot_lock);
-void __cpuinit platform_secondary_init(unsigned int cpu)
+void __cpuinit versatile_secondary_init(unsigned int cpu)
{
/*
* if any interrupts are already enabled for the primary
@@ -61,7 +61,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
--
1.7.0.4
^ permalink raw reply related
* [PATCH v5 02/10] ARM: SoC: Add per SoC SMP and CPU hotplug operations
From: Marc Zyngier @ 2011-10-10 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318255342-17451-1-git-send-email-marc.zyngier@arm.com>
Populate the SoC descriptor structure with the SMP and CPU hotplug
operations. To allow the kernel to continue building, the platform
hooks are defined as weak symbols which are overrided by the
platform code. Once all platforms are converted, the "weak" attribute
will be removed and the function made static.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/soc.h | 45 ++++++++++++++++++++++++++++
arch/arm/kernel/setup.c | 1 +
arch/arm/kernel/smp.c | 69 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 115 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/soc.h b/arch/arm/include/asm/soc.h
index 2d73e35..1bcc58c 100644
--- a/arch/arm/include/asm/soc.h
+++ b/arch/arm/include/asm/soc.h
@@ -12,8 +12,53 @@
#ifndef __ASM_ARM_SOC_H
#define __ASM_ARM_SOC_H
+struct task_struct;
+
+struct arm_soc_smp_init_ops {
+ /*
+ * Setup the set of possible CPUs (via set_cpu_possible)
+ */
+ void (*smp_init_cpus)(void);
+ /*
+ * Initialize cpu_possible map, and enable coherency
+ */
+ void (*smp_prepare_cpus)(unsigned int max_cpus);
+};
+
+struct arm_soc_smp_ops {
+ /*
+ * Perform platform specific initialisation of the specified CPU.
+ */
+ void (*smp_secondary_init)(unsigned int cpu);
+ /*
+ * Boot a secondary CPU, and assign it the specified idle task.
+ * This also gives us the initial stack to use for this CPU.
+ */
+ int (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle);
+#ifdef CONFIG_HOTPLUG_CPU
+ int (*cpu_kill)(unsigned int cpu);
+ void (*cpu_die)(unsigned int cpu);
+ int (*cpu_disable)(unsigned int cpu);
+#endif
+};
+
struct arm_soc_desc {
const char *name;
+#ifdef CONFIG_SMP
+ struct arm_soc_smp_init_ops *smp_init_ops;
+ struct arm_soc_smp_ops *smp_ops;
+#endif
};
+#ifdef CONFIG_SMP
+#define soc_smp_init_ops(ops) .smp_init_ops = &(ops),
+#define soc_smp_ops(ops) .smp_ops = &(ops),
+extern void soc_smp_ops_register(struct arm_soc_smp_init_ops *,
+ struct arm_soc_smp_ops *);
+#else
+#define soc_smp_init_ops(ops) /* empty */
+#define soc_smp_ops(ops) /* empty */
+#define soc_smp_ops_register(a,b) do {} while(0)
+#endif
+
#endif /* __ASM_ARM_SOC_H */
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index c1814e9..ca9bab6 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -918,6 +918,7 @@ void __init setup_arch(char **cmdline_p)
if (mdesc->soc) {
soc_desc = mdesc->soc;
pr_info("SoC: %s\n", soc_desc->name);
+ soc_smp_ops_register(soc_desc->smp_init_ops, soc_desc->smp_ops);
} else
soc_desc = NULL;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8bb30c2..f7a9add 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -28,6 +28,7 @@
#include <linux/completion.h>
#include <linux/atomic.h>
+#include <asm/soc.h>
#include <asm/cacheflush.h>
#include <asm/cpu.h>
#include <asm/cputype.h>
@@ -155,9 +156,77 @@ int __cpuinit __cpu_up(unsigned int cpu)
return ret;
}
+/* SoC helpers */
+static const struct arm_soc_smp_init_ops *soc_smp_init_ops __initdata;
+static const struct arm_soc_smp_ops *soc_smp_ops __cpuinitdata;
+static struct arm_soc_smp_ops __soc_smp_ops __cpuinitdata;
+
+void __init soc_smp_ops_register(struct arm_soc_smp_init_ops *smp_init_ops,
+ struct arm_soc_smp_ops *smp_ops)
+{
+ if (smp_init_ops)
+ soc_smp_init_ops = smp_init_ops;
+
+ /*
+ * Warning: we're copying an __initdata structure into a
+ * __cpuinitdata structure. We *know* it is valid because only
+ * __cpuinit (or more persistant) functions should be pointed
+ * to by soc_smp_ops. Still, this is borderline ugly.
+ */
+ if (smp_ops) {
+ __soc_smp_ops = *smp_ops;
+ soc_smp_ops = &__soc_smp_ops;
+ }
+}
+
+void __attribute__((weak)) __init smp_init_cpus(void)
+{
+ if (soc_smp_init_ops && soc_smp_init_ops->smp_init_cpus)
+ soc_smp_init_ops->smp_init_cpus();
+}
+
+void __attribute__((weak)) __init platform_smp_prepare_cpus(unsigned int max_cpus)
+{
+ if (soc_smp_ops && soc_smp_init_ops->smp_prepare_cpus)
+ soc_smp_init_ops->smp_prepare_cpus(max_cpus);
+}
+
+void __attribute__((weak)) __cpuinit platform_secondary_init(unsigned int cpu)
+{
+ if (soc_smp_ops && soc_smp_ops->smp_secondary_init)
+ soc_smp_ops->smp_secondary_init(cpu);
+}
+
+int __attribute__((weak)) __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ if (soc_smp_ops && soc_smp_ops->smp_boot_secondary)
+ return soc_smp_ops->smp_boot_secondary(cpu, idle);
+ return -ENOSYS;
+}
+
#ifdef CONFIG_HOTPLUG_CPU
static void percpu_timer_stop(void);
+int __attribute__((weak)) __cpuinit platform_cpu_kill(unsigned int cpu)
+{
+ if (soc_smp_ops && soc_smp_ops->cpu_kill)
+ return soc_smp_ops->cpu_kill(cpu);
+ return 0;
+}
+
+void __attribute__((weak)) __cpuinit platform_cpu_die(unsigned int cpu)
+{
+ if (soc_smp_ops && soc_smp_ops->cpu_die)
+ soc_smp_ops->cpu_die(cpu);
+}
+
+int __attribute__((weak)) __cpuinit platform_cpu_disable(unsigned int cpu)
+{
+ if (soc_smp_ops && soc_smp_ops->cpu_disable)
+ return soc_smp_ops->cpu_disable(cpu);
+ return -EPERM;
+}
+
/*
* __cpu_disable runs on the processor to be shutdown.
*/
--
1.7.0.4
^ permalink raw reply related
* [PATCH v5 01/10] ARM: SoC: Introduce per SoC descriptor
From: Marc Zyngier @ 2011-10-10 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318255342-17451-1-git-send-email-marc.zyngier@arm.com>
The ARM core code expects the various SoCs to hide their
implementation differences behind a well established API.
The various sub-arch-specific bit are often either at
the machine descriptor level, or provided at link time
by the sub-arch code.
The SoC descriptor is a container that holds the SoC
specific bits that can be moved away from the machine
descriptor as well as an indirection point for the
global symbols (SMP and CPU hotplug support, for example).
This patch introduce this SoC descriptor, with the only field
being the name of the SoC.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/include/asm/mach/arch.h | 2 ++
arch/arm/include/asm/soc.h | 19 +++++++++++++++++++
arch/arm/kernel/setup.c | 7 +++++++
3 files changed, 28 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/soc.h
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 7d19425..a366432 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -13,6 +13,7 @@
struct tag;
struct meminfo;
struct sys_timer;
+struct arm_soc_desc;
struct machine_desc {
unsigned int nr; /* architecture number */
@@ -34,6 +35,7 @@ struct machine_desc {
unsigned int reserve_lp1 :1; /* never has lp1 */
unsigned int reserve_lp2 :1; /* never has lp2 */
unsigned int soft_reboot :1; /* soft reboot */
+ struct arm_soc_desc *soc; /* SoC descriptor */
void (*fixup)(struct tag *, char **,
struct meminfo *);
void (*reserve)(void);/* reserve mem blocks */
diff --git a/arch/arm/include/asm/soc.h b/arch/arm/include/asm/soc.h
new file mode 100644
index 0000000..2d73e35
--- /dev/null
+++ b/arch/arm/include/asm/soc.h
@@ -0,0 +1,19 @@
+/*
+ * linux/arch/arm/include/asm/soc.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_SOC_H
+#define __ASM_ARM_SOC_H
+
+struct arm_soc_desc {
+ const char *name;
+};
+
+#endif /* __ASM_ARM_SOC_H */
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d399777..c1814e9 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -45,6 +45,7 @@
#include <asm/cachetype.h>
#include <asm/tlbflush.h>
#include <asm/system.h>
+#include <asm/soc.h>
#include <asm/prom.h>
#include <asm/mach/arch.h>
@@ -140,6 +141,7 @@ static const char *cpu_name;
static const char *machine_name;
static char __initdata cmd_line[COMMAND_LINE_SIZE];
struct machine_desc *machine_desc __initdata;
+static const struct arm_soc_desc *soc_desc __initdata;
static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
@@ -913,6 +915,11 @@ void __init setup_arch(char **cmdline_p)
mdesc = setup_machine_tags(machine_arch_type);
machine_desc = mdesc;
machine_name = mdesc->name;
+ if (mdesc->soc) {
+ soc_desc = mdesc->soc;
+ pr_info("SoC: %s\n", soc_desc->name);
+ } else
+ soc_desc = NULL;
if (mdesc->soft_reboot)
reboot_setup("s");
--
1.7.0.4
^ permalink raw reply related
* [PATCH v5 00/10] Per SoC descriptor
From: Marc Zyngier @ 2011-10-10 14:02 UTC (permalink / raw)
To: linux-arm-kernel
This patch series introduces a per-soc descriptor which should, in the
end, contain most of the SoC specific operations.
This first patch series introduces the arm_soc_desc structure, adds
per-soc SMP and CPU hotplug operations, and converts all SMP platform
to this new scheme.
Patches against next-20111007. Tested on VExpress (A5 and A15),
RealView EB-11MP, OMAP4 (Panda) and Tegra2 (Harmony).
Changelog:
^ permalink raw reply
* [PATCH v3 1/6] iommu/core: split mapping to page sizes as supported by the hardware
From: Ohad Ben-Cohen @ 2011-10-10 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHQjnOOhtSiivWf34S8mjB9nqQfUwadLzE8zOm4jYvsgL_d+Wg@mail.gmail.com>
On Mon, Oct 10, 2011 at 2:52 PM, KyongHo Cho <pullip.cho@samsung.com> wrote:
> Do not we need to unmap all intermediate mappings if iommu_map() is failed?
Good idea, I'll add it.
Thanks!
Ohad.
^ permalink raw reply
* [PATCH 1/9] ARM: vic: Don't write to the read-only register VIC_IRQ_STATUS
From: Zoltan Devai @ 2011-10-10 13:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKnu2Mpnp9hNhdzFURQGvTbeoVpyKfWY2YU3MDs2yEPgC-YYAA@mail.gmail.com>
2011/10/10 Linus Walleij <linus.walleij@linaro.org>:
> 2011/10/9 Zoltan Devai <zoss@devai.org>:
>
>> This is unneeded and causes an abort on the SPMP8000 platform.
>>
>> Signed-off-by: Zoltan Devai <zoss@devai.org>
>> ---
>> ?arch/arm/common/vic.c | ? ?1 -
>> ?1 files changed, 0 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
>> index b22b83d..651c77d 100644
>> --- a/arch/arm/common/vic.c
>> +++ b/arch/arm/common/vic.c
>> @@ -274,7 +274,6 @@ static void __init vic_disable(void __iomem *base)
>> ? ? ? ?writel(0, base + VIC_INT_SELECT);
>> ? ? ? ?writel(0, base + VIC_INT_ENABLE);
>> ? ? ? ?writel(~0, base + VIC_INT_ENABLE_CLEAR);
>> - ? ? ? writel(0, base + VIC_IRQ_STATUS);
>> ? ? ? ?writel(0, base + VIC_ITCR);
>> ? ? ? ?writel(~0, base + VIC_INT_SOFT_CLEAR);
>> ?}
>
> Indeed.
>
> This patch stands on its own, please put it into Russell's patch
> tracker at http://www.arm.linux.org.uk/developer/patches/
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Done, will exclude this from the next series.
^ permalink raw reply
* [PATCH v3 1/6] iommu/core: split mapping to page sizes as supported by the hardware
From: Ohad Ben-Cohen @ 2011-10-10 13:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111010094738.GW2138@amd.com>
[ -bouncing Hiroshi.DOYU at nokia.com, +not-bouncing hdoyu at nvidia.com :
hi Hiroshi :) ]
Hi Joerg,
On Mon, Oct 10, 2011 at 11:47 AM, Roedel, Joerg <Joerg.Roedel@amd.com> wrote:
> sorry, I was on vacation last week and had no time to look into this.
Sure thing, thanks for replying!
>> +#include <linux/bitmap.h>
>
> Is this still required?
Nope, removed, thanks.
> Hmm, I thought a little bit about that and came to the conculusion it
> might be best to just keep the page-sizes as a part of the iommu_ops
> structure. So there is no need to extend the register_iommu interface.
Sure. That was one of my initial alternatives, but I decided against
it at that time. I'll bring it back - it will help with the
bus_set_iommu rebasing.
> Also, the bus_set_iommu interface is now in the -next branch. Would be
> good if you rebase the patches to that interface.
Sure. It's a little tricky though: which branch do I base this on ?
Are you ok with me basing this on your 'next' branch ? My current
stack depends at least on three branches of yours, so that would be
helpful for me (and less merging conflicts for you I guess :).
> I think we need some care here and check pgsize for 0. A BUG_ON should
> do.
I can add it if you prefer, but I don't think it can really happen:
basically, it means that we chose a too small and unsupported page
bit, which can't happen as long as we check for IS_ALIGNED(iova |
paddr | size, iommu_min_pagesz) in the beginning of iommu_map.
>> + ? ? ? ? ? ? ? unmapped_order = iommu_ops->unmap(domain, iova, order);
>
> I think we should make sure that we call iommu_ops->unmap with the same
> parameters as iommu_ops->map. Otherwise we still need some page-size
> complexity in the iommu-drivers.
Ok, let's discuss the semantics of ->unmap().
There isn't a clear documentation of that API (we should probably add
some kernel docs after we nail it down now), but judging from the
existing users (mainly kvm) and drivers, it seems that iommu_map() and
iommu_unmap() aren't symmetric: users rely on unmap() to return the
actual size that was unmapped. IOMMU drivers, in turn, should check
which page is mapped on 'iova', unmap it, and return its size.
This way iommu_unmap() becomes very simple: it just iterates through
the region, relying on iommu_ops->unmap() to return the sizes that
were actually unmapped (very similar to how amd's iommu_unmap_page
works today). This also means that iommu_ops->unmap() doesn't really
need a size/order argument and we can remove it (after all drivers
fully migrate..).
The other approach which you suggest means symmetric iommu_map() and
iommu_unmap(). It means adding a 'paddr' parameter to iommu_unmap(),
which is easy, but maybe more concerning is the limitation that it
incurs: users will now have to call iommu_unmap() exactly as they
called iommu_map() beforehand. Note sure how well this will fly with
the existing users (kvm ?) and whether we really want to enforce this
(it doesn't mean drivers need to deal with page-size complexity. they
are required to unmap a single page at a time, and iommu_unmap() will
do the work for them).
Another discussion:
I think we better change iommu_ops->map() to directly take a 'size'
(in bytes) instead of an 'order' (of pages). Most (all?) drivers just
immediately do 'size = 0x1000UL << gfp_order', so this whole size ->
order -> size back and forth seems redundant.
> When we pass the size now it makes sense to also return the
> unmapped-size instead of the order.
Sure.
Thanks for your review,
Ohad.
^ permalink raw reply
* [PATCH 2/3] ARM: plat-samsung: use Kconfig choice for debug UART selection
From: Thomas Abraham @ 2011-10-10 13:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111010133455.GH2451@mudshark.cambridge.arm.com>
On 10 October 2011 19:04, Will Deacon <will.deacon@arm.com> wrote:
> On Mon, Oct 10, 2011 at 01:35:54PM +0100, Thomas Abraham wrote:
>> There are no difficulties with the original patch. But that was not
>> how Samsung boards have been selecting the low level debug uart port
>> number. The proposed patch tried to maintain the old style.
>>
>> Another point is that Samsung's Exynos4 (and few other SoC's) has a
>> fourth UART port as well. Not that it is used as a debug port
>> currently, but there is no technical limitation in using that as a
>> console port. So that might need 'DEBUG_S3C_UART3' as well.
>
> Tell you what then: let's stick with the original patch for now and then you
> can refactor the Samsung bit in the future if/when you add support for the
> fourth UART. Does that sound OK?
Yes. That sounds fine. Thanks for having a look at the proposed diff.
Regards,
Thomas.
>
> Will
>
^ permalink raw reply
* [PATCH 2/3] ARM: plat-samsung: use Kconfig choice for debug UART selection
From: Will Deacon @ 2011-10-10 13:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJuYYwQiXSSOQ_FvOn41NSUJ6F4axNbYgV-LfOxhhLvbUz-bMQ@mail.gmail.com>
On Mon, Oct 10, 2011 at 01:35:54PM +0100, Thomas Abraham wrote:
> There are no difficulties with the original patch. But that was not
> how Samsung boards have been selecting the low level debug uart port
> number. The proposed patch tried to maintain the old style.
>
> Another point is that Samsung's Exynos4 (and few other SoC's) has a
> fourth UART port as well. Not that it is used as a debug port
> currently, but there is no technical limitation in using that as a
> console port. So that might need 'DEBUG_S3C_UART3' as well.
Tell you what then: let's stick with the original patch for now and then you
can refactor the Samsung bit in the future if/when you add support for the
fourth UART. Does that sound OK?
Will
^ permalink raw reply
* [GIT PULL] DEBUG_LL platform updates for 3.2
From: Will Deacon @ 2011-10-10 13:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201110101320.24457.arnd@arndb.de>
On Mon, Oct 10, 2011 at 12:20:24PM +0100, Arnd Bergmann wrote:
> On Monday 10 October 2011, Will Deacon wrote:
> > Do you have any other ideas?
>
> I think the best solution would be to ask Russell to put all the dependencies
> into a non-rebasing branch and publish that, or to alternatively merge your
> patches through his tree instead, with my Ack.
I don't think asking Russell to maintain a stable branch for each series
scales very well if multiple people are doing cross-platform work at the
same time. If he's happy merging platform code via his tree, then I'd prefer
to go down that route. In this case, it might make sense to try and catch
conflicts between his tree and arm-soc before they hit Linus (I guess -next
will take care of this?).
> Both of these will also have to wait for a few more days until Russell
> is back online.
Ok, I wasn't aware that we was away.
> Can you check if the devel-stable branch in his tree already contains the
> dependencies?
I just had a quick look and I can't seem them outside of the unstable for-next
branch.
Cheers,
Will
^ permalink raw reply
* [PATCH 5/7] ARM: EXYNOS4: Add support external GIC
From: Marc Zyngier @ 2011-10-10 13:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111007151646.GA2398@mudshark.cambridge.arm.com>
On 07/10/11 16:16, Will Deacon wrote:
> Hi Marc,
>
> On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote:
>> So to make my suggestion completely clear, here's a patch I'm now
>> carrying in my tree. It's only been test compiled on EXYNOS4, but works
>> nicely on my 11MP. It turns both dist_base and cpu_base into per-cpu
>> variables, removes these callbacks, removes your private copy of
>> gic_cpu_init, and makes struct gic_chip_data private again.
>>
>> What do you think?
>
> This looks like the right sort of idea, although I'm deeply suspicious about
> per-cpu base addresses for the GIC distributor. It would be nice if the
> Samsung guys can elaborate on what's going on here. Few comments inline.
Yeah, this seem odd, specially as what's currently in mainline doesn't
try to play tricks with the distributor. It looks like having a per-core
distributor address is required for PPI usage on these SoCs, but the
commit message is uninformative at best:
https://github.com/sfrothwell/linux-next/commit/637c2afa57ec9cd0ddc8879ea0cda4d8835ba71d#arch/arm/mach-exynos4/cpu.c
Again, comments from Samsung people would be much appreciated.
>> Subject: [PATCH] ARM: gic: allow GIC to support non-banked setups
>>
>> The GIC support code is heavily using the fact that hardware
>> implementations are exposing banked registers. Unfortunately, it
>> looks like at least one GIC implementation (EXYNOS4) offers both
>> the distributor and the CPU interfaces at different addresses,
>> depending on the CPU.
>>
>> This problem is solved by turning the distributor and CPU interface
>> addresses into per-cpu variables. The EXYNOS4 code is updated not
>> to mess with the GIC internals while handling interrupts, and
>> struct gic_chip_data is back to being private.
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> ---
>> arch/arm/common/gic.c | 76 +++++++++++++++++++++++++++--------
>> arch/arm/include/asm/hardware/gic.h | 17 +------
>> arch/arm/mach-exynos4/cpu.c | 14 ------
>> arch/arm/mach-exynos4/platsmp.c | 28 ++-----------
>> 4 files changed, 66 insertions(+), 69 deletions(-)
>>
>> diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
>> index b574931..c7521dd 100644
>> --- a/arch/arm/common/gic.c
>> +++ b/arch/arm/common/gic.c
>> @@ -37,6 +37,20 @@
>> #include <asm/mach/irq.h>
>> #include <asm/hardware/gic.h>
>>
>> +struct gic_chip_data {
>> + unsigned int irq_offset;
>> + void __percpu __iomem **dist_base;
>> + void __percpu __iomem **cpu_base;
>> +#ifdef CONFIG_CPU_PM
>> + u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
>> + u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
>> + u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
>> + u32 __percpu *saved_ppi_enable;
>> + u32 __percpu *saved_ppi_conf;
>> +#endif
>> + unsigned int gic_irqs;
>> +};
>
> I think you can use DECLARE_PER_CPU(void __iomem *dist_base) etc. instead.
Unfortunately, you can't. That would be nice though... ;-)
>> +static void __cpuinit exynos4_secondary_init(unsigned int cpu)
>> {
>> void __iomem *dist_base = S5P_VA_GIC_DIST +
>> - (gic_bank_offset * smp_processor_id());
>> + (gic_bank_offset * cpu_logical_map(cpu));
>
> Again, I'm deeply suspicious of this code :) Is there not a common memory
> alias for the distributor across all of the CPUs?
Kukjin, could you please comment on the presence of a common memory
region for the distributor? This seem quite odd...
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH] ARM: S3C64XX: Enable TCM support
From: Mark Brown @ 2011-10-10 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdYtH4SCk3o3W84u+pLwzaXnmU1OP7p631bC08QnP2bR9A@mail.gmail.com>
On Mon, Oct 10, 2011 at 02:58:30PM +0200, Linus Walleij wrote:
> On Mon, Oct 10, 2011 at 12:27 PM, Mark Brown
> > The S3C64xx CPUs have TCMs so enable the kernel support for it on these
> > systems.
> Cool! How big are they each, i.e. dmesg?
2x8k each of ITCM and DTCM (16k of each total).
^ permalink raw reply
* [PATCH] ARM: S3C64XX: Enable TCM support
From: Linus Walleij @ 2011-10-10 12:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318242473-19037-1-git-send-email-broonie@opensource.wolfsonmicro.com>
On Mon, Oct 10, 2011 at 12:27 PM, Mark Brown
<broonie@opensource.wolfsonmicro.com> wrote:
> The S3C64xx CPUs have TCMs so enable the kernel support for it on these
> systems.
>
> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cool! How big are they each, i.e. dmesg?
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v3 1/6] iommu/core: split mapping to page sizes as supported by the hardware
From: KyongHo Cho @ 2011-10-10 12:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAK=WgbbNs5fWHDEputZ=jzU5YN0sn0tf6AETkcsoq_Jbvc2XgQ@mail.gmail.com>
On Mon, Oct 3, 2011 at 12:58 AM, Ohad Ben-Cohen <ohad@wizery.com> wrote:
> ?int iommu_map(struct iommu_domain *domain, unsigned long iova,
> - ? ? ? ? ? ? phys_addr_t paddr, int gfp_order, int prot)
> + ? ? ? ? ? ? phys_addr_t paddr, size_t size, int prot)
> ?{
> - ? ? ? size_t size;
> + ? ? ? int ret = 0;
> +
> + ? ? ? /*
> + ? ? ? ?* both the virtual address and the physical one, as well as
> + ? ? ? ?* the size of the mapping, must be aligned (at least) to the
> + ? ? ? ?* size of the smallest page supported by the hardware
> + ? ? ? ?*/
> + ? ? ? if (!IS_ALIGNED(iova | paddr | size, iommu_min_pagesz)) {
> + ? ? ? ? ? ? ? pr_err("unaligned: iova 0x%lx pa 0x%lx size 0x%lx min_pagesz "
> + ? ? ? ? ? ? ? ? ? ? ? "0x%x\n", iova, (unsigned long)paddr,
> + ? ? ? ? ? ? ? ? ? ? ? (unsigned long)size, iommu_min_pagesz);
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
>
> - ? ? ? size ? ? ? ? = 0x1000UL << gfp_order;
> + ? ? ? pr_debug("map: iova 0x%lx pa 0x%lx size 0x%lx\n", iova,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (unsigned long)paddr, (unsigned long)size);
>
> - ? ? ? BUG_ON(!IS_ALIGNED(iova | paddr, size));
> + ? ? ? while (size) {
> + ? ? ? ? ? ? ? unsigned long pgsize, addr_merge = iova | paddr;
> + ? ? ? ? ? ? ? unsigned int pgsize_idx;
>
> - ? ? ? return iommu_ops->map(domain, iova, paddr, gfp_order, prot);
> + ? ? ? ? ? ? ? /* Max page size that still fits into 'size' */
> + ? ? ? ? ? ? ? pgsize_idx = __fls(size);
> +
> + ? ? ? ? ? ? ? /* need to consider alignment requirements ? */
> + ? ? ? ? ? ? ? if (likely(addr_merge)) {
> + ? ? ? ? ? ? ? ? ? ? ? /* Max page size allowed by both iova and paddr */
> + ? ? ? ? ? ? ? ? ? ? ? unsigned int align_pgsize_idx = __ffs(addr_merge);
> +
> + ? ? ? ? ? ? ? ? ? ? ? pgsize_idx = min(pgsize_idx, align_pgsize_idx);
> + ? ? ? ? ? ? ? }
> +
> + ? ? ? ? ? ? ? /* build a mask of acceptable page sizes */
> + ? ? ? ? ? ? ? pgsize = (1UL << (pgsize_idx + 1)) - 1;
> +
> + ? ? ? ? ? ? ? /* throw away page sizes not supported by the hardware */
> + ? ? ? ? ? ? ? pgsize &= iommu_pgsize_bitmap;
> +
> + ? ? ? ? ? ? ? /* pick the biggest page */
> + ? ? ? ? ? ? ? pgsize_idx = __fls(pgsize);
> + ? ? ? ? ? ? ? pgsize = 1UL << pgsize_idx;
> +
> + ? ? ? ? ? ? ? /* convert index to page order */
> + ? ? ? ? ? ? ? pgsize_idx -= PAGE_SHIFT;
> +
> + ? ? ? ? ? ? ? pr_debug("mapping: iova 0x%lx pa 0x%lx order %u\n", iova,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (unsigned long)paddr, pgsize_idx);
> +
> + ? ? ? ? ? ? ? ret = iommu_ops->map(domain, iova, paddr, pgsize_idx, prot);
> + ? ? ? ? ? ? ? if (ret)
> + ? ? ? ? ? ? ? ? ? ? ? break;
> +
> + ? ? ? ? ? ? ? iova += pgsize;
> + ? ? ? ? ? ? ? paddr += pgsize;
> + ? ? ? ? ? ? ? size -= pgsize;
> + ? ? ? }
> +
> + ? ? ? return ret;
> ?}
> ?EXPORT_SYMBOL_GPL(iommu_map);
Do not we need to unmap all intermediate mappings if iommu_map() is failed?
I think iommu_map() must map the entire given area if it successes.
Otherwise, it should map nothing.
I think it can be simply done with calling iommu_unmap()
with Joerg's previous suggestion about iommu_unmap().
Regards,
KyongHo.
^ permalink raw reply
* [PATCH 01/13] hwspinlock: OMAP4: Add spinlock support in DT
From: Ohad Ben-Cohen @ 2011-10-10 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317055821-20652-2-git-send-email-b-cousson@ti.com>
Hi Benoit,
On Mon, Sep 26, 2011 at 7:50 PM, Benoit Cousson <b-cousson@ti.com> wrote:
> +++ b/Documentation/devicetree/bindings/hwspinlock/omap-spinlock.txt
> @@ -0,0 +1,5 @@
> +* HW spinlock on OMAP4 platform:
> +
> +Required properties:
> +- compatible : Must be "ti,omap4-spinlock";
> +- ti,hwmods : "spinlock"
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> index 4c61c82..7a7f31e 100644
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -99,5 +99,10 @@
> ? ? ? ? ? ? ? ? ? ? ? ?reg = <0x48241000 0x1000>,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?<0x48240100 0x0100>;
> ? ? ? ? ? ? ? ?};
> +
> + ? ? ? ? ? ? ? spinlock {
> + ? ? ? ? ? ? ? ? ? ? ? compatible = "ti,omap4-spinlock";
> + ? ? ? ? ? ? ? ? ? ? ? ti,hwmods = "spinlock";
> + ? ? ? ? ? ? ? };
I think it'd be nice to add the 'baseid' property as we discussed for
dynamic allocation of hwspinlocks.
The patch that adds the hwspinlock groundwork for this is in
linux-next and will hopefully get into 3.2 if everything works out
well:
https://lkml.org/lkml/2011/9/12/194
Of course, as we discussed with Arnd, we will use phandles to the
hwspinlock controller when we'll get to static allocations of
hwspinlock instances.
Thanks,
Ohad.
^ permalink raw reply
* [PATCH] fix ehci alignment error
From: Harro Haan @ 2011-10-10 12:38 UTC (permalink / raw)
To: linux-arm-kernel
An embedded and charset-unspecified text was scrubbed...
Name: fix-ehci-alignment-error.patch
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20111010/016cc19d/attachment.ksh>
^ permalink raw reply
* [PATCH 2/3] ARM: plat-samsung: use Kconfig choice for debug UART selection
From: Thomas Abraham @ 2011-10-10 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111010122319.GE2451@mudshark.cambridge.arm.com>
On 10 October 2011 17:53, Will Deacon <will.deacon@arm.com> wrote:
> On Mon, Oct 10, 2011 at 12:56:24PM +0100, Thomas Abraham wrote:
>> Hi Will,
>
> Hi Thomas,
>>
>> What is your opinion about the following diff instead of the above one?
>>
>>
>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>> index 65cf8c6..035f5cd 100644
>> --- a/arch/arm/Kconfig.debug
>> +++ b/arch/arm/Kconfig.debug
>> @@ -120,6 +120,15 @@ choice
>> ? ? ? ? ? ? ? ? Say Y here if you want the debug print routines to direct
>> ? ? ? ? ? ? ? ? their output to the second serial port on these devices.
>>
>> + ? ? config DEBUG_SAMSUNG_UART
>> + ? ? ? ? ? ? bool "Kernel low-level debugging messages via samsung serial port"
>> + ? ? ? ? ? ? depends on PLAT_SAMSUNG
>> + ? ? ? ? ? ? help
>> + ? ? ? ? ? ? ? Say Y here if you want the debug print routines to direct
>> + ? ? ? ? ? ? ? their output to the serial port for Samsung platforms. Choose
>> + ? ? ? ? ? ? ? the uart port with the "S3C UART to use for low-level debug"
>> + ? ? ? ? ? ? ? config option.
>> +
>> ?endchoice
>>
>> ?config EARLY_PRINTK
>> @@ -139,7 +148,7 @@ config OC_ETM
>> ? ? ? ? kernel code.
>>
>> ?config DEBUG_S3C_UART
>> - ? ? depends on PLAT_SAMSUNG
>> + ? ? depends on DEBUG_SAMSUNG_UART
>> ? ? ? int "S3C UART to use for low-level debug"
>> ? ? ? default "0"
>> ? ? ? help
>
> Well, it's smaller so that's always a plus. However, I don't think the extra
> level of indirection helps (that is, the "Kernel low-level debugging UART")
> choice should be where the UART is specified, rather than pointing you at
> another (platform-specific) option).
>
> Did your suggestion come purely out of aesthetics or are you running into
> difficulties with the original patch?
There are no difficulties with the original patch. But that was not
how Samsung boards have been selecting the low level debug uart port
number. The proposed patch tried to maintain the old style.
Another point is that Samsung's Exynos4 (and few other SoC's) has a
fourth UART port as well. Not that it is used as a debug port
currently, but there is no technical limitation in using that as a
console port. So that might need 'DEBUG_S3C_UART3' as well.
Thanks,
Thomas.
>
> Will
>
^ permalink raw reply
* [PATCH 1/2] drivers: create a pin control subsystem v9
From: Shawn Guo @ 2011-10-10 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdbdz0FE57TdVryKD+X2=1sf-M9NgiZzm+Sm+WYhU6n_bQ@mail.gmail.com>
On Mon, Oct 10, 2011 at 10:23:53AM +0200, Linus Walleij wrote:
> On Sun, Oct 9, 2011 at 11:36 AM, Shawn Guo <shawn.guo@freescale.com> wrote:
>
> >> + * @hog_on_boot: if this is set to true, the regulator subsystem will itself
> > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^
> > s/regulator/pinmux?
>
> Yep!
>
> >> +#endif /* !CONFIG_PINCTRL */
> >
> > s/!CONFIG_PINCTRL/CONFIG_PINMUX?
>
> Yep!
>
> Foldes into original patch with a fixup comment.
>
> Can I have your Reviewed-by: tag on this subsystem?
>
Sorry, not yet. This is not a full review. I'm trying to migrate imx
pinctrl to the subsystem. And all these are just some random spotting.
Another couple of typo on pinctrl.txt?
> diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
> new file mode 100644
> index 0000000..2915fea
> --- /dev/null
> +++ b/Documentation/pinctrl.txt
> @@ -0,0 +1,951 @@
[...]
> +The example 8x8 PGA package above will have pin numbers 0 thru 63 assigned to
> +its physical pins. It will name the pins { A1, A2, A3 ... H6, H7, H8 } using
> +pinctrl_register_pins_[sparse|dense]() and a suitable data set as shown
It should just be pinctrl_register_pins()?
> +earlier.
[...]
> +System pinmux hogging
> +=====================
> +
> +A system pinmux map entry, i.e. a pinmux setting that does not have a device
> +associated with it, can be hogged by the core when the pin controller is
> +registered. This means that the core will attempt to call regulator_get() and
> +regulator_enable() on it immediately after the pin control device has been
> +registered.
s/regulator_get/pinmux_get, and s/regulator_enable/pinmux_enable
--
Regards,
Shawn
^ permalink raw reply
* [PATCH 1/2] drivers: create a pin control subsystem v9
From: Linus Walleij @ 2011-10-10 12:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111010123018.GD24198@S2100-06.ap.freescale.net>
On Mon, Oct 10, 2011 at 2:30 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
>> +The example 8x8 PGA package above will have pin numbers 0 thru 63 assigned to
>> +its physical pins. It will name the pins { A1, A2, A3 ... H6, H7, H8 } using
>> +pinctrl_register_pins_[sparse|dense]() and a suitable data set as shown
>
> It should just be pinctrl_register_pins()?
Yep, fixed it.
>> +System pinmux hogging
>> +=====================
>> +
>> +A system pinmux map entry, i.e. a pinmux setting that does not have a device
>> +associated with it, can be hogged by the core when the pin controller is
>> +registered. This means that the core will attempt to call regulator_get() and
>> +regulator_enable() on it immediately after the pin control device has been
>> +registered.
>
> s/regulator_get/pinmux_get, and s/regulator_enable/pinmux_enable
Fixed this too, sorry for being so hung up on the regulator subsystem,
must be that I really like it...
Thanks,
Linus Walleij
^ permalink raw reply
* [RFT/PATCH 7/7] arm: omap: smartreflex: micro-optimization for sanity check
From: Felipe Balbi @ 2011-10-10 12:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318249579-4089-1-git-send-email-balbi@ti.com>
val && (val != 1) == val > 1
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/mach-omap2/smartreflex.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 7bdabfa..4b0d6a8 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -866,7 +866,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
}
/* Sanity check */
- if (val && (val != 1)) {
+ if (val > 1) {
pr_warning("%s: Invalid argument %lld\n", __func__, val);
return -EINVAL;
}
--
1.7.6.396.ge0613
^ permalink raw reply related
* [RFT/PATCH 6/7] arm: omap: smartreflex: fix IRQ handling bug
From: Felipe Balbi @ 2011-10-10 12:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318249579-4089-1-git-send-email-balbi@ti.com>
fix a bug which has been on this driver since
it was added by the original commit 984aa6db
which would never clear IRQSTATUS bits.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/mach-omap2/smartreflex.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 6e9eb46..7bdabfa 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -154,7 +154,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
break;
case SR_TYPE_V2:
/* Read the status bits */
- sr_read_reg(sr_info, IRQSTATUS);
+ status = sr_read_reg(sr_info, IRQSTATUS);
/* Clear them by writing back */
sr_write_reg(sr_info, IRQSTATUS, status);
--
1.7.6.396.ge0613
^ permalink raw reply related
* [RFT/PATCH 5/7] arm: omap: smartreflex: clean ups all over
From: Felipe Balbi @ 2011-10-10 12:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318249579-4089-1-git-send-email-balbi@ti.com>
There are no functional changes here, only
misc cleanups in general: tabifying variable
declarations, converting if {} else if {} else {}
into switch statements, etc.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/mach-omap2/smartreflex.c | 217 +++++++++++++++++++++++--------------
1 files changed, 134 insertions(+), 83 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 28a24fd..6e9eb46 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -36,26 +36,32 @@
#define SR_DISABLE_TIMEOUT 200
struct omap_sr {
- int srid;
- int ip_type;
+ struct list_head node;
+ struct platform_device *pdev;
+ struct omap_sr_nvalue_table *nvalue_table;
+ struct voltagedomain *voltdm;
+
+ unsigned int irq;
+
int nvalue_count;
- bool autocomp_active;
- bool is_suspended;
- u32 clk_length;
- u32 err_weight;
+ int ip_type;
+ int srid;
+
+ u32 senn_avgweight;
+ u32 senp_avgweight;
u32 err_minlimit;
u32 err_maxlimit;
+ u32 clk_length;
+ u32 err_weight;
u32 accum_data;
- u32 senn_avgweight;
- u32 senp_avgweight;
u32 senp_mod;
u32 senn_mod;
- unsigned int irq;
+
+ bool autocomp_active;
+ bool is_suspended;
+
void __iomem *base;
- struct platform_device *pdev;
- struct list_head node;
- struct omap_sr_nvalue_table *nvalue_table;
- struct voltagedomain *voltdm;
+
struct dentry *dbg_dir;
};
@@ -73,11 +79,9 @@ static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
u32 value)
{
- u32 reg_val;
- u32 errconfig_offs = 0, errconfig_mask = 0;
-
- reg_val = __raw_readl(sr->base + offset);
- reg_val &= ~mask;
+ u32 reg_val;
+ u32 errconfig_offs = 0;
+ u32 errconfig_mask = 0;
/*
* Smartreflex error config register is special as it contains
@@ -88,14 +92,23 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
* if they are currently set, but does allow the caller to write
* those bits.
*/
- if (sr->ip_type == SR_TYPE_V1) {
+ switch (sr->ip_type) {
+ case SR_TYPE_V1:
errconfig_offs = ERRCONFIG_V1;
errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
- } else if (sr->ip_type == SR_TYPE_V2) {
+ break;
+ case SR_TYPE_V2:
errconfig_offs = ERRCONFIG_V2;
errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
+ break;
+ default: /* should never happen */
+ dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", sr->ip_type);
+ return;
}
+ reg_val = __raw_readl(sr->base + offset);
+ reg_val &= ~mask;
+
if (offset == errconfig_offs)
reg_val &= ~errconfig_mask;
@@ -111,7 +124,7 @@ static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
{
- struct omap_sr *sr_info;
+ struct omap_sr *sr_info;
if (!voltdm) {
pr_err("%s: Null voltage domain passed!\n", __func__);
@@ -128,33 +141,39 @@ static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
static irqreturn_t sr_interrupt(int irq, void *data)
{
- struct omap_sr *sr_info = (struct omap_sr *)data;
- u32 status = 0;
+ struct omap_sr *sr_info = data;
+ u32 status = 0;
- if (sr_info->ip_type == SR_TYPE_V1) {
+ switch (sr_info->ip_type) {
+ case SR_TYPE_V1:
/* Read the status bits */
status = sr_read_reg(sr_info, ERRCONFIG_V1);
/* Clear them by writing back */
sr_write_reg(sr_info, ERRCONFIG_V1, status);
- } else if (sr_info->ip_type == SR_TYPE_V2) {
+ break;
+ case SR_TYPE_V2:
/* Read the status bits */
sr_read_reg(sr_info, IRQSTATUS);
/* Clear them by writing back */
sr_write_reg(sr_info, IRQSTATUS, status);
- }
- if (sr_class->notify)
- sr_class->notify(sr_info->voltdm, status);
+ if (sr_class->notify)
+ sr_class->notify(sr_info->voltdm, status);
+ break;
+ default: /* should never happen */
+ dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n", sr_info->ip_type);
+ return IRQ_NONE;
+ }
return IRQ_HANDLED;
}
static void sr_set_clk_length(struct omap_sr *sr)
{
- struct clk *sys_ck;
- u32 sys_clk_speed;
+ struct clk *sys_ck;
+ u32 sys_clk_speed;
if (cpu_is_omap34xx())
sys_ck = clk_get(NULL, "sys_ck");
@@ -166,6 +185,7 @@ static void sr_set_clk_length(struct omap_sr *sr)
__func__);
return;
}
+
sys_clk_speed = clk_get_rate(sys_ck);
clk_put(sys_ck);
@@ -255,10 +275,10 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
*/
static int sr_late_init(struct omap_sr *sr_info)
{
- char *name;
- struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
- struct resource *mem;
- int ret = 0;
+ struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
+ struct resource *mem;
+ int ret = 0;
+ char *name;
if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
@@ -267,7 +287,7 @@ static int sr_late_init(struct omap_sr *sr_info)
goto error;
}
ret = request_irq(sr_info->irq, sr_interrupt,
- 0, name, (void *)sr_info);
+ 0, name, sr_info);
if (ret)
goto error;
disable_irq(sr_info->irq);
@@ -288,12 +308,13 @@ error:
"not function as desired\n", __func__);
kfree(name);
kfree(sr_info);
+
return ret;
}
static void sr_v1_disable(struct omap_sr *sr)
{
- int timeout = 0;
+ int timeout = 0;
/* Enable MCUDisableAcknowledge interrupt */
sr_modify_reg(sr, ERRCONFIG_V1,
@@ -329,7 +350,7 @@ static void sr_v1_disable(struct omap_sr *sr)
static void sr_v2_disable(struct omap_sr *sr)
{
- int timeout = 0;
+ int timeout = 0;
/* Enable MCUDisableAcknowledge interrupt */
sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
@@ -366,7 +387,7 @@ static void sr_v2_disable(struct omap_sr *sr)
static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
{
- int i;
+ int i;
if (!sr->nvalue_table) {
dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
@@ -398,10 +419,16 @@ static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
*/
int sr_configure_errgen(struct voltagedomain *voltdm)
{
- u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
- u32 vpboundint_st, senp_en = 0, senn_en = 0;
- u8 senp_shift, senn_shift;
- struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ u32 sr_config;
+ u32 sr_errconfig;
+ u32 errconfig_offs;
+ u32 vpboundint_en;
+ u32 vpboundint_st;
+ u32 senp_en = 0;
+ u32 senn_en = 0;
+ u8 senp_shift;
+ u8 senn_shift;
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -418,22 +445,24 @@ int sr_configure_errgen(struct voltagedomain *voltdm)
sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
- if (sr->ip_type == SR_TYPE_V1) {
+ switch (sr->ip_type) {
+ case SR_TYPE_V1:
sr_config |= SRCONFIG_DELAYCTRL;
senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
errconfig_offs = ERRCONFIG_V1;
vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
- } else if (sr->ip_type == SR_TYPE_V2) {
+ break;
+ case SR_TYPE_V2:
senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
errconfig_offs = ERRCONFIG_V2;
vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
- } else {
- dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
- "module without specifying the ip\n", __func__);
+ break;
+ default:
+ dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", sr->ip_type);
return -EINVAL;
}
@@ -467,10 +496,13 @@ int sr_configure_errgen(struct voltagedomain *voltdm)
*/
int sr_configure_minmax(struct voltagedomain *voltdm)
{
- u32 sr_config, sr_avgwt;
- u32 senp_en = 0, senn_en = 0;
- u8 senp_shift, senn_shift;
- struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ u32 sr_config;
+ u32 sr_avgwt;
+ u32 senp_en = 0;
+ u32 senn_en = 0;
+ u8 senp_shift;
+ u8 senn_shift;
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -488,16 +520,18 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
SRCONFIG_SENENABLE |
(sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
- if (sr->ip_type == SR_TYPE_V1) {
+ switch (sr->ip_type) {
+ case SR_TYPE_V1:
sr_config |= SRCONFIG_DELAYCTRL;
senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
- } else if (sr->ip_type == SR_TYPE_V2) {
+ break;
+ case SR_TYPE_V2:
senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
- } else {
- dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
- "module without specifying the ip\n", __func__);
+ break;
+ default:
+ dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", sr->ip_type);
return -EINVAL;
}
@@ -511,20 +545,26 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
* Enabling the interrupts if MINMAXAVG module is used.
* TODO: check if all the interrupts are mandatory
*/
- if (sr->ip_type == SR_TYPE_V1) {
+ switch (sr->ip_type) {
+ case SR_TYPE_V1:
sr_modify_reg(sr, ERRCONFIG_V1,
(ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
ERRCONFIG_MCUBOUNDINTEN),
(ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
- } else if (sr->ip_type == SR_TYPE_V2) {
+ break;
+ case SR_TYPE_V2:
sr_write_reg(sr, IRQSTATUS,
IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
sr_write_reg(sr, IRQENABLE_SET,
IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
+ break;
+ default:
+ dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", sr->ip_type);
+ return -EINVAL;
}
return 0;
@@ -543,10 +583,10 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
*/
int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
{
- u32 nvalue_reciprocal;
- struct omap_volt_data *volt_data;
- struct omap_sr *sr = _sr_lookup(voltdm);
- int ret;
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_volt_data *volt_data;
+ u32 nvalue_reciprocal;
+ int ret;
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -600,7 +640,7 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
*/
void sr_disable(struct voltagedomain *voltdm)
{
- struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr *sr = _sr_lookup(voltdm);
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -617,10 +657,17 @@ void sr_disable(struct voltagedomain *voltdm)
* disable the clocks.
*/
if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
- if (sr->ip_type == SR_TYPE_V1)
+ switch (sr->ip_type) {
+ case SR_TYPE_V1:
sr_v1_disable(sr);
- else if (sr->ip_type == SR_TYPE_V2)
+ break;
+ case SR_TYPE_V2:
sr_v2_disable(sr);
+ break;
+ default:
+ dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
+ sr->ip_type);
+ }
}
pm_runtime_put_sync_suspend(&sr->pdev->dev);
@@ -636,7 +683,7 @@ void sr_disable(struct voltagedomain *voltdm)
*/
int sr_register_class(struct omap_sr_class_data *class_data)
{
- struct omap_sr *sr_info;
+ struct omap_sr *sr_info;
if (!class_data) {
pr_warning("%s:, Smartreflex class data passed is NULL\n",
@@ -674,7 +721,7 @@ int sr_register_class(struct omap_sr_class_data *class_data)
*/
void omap_sr_enable(struct voltagedomain *voltdm)
{
- struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr *sr = _sr_lookup(voltdm);
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -712,7 +759,7 @@ void omap_sr_enable(struct voltagedomain *voltdm)
*/
void omap_sr_disable(struct voltagedomain *voltdm)
{
- struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr *sr = _sr_lookup(voltdm);
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -750,7 +797,7 @@ void omap_sr_disable(struct voltagedomain *voltdm)
*/
void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
{
- struct omap_sr *sr = _sr_lookup(voltdm);
+ struct omap_sr *sr = _sr_lookup(voltdm);
if (IS_ERR(sr)) {
pr_warning("%s: omap_sr struct for sr_%s not found\n",
@@ -794,10 +841,10 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
sr_pmic_data = pmic_data;
}
-/* PM Debug Fs enteries to enable disable smartreflex. */
+/* PM Debug Fs entries to enable disable smartreflex. */
static int omap_sr_autocomp_show(void *data, u64 *val)
{
- struct omap_sr *sr_info = (struct omap_sr *) data;
+ struct omap_sr *sr_info = data;
if (!sr_info) {
pr_warning("%s: omap_sr struct not found\n", __func__);
@@ -811,7 +858,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
static int omap_sr_autocomp_store(void *data, u64 val)
{
- struct omap_sr *sr_info = (struct omap_sr *) data;
+ struct omap_sr *sr_info = data;
if (!sr_info) {
pr_warning("%s: omap_sr struct not found\n", __func__);
@@ -842,13 +889,17 @@ DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
static int __init omap_sr_probe(struct platform_device *pdev)
{
- struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
- struct omap_sr_data *pdata = pdev->dev.platform_data;
- struct resource *mem, *irq;
- struct dentry *vdd_dbg_dir, *nvalue_dir;
- struct omap_volt_data *volt_data;
- int i, ret = 0;
-
+ struct omap_sr *sr_info;
+ struct omap_sr_data *pdata = pdev->dev.platform_data;
+ struct resource *mem;
+ struct resource *irq;
+ struct dentry *vdd_dbg_dir;
+ struct dentry *nvalue_dir;
+ struct omap_volt_data *volt_data;
+ int ret = 0;
+ int i;
+
+ sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
if (!sr_info) {
dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
__func__);
@@ -992,8 +1043,8 @@ err_free_devinfo:
static int __devexit omap_sr_remove(struct platform_device *pdev)
{
- struct omap_sr *sr_info = platform_get_drvdata(pdev);
- struct resource *mem;
+ struct omap_sr *sr_info = platform_get_drvdata(pdev);
+ struct resource *mem;
if (sr_info->autocomp_active)
sr_stop_vddautocomp(sr_info);
@@ -1011,7 +1062,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
static int omap_sr_suspend(struct device *dev)
{
- struct omap_sr *sr_info = dev_get_drvdata(dev);
+ struct omap_sr *sr_info = dev_get_drvdata(dev);
if (!sr_info)
return 0;
@@ -1032,7 +1083,7 @@ static int omap_sr_suspend(struct device *dev)
static int omap_sr_resume(struct device *dev)
{
- struct omap_sr *sr_info = dev_get_drvdata(dev);
+ struct omap_sr *sr_info = dev_get_drvdata(dev);
if (!sr_info)
return 0;
--
1.7.6.396.ge0613
^ permalink raw reply related
* [RFT/PATCH 4/7] arm: omap: smartreflex: move late_initcall() closer to its argument
From: Felipe Balbi @ 2011-10-10 12:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318249579-4089-1-git-send-email-balbi@ti.com>
no functional changes, trivial patch.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/mach-omap2/smartreflex.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 357363b..28a24fd 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -1085,12 +1085,12 @@ static int __init sr_init(void)
return 0;
}
+late_initcall(sr_init);
static void __exit sr_exit(void)
{
platform_driver_unregister(&smartreflex_driver);
}
-late_initcall(sr_init);
module_exit(sr_exit);
MODULE_DESCRIPTION("OMAP Smartreflex Driver");
--
1.7.6.396.ge0613
^ permalink raw reply related
* [RFT/PATCH 3/7] arm: omap: smartreflex: use dev_get_drvdata()
From: Felipe Balbi @ 2011-10-10 12:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318249579-4089-1-git-send-email-balbi@ti.com>
When we need to fetch struct omap_sr on PM
handlers, there's no need to access platform_data.
Instead, we can use dev_get_drvdata(dev) like
other drivers do.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/mach-omap2/smartreflex.c | 51 ++++++------------------------------
1 files changed, 9 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 55e297e..357363b 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -992,22 +992,9 @@ err_free_devinfo:
static int __devexit omap_sr_remove(struct platform_device *pdev)
{
- struct omap_sr_data *pdata = pdev->dev.platform_data;
- struct omap_sr *sr_info;
+ struct omap_sr *sr_info = platform_get_drvdata(pdev);
struct resource *mem;
- if (!pdata) {
- dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
- return -EINVAL;
- }
-
- sr_info = _sr_lookup(pdata->voltdm);
- if (IS_ERR(sr_info)) {
- dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
- __func__);
- return -EINVAL;
- }
-
if (sr_info->autocomp_active)
sr_stop_vddautocomp(sr_info);
if (sr_info->dbg_dir)
@@ -1024,20 +1011,10 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
static int omap_sr_suspend(struct device *dev)
{
- struct omap_sr_data *pdata;
- struct omap_sr *sr_info;
+ struct omap_sr *sr_info = dev_get_drvdata(dev);
- pdata = dev_get_platdata(dev);
- if (!pdata) {
- dev_err(dev, "%s: platform data missing\n", __func__);
- return -EINVAL;
- }
-
- sr_info = _sr_lookup(pdata->voltdm);
- if (IS_ERR(sr_info)) {
- dev_warn(dev, "%s: omap_sr struct not found\n", __func__);
- return -EINVAL;
- }
+ if (!sr_info)
+ return 0;
if (!sr_info->autocomp_active)
return 0;
@@ -1045,7 +1022,7 @@ static int omap_sr_suspend(struct device *dev)
if (sr_info->is_suspended)
return 0;
- omap_sr_disable_reset_volt(pdata->voltdm);
+ omap_sr_disable_reset_volt(sr_info->voltdm);
sr_info->is_suspended = true;
/* Flag the same info to the other CPUs */
smp_wmb();
@@ -1055,20 +1032,10 @@ static int omap_sr_suspend(struct device *dev)
static int omap_sr_resume(struct device *dev)
{
- struct omap_sr_data *pdata;
- struct omap_sr *sr_info;
+ struct omap_sr *sr_info = dev_get_drvdata(dev);
- pdata = dev_get_platdata(dev);
- if (!pdata) {
- dev_err(dev, "%s: platform data missing\n", __func__);
- return -EINVAL;
- }
-
- sr_info = _sr_lookup(pdata->voltdm);
- if (IS_ERR(sr_info)) {
- dev_warn(dev, "%s: omap_sr struct not found\n", __func__);
- return -EINVAL;
- }
+ if (!sr_info)
+ return 0;
if (!sr_info->autocomp_active)
return 0;
@@ -1079,7 +1046,7 @@ static int omap_sr_resume(struct device *dev)
sr_info->is_suspended = false;
/* Flag the same info to the other CPUs */
smp_wmb();
- omap_sr_enable(pdata->voltdm);
+ omap_sr_enable(sr_info->voltdm);
return 0;
}
--
1.7.6.396.ge0613
^ permalink raw reply related
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