* [PATCH 08/13] ARM: OMAP2+: CM/clock: convert _omap2_module_wait_ready() to use SoC-independent CM functions
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Convert the OMAP clock code's _omap2_module_wait_ready() to use
SoC-independent CM functions that are provided by the CM code, rather
than using a deprecated function from mach-omap2/prcm.c.
This facilitates the future conversion of the CM code to a driver, and
also removes a mach-omap2/prcm.c user. mach-omap2/prcm.c will be removed
by a subsequent patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock.c | 14 +++++++-
arch/arm/mach-omap2/cm.h | 12 +++++++
arch/arm/mach-omap2/cm2xxx.c | 65 ++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/cm2xxx.h | 4 ++
arch/arm/mach-omap2/cm3xxx.c | 66 +++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/cm3xxx.h | 5 +++
arch/arm/mach-omap2/cm_common.c | 48 ++++++++++++++++++++++++++++
arch/arm/mach-omap2/io.c | 5 +++
8 files changed, 215 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d0c6d9b..19acf08 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -33,6 +33,7 @@
#include "soc.h"
#include "clockdomain.h"
#include "clock.h"
+#include "cm.h"
#include "cm2xxx.h"
#include "cm3xxx.h"
#include "cm-regbits-24xx.h"
@@ -67,7 +68,9 @@ static bool clkdm_control = true;
static void _omap2_module_wait_ready(struct clk *clk)
{
void __iomem *companion_reg, *idlest_reg;
- u8 other_bit, idlest_bit, idlest_val;
+ u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
+ s16 prcm_mod;
+ int r;
/* Not all modules have multiple clocks that their IDLEST depends on */
if (clk->ops->find_companion) {
@@ -78,8 +81,13 @@ static void _omap2_module_wait_ready(struct clk *clk)
clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
- omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val,
- __clk_get_name(clk));
+ r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id);
+ if (r) {
+ pr_err("clock: %s: could not split idlest reg va\n", clk->name);
+ return;
+ }
+
+ cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
}
/* Public functions */
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index b3cee91..e419ecb 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -37,8 +37,18 @@
/**
* struct cm_ll_data - fn ptrs to per-SoC CM function implementations
+ * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
+ * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
*/
-struct cm_ll_data {};
+struct cm_ll_data {
+ int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id);
+ int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+};
+
+extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id);
+extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index e96cd70..db65069 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -198,6 +198,43 @@ void omap2xxx_cm_apll96_disable(void)
_omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
}
+/**
+ * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * XXX This function is only needed until absolute register addresses are
+ * removed from the OMAP struct clk records.
+ */
+int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id)
+{
+ unsigned long offs;
+ u8 idlest_offs;
+ int i;
+
+ if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff))
+ return -EINVAL;
+
+ idlest_offs = (unsigned long)idlest_reg & 0xff;
+ for (i = 0; i < ARRAY_SIZE(omap2xxx_cm_idlest_offs); i++) {
+ if (idlest_offs == omap2xxx_cm_idlest_offs[i]) {
+ *idlest_reg_id = i + 1;
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(omap2xxx_cm_idlest_offs))
+ return -EINVAL;
+
+ offs = idlest_reg - cm_base;
+ offs &= 0xff00;
+ *prcm_inst = offs;
+
+ return 0;
+}
+
/*
*
*/
@@ -314,3 +351,31 @@ struct clkdm_ops omap2_clkdm_operations = {
.clkdm_clk_enable = omap2xxx_clkdm_clk_enable,
.clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
};
+
+/*
+ *
+ */
+
+static struct cm_ll_data omap2xxx_cm_ll_data = {
+ .split_idlest_reg = &omap2xxx_cm_split_idlest_reg,
+ .wait_module_ready = &omap2xxx_cm_wait_module_ready,
+};
+
+int __init omap2xxx_cm_init(void)
+{
+ if (!cpu_is_omap24xx())
+ return 0;
+
+ return cm_register(&omap2xxx_cm_ll_data);
+}
+
+static void __exit omap2xxx_cm_exit(void)
+{
+ if (!cpu_is_omap24xx())
+ return;
+
+ /* Should never happen */
+ WARN(cm_unregister(&omap2xxx_cm_ll_data),
+ "%s: cm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap2xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index bce3c4b..4cbb39b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -60,6 +60,10 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
u8 idlest_shift);
+extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+ s16 *prcm_inst, u8 *idlest_reg_id);
+
+extern int __init omap2xxx_cm_init(void);
#endif
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 8b03ec2..c2086f2 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -110,6 +110,44 @@ int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
}
+/**
+ * omap3xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * XXX This function is only needed until absolute register addresses are
+ * removed from the OMAP struct clk records.
+ */
+int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id)
+{
+ unsigned long offs;
+ u8 idlest_offs;
+ int i;
+
+ if (idlest_reg < (cm_base + OMAP3430_IVA2_MOD) ||
+ idlest_reg > (cm_base + 0x1ffff))
+ return -EINVAL;
+
+ idlest_offs = (unsigned long)idlest_reg & 0xff;
+ for (i = 0; i < ARRAY_SIZE(omap3xxx_cm_idlest_offs); i++) {
+ if (idlest_offs == omap3xxx_cm_idlest_offs[i]) {
+ *idlest_reg_id = i + 1;
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(omap3xxx_cm_idlest_offs))
+ return -EINVAL;
+
+ offs = idlest_reg - cm_base;
+ offs &= 0xff00;
+ *prcm_inst = offs;
+
+ return 0;
+}
+
/* Clockdomain low-level operations */
static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1,
@@ -597,3 +635,31 @@ void omap3_cm_restore_context(void)
omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
OMAP3_CM_CLKOUT_CTRL_OFFSET);
}
+
+/*
+ *
+ */
+
+static struct cm_ll_data omap3xxx_cm_ll_data = {
+ .split_idlest_reg = &omap3xxx_cm_split_idlest_reg,
+ .wait_module_ready = &omap3xxx_cm_wait_module_ready,
+};
+
+int __init omap3xxx_cm_init(void)
+{
+ if (!cpu_is_omap34xx())
+ return 0;
+
+ return cm_register(&omap3xxx_cm_ll_data);
+}
+
+static void __exit omap3xxx_cm_exit(void)
+{
+ if (!cpu_is_omap34xx())
+ return;
+
+ /* Should never happen */
+ WARN(cm_unregister(&omap3xxx_cm_ll_data),
+ "%s: cm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap3xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 4a6ac81..e8e146f 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -78,9 +78,14 @@ extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
u8 idlest_shift);
+extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+ s16 *prcm_inst, u8 *idlest_reg_id);
+
extern void omap3_cm_save_context(void);
extern void omap3_cm_restore_context(void);
+extern int __init omap3xxx_cm_init(void);
+
#endif
#endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 3246cef..561969b 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -26,6 +26,54 @@ static struct cm_ll_data null_cm_ll_data;
static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
/**
+ * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * Given an absolute CM_IDLEST register address @idlest_reg, passes
+ * the PRCM instance offset and IDLEST register ID back to the caller
+ * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
+ * or 0 upon success. XXX This function is only needed until absolute
+ * register addresses are removed from the OMAP struct clk records.
+ */
+int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id)
+{
+ if (!cm_ll_data->split_idlest_reg) {
+ WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
+ idlest_reg_id);
+}
+
+/**
+ * cm_wait_module_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
+ * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
+ * no per-SoC wait_module_ready() function pointer has been registered
+ * or if the idlest register is unknown on the SoC.
+ */
+int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+{
+ if (!cm_ll_data->wait_module_ready) {
+ WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift);
+}
+
+/**
* cm_register - register per-SoC low-level data with the CM
* @cld: low-level per-SoC OMAP CM data & function pointers to register
*
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index b853401..a52d399 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -46,6 +46,8 @@
#include "clock44xx.h"
#include "sdrc.h"
#include "control.h"
+#include "cm2xxx.h"
+#include "cm3xxx.h"
/*
* The machine specific code may provide the extra mapping besides the
@@ -389,6 +391,7 @@ void __init omap2420_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
NULL, NULL);
omap2xxx_check_revision();
+ omap2xxx_cm_init();
omap_common_init_early();
omap2xxx_voltagedomains_init();
omap242x_powerdomains_init();
@@ -418,6 +421,7 @@ void __init omap2430_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
NULL, NULL);
omap2xxx_check_revision();
+ omap2xxx_cm_init();
omap_common_init_early();
omap2xxx_voltagedomains_init();
omap243x_powerdomains_init();
@@ -452,6 +456,7 @@ void __init omap3_init_early(void)
NULL, NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
+ omap3xxx_cm_init();
omap_common_init_early();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
^ permalink raw reply related
* [PATCH 06/13] ARM: OMAP2+: board files: use SoC-specific system restart functions
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Modify the board files to use the SoC-specific system restart
functions. At this point it's possible to remove omap_prcm_restart()
from mach-omap2/prcm.c.
While removing the prototypes for the now-unused restart functions, clean
up a few more obsolete prototypes in mach-omap2/clock.h.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/board-2430sdp.c | 2 +
arch/arm/mach-omap2/board-3430sdp.c | 2 +
arch/arm/mach-omap2/board-3630sdp.c | 2 +
arch/arm/mach-omap2/board-4430sdp.c | 2 +
arch/arm/mach-omap2/board-am3517crane.c | 2 +
arch/arm/mach-omap2/board-am3517evm.c | 2 +
arch/arm/mach-omap2/board-apollon.c | 2 +
arch/arm/mach-omap2/board-cm-t35.c | 18 +++++-----
arch/arm/mach-omap2/board-cm-t3517.c | 2 +
arch/arm/mach-omap2/board-devkit8000.c | 2 +
arch/arm/mach-omap2/board-generic.c | 10 +++--
arch/arm/mach-omap2/board-h4.c | 2 +
arch/arm/mach-omap2/board-igep0020.c | 4 +-
arch/arm/mach-omap2/board-ldp.c | 2 +
arch/arm/mach-omap2/board-n8x0.c | 6 ++-
arch/arm/mach-omap2/board-omap3beagle.c | 2 +
arch/arm/mach-omap2/board-omap3evm.c | 2 +
arch/arm/mach-omap2/board-omap3logic.c | 4 +-
arch/arm/mach-omap2/board-omap3pandora.c | 2 +
arch/arm/mach-omap2/board-omap3stalker.c | 2 +
arch/arm/mach-omap2/board-omap3touchbook.c | 2 +
arch/arm/mach-omap2/board-omap4panda.c | 2 +
arch/arm/mach-omap2/board-overo.c | 2 +
arch/arm/mach-omap2/board-rm680.c | 4 +-
arch/arm/mach-omap2/board-rx51.c | 2 +
arch/arm/mach-omap2/board-ti8168evm.c | 4 +-
arch/arm/mach-omap2/board-zoom.c | 4 +-
arch/arm/mach-omap2/clock.h | 28 ---------------
arch/arm/mach-omap2/clock2420_data.c | 4 --
arch/arm/mach-omap2/clock2430_data.c | 4 --
arch/arm/mach-omap2/clock2xxx.c | 16 ---------
arch/arm/mach-omap2/common.h | 1 -
arch/arm/mach-omap2/prcm.c | 52 ----------------------------
33 files changed, 46 insertions(+), 151 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 95b384d..abfcf6a 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -287,5 +287,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
.init_machine = omap_2430sdp_init,
.init_late = omap2430_init_late,
.timer = &omap2_timer,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 96cd369..497a7ac 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -597,5 +597,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
.init_machine = omap_3430sdp_init,
.init_late = omap3430_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index fc224ad..3ffcc15 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -213,5 +213,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
.init_machine = omap_sdp_init,
.init_late = omap3630_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 3669c12..e26b6e4 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -881,5 +881,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
.init_machine = omap_4430sdp_init,
.init_late = omap4430_init_late,
.timer = &omap4_timer,
- .restart = omap_prcm_restart,
+ .restart = omap44xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 318fead..9c52315 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -94,5 +94,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
.init_machine = am3517_crane_init,
.init_late = am35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index e162897..24192aaa7 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -393,5 +393,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
.init_machine = am3517_evm_init,
.init_late = am35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index cea3aba..e753792 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -338,5 +338,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
.init_machine = omap_apollon_init,
.init_late = omap2420_init_late,
.timer = &omap2_timer,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 376d26e..03bc0b5 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -753,18 +753,18 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
.init_machine = cm_t35_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
MACHINE_START(CM_T3730, "Compulab CM-T3730")
- .atag_offset = 0x100,
- .reserve = omap_reserve,
- .map_io = omap3_map_io,
- .init_early = omap3630_init_early,
- .init_irq = omap3_init_irq,
+ .atag_offset = 0x100,
+ .reserve = omap_reserve,
+ .map_io = omap3_map_io,
+ .init_early = omap3630_init_early,
+ .init_irq = omap3_init_irq,
.handle_irq = omap3_intc_handle_irq,
- .init_machine = cm_t3730_init,
+ .init_machine = cm_t3730_init,
.init_late = omap3630_init_late,
- .timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .timer = &omap3_timer,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 59c0a45..87202ad 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -298,5 +298,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
.init_machine = cm_t3517_init,
.init_late = am35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 1fd161e..74099e6 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -640,5 +640,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
.init_machine = devkit8000_init,
.init_late = omap35xx_init_late,
.timer = &omap3_secure_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 601ecdf..475e14f 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -57,7 +57,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
.init_machine = omap_generic_init,
.timer = &omap2_timer,
.dt_compat = omap242x_boards_compat,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
#endif
@@ -76,7 +76,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
.init_machine = omap_generic_init,
.timer = &omap2_timer,
.dt_compat = omap243x_boards_compat,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
#endif
@@ -95,7 +95,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.init_machine = omap_generic_init,
.timer = &omap3_timer,
.dt_compat = omap3_boards_compat,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
#endif
@@ -134,7 +134,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
.init_late = omap4430_init_late,
.timer = &omap4_timer,
.dt_compat = omap4_boards_compat,
- .restart = omap_prcm_restart,
+ .restart = omap44xx_restart,
MACHINE_END
#endif
@@ -154,6 +154,6 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
.init_machine = omap_generic_init,
.timer = &omap5_timer,
.dt_compat = omap5_boards_compat,
- .restart = omap_prcm_restart,
+ .restart = omap44xx_restart,
MACHINE_END
#endif
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8d04bf8..a65942e 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -386,5 +386,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
.init_machine = omap_h4_init,
.init_late = omap2420_init_late,
.timer = &omap2_timer,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41..8734c0d 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -652,7 +652,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
.init_machine = igep_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -665,5 +665,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
.init_machine = igep_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ee8c3cf..6d2892c 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -437,5 +437,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
.init_machine = omap_ldp_init,
.init_late = omap3430_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index d95f727..dd71764 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -689,7 +689,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
.init_machine = n8x0_init_machine,
.init_late = omap2420_init_late,
.timer = &omap2_timer,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -702,7 +702,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
.init_machine = n8x0_init_machine,
.init_late = omap2420_init_late,
.timer = &omap2_timer,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -715,5 +715,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
.init_machine = n8x0_init_machine,
.init_late = omap2420_init_late,
.timer = &omap2_timer,
- .restart = omap_prcm_restart,
+ .restart = omap2xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 388c431..42e8bdd 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -537,5 +537,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
.init_machine = omap3_beagle_init,
.init_late = omap3_init_late,
.timer = &omap3_secure_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b9b776b..8a3cc9d 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -752,5 +752,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
.init_machine = omap3_evm_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7bd8253..5eed5db 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -235,7 +235,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
.init_machine = omap3logic_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
@@ -248,5 +248,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
.init_machine = omap3logic_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4a..23bf060 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -619,5 +619,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
.init_machine = omap3pandora_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 731235e..4d65d7e 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -428,5 +428,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
.init_machine = omap3_stalker_init,
.init_late = omap35xx_init_late,
.timer = &omap3_secure_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 944ffc4..efcb46f 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -384,5 +384,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
.init_machine = omap3_touchbook_init,
.init_late = omap3430_init_late,
.timer = &omap3_secure_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index bfcd397..c5131d1 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -524,5 +524,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
.init_machine = omap4_panda_init,
.init_late = omap4430_init_late,
.timer = &omap4_timer,
- .restart = omap_prcm_restart,
+ .restart = omap44xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index b700685..fcd5147 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -550,5 +550,5 @@ MACHINE_START(OVERO, "Gumstix Overo")
.init_machine = overo_init,
.init_late = omap35xx_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 45997bf..5074879 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -151,7 +151,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
.init_machine = rm680_init,
.init_late = omap3630_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
@@ -164,5 +164,5 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
.init_machine = rm680_init,
.init_late = omap3630_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 7bbb05d..237f98b 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -127,5 +127,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
.init_machine = rx51_init,
.init_late = omap3430_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index c4f8833..4385fbb 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -45,7 +45,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
.timer = &omap3_timer,
.init_machine = ti81xx_evm_init,
.init_late = ti81xx_init_late,
- .restart = omap_prcm_restart,
+ .restart = omap44xx_restart,
MACHINE_END
MACHINE_START(TI8148EVM, "ti8148evm")
@@ -57,5 +57,5 @@ MACHINE_START(TI8148EVM, "ti8148evm")
.timer = &omap3_timer,
.init_machine = ti81xx_evm_init,
.init_late = ti81xx_init_late,
- .restart = omap_prcm_restart,
+ .restart = omap44xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4994438..a93106b 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -138,7 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
.init_machine = omap_zoom_init,
.init_late = omap3430_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -151,5 +151,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
.init_machine = omap_zoom_init,
.init_late = omap3630_init_late,
.timer = &omap3_timer,
- .restart = omap_prcm_restart,
+ .restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3..32b6796 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -94,33 +94,6 @@ extern void omap2_clkt_iclk_deny_idle(struct clk *clk);
u32 omap2_get_dpll_rate(struct clk *clk);
void omap2_init_dpll_parent(struct clk *clk);
-int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
-
-
-#ifdef CONFIG_ARCH_OMAP2
-void omap2xxx_clk_prepare_for_reboot(void);
-#else
-static inline void omap2xxx_clk_prepare_for_reboot(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-void omap3_clk_prepare_for_reboot(void);
-#else
-static inline void omap3_clk_prepare_for_reboot(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-void omap4_clk_prepare_for_reboot(void);
-#else
-static inline void omap4_clk_prepare_for_reboot(void)
-{
-}
-#endif
-
int omap2_dflt_clk_enable(struct clk *clk);
void omap2_dflt_clk_disable(struct clk *clk);
void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
@@ -139,7 +112,6 @@ extern const struct clkops clkops_dummy;
extern const struct clkops clkops_omap2_dflt;
extern struct clk_functions omap2_clk_functions;
-extern struct clk *vclk, *sclk;
extern const struct clksel_rate gpt_32k_rates[];
extern const struct clksel_rate gpt_sys_rates[];
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 0cae0f5..405a07a 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1972,10 +1972,6 @@ int __init omap2420_clk_init(void)
*/
clk_enable_init_clocks();
- /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
- vclk = clk_get(NULL, "virt_prcm_set");
- sclk = clk_get(NULL, "sys_ck");
-
return 0;
}
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 0c4f719..0664fc3 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -2071,10 +2071,6 @@ int __init omap2430_clk_init(void)
*/
clk_enable_init_clocks();
- /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
- vclk = clk_get(NULL, "virt_prcm_set");
- sclk = clk_get(NULL, "sys_ck");
-
return 0;
}
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 0e71fc2..d830bf9 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -30,27 +30,11 @@
#include "cm.h"
#include "cm-regbits-24xx.h"
-struct clk *vclk, *sclk;
-
/*
* Omap24xx specific clock functions
*/
/*
- * Set clocks for bypass mode for reboot to work.
- */
-void omap2xxx_clk_prepare_for_reboot(void)
-{
- u32 rate;
-
- if (vclk == NULL || sclk == NULL)
- return;
-
- rate = clk_get_rate(sclk);
- clk_set_rate(vclk, rate);
-}
-
-/*
* Switch the MPU rate if specified on cmdline. We cannot do this
* early until cmdline is parsed. XXX This should be removed from the
* clock code and handled by the OPP layer code in the near future.
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 06dff1a..abd7465 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -114,7 +114,6 @@ void am35xx_init_late(void);
void ti81xx_init_late(void);
void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
-void omap_prcm_restart(char, const char *);
void omap2xxx_restart(char, const char *);
void omap3xxx_restart(char, const char *);
void omap44xx_restart(char, const char *);
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 118dc87..8cb55d3 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -46,58 +46,6 @@ void __iomem *prcm_mpu_base;
#define MAX_MODULE_ENABLE_WAIT 100000
-/* Resets clock rates and reboots the system. Only called from system.h */
-void omap_prcm_restart(char mode, const char *cmd)
-{
- s16 prcm_offs = 0;
-
- if (cpu_is_omap24xx()) {
- omap2xxx_clk_prepare_for_reboot();
-
- prcm_offs = WKUP_MOD;
- } else if (cpu_is_omap34xx()) {
- prcm_offs = OMAP3430_GR_MOD;
- omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
- } else if (cpu_is_omap44xx()) {
- omap4_prminst_global_warm_sw_reset(); /* never returns */
- } else {
- WARN_ON(1);
- }
-
- /*
- * As per Errata i520, in some cases, user will not be able to
- * access DDR memory after warm-reset.
- * This situation occurs while the warm-reset happens during a read
- * access to DDR memory. In that particular condition, DDR memory
- * does not respond to a corrupted read command due to the warm
- * reset occurrence but SDRC is waiting for read completion.
- * SDRC is not sensitive to the warm reset, but the interconnect is
- * reset on the fly, thus causing a misalignment between SDRC logic,
- * interconnect logic and DDR memory state.
- * WORKAROUND:
- * Steps to perform before a Warm reset is trigged:
- * 1. enable self-refresh on idle request
- * 2. put SDRC in idle
- * 3. wait until SDRC goes to idle
- * 4. generate SW reset (Global SW reset)
- *
- * Steps to be performed after warm reset occurs (in bootloader):
- * if HW warm reset is the source, apply below steps before any
- * accesses to SDRAM:
- * 1. Reset SMS and SDRC and wait till reset is complete
- * 2. Re-initialize SMS, SDRC and memory
- *
- * NOTE: Above work around is required only if arch reset is implemented
- * using Global SW reset(GLOBAL_SW_RST). DPLL3 reset does not need
- * the WA since it resets SDRC as well as part of cold reset.
- */
-
- /* XXX should be moved to some OMAP2/3 specific code */
- omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,
- OMAP2_RM_RSTCTRL);
- omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
-}
-
/**
* omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
* @reg: physical address of module IDLEST register
^ permalink raw reply related
* [PATCH 07/13] ARM: OMAP2xxx: APLL/CM: convert to use omap2_cm_wait_module_ready()
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Convert the OMAP2xxx APLL code to use omap2_cm_wait_module_ready(),
and move the low-level CM register manipulation functions to
mach-omap2/cm2xxx.c. The objectives here are to remove the dependency
on the deprecated omap2_cm_wait_idlest() function in
mach-omap2/prcm.c, so that code can be removed later; and move
low-level register accesses to the CM IP block to the CM code, which
will soon be moved into drivers/.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clkt2xxx_apll.c | 56 +++++++---------------------
arch/arm/mach-omap2/clock2420_data.c | 1 -
arch/arm/mach-omap2/clock2430_data.c | 1 -
arch/arm/mach-omap2/clock2xxx.h | 2 +
arch/arm/mach-omap2/cm-regbits-24xx.h | 2 +
arch/arm/mach-omap2/cm2xxx.c | 65 ++++++++++++++++++++++++++++++++-
arch/arm/mach-omap2/cm2xxx_3xxx.h | 6 +++
7 files changed, 85 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index 3d2f67e..d47f6f7 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -38,44 +38,16 @@
#define APLLS_CLKIN_13MHZ 2
#define APLLS_CLKIN_12MHZ 3
-void __iomem *cm_idlest_pll;
-
/* Private functions */
-/* Enable an APLL if off */
-static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask)
-{
- u32 cval, apll_mask;
-
- apll_mask = EN_APLL_LOCKED << clk->enable_bit;
-
- cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
-
- if ((cval & apll_mask) == apll_mask)
- return 0; /* apll already enabled */
-
- cval &= ~apll_mask;
- cval |= apll_mask;
- omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
-
- omap2_cm_wait_idlest(cm_idlest_pll, status_mask,
- OMAP24XX_CM_IDLEST_VAL, __clk_get_name(clk));
-
- /*
- * REVISIT: Should we return an error code if omap2_wait_clock_ready()
- * fails?
- */
- return 0;
-}
-
-static int omap2_clk_apll96_enable(struct clk *clk)
+static int _apll96_enable(struct clk *clk)
{
- return omap2_clk_apll_enable(clk, OMAP24XX_ST_96M_APLL_MASK);
+ return omap2xxx_cm_apll96_enable();
}
-static int omap2_clk_apll54_enable(struct clk *clk)
+static int _apll54_enable(struct clk *clk)
{
- return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL_MASK);
+ return omap2xxx_cm_apll54_enable();
}
static void _apll96_allow_idle(struct clk *clk)
@@ -98,28 +70,28 @@ static void _apll54_deny_idle(struct clk *clk)
omap2xxx_cm_set_apll54_disable_autoidle();
}
-/* Stop APLL */
-static void omap2_clk_apll_disable(struct clk *clk)
+static void _apll96_disable(struct clk *clk)
{
- u32 cval;
+ omap2xxx_cm_apll96_disable();
+}
- cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
- cval &= ~(EN_APLL_LOCKED << clk->enable_bit);
- omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+static void _apll54_disable(struct clk *clk)
+{
+ omap2xxx_cm_apll54_disable();
}
/* Public data */
const struct clkops clkops_apll96 = {
- .enable = omap2_clk_apll96_enable,
- .disable = omap2_clk_apll_disable,
+ .enable = _apll96_enable,
+ .disable = _apll96_disable,
.allow_idle = _apll96_allow_idle,
.deny_idle = _apll96_deny_idle,
};
const struct clkops clkops_apll54 = {
- .enable = omap2_clk_apll54_enable,
- .disable = omap2_clk_apll_disable,
+ .enable = _apll54_enable,
+ .disable = _apll54_disable,
.allow_idle = _apll54_allow_idle,
.deny_idle = _apll54_deny_idle,
};
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 405a07a..274244f 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1930,7 +1930,6 @@ int __init omap2420_clk_init(void)
struct omap_clk *c;
prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL;
- cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
cpu_mask = RATE_IN_242X;
rate_table = omap2420_rate_table;
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 0664fc3..9f5a471 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -2029,7 +2029,6 @@ int __init omap2430_clk_init(void)
struct omap_clk *c;
prcm_clksrc_ctrl = OMAP2430_PRCM_CLKSRC_CTRL;
- cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
cpu_mask = RATE_IN_243X;
rate_table = omap2430_rate_table;
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index 25b8d02..ce809c9 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -35,7 +35,7 @@ int omap2430_clk_init(void);
#define omap2430_clk_init() do { } while(0)
#endif
-extern void __iomem *prcm_clksrc_ctrl, *cm_idlest_pll;
+extern void __iomem *prcm_clksrc_ctrl;
extern const struct clkops clkops_omap2430_i2chs_wait;
extern const struct clkops clkops_oscck;
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h
index 6862904..11eaf16 100644
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -333,7 +333,9 @@
#define OMAP24XX_EN_DPLL_MASK (0x3 << 0)
/* CM_IDLEST_CKGEN */
+#define OMAP24XX_ST_54M_APLL_SHIFT 9
#define OMAP24XX_ST_54M_APLL_MASK (1 << 9)
+#define OMAP24XX_ST_96M_APLL_SHIFT 8
#define OMAP24XX_ST_96M_APLL_MASK (1 << 8)
#define OMAP24XX_ST_54M_CLK_MASK (1 << 6)
#define OMAP24XX_ST_12M_CLK_MASK (1 << 5)
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 6416501..e96cd70 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -35,6 +35,9 @@
#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0
#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3
+/* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */
+#define EN_APLL_LOCKED 3
+
static const u8 omap2xxx_cm_idlest_offs[] = {
CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
};
@@ -99,7 +102,7 @@ void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
}
/*
- * APLL autoidle control
+ * APLL control
*/
static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
@@ -136,6 +139,65 @@ void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
OMAP24XX_AUTO_96M_MASK);
}
+/* Enable an APLL if off */
+static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
+{
+ u32 v, m;
+
+ m = EN_APLL_LOCKED << enable_bit;
+
+ v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+ if (v & m)
+ return 0; /* apll already enabled */
+
+ v |= m;
+ omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
+
+ omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
+
+ /*
+ * REVISIT: Should we return an error code if
+ * omap2xxx_cm_wait_module_ready() fails?
+ */
+ return 0;
+}
+
+/* Stop APLL */
+static void _omap2xxx_apll_disable(u8 enable_bit)
+{
+ u32 v;
+
+ v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+ v &= ~(EN_APLL_LOCKED << enable_bit);
+ omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
+}
+
+/* Enable an APLL if off */
+int omap2xxx_cm_apll54_enable(void)
+{
+ return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT,
+ OMAP24XX_ST_54M_APLL_SHIFT);
+}
+
+/* Enable an APLL if off */
+int omap2xxx_cm_apll96_enable(void)
+{
+ return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT,
+ OMAP24XX_ST_96M_APLL_SHIFT);
+}
+
+/* Stop APLL */
+void omap2xxx_cm_apll54_disable(void)
+{
+ _omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT);
+}
+
+/* Stop APLL */
+void omap2xxx_cm_apll96_disable(void)
+{
+ _omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
+}
+
/*
*
*/
@@ -252,4 +314,3 @@ struct clkdm_ops omap2_clkdm_operations = {
.clkdm_clk_enable = omap2xxx_clkdm_clk_enable,
.clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
};
-
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index 0e26bb1..f74a5d1 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -96,6 +96,11 @@ static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}
+extern int omap2xxx_cm_apll54_enable(void);
+extern void omap2xxx_cm_apll54_disable(void);
+extern int omap2xxx_cm_apll96_enable(void);
+extern void omap2xxx_cm_apll96_disable(void);
+
#endif
/* CM register bits shared between 24XX and 3430 */
@@ -111,5 +116,4 @@ static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
/* CM_IDLEST_GFX */
#define OMAP_ST_GFX_MASK (1 << 0)
-
#endif
^ permalink raw reply related
* [PATCH 04/13] ARM: OMAP2xxx: clock: move virt_prcm_set code into clkt2xxx_virt_prcm_set.c
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Collect all of the virt_prcm_set-specific clocktype code into
mach-omap2/clkt2xxx_virt_prcm_set.c. Remove its dependency on the
'sclk' and 'vclk' global variables. Those variables will be removed
by subsequent patches.
This is part of the process of cleaning up the OMAP2xxx clock code
and preparing for the removal of the omap_prcm_restart() function.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 66 +++++++++++++++++++++++---
arch/arm/mach-omap2/clock2420_data.c | 19 ++-----
arch/arm/mach-omap2/clock2430_data.c | 19 ++-----
arch/arm/mach-omap2/clock2xxx.h | 2 +
4 files changed, 70 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 1b95078..f9c71f3 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -1,7 +1,7 @@
/*
* OMAP2xxx DVFS virtual clock functions
*
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2005-2008, 2012 Texas Instruments, Inc.
* Copyright (C) 2004-2010 Nokia Corporation
*
* Contacts:
@@ -47,6 +47,13 @@
const struct prcm_config *curr_prcm_set;
const struct prcm_config *rate_table;
+/*
+ * sys_ck_rate: the rate of the external high-frequency clock
+ * oscillator on the board. Set by the SoC-specific clock init code.
+ * Once set during a boot, will not change.
+ */
+static unsigned long sys_ck_rate;
+
/**
* omap2_table_mpu_recalc - just return the MPU speed
* @clk: virt_prcm_set struct clk
@@ -68,15 +75,14 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk)
long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
{
const struct prcm_config *ptr;
- long highest_rate, sys_clk_rate;
+ long highest_rate;
highest_rate = -EINVAL;
- sys_clk_rate = __clk_get_rate(sclk);
for (ptr = rate_table; ptr->mpu_speed; ptr++) {
if (!(ptr->flags & cpu_mask))
continue;
- if (ptr->xtal_speed != sys_clk_rate)
+ if (ptr->xtal_speed != sys_ck_rate)
continue;
highest_rate = ptr->mpu_speed;
@@ -95,15 +101,12 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
const struct prcm_config *prcm;
unsigned long found_speed = 0;
unsigned long flags;
- long sys_clk_rate;
-
- sys_clk_rate = __clk_get_rate(sclk);
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;
- if (prcm->xtal_speed != sys_clk_rate)
+ if (prcm->xtal_speed != sys_ck_rate)
continue;
if (prcm->mpu_speed <= rate) {
@@ -169,3 +172,50 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
return 0;
}
+
+/**
+ * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate
+ * table sets matches the current CORE DPLL hardware rate
+ *
+ * Check the MPU rate set by bootloader. Sets the 'curr_prcm_set'
+ * global to point to the active rate set when found; otherwise, sets
+ * it to NULL. No return value;
+ */
+void omap2xxx_clkt_vps_check_bootloader_rates(void)
+{
+ const struct prcm_config *prcm = NULL;
+ unsigned long rate;
+
+ rate = omap2xxx_clk_get_core_rate();
+ for (prcm = rate_table; prcm->mpu_speed; prcm++) {
+ if (!(prcm->flags & cpu_mask))
+ continue;
+ if (prcm->xtal_speed != sys_ck_rate)
+ continue;
+ if (prcm->dpll_speed <= rate)
+ break;
+ }
+ curr_prcm_set = prcm;
+}
+
+/**
+ * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate
+ *
+ * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS
+ * code. (The sys_ck rate does not -- or rather, must not -- change
+ * during kernel runtime.) Must be called after we have a valid
+ * sys_ck rate, but before the virt_prcm_set clock rate is
+ * recalculated. No return value.
+ */
+void omap2xxx_clkt_vps_late_init(void)
+{
+ struct clk *c;
+
+ c = clk_get(NULL, "sys_ck");
+ if (IS_ERR(c)) {
+ WARN(1, "could not locate sys_ck\n");
+ } else {
+ sys_ck_rate = clk_get_rate(c);
+ clk_put(c);
+ }
+}
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 69335d3..0cae0f5 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1,7 +1,7 @@
/*
* OMAP2420 clock data
*
- * Copyright (C) 2005-2009 Texas Instruments, Inc.
+ * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc.
* Copyright (C) 2004-2011 Nokia Corporation
*
* Contacts:
@@ -1927,9 +1927,7 @@ static struct omap_clk omap2420_clks[] = {
int __init omap2420_clk_init(void)
{
- const struct prcm_config *prcm;
struct omap_clk *c;
- u32 clkrate;
prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL;
cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
@@ -1954,20 +1952,13 @@ int __init omap2420_clk_init(void)
omap2_init_clk_clkdm(c->lk.clk);
}
+ omap2xxx_clkt_vps_late_init();
+
/* Disable autoidle on all clocks; let the PM code enable it later */
omap_clk_disable_autoidle_all();
- /* Check the MPU rate set by bootloader */
- clkrate = omap2xxx_clk_get_core_rate();
- for (prcm = rate_table; prcm->mpu_speed; prcm++) {
- if (!(prcm->flags & cpu_mask))
- continue;
- if (prcm->xtal_speed != sys_ck.rate)
- continue;
- if (prcm->dpll_speed <= clkrate)
- break;
- }
- curr_prcm_set = prcm;
+ /* XXX Can this be done from the virt_prcm_set clk init function? */
+ omap2xxx_clkt_vps_check_bootloader_rates();
recalculate_root_clocks();
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 8d9894c..0c4f719 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1,7 +1,7 @@
/*
* OMAP2430 clock data
*
- * Copyright (C) 2005-2009 Texas Instruments, Inc.
+ * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc.
* Copyright (C) 2004-2011 Nokia Corporation
*
* Contacts:
@@ -2026,9 +2026,7 @@ static struct omap_clk omap2430_clks[] = {
int __init omap2430_clk_init(void)
{
- const struct prcm_config *prcm;
struct omap_clk *c;
- u32 clkrate;
prcm_clksrc_ctrl = OMAP2430_PRCM_CLKSRC_CTRL;
cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
@@ -2053,20 +2051,13 @@ int __init omap2430_clk_init(void)
omap2_init_clk_clkdm(c->lk.clk);
}
+ omap2xxx_clkt_vps_late_init();
+
/* Disable autoidle on all clocks; let the PM code enable it later */
omap_clk_disable_autoidle_all();
- /* Check the MPU rate set by bootloader */
- clkrate = omap2xxx_clk_get_core_rate();
- for (prcm = rate_table; prcm->mpu_speed; prcm++) {
- if (!(prcm->flags & cpu_mask))
- continue;
- if (prcm->xtal_speed != sys_ck.rate)
- continue;
- if (prcm->dpll_speed <= clkrate)
- break;
- }
- curr_prcm_set = prcm;
+ /* XXX Can this be done from the virt_prcm_set clk init function? */
+ omap2xxx_clkt_vps_check_bootloader_rates();
recalculate_root_clocks();
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index 19dc0659..25b8d02 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -20,6 +20,8 @@ u32 omap2xxx_get_apll_clkin(void);
u32 omap2xxx_get_sysclkdiv(void);
void omap2xxx_clk_prepare_for_reboot(void);
void omap2xxx_clkt_dpllcore_init(struct clk *clk);
+void omap2xxx_clkt_vps_check_bootloader_rates(void);
+void omap2xxx_clkt_vps_late_init(void);
#ifdef CONFIG_SOC_OMAP2420
int omap2420_clk_init(void);
^ permalink raw reply related
* [PATCH 05/13] ARM: OMAP2+: PRCM: create SoC-specific chip restart functions
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Split omap_prcm_restart() from mach-omap2/prcm.c into SoC-specific
variants. These functions need to be able to save the reboot reason
into the scratchpad RAM. This implies a dependency on both the PRM
and SCM IP blocks, so they've been moved into their own file. This
will eventually call functions in the PRM and SCM drivers, once those
are created.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/Makefile | 5 +++
arch/arm/mach-omap2/common.h | 4 ++
arch/arm/mach-omap2/omap2-restart.c | 65 +++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/omap3-restart.c | 36 +++++++++++++++++++
arch/arm/mach-omap2/omap4-common.c | 16 +++++++++
5 files changed, 126 insertions(+)
create mode 100644 arch/arm/mach-omap2/omap2-restart.c
create mode 100644 arch/arm/mach-omap2/omap3-restart.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7a628e7..aa0f59c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -49,6 +49,11 @@ AFLAGS_sram242x.o :=-Wa,-march=armv6
AFLAGS_sram243x.o :=-Wa,-march=armv6
AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
+# Restart code (OMAP4/5 currently in omap4-common.c)
+obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o
+obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
+obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
+
# Pin multiplexing
obj-$(CONFIG_SOC_OMAP2420) += mux2420.o
obj-$(CONFIG_SOC_OMAP2430) += mux2430.o
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 320f0d7..06dff1a 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -115,6 +115,10 @@ void ti81xx_init_late(void);
void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
void omap_prcm_restart(char, const char *);
+void omap2xxx_restart(char, const char *);
+void omap3xxx_restart(char, const char *);
+void omap44xx_restart(char, const char *);
+void omap5xxx_restart(char, const char *);
/* This gets called from mach-omap2/io.c, do not call this */
void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c
new file mode 100644
index 0000000..be6bc89
--- /dev/null
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -0,0 +1,65 @@
+/*
+ * omap2-restart.c - code common to all OMAP2xxx machines.
+ *
+ * Copyright (C) 2012 Texas Instruments
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include "common.h"
+#include "prm2xxx.h"
+
+/*
+ * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
+ * clock and the sys_ck. Used during the reset process
+ */
+static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck;
+
+/* Reboot handling */
+
+/**
+ * omap2xxx_restart - Set DPLL to bypass mode for reboot to work
+ *
+ * Set the DPLL to bypass so that reboot completes successfully. No
+ * return value.
+ */
+void omap2xxx_restart(char mode, const char *cmd)
+{
+ u32 rate;
+
+ rate = clk_get_rate(reset_sys_ck);
+ clk_set_rate(reset_virt_prcm_set_ck, rate);
+
+ /* XXX Should save the cmd argument for use after the reboot */
+
+ omap2xxx_prm_dpll_reset(); /* never returns */
+ while (1);
+}
+
+/**
+ * omap2xxx_common_look_up_clks_for_reset - look up clocks needed for restart
+ *
+ * Some clocks need to be looked up in advance for the SoC restart
+ * operation to work - see omap2xxx_restart(). Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int __init omap2xxx_common_look_up_clks_for_reset(void)
+{
+ reset_virt_prcm_set_ck = clk_get(NULL, "virt_prcm_set");
+ if (IS_ERR(reset_virt_prcm_set_ck))
+ return -EINVAL;
+
+ reset_sys_ck = clk_get(NULL, "sys_ck");
+ if (IS_ERR(reset_sys_ck))
+ return -EINVAL;
+
+ return 0;
+}
+core_initcall(omap2xxx_common_look_up_clks_for_reset);
diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c
new file mode 100644
index 0000000..923c582
--- /dev/null
+++ b/arch/arm/mach-omap2/omap3-restart.c
@@ -0,0 +1,36 @@
+/*
+ * omap3-restart.c - Code common to all OMAP3xxx machines.
+ *
+ * Copyright (C) 2009, 2012 Texas Instruments
+ * Copyright (C) 2010 Nokia Corporation
+ * Tony Lindgren <tony@atomide.com>
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include "iomap.h"
+#include "common.h"
+#include "control.h"
+#include "prm3xxx.h"
+
+/* Global address base setup code */
+
+/**
+ * omap3xxx_restart - trigger a software restart of the SoC
+ * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC. For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c. No return value.
+ */
+void omap3xxx_restart(char mode, const char *cmd)
+{
+ omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
+ omap3xxx_prm_dpll3_reset(); /* never returns */
+ while (1);
+}
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6560e99..5348788 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -35,6 +35,7 @@
#include "iomap.h"
#include "common.h"
#include "hsmmc.h"
+#include "prminst44xx.h"
#include "omap4-sar-layout.h"
#ifdef CONFIG_CACHE_L2X0
@@ -249,6 +250,21 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
return 0;
}
+/**
+ * omap44xx_restart - trigger a software restart of the SoC
+ * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC. For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c. No return value.
+ */
+void omap44xx_restart(char mode, const char *cmd)
+{
+ /* XXX Should save 'cmd' into scratchpad for use after reboot */
+ omap4_prminst_global_warm_sw_reset(); /* never returns */
+ while (1);
+}
+
static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
{
struct omap_mmc_platform_data *pdata;
^ permalink raw reply related
* [PATCH 03/13] ARM: OMAP2xxx: clock: remove global 'dclk' variable
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Remove the global 'dclk' variable, instead replacing it with a
variable local to the dpllcore clock type C file. This removes some
of the special-case code surrounding the OMAP2xxx clock init.
This patch is a prerequisite for the removal of the
omap_prcm_restart() code from arch/arm/mach-omap2/prcm.c. It also
cleans up some special-case OMAP2xxx clock code in the process.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 34 ++++++++++++++++++++++----
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 2 +-
arch/arm/mach-omap2/clock2420_data.c | 4 ++-
arch/arm/mach-omap2/clock2430_data.c | 4 ++-
arch/arm/mach-omap2/clock2xxx.c | 2 +-
arch/arm/mach-omap2/clock2xxx.h | 5 ++--
6 files changed, 37 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 4ae4392..38a06d9 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -37,9 +37,15 @@
/* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */
+/*
+ * dpll_core_ck: pointer to the combined dpll_ck + core_ck on OMAP2xxx
+ * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set
+ * during dpll_ck init and used later by omap2xxx_clk_get_core_rate().
+ */
+static struct clk *dpll_core_ck;
+
/**
* omap2xxx_clk_get_core_rate - return the CORE_CLK rate
- * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck")
*
* Returns the CORE_CLK rate. CORE_CLK can have one of three rate
* sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
@@ -47,12 +53,14 @@
* struct clk *dpll_ck, which is a composite clock of dpll_ck and
* core_ck.
*/
-unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
+unsigned long omap2xxx_clk_get_core_rate(void)
{
long long core_clk;
u32 v;
- core_clk = omap2_get_dpll_rate(clk);
+ WARN_ON(!dpll_core_ck);
+
+ core_clk = omap2_get_dpll_rate(dpll_core_ck);
v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
v &= OMAP24XX_CORE_CLK_SRC_MASK;
@@ -100,7 +108,7 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate)
unsigned long omap2_dpllcore_recalc(struct clk *clk)
{
- return omap2xxx_clk_get_core_rate(clk);
+ return omap2xxx_clk_get_core_rate();
}
int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
@@ -110,7 +118,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
struct prcm_config tmpset;
const struct dpll_data *dd;
- cur_rate = omap2xxx_clk_get_core_rate(dclk);
+ cur_rate = omap2xxx_clk_get_core_rate();
mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
mult &= OMAP24XX_CORE_CLK_SRC_MASK;
@@ -171,3 +179,19 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
return 0;
}
+/**
+ * omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck
+ * @clk: struct clk *dpll_ck
+ *
+ * Store a local copy of @clk in dpll_core_ck so other code can query
+ * the core rate without having to clk_get(), which can sleep. Must
+ * only be called once. No return value. XXX If the clock
+ * registration process is ever changed such that dpll_ck is no longer
+ * statically defined, this code may need to change to increment some
+ * kind of use count on dpll_ck.
+ */
+void omap2xxx_clkt_dpllcore_init(struct clk *clk)
+{
+ WARN(dpll_core_ck, "dpll_core_ck already set - should never happen");
+ dpll_core_ck = clk;
+}
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 3524f0e..1b95078 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -119,7 +119,7 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
}
curr_prcm_set = prcm;
- cur_rate = omap2xxx_clk_get_core_rate(dclk);
+ cur_rate = omap2xxx_clk_get_core_rate();
if (prcm->dpll_speed == cur_rate / 2) {
omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 969bc58..69335d3 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -126,6 +126,7 @@ static struct clk dpll_ck = {
.name = "dpll_ck",
.ops = &clkops_omap2xxx_dpll_ops,
.parent = &sys_ck, /* Can be func_32k also */
+ .init = &omap2xxx_clkt_dpllcore_init,
.dpll_data = &dpll_dd,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_dpllcore_recalc,
@@ -1957,7 +1958,7 @@ int __init omap2420_clk_init(void)
omap_clk_disable_autoidle_all();
/* Check the MPU rate set by bootloader */
- clkrate = omap2xxx_clk_get_core_rate(&dpll_ck);
+ clkrate = omap2xxx_clk_get_core_rate();
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;
@@ -1983,7 +1984,6 @@ int __init omap2420_clk_init(void)
/* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
vclk = clk_get(NULL, "virt_prcm_set");
sclk = clk_get(NULL, "sys_ck");
- dclk = clk_get(NULL, "dpll_ck");
return 0;
}
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 186f06a..8d9894c 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -125,6 +125,7 @@ static struct clk dpll_ck = {
.name = "dpll_ck",
.ops = &clkops_omap2xxx_dpll_ops,
.parent = &sys_ck, /* Can be func_32k also */
+ .init = &omap2xxx_clkt_dpllcore_init,
.dpll_data = &dpll_dd,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_dpllcore_recalc,
@@ -2056,7 +2057,7 @@ int __init omap2430_clk_init(void)
omap_clk_disable_autoidle_all();
/* Check the MPU rate set by bootloader */
- clkrate = omap2xxx_clk_get_core_rate(&dpll_ck);
+ clkrate = omap2xxx_clk_get_core_rate();
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;
@@ -2082,7 +2083,6 @@ int __init omap2430_clk_init(void)
/* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
vclk = clk_get(NULL, "virt_prcm_set");
sclk = clk_get(NULL, "sys_ck");
- dclk = clk_get(NULL, "dpll_ck");
return 0;
}
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e92be1fc..0e71fc2 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -30,7 +30,7 @@
#include "cm.h"
#include "cm-regbits-24xx.h"
-struct clk *vclk, *sclk, *dclk;
+struct clk *vclk, *sclk;
/*
* Omap24xx specific clock functions
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index cb6df8c..19dc0659 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -15,10 +15,11 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk *clk);
unsigned long omap2_osc_clk_recalc(struct clk *clk);
unsigned long omap2_dpllcore_recalc(struct clk *clk);
int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
-unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
+unsigned long omap2xxx_clk_get_core_rate(void);
u32 omap2xxx_get_apll_clkin(void);
u32 omap2xxx_get_sysclkdiv(void);
void omap2xxx_clk_prepare_for_reboot(void);
+void omap2xxx_clkt_dpllcore_init(struct clk *clk);
#ifdef CONFIG_SOC_OMAP2420
int omap2420_clk_init(void);
@@ -34,8 +35,6 @@ int omap2430_clk_init(void);
extern void __iomem *prcm_clksrc_ctrl, *cm_idlest_pll;
-extern struct clk *dclk;
-
extern const struct clkops clkops_omap2430_i2chs_wait;
extern const struct clkops clkops_oscck;
extern const struct clkops clkops_apll96;
^ permalink raw reply related
* [PATCH 02/13] ARM: OMAP2/3: PRM: add SoC reset functions (using the CORE DPLL method)
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Add SoC reset functions into the PRM code. These functions are based
on code from mach-omap2/prcm.c. They reset the SoC using the CORE DPLL
reset method (as opposed to one of the other two or three chip reset
methods).
Adding them here will facilitate their removal from
arch/arm/mach-omap2/prcm.c. (prcm.c is deprecated.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/prm2xxx.c | 14 ++++++++++++++
arch/arm/mach-omap2/prm2xxx.h | 2 ++
arch/arm/mach-omap2/prm3xxx.c | 15 +++++++++++++++
arch/arm/mach-omap2/prm3xxx.h | 2 ++
4 files changed, 33 insertions(+)
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index e2860f9..1f777bf 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -69,6 +69,20 @@ static u32 omap2xxx_prm_read_reset_sources(void)
return r;
}
+/**
+ * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
+ *
+ * Set the DPLL reset bit, which should reboot the SoC. This is the
+ * recommended way to restart the SoC. No return value.
+ */
+void omap2xxx_prm_dpll_reset(void)
+{
+ omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
+ OMAP2_RM_RSTCTRL);
+ /* OCP barrier */
+ omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
+}
+
int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
{
omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index 1d97112..fe8a14f 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -124,6 +124,8 @@
extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
+extern void omap2xxx_prm_dpll_reset(void);
+
extern int __init prm2xxx_init(void);
extern int __exit prm2xxx_exit(void);
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 1fea656..5435673 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -123,6 +123,21 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
}
/**
+ * omap3xxx_prm_dpll3_reset - use DPLL3 reset to reboot the OMAP SoC
+ *
+ * Set the DPLL3 reset bit, which should reboot the SoC. This is the
+ * recommended way to restart the SoC, considering Errata i520. No
+ * return value.
+ */
+void omap3xxx_prm_dpll3_reset(void)
+{
+ omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
+ OMAP2_RM_RSTCTRL);
+ /* OCP barrier */
+ omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL);
+}
+
+/**
* omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events
* @events: ptr to a u32, preallocated by caller
*
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index a3c28a8..10cd41a 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -152,6 +152,8 @@ extern void omap3xxx_prm_ocp_barrier(void);
extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+extern void omap3xxx_prm_dpll3_reset(void);
+
extern u32 omap3xxx_prm_get_reset_sources(void);
#endif /* __ASSEMBLER */
^ permalink raw reply related
* [PATCH 01/13] ARM: OMAP2+: common: remove mach-omap2/common.c and map_common_io code
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Get rid of mach-omap2/common.c by moving the global initialization for
IP block addresses that must occur early into mach-omap2/io.c. In the
process, remove the *_map_common_io*() and SoC-specific *set_globals*
functions.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/Makefile | 2
arch/arm/mach-omap2/am33xx.h | 1
arch/arm/mach-omap2/common.c | 202 --------------------------------
arch/arm/mach-omap2/common.h | 104 ++--------------
arch/arm/mach-omap2/control.c | 10 +-
arch/arm/mach-omap2/control.h | 2
arch/arm/mach-omap2/id.c | 7 +
arch/arm/mach-omap2/io.c | 78 ++++++++++--
arch/arm/mach-omap2/omap4-common.c | 1
arch/arm/mach-omap2/prcm.c | 15 +-
arch/arm/mach-omap2/sdrc.c | 8 -
arch/arm/mach-omap2/sdrc.h | 3
arch/arm/mach-omap2/ti81xx.h | 9 +
arch/arm/plat-omap/include/plat/prcm.h | 5 +
14 files changed, 115 insertions(+), 332 deletions(-)
delete mode 100644 arch/arm/mach-omap2/common.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f7cf382..7a628e7 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
# Common support
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
- common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o
+ gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o
omap-2-3-common = irq.o
hwmod-common = omap_hwmod.o \
diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h
index 06c19bb..43296c1 100644
--- a/arch/arm/mach-omap2/am33xx.h
+++ b/arch/arm/mach-omap2/am33xx.h
@@ -21,5 +21,6 @@
#define AM33XX_SCM_BASE 0x44E10000
#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
#define AM33XX_PRCM_BASE 0x44E00000
+#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + 0x3FC)
#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
deleted file mode 100644
index 17950c6..0000000
--- a/arch/arm/mach-omap2/common.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/common.c
- *
- * Code common to all OMAP2+ machines.
- *
- * Copyright (C) 2009 Texas Instruments
- * Copyright (C) 2010 Nokia Corporation
- * Tony Lindgren <tony@atomide.com>
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-
-#include <plat/clock.h>
-
-#include "soc.h"
-#include "iomap.h"
-#include "common.h"
-#include "sdrc.h"
-#include "control.h"
-
-/* Global address base setup code */
-
-static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
-{
- omap2_set_globals_tap(omap2_globals);
- omap2_set_globals_sdrc(omap2_globals);
- omap2_set_globals_control(omap2_globals);
- omap2_set_globals_prcm(omap2_globals);
-}
-
-#if defined(CONFIG_SOC_OMAP2420)
-
-static struct omap_globals omap242x_globals = {
- .class = OMAP242X_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
- .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
- .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
-};
-
-void __init omap2_set_globals_242x(void)
-{
- __omap2_set_globals(&omap242x_globals);
-}
-
-void __init omap242x_map_io(void)
-{
- omap242x_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_SOC_OMAP2430)
-
-static struct omap_globals omap243x_globals = {
- .class = OMAP243X_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
- .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
- .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
-};
-
-void __init omap2_set_globals_243x(void)
-{
- __omap2_set_globals(&omap243x_globals);
-}
-
-void __init omap243x_map_io(void)
-{
- omap243x_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_ARCH_OMAP3)
-
-static struct omap_globals omap3_globals = {
- .class = OMAP343X_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
- .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
- .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
-};
-
-void __init omap2_set_globals_3xxx(void)
-{
- __omap2_set_globals(&omap3_globals);
-}
-
-void __init omap3_map_io(void)
-{
- omap34xx_map_common_io();
-}
-
-/*
- * Adjust TAP register base such that omap3_check_revision accesses the correct
- * TI81XX register for checking device ID (it adds 0x204 to tap base while
- * TI81XX DEVICE ID register is at offset 0x600 from control base).
- */
-#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
- TI81XX_CONTROL_DEVICE_ID - 0x204)
-
-static struct omap_globals ti81xx_globals = {
- .class = OMAP343X_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
-};
-
-void __init omap2_set_globals_ti81xx(void)
-{
- __omap2_set_globals(&ti81xx_globals);
-}
-
-void __init ti81xx_map_io(void)
-{
- omapti81xx_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_SOC_AM33XX)
-#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
- TI81XX_CONTROL_DEVICE_ID - 0x204)
-
-static struct omap_globals am33xx_globals = {
- .class = AM335X_CLASS,
- .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
- .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
- .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
- .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
-};
-
-void __init omap2_set_globals_am33xx(void)
-{
- __omap2_set_globals(&am33xx_globals);
-}
-
-void __init am33xx_map_io(void)
-{
- omapam33xx_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_ARCH_OMAP4)
-static struct omap_globals omap4_globals = {
- .class = OMAP443X_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
- .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
- .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
- .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),
-};
-
-void __init omap2_set_globals_443x(void)
-{
- __omap2_set_globals(&omap4_globals);
-}
-
-void __init omap4_map_io(void)
-{
- omap44xx_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_SOC_OMAP5)
-static struct omap_globals omap5_globals = {
- .class = OMAP54XX_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
- .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
- .cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
- .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE),
-};
-
-void __init omap2_set_globals_5xxx(void)
-{
- omap2_set_globals_tap(&omap5_globals);
- omap2_set_globals_control(&omap5_globals);
- omap2_set_globals_prcm(&omap5_globals);
-}
-
-void __init omap5_map_io(void)
-{
- omap5_map_common_io();
-}
-#endif
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 7045e4d..320f0d7 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -38,54 +38,6 @@
#define OMAP_INTC_START NR_IRQS
-#ifdef CONFIG_SOC_OMAP2420
-extern void omap242x_map_common_io(void);
-#else
-static inline void omap242x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-extern void omap243x_map_common_io(void);
-#else
-static inline void omap243x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-extern void omap34xx_map_common_io(void);
-#else
-static inline void omap34xx_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_TI81XX
-extern void omapti81xx_map_common_io(void);
-#else
-static inline void omapti81xx_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_AM33XX
-extern void omapam33xx_map_common_io(void);
-#else
-static inline void omapam33xx_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-extern void omap44xx_map_common_io(void);
-#else
-static inline void omap44xx_map_common_io(void)
-{
-}
-#endif
-
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
int omap2_pm_init(void);
#else
@@ -164,50 +116,18 @@ void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
void omap_prcm_restart(char, const char *);
-/*
- * IO bases for various OMAP processors
- * Except the tap base, rest all the io bases
- * listed are physical addresses.
- */
-struct omap_globals {
- u32 class; /* OMAP class to detect */
- void __iomem *tap; /* Control module ID code */
- void __iomem *sdrc; /* SDRAM Controller */
- void __iomem *sms; /* SDRAM Memory Scheduler */
- void __iomem *ctrl; /* System Control Module */
- void __iomem *ctrl_pad; /* PAD Control Module */
- void __iomem *prm; /* Power and Reset Management */
- void __iomem *cm; /* Clock Management */
- void __iomem *cm2;
- void __iomem *prcm_mpu;
-};
-
-void omap2_set_globals_242x(void);
-void omap2_set_globals_243x(void);
-void omap2_set_globals_3xxx(void);
-void omap2_set_globals_443x(void);
-void omap2_set_globals_5xxx(void);
-void omap2_set_globals_ti81xx(void);
-void omap2_set_globals_am33xx(void);
-
-/* These get called from omap2_set_globals_xxxx(), do not call these */
-void omap2_set_globals_tap(struct omap_globals *);
-#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
-void omap2_set_globals_sdrc(struct omap_globals *);
-#else
-static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
-{ }
-#endif
-void omap2_set_globals_control(struct omap_globals *);
-void omap2_set_globals_prcm(struct omap_globals *);
-
-void omap242x_map_io(void);
-void omap243x_map_io(void);
-void omap3_map_io(void);
-void am33xx_map_io(void);
-void omap4_map_io(void);
-void omap5_map_io(void);
-void ti81xx_map_io(void);
+/* This gets called from mach-omap2/io.c, do not call this */
+void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
+
+void __init omap242x_map_io(void);
+void __init omap243x_map_io(void);
+void __init omap3_map_io(void);
+void __init am33xx_map_io(void);
+void __init omap4_map_io(void);
+void __init omap5_map_io(void);
+void __init ti81xx_map_io(void);
+
+/* omap_barriers_init() is OMAP4 only */
void omap_barriers_init(void);
/**
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index a7d1eb8..ef0a044 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -149,13 +149,11 @@ static struct omap3_control_regs control_context;
#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg))
#define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg))
-void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_control(void __iomem *ctrl,
+ void __iomem *ctrl_pad)
{
- if (omap2_globals->ctrl)
- omap2_ctrl_base = omap2_globals->ctrl;
-
- if (omap2_globals->ctrl_pad)
- omap4_ctrl_pad_base = omap2_globals->ctrl_pad;
+ omap2_ctrl_base = ctrl;
+ omap4_ctrl_pad_base = ctrl_pad;
}
void __iomem *omap_ctrl_base_get(void)
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a89e825..4ca8747 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -414,6 +414,8 @@ extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
+extern void omap2_set_globals_control(void __iomem *ctrl,
+ void __iomem *ctrl_pad);
#else
#define omap_ctrl_base_get() 0
#define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index cf2362c..f1e1215 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -559,11 +559,12 @@ void __init omap5xxx_check_revision(void)
* detect the exact revision later on in omap2_detect_revision() once map_io
* is done.
*/
-void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_tap(u32 class, void __iomem *tap)
{
- omap_revision = omap2_globals->class;
- tap_base = omap2_globals->tap;
+ omap_revision = class;
+ tap_base = tap;
+ /* XXX What is this intended to do? */
if (cpu_is_omap34xx())
tap_prod_id = 0x0210;
else
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4234d28..b853401 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -32,6 +32,7 @@
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
#include <plat/dma.h>
+#include <plat/prcm.h>
#include "soc.h"
#include "iomap.h"
@@ -43,6 +44,8 @@
#include "clock2xxx.h"
#include "clock3xxx.h"
#include "clock44xx.h"
+#include "sdrc.h"
+#include "control.h"
/*
* The machine specific code may provide the extra mapping besides the
@@ -265,7 +268,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
#endif
#ifdef CONFIG_SOC_OMAP2420
-void __init omap242x_map_common_io(void)
+void __init omap242x_map_io(void)
{
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
@@ -273,7 +276,7 @@ void __init omap242x_map_common_io(void)
#endif
#ifdef CONFIG_SOC_OMAP2430
-void __init omap243x_map_common_io(void)
+void __init omap243x_map_io(void)
{
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
@@ -281,28 +284,28 @@ void __init omap243x_map_common_io(void)
#endif
#ifdef CONFIG_ARCH_OMAP3
-void __init omap34xx_map_common_io(void)
+void __init omap3_map_io(void)
{
iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
}
#endif
#ifdef CONFIG_SOC_TI81XX
-void __init omapti81xx_map_common_io(void)
+void __init ti81xx_map_io(void)
{
iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
}
#endif
#ifdef CONFIG_SOC_AM33XX
-void __init omapam33xx_map_common_io(void)
+void __init am33xx_map_io(void)
{
iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
}
#endif
#ifdef CONFIG_ARCH_OMAP4
-void __init omap44xx_map_common_io(void)
+void __init omap4_map_io(void)
{
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
omap_barriers_init();
@@ -310,7 +313,7 @@ void __init omap44xx_map_common_io(void)
#endif
#ifdef CONFIG_SOC_OMAP5
-void __init omap5_map_common_io(void)
+void __init omap5_map_io(void)
{
iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
}
@@ -377,7 +380,14 @@ static void __init omap_hwmod_init_postsetup(void)
#ifdef CONFIG_SOC_OMAP2420
void __init omap2420_init_early(void)
{
- omap2_set_globals_242x();
+ omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
+ omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
+ OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
+ NULL);
+ omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
+ NULL, NULL);
omap2xxx_check_revision();
omap_common_init_early();
omap2xxx_voltagedomains_init();
@@ -399,7 +409,14 @@ void __init omap2420_init_late(void)
#ifdef CONFIG_SOC_OMAP2430
void __init omap2430_init_early(void)
{
- omap2_set_globals_243x();
+ omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
+ omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
+ OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
+ NULL);
+ omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
+ NULL, NULL);
omap2xxx_check_revision();
omap_common_init_early();
omap2xxx_voltagedomains_init();
@@ -425,7 +442,14 @@ void __init omap2430_init_late(void)
#ifdef CONFIG_ARCH_OMAP3
void __init omap3_init_early(void)
{
- omap2_set_globals_3xxx();
+ omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
+ omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
+ OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
+ NULL);
+ omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
+ NULL, NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
omap_common_init_early();
@@ -459,7 +483,13 @@ void __init am35xx_init_early(void)
void __init ti81xx_init_early(void)
{
- omap2_set_globals_ti81xx();
+ omap2_set_globals_tap(OMAP343X_CLASS,
+ OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
+ NULL);
+ omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
+ OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
+ NULL, NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap_common_init_early();
@@ -517,7 +547,13 @@ void __init ti81xx_init_late(void)
#ifdef CONFIG_SOC_AM33XX
void __init am33xx_init_early(void)
{
- omap2_set_globals_am33xx();
+ omap2_set_globals_tap(AM335X_CLASS,
+ AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
+ omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
+ NULL);
+ omap2_set_globals_prcm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
+ AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
+ NULL, NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap_common_init_early();
@@ -533,7 +569,14 @@ void __init am33xx_init_early(void)
#ifdef CONFIG_ARCH_OMAP4
void __init omap4430_init_early(void)
{
- omap2_set_globals_443x();
+ omap2_set_globals_tap(OMAP443X_CLASS,
+ OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
+ omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
omap_common_init_early();
@@ -556,7 +599,14 @@ void __init omap4430_init_late(void)
#ifdef CONFIG_SOC_OMAP5
void __init omap5_init_early(void)
{
- omap2_set_globals_5xxx();
+ omap2_set_globals_tap(OMAP54XX_CLASS,
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
+ omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap5xxx_check_revision();
omap_common_init_early();
}
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index e1f2897..6560e99 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -32,6 +32,7 @@
#include "omap-wakeupgen.h"
#include "soc.h"
+#include "iomap.h"
#include "common.h"
#include "hsmmc.h"
#include "omap4-sar-layout.h"
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 0a2c33b..118dc87 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -136,16 +136,13 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
};
-void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
+ void __iomem *cm2, void __iomem *prcm_mpu)
{
- if (omap2_globals->prm)
- prm_base = omap2_globals->prm;
- if (omap2_globals->cm)
- cm_base = omap2_globals->cm;
- if (omap2_globals->cm2)
- cm2_base = omap2_globals->cm2;
- if (omap2_globals->prcm_mpu)
- prcm_mpu_base = omap2_globals->prcm_mpu;
+ prm_base = prm;
+ cm_base = cm;
+ cm2_base = cm2;
+ prcm_mpu_base = prcm_mpu;
if (cpu_is_omap44xx() || soc_is_omap54xx()) {
omap_prm_base_init();
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index e3d345f..2ff0891 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -115,12 +115,10 @@ int omap2_sdrc_get_params(unsigned long r,
}
-void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms)
{
- if (omap2_globals->sdrc)
- omap2_sdrc_base = omap2_globals->sdrc;
- if (omap2_globals->sms)
- omap2_sms_base = omap2_globals->sms;
+ omap2_sdrc_base = sdrc;
+ omap2_sms_base = sms;
}
/**
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index b3f8379..06ebd6e5 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -50,6 +50,9 @@ static inline u32 sms_read_reg(u16 reg)
{
return __raw_readl(OMAP_SMS_REGADDR(reg));
}
+
+extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms);
+
#else
#define OMAP242X_SDRC_REGADDR(reg) \
OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h
index 8f9843f..a1e6caf 100644
--- a/arch/arm/mach-omap2/ti81xx.h
+++ b/arch/arm/mach-omap2/ti81xx.h
@@ -22,6 +22,15 @@
#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
#define TI81XX_PRCM_BASE 0x48180000
+/*
+ * Adjust TAP register base such that omap3_check_revision accesses the correct
+ * TI81XX register for checking device ID (it adds 0x204 to tap base while
+ * TI81XX DEVICE ID register is at offset 0x600 from control base).
+ */
+#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
+ TI81XX_CONTROL_DEVICE_ID - 0x204)
+
+
#define TI81XX_ARM_INTC_BASE 0x48200000
#endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index a76cbd4..a950a83 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -27,8 +27,13 @@
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
#define __ASM_ARM_ARCH_OMAP_PRCM_H
+#include <linux/kernel.h>
+#include <linux/io.h>
+
int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
const char *name);
+void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
+ void __iomem *cm2, void __iomem *prcm_mpu);
#endif
^ permalink raw reply related
* [PATCH 00/13] ARM: OMAP: remove prcm.[ch]
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
Remove arch/arm/mach-omap2/prcm.c and
arch/arm/plat-omap/include/plat/prcm.h. This is in preparation for
moving the PRM/CM code to drivers/, although to be fair, these files
should have been removed a long time ago.
Intended for 3.8 cleanup. Applies on top of the existing PRM/CM split
cleanup series, and the WDTIMER cleanup series.
- Paul
---
omap2_prcm_cleanup_3.8
text data bss dec hex filename
7521423 696876 5613996 13832295 d31067 vmlinux.omap2plus_defconfig.orig
7522239 696612 5613996 13832847 d3128f vmlinux.omap2plus_defconfig
Paul Walmsley (13):
ARM: OMAP2+: common: remove mach-omap2/common.c and map_common_io code
ARM: OMAP2/3: PRM: add SoC reset functions (using the CORE DPLL method)
ARM: OMAP2xxx: clock: remove global 'dclk' variable
ARM: OMAP2xxx: clock: move virt_prcm_set code into clkt2xxx_virt_prcm_set.c
ARM: OMAP2+: PRCM: create SoC-specific chip restart functions
ARM: OMAP2+: board files: use SoC-specific system restart functions
ARM: OMAP2xxx: APLL/CM: convert to use omap2_cm_wait_module_ready()
ARM: OMAP2+: CM/clock: convert _omap2_module_wait_ready() to use SoC-independent CM functions
ARM: OMAP2+: PRCM: remove omap2_cm_wait_idlest()
ARM: OMAP2+: PRCM: split and relocate the PRM/CM globals setup
ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macros
ARM: OMAP2+: hwmod: call to _omap4_disable_module() should use the SoC-specific call
ARM: OMAP2+: PRCM: remove obsolete prcm.[ch]
arch/arm/mach-omap1/reset.c | 2
arch/arm/mach-omap2/Makefile | 9 +
arch/arm/mach-omap2/am33xx.h | 1
arch/arm/mach-omap2/board-2430sdp.c | 2
arch/arm/mach-omap2/board-3430sdp.c | 2
arch/arm/mach-omap2/board-3630sdp.c | 2
arch/arm/mach-omap2/board-4430sdp.c | 2
arch/arm/mach-omap2/board-am3517crane.c | 2
arch/arm/mach-omap2/board-am3517evm.c | 2
arch/arm/mach-omap2/board-apollon.c | 2
arch/arm/mach-omap2/board-cm-t35.c | 18 +-
arch/arm/mach-omap2/board-cm-t3517.c | 2
arch/arm/mach-omap2/board-devkit8000.c | 2
arch/arm/mach-omap2/board-generic.c | 10 +
arch/arm/mach-omap2/board-h4.c | 2
arch/arm/mach-omap2/board-igep0020.c | 4 -
arch/arm/mach-omap2/board-ldp.c | 2
arch/arm/mach-omap2/board-n8x0.c | 6 -
arch/arm/mach-omap2/board-omap3beagle.c | 2
arch/arm/mach-omap2/board-omap3evm.c | 2
arch/arm/mach-omap2/board-omap3logic.c | 4 -
arch/arm/mach-omap2/board-omap3pandora.c | 2
arch/arm/mach-omap2/board-omap3stalker.c | 2
arch/arm/mach-omap2/board-omap3touchbook.c | 2
arch/arm/mach-omap2/board-omap4panda.c | 2
arch/arm/mach-omap2/board-overo.c | 2
arch/arm/mach-omap2/board-rm680.c | 4 -
arch/arm/mach-omap2/board-rx51.c | 2
arch/arm/mach-omap2/board-ti8168evm.c | 4 -
arch/arm/mach-omap2/board-zoom.c | 4 -
arch/arm/mach-omap2/clkt2xxx_apll.c | 57 ++-----
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 36 ++++-
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 70 ++++++++-
arch/arm/mach-omap2/clkt_iclk.c | 1
arch/arm/mach-omap2/clock.c | 15 +-
arch/arm/mach-omap2/clock.h | 28 ----
arch/arm/mach-omap2/clock2420_data.c | 26 +--
arch/arm/mach-omap2/clock2430_data.c | 26 +--
arch/arm/mach-omap2/clock2xxx.c | 16 --
arch/arm/mach-omap2/clock2xxx.h | 9 +
arch/arm/mach-omap2/cm-regbits-24xx.h | 2
arch/arm/mach-omap2/cm.h | 20 ++-
arch/arm/mach-omap2/cm2xxx.c | 128 ++++++++++++++++
arch/arm/mach-omap2/cm2xxx.h | 4 +
arch/arm/mach-omap2/cm2xxx_3xxx.h | 8 +
arch/arm/mach-omap2/cm3xxx.c | 66 ++++++++
arch/arm/mach-omap2/cm3xxx.h | 5 +
arch/arm/mach-omap2/cm_common.c | 70 +++++++++
arch/arm/mach-omap2/cminst44xx.h | 2
arch/arm/mach-omap2/common.c | 202 --------------------------
arch/arm/mach-omap2/common.h | 111 ++------------
arch/arm/mach-omap2/control.c | 10 +
arch/arm/mach-omap2/control.h | 2
arch/arm/mach-omap2/cpuidle34xx.c | 1
arch/arm/mach-omap2/display.c | 2
arch/arm/mach-omap2/hdq1w.c | 4 -
arch/arm/mach-omap2/i2c.c | 6 -
arch/arm/mach-omap2/id.c | 7 +
arch/arm/mach-omap2/io.c | 87 +++++++++--
arch/arm/mach-omap2/mcbsp.c | 2
arch/arm/mach-omap2/msdi.c | 4 -
arch/arm/mach-omap2/omap2-restart.c | 65 ++++++++
arch/arm/mach-omap2/omap3-restart.c | 36 +++++
arch/arm/mach-omap2/omap4-common.c | 18 ++
arch/arm/mach-omap2/omap_hwmod.c | 8 -
arch/arm/mach-omap2/pm34xx.c | 1
arch/arm/mach-omap2/powerdomain.c | 2
arch/arm/mach-omap2/prcm-common.h | 22 ---
arch/arm/mach-omap2/prcm.c | 176 -----------------------
arch/arm/mach-omap2/prcm_mpu44xx.c | 17 ++
arch/arm/mach-omap2/prcm_mpu44xx.h | 9 +
arch/arm/mach-omap2/prm.h | 24 +++
arch/arm/mach-omap2/prm2xxx.c | 15 ++
arch/arm/mach-omap2/prm2xxx.h | 2
arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 -
arch/arm/mach-omap2/prm3xxx.c | 16 ++
arch/arm/mach-omap2/prm3xxx.h | 2
arch/arm/mach-omap2/prm44xx.c | 1
arch/arm/mach-omap2/prm_common.c | 16 ++
arch/arm/mach-omap2/prminst44xx.h | 2
arch/arm/mach-omap2/sdrc.c | 8 -
arch/arm/mach-omap2/sdrc.h | 3
arch/arm/mach-omap2/ti81xx.h | 9 +
arch/arm/mach-omap2/wd_timer.c | 5 -
arch/arm/plat-omap/include/plat/prcm.h | 36 -----
85 files changed, 827 insertions(+), 804 deletions(-)
delete mode 100644 arch/arm/mach-omap2/common.c
create mode 100644 arch/arm/mach-omap2/omap2-restart.c
create mode 100644 arch/arm/mach-omap2/omap3-restart.c
delete mode 100644 arch/arm/mach-omap2/prcm.c
delete mode 100644 arch/arm/plat-omap/include/plat/prcm.h
^ permalink raw reply
* [PATCH 3/9] ARM: Kirkwood: Convert dnskw to pinctrl
From: Jamie Lentin @ 2012-10-25 22:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351090434-30499-4-git-send-email-andrew@lunn.ch>
Thanks for doing all this. Some typos to fix, I've commented below but
I thought it might be easier to push a version for you to steal. It's
here:
git://github.com/lentinj/linux.git v3.7-rc2-pinctrl
https://raw.github.com/lentinj/linux/v3.7-rc2-pinctrl/arch/arm/boot/dts/kirkwood-dnskw.dtsi
Tested on a DNS-320, not a DNS-325 yet.
Similar to lsxl_init, the custom GPIO registrations fail:-
dnskw: failed to configure power-off GPIO
dnskw: Failed to register dnskw:power:sata0
dnskw: Failed to register dnskw:power:sata1
dnskw: Failed to register dnskw:power:recover
So I guess they will need a new home somewhere.
However most things (fan, buttons, SATA detect/power via sysfs, power via
sysfs) work. The key thing that doesn't is LEDs. Registration looks
reasonable:
Registered led device: dns320:blue:power
kirkwood-pinctrl f1010000.pinctrl: request pin 43 (PIN43) for mvebu-gpio:43
Registered led device: dns320:blue:usb
kirkwood-pinctrl f1010000.pinctrl: request pin 28 (PIN28) for mvebu-gpio:28
Registered led device: dns320:orange:l_hdd
kirkwood-pinctrl f1010000.pinctrl: request pin 27 (PIN27) for mvebu-gpio:27
Registered led device: dns320:orange:r_hdd
kirkwood-pinctrl f1010000.pinctrl: request pin 35 (PIN35) for mvebu-gpio:35
Registered led device: dns320:orange:usb
However setting brightness on/off does the following:
cat /sys/class/leds/dns320\:blue\:power/trigger
dns320:blue:power - No effect, LED continues to blink as bootloader
configures it
dns320:orange:l_hdd - Works fine
dns320:orange:r_hdd - Works fine
dns320:orange:usb - Turns on, turning off locks NAS hard
dns320:blue:usb - Turns on, turning off locks NAS hard
Any ideas?
Cheers,
On Wed, 24 Oct 2012, Andrew Lunn wrote:
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/boot/dts/kirkwood-dnskw.dtsi | 136 +++++++++++++++++++++++++++++++++
> arch/arm/mach-kirkwood/board-dnskw.c | 37 ---------
> 2 files changed, 136 insertions(+), 37 deletions(-)
>
> diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
> index 9b32d02..5d8cf93 100644
> --- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi
> +++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
> @@ -36,6 +36,142 @@
> };
>
> ocp at f1000000 {
> + pinctrl: pinctrl at 10000 {
> + compatible = "marvell,88f6281-pinctrl";
> + reg = <0x10000 0x20>;
> +
> + pinctrl-0 = < &pmx_uart1 &pmx_sata1
Need a &pmx_sata0 too (see below).
> + &pmx_gpio_24 &pmx_gpio_25
> + &pmx_led_power &pmx_led_power
Shouldn't be repeated, I'm guessing.
> + &pmx_led_red_right_hdd
> + &pmx_led_red_left_hdd
> + &pmx_led_red_usb_325
> + &pmx_gpio_30 &pmx_gpio_31
> + &pmx_gpio_32 &pmx_gpio_33
> + &pmx_button_power
> + &pmx_led_red_usb_320
> + &pmx_power_off &pmx_power_back_on
> + &pmx_power_sata0 &pmx_power_sata1
> + &pmx_present_sata0 &pmx_present_sata1
> + &pmx_led_white_usb &pmx_fan_tacho
> + &pmx_fan_high_speed &pmx_fan_low_speed
> + &pmx_button_unmount &pmx_button_reset
> + &pmx_temp_alarm >;
> + pinctrl-names = "default";
> +
> + pmx_uart1: pmx-uart1 {
> + marvell,pins = "mpp13", "mpp14";
> + marvell,function = "uart1";
> + };
> + pmx_sata1: pmx-sata1 {
> + marvell,pins = "mpp4", "mpp20", "mpp22";
mpp4 is for the NAND. I'm guessing mpp22 should be mpp21, but this should
have the "sata0" function.
On a related note, the NAND pins aren't registered. I probably should have
done this before, although if the bootloader didn't set up the NAND pins
then it'd probably not get this far :)
> + marvell,function = "sata1";
> + };
> + pmx_gpio_24: pmx-gpio-24 {
> + marvell,pins = "mpp24";
> + marvell,function = "gpio";
> + };
> + pmx_gpio_25: pmx-gpio-25 {
> + marvell,pins = "mpp25";
> + marvell,function = "gpio";
> + };
These don't actually do anything (there's no more NAS functions left to
find now), so could they just be left out? They didn't serve any purpose
before other than making it easy to see where the gaps were.
> + pmx_led_power: pmx-led-power {
> + marvell,pins = "mpp26";
> + marvell,function = "gpio";
> + };
> + pmx_led_red_right_hdd: pmx-led-red-right-hdd {
> + marvell,pins = "mpp27";
> + marvell,function = "gpio";
> + };
> + pmx_led_red_left_hdd: pmx-led-red-left-hdd {
> + marvell,pins = "mpp28";
> + marvell,function = "gpio";
> + };
> + pmx_led_red_usb_325: pmx-led-red-usb-325 {
> + marvell,pins = "mpp29";
> + marvell,function = "gpio";
> + };
> + pmx_gpio_30: pmx-gpio-30 {
> + marvell,pins = "mpp30";
> + marvell,function = "gpio";
> + };
> + pmx_gpio_31: pmx-gpio-31 {
> + marvell,pins = "mpp31";
> + marvell,function = "gpio";
> + };
> + pmx_gpio_32: pmx-gpio-32 {
> + marvell,pins = "mpp32";
> + marvell,function = "gpio";
> + };
> + pmx_gpio_33: pmx-gpio-33 {
> + marvell,pins = "mpp33";
> + marvell,function = "gpio";
> + };
Should be "gpo", but could just leave out all 4.
> + pmx_button_power: pmx-button-power {
> + marvell,pins = "mpp34";
> + marvell,function = "gpio";
> + };
> + pmx_led_red_usb_320: pmx-led-red-usb-320 {
> + marvell,pins = "mpp35";
> + marvell,function = "gpio";
> + };
> + pmx_power_off: pmx-power-off {
> + marvell,pins = "mpp36";
> + marvell,function = "gpio";
> + };
> + pmx_power_back_on: pmx-power-back-on {
> + marvell,pins = "mpp37";
> + marvell,function = "gpio";
> + };
> + pmx_gpio_38: pmx-gpio-38 {
> + marvell,pins = "mpp38";
> + marvell,function = "gpio";
> + };
This one wasn't registered above, but not a used pin.
> + pmx_power_sata0: pmx-power-sata0 {
> + marvell,pins = "mpp39";
> + marvell,function = "gpio";
> + };
> + pmx_power_sata1: pmx-power-sata1 {
> + marvell,pins = "mpp40";
> + marvell,function = "gpio";
> + };
> + pmx_present_sata0: pmx-present-sata0 {
> + marvell,pins = "mpp41";
> + marvell,function = "gpio";
> + };
> + pmx_present_sata1: pmx-present-sata1 {
> + marvell,pins = "mpp42";
> + marvell,function = "gpio";
> + };
> + pmx_led_white_usb: pmx-led-white-usb {
> + marvell,pins = "mpp43";
> + marvell,function = "gpio";
> + };
> + pmx_fan_tacho: pmx-fan-tacho {
> + marvell,pins = "mpp44";
> + marvell,function = "gpio";
> + };
> + pmx_fan_high_speed: pmx-fan-high-speed {
> + marvell,pins = "mpp45";
> + marvell,function = "gpio";
> + };
> + pmx_fan_low_speed: pmx-fan-low-speed {
> + marvell,pins = "mpp46";
> + marvell,function = "gpio";
> + };
> + pmx_button_unmount: pmx-button-unmount {
> + marvell,pins = "mpp47";
> + marvell,function = "gpio";
> + };
> + pmx_button_reset: pmx-button-reset {
> + marvell,pins = "mpp48";
> + marvell,function = "gpio";
> + };
> + pmx_temp_alarm: pmx-temp-alarm {
> + marvell,pins = "mpp49";
> + marvell,function = "gpio";
> + };
> + };
> sata at 80000 {
> status = "okay";
> nr-ports = <2>;
> diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c
> index 43d16d6..ed93c09 100644
> --- a/arch/arm/mach-kirkwood/board-dnskw.c
> +++ b/arch/arm/mach-kirkwood/board-dnskw.c
> @@ -17,46 +17,11 @@
> #include <linux/mv643xx_eth.h>
> #include <linux/gpio.h>
> #include "common.h"
> -#include "mpp.h"
>
> static struct mv643xx_eth_platform_data dnskw_ge00_data = {
> .phy_addr = MV643XX_ETH_PHY_ADDR(8),
> };
>
> -static unsigned int dnskw_mpp_config[] __initdata = {
> - MPP13_UART1_TXD, /* Custom ... */
> - MPP14_UART1_RXD, /* ... Controller (DNS-320 only) */
> - MPP20_SATA1_ACTn, /* LED: White Right HDD */
> - MPP21_SATA0_ACTn, /* LED: White Left HDD */
> - MPP24_GPIO,
> - MPP25_GPIO,
> - MPP26_GPIO, /* LED: Power */
> - MPP27_GPIO, /* LED: Red Right HDD */
> - MPP28_GPIO, /* LED: Red Left HDD */
> - MPP29_GPIO, /* LED: Red USB (DNS-325 only) */
> - MPP30_GPIO,
> - MPP31_GPIO,
> - MPP32_GPIO,
> - MPP33_GPO,
> - MPP34_GPIO, /* Button: Front power */
> - MPP35_GPIO, /* LED: Red USB (DNS-320 only) */
> - MPP36_GPIO, /* Power: Turn off board */
> - MPP37_GPIO, /* Power: Turn back on after power failure */
> - MPP38_GPIO,
> - MPP39_GPIO, /* Power: SATA0 */
> - MPP40_GPIO, /* Power: SATA1 */
> - MPP41_GPIO, /* SATA0 present */
> - MPP42_GPIO, /* SATA1 present */
> - MPP43_GPIO, /* LED: White USB */
> - MPP44_GPIO, /* Fan: Tachometer Pin */
> - MPP45_GPIO, /* Fan: high speed */
> - MPP46_GPIO, /* Fan: low speed */
> - MPP47_GPIO, /* Button: Back unmount */
> - MPP48_GPIO, /* Button: Back reset */
> - MPP49_GPIO, /* Temp Alarm (DNS-325) Pin of U5 (DNS-320) */
> - 0
> -};
> -
> static void dnskw_power_off(void)
> {
> gpio_set_value(36, 1);
> @@ -76,8 +41,6 @@ static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
>
> void __init dnskw_init(void)
> {
> - kirkwood_mpp_conf(dnskw_mpp_config);
> -
> kirkwood_ehci_init();
> kirkwood_ge00_init(&dnskw_ge00_data);
>
>
--
Jamie Lentin
^ permalink raw reply
* [PATCH 0/9] ARM: Kirkwood: Convert to pinctrl
From: Jamie Lentin @ 2012-10-25 22:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025082826.693939b0@skate>
On Thu, 25 Oct 2012, Thomas Petazzoni wrote:
> Andrew,
>
> On Thu, 25 Oct 2012 07:46:38 +0200, Andrew Lunn wrote:
>
>> Thanks Thomas, i will play around with this.
>>
>> I'm just wondering if we are going to get into ordering issues. These
>> gpio operations are providing power to subsystems. We probably need
>> that to happen before the driver is loaded. If we call
>> of_platform_populate() too early, do we have the danger the driver
>> probing is going to happen before the init routine can enable the
>> power?
>>
>> It seems like we want pinctrl/gpio working first, with pins hogged as
>> specified in DT, then the board init() function, then the rest of DT
>> setup.
>
> If those GPIO value settings are needed to get a particular driver to
> work, then I'd recommend letting the driver do the GPIO value setting.
> For example, in the lsxl board, I see:
>
> /* usb and sata power on */
> gpio_set_value(LSXL_GPIO_USB_POWER, 1);
> gpio_set_value(LSXL_GPIO_HDD_POWER, 1);
>
> If the LSXL_GPIO_USB_POWER GPIO should be set to one to get the EHCI
> driver to work properly, then I think we should let the EHCI driver set
> this GPIO value in its ->probe() operation. Of course, the GPIO
> reference will be passed in the platform_data (for old-style probing),
> or through specific DT properties (for new-style, DT-based, probing).
>
> Regarding the LSXL_GPIO_HDD_POWER GPIO, I am not sure. Is it required
> to apply power on this GPIO to get the SATA driver to probe properly,
> or is it possible to get the SATA driver to probe properly, then apply
> power and have the HDD still being recognized? I haven't looked at all
> at how SATA drivers were working, so I can't say.
FWIW, Applying power to the HDD after SATA probe works fine on my NAS
(admittedly not an lsxl board, but close enough). Turning it off again is
a little unclean, but works.
> Also, ultimately, if those GPIOs are providing power, then they should
> probably not be handled as simple GPIOs, but rather as regulator, using
> the gpio-regulator driver. But let's do things steps by steps :-)
>
> Best regards,
>
> Thomas
>
--
Jamie Lentin
^ permalink raw reply
* [PATCH v3] gpio/omap: fix off-mode bug: clear debounce clock enable mask on free/reset
From: Jon Hunter @ 2012-10-25 22:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351182858-14045-1-git-send-email-khilman@deeprootsystems.com>
Hi Kevin,
On 10/25/2012 11:34 AM, Kevin Hilman wrote:
> From: Kevin Hilman <khilman@ti.com>
>
> When a GPIO is freed or shutdown, ensure that the proper bit in
> dbck_enable_mask is cleared also. Otherwise, context restore on
> subsequent off-mode transition will restore previous debounce values
> from the shadow copies (bank->context.debounce*) leading to mismatch
> state between driver state and hardware state.
>
> This was discovered when board code was doing
>
> gpio_request_one()
> gpio_set_debounce()
> gpio_free()
>
> which was leaving the GPIO debounce settings in a confused state. If
> that GPIO bank is subsequently used with off-mode enabled, bogus state
> would be restored, leaving GPIO debounce enabled which then prevented
> the CORE powerdomain from transitioning.
>
> To fix, ensure that right bit in bank->dbck_enable_mask is cleared
> when a GPIO is freed/shutdown so debounce state doesn't persist after
> free/reset. If this GPIO is the last debounce-enabled GPIO in the
> bank, the debounce will also be cut.
>
> Special thanks to Grazvydas Ignotas for pointing out a bug in the
> first version that would've disabled debounce on any runtime PM
> transition.
>
> And, special thanks to Jon Hunter for pointing out a bug in the second
> version which was mistakenly clearing all debounce bits on reset
> instead of individual GPIOs, as well as suggesting cutting the
> debounce clock after all debounce bits are cleared.
... and for introducing yet another bug :-(
> Tesed on 37xx/EVM board which configures GPIO debounce for the ads7846
> touchscreen in its board file using the above sequence, and so was
> failing off-mode tests in dynamic idle. Verified that off-mode tests
> are passing with this patch.
>
> Reported-by: Paul Walmsley <paul@pwsan.com>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Grazvydas Ignotas <notasas@gmail.com>
> Cc: Jon Hunter <jon-hunter@ti.com>
> Signed-off-by: Kevin Hilman <khilman@ti.com>
> ---
> drivers/gpio/gpio-omap.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
> index 94cbc84..ce1da19 100644
> --- a/drivers/gpio/gpio-omap.c
> +++ b/drivers/gpio/gpio-omap.c
> @@ -539,6 +539,8 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
> _set_gpio_irqenable(bank, gpio, 0);
> _clear_gpio_irqstatus(bank, gpio);
> _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
> + bank->dbck_enable_mask &= ~(GPIO_BIT(bank, gpio));
> + _gpio_dbck_disable(bank);
We can't use _gpio_dbck_disable() here. This has been specifically implemented
for the suspend path and is designed to disable the debounce clock while
debounce is enabled (which makes sense). Yes this needs to be cleaned up.
I have implemented the following and unit tested. Care to test on your 37xx
board? Sorry I would do it myself I had one.
Also not sure if you just wish to squash your patch and mine together.
This is based on top of yours.
Cheers
Jon
>From 33812f3bd4f7aab1154e7194b7f11fba700a5086 Mon Sep 17 00:00:00 2001
From: Jon Hunter <jon-hunter@ti.com>
Date: Thu, 25 Oct 2012 16:00:51 -0500
Subject: [PATCH] gpio/omap: fix clearing of debounce settings on gpio
free/reset
When a GPIO is freed or shutdown, we need to ensure that any debounce settings
are cleared and if the GPIO is the only GPIO in the bank that is currently
using debounce, then disable the debounce clock as well to save power.
Therefore, introduce a new function called _clear_gpio_debounce() to clear
any debounce settings when the GPIO is freed or shutdown.
Please note that we cannot use _gpio_dbck_disable() to disable the debounce
clock because this has been specifically created for the gpio suspend path
and is intended to shutdown the debounce clock while debounce is enabled.
This has been unit tested on an OMAP3430 Beagle board, by requesting a gpio,
enabling debounce and then freeing the gpio and checking the register contents,
the saved register context and the debounce clock state.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
---
drivers/gpio/gpio-omap.c | 37 +++++++++++++++++++++++++++++++++++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index ce1da19..d335af1 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -251,6 +251,40 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
}
}
+/**
+ * _clear_gpio_debounce - clear debounce settings for a gpio
+ * @bank: the gpio bank we're acting upon
+ * @gpio: the gpio number on this @gpio
+ *
+ * If a gpio is using debounce, then clear the debounce enable bit and if
+ * this is the only gpio in this bank using debounce, then clear the debounce
+ * time too. The debounce clock will also be disabled when calling this function
+ * if this is the only gpio in the bank using debounce.
+ */
+static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio)
+{
+ u32 gpio_bit = GPIO_BIT(bank, gpio);
+
+ if (!bank->dbck_flag)
+ return;
+
+ if (!(bank->dbck_enable_mask & gpio_bit))
+ return;
+
+ bank->dbck_enable_mask &= ~gpio_bit;
+ bank->context.debounce_en &= ~gpio_bit;
+ __raw_writel(bank->context.debounce_en,
+ bank->base + bank->regs->debounce_en);
+
+ if (!bank->dbck_enable_mask) {
+ bank->context.debounce = 0;
+ __raw_writel(bank->context.debounce, bank->base +
+ bank->regs->debounce);
+ clk_disable(bank->dbck);
+ bank->dbck_enabled = false;
+ }
+}
+
static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
unsigned trigger)
{
@@ -539,8 +573,7 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
_set_gpio_irqenable(bank, gpio, 0);
_clear_gpio_irqstatus(bank, gpio);
_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
- bank->dbck_enable_mask &= ~(GPIO_BIT(bank, gpio));
- _gpio_dbck_disable(bank);
+ _clear_gpio_debounce(bank, gpio);
}
/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
--
1.7.9.5
^ permalink raw reply related
* [PATCH] ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
From: Nick Bowler @ 2012-10-25 22:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025224108.GA30705@elliptictech.com>
The main UART on the Xilinx ZC702 board is UART1, located at address
e0001000. Add a Kconfig option to select this device as the low-level
debugging port. This allows the really early boot printouts to reach
the USB serial adaptor on this board.
For consistency's sake, add a choice entry for UART0 even though it is
the the default if UART1 is not selected.
As there are currently known issues related to the UART virtual
mappings, this is KNOWN BROKEN, not to be merged yet!
Not-Yet-Signed-off-by: Nick Bowler <nbowler@elliptictech.com>
---
arch/arm/Kconfig.debug | 17 +++++++++++++++++
arch/arm/mach-zynq/common.c | 6 +++---
arch/arm/mach-zynq/include/mach/zynq_soc.h | 18 ++++++++++++------
3 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857b3a4c..7754d51f2b19 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -132,6 +132,23 @@ choice
their output to UART1 serial port on DaVinci TNETV107X
devices.
+ config DEBUG_ZYNQ_UART0
+ bool "Kernel low-level debugging on Xilinx Zynq using UART0"
+ depends on ARCH_ZYNQ
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to UART0 on the Zynq platform.
+
+ config DEBUG_ZYNQ_UART1
+ bool "Kernel low-level debugging on Xilinx Zynq using UART1"
+ depends on ARCH_ZYNQ
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to UART1 on the Zynq platform.
+
+ If you have a ZC702 board and want early boot messages to
+ appear on the USB serial adaptor, select this option.
+
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ba8d14f78d4d..93b91059faab 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -84,9 +84,9 @@ static struct map_desc io_desc[] __initdata = {
#ifdef CONFIG_DEBUG_LL
{
- .virtual = UART0_VIRT,
- .pfn = __phys_to_pfn(UART0_PHYS),
- .length = UART0_SIZE,
+ .virtual = LL_UART_VADDR,
+ .pfn = __phys_to_pfn(LL_UART_PADDR),
+ .length = UART_SIZE,
.type = MT_DEVICE,
},
#endif
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index c6b9b67bf7c7..cab72bfd183c 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -23,23 +23,29 @@
* vmalloc region
*/
#define UART0_PHYS 0xE0000000
-#define UART0_SIZE SZ_4K
-#define UART0_VIRT (VMALLOC_END - UART0_SIZE)
+#define UART1_PHYS 0xE0001000
+#define UART_SIZE SZ_4K
+#define UART_VIRT (VMALLOC_END - UART_SIZE)
#define TTC0_PHYS 0xF8001000
#define TTC0_SIZE SZ_4K
-#define TTC0_VIRT (UART0_VIRT - TTC0_SIZE)
+#define TTC0_VIRT (UART_VIRT - TTC0_SIZE)
#define SCU_PERIPH_PHYS 0xF8F00000
#define SCU_PERIPH_SIZE SZ_8K
#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
+#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
+# define LL_UART_PADDR UART1_PHYS
+# define LL_UART_VADDR UART_VIRT
+#else
+# define LL_UART_PADDR UART0_PHYS
+# define LL_UART_VADDR UART_VIRT
+#endif
+
/* The following are intended for the devices that are mapped early */
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
-#define LL_UART_PADDR UART0_PHYS
-#define LL_UART_VADDR UART0_VIRT
-
#endif
--
1.7.8.6
^ permalink raw reply related
* [PATCH RFT] ARM64: dma-mapping: support debug_dma_mapping_error
From: Shuah Khan @ 2012-10-25 22:47 UTC (permalink / raw)
To: linux-arm-kernel
Add support for debug_dma_mapping_error() call to avoid warning from
debug_dma_unmap() interface when it checks for mapping error checked
status. Without this patch, device driver failed to check map error
warning is generated.
Signed-off-by: Shuah Khan <shuah.khan@hp.com>
---
arch/arm64/include/asm/dma-mapping.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h
index 538f4b4..9947768 100644
--- a/arch/arm64/include/asm/dma-mapping.h
+++ b/arch/arm64/include/asm/dma-mapping.h
@@ -50,6 +50,7 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
static inline int dma_mapping_error(struct device *dev, dma_addr_t dev_addr)
{
struct dma_map_ops *ops = get_dma_ops(dev);
+ debug_dma_mapping_error(dev, dev_addr);
return ops->mapping_error(dev, dev_addr);
}
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 5/5] zynq: move static peripheral mappings
From: Nick Bowler @ 2012-10-25 22:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025212902.GX20593@beefymiracle.amer.corp.natinst.com>
On 2012-10-25 16:29 -0500, Josh Cartwright wrote:
> On Thu, Oct 25, 2012 at 04:17:01PM -0400, Nick Bowler wrote:
> > Did you test this on any real hardware? I can't get the ZC702 to work
> > with the UART mapped at this address (this ends up being mapped at
> > 0xFEFFF000), although I can't for the life of me figure out why the
> > virtual address even matters. Note that for the ZC702, the physical
> > address of the "main" UART is 0xE0001000.
>
> Ugh, not yet; My testing has been on a qemu model. I also
> unfortunately neglected to mention I am carrying a qemu patch that
> forces RX_EN/TX_EN of the uarts out of reset. There is an (incomplete)
> thread on qemu-devel discussing whose responsibility it really is to
> enable the uarts:
>
> http://lists.gnu.org/archive/html/qemu-devel/2012-10/msg03779.html
>
> Clearly, though, if you are seeing the "Uncompressing Linux..."
> messages, then the uart is enabled, so I don't think that's the problem.
Yes, the uart is presumably enabled by u-boot.
> > "Works": all printouts make it to the console
> > "Fails": no printouts make it to the console after decompression
> > "Truncated": the first few lines of output do not make it to the
> > console, but after that it "Works". The first line
> > successfully printed is always
> > "Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096"
>
> Odd, I'm wondering the uart gets into a weird state, and some bits get
> knocked loose at console_initcall() time, when the console driver comes
> up (Assuming CONFIG_SERIAL_XILINX_PS_UART)?
While I am using that driver, it is not initialized until relatively
late in the boot process. If I were to guess, I would guess that,
except for when it "Works", the really really early printk stuff isn't
actually hitting the uart at all. The "Fails" case would then be due to
the stray writes crashing the board, and the "Truncated" case due to the
stray writes being (ostensibly) benign.
But I really have no way right now to test this hypothesis, since I
can't print anything in the failing case.
> > And here are the addresses I tested:
> >
> > Address Result
> > -----------------------
> > 0xf0000000 Truncated
> > 0xf0001000 Works
[...]
> > 0xfefff000 Fails
> >
> > Judging by the list, the console seems to only work properly if the
> > defined virtual address is Fxxx1000 and xxx is not too big...
>
> Very odd. Do you mind sending out your patch allowing the selection of
> the secondary uart for DEBUG_LL?
I will follow up with the version that applies on top of your series in
a moment. I'm confident that the UART works on the ZC702 when mapped at
0xf0001000, since I've been running with that since I first got my hands
on one of these boards.
But you don't need any patch to do the same tests I was doing above:
you can just change UART0_PHYS to 0xe0001000 and then set UART0_VIRT
accordingly (you may need to move the TTC/SCU mappings depending where
you put the UART, of course).
Cheers,
--
Nick Bowler, Elliptic Technologies (http://www.elliptictech.com/)
^ permalink raw reply
* [PATCH] ARM: OMAP2+: PM: add missing newline to VC warning message
From: Nishanth Menon @ 2012-10-25 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025221236.GE11928@atomide.com>
On 15:12-20121025, Tony Lindgren wrote:
> * Nishanth Menon <nm@ti.com> [121025 10:57]:
> > On 10:35-20121025, Kevin Hilman wrote:
> > > From: Kevin Hilman <khilman@ti.com>
[..]
> > while we are at it, could we clean up the pr_warning usage back to
> > pr_warn as well?
> > diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> > index 880249b..2d66f8c 100644
> > --- a/arch/arm/mach-omap2/vc.c
> > +++ b/arch/arm/mach-omap2/vc.c
> > @@ -186,7 +186,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
> > loop_cnt++;
> >
> > if (retries_cnt > 10) {
> > - pr_warning("%s: Retry count exceeded\n", __func__);
> > + pr_warn("%s: Retry count exceeded\n", __func__);
> > return -ETIMEDOUT;
> > }
> >
>
> Looks like that's in the separate patch you posted for v3.8 that Kevin
> is taking.
Nope. if you indicated [1], then I got inspired by Kevin's cleanup and cleaned
up vp.c -> Kevin cleaned up vc.c :)
If the additional cleanup I pointed above in this thread is interesting, it
could be clubbed with the current patch itself
[1] https://patchwork.kernel.org/patch/1646661/
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH] ARM: OMAP2+: PM: add missing newline to VC warning message
From: Tony Lindgren @ 2012-10-25 22:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025175607.GA21937@kahuna>
* Nishanth Menon <nm@ti.com> [121025 10:57]:
> On 10:35-20121025, Kevin Hilman wrote:
> > From: Kevin Hilman <khilman@ti.com>
> >
> > Add missing newline to warning message to avoid annoying
> > wrapping problems during kernel boot like this one:
> >
> > omap_vc_i2c_init: I2C config for vdd_iva does not match other channels (0).
> > omap_vc_i2c_init: I2C config for vdd_mpu does not match other channels (0).Power Management for TI OMAP4.
> >
> > Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
> > Signed-off-by: Kevin Hilman <khilman@ti.com>
> > ---
> > arch/arm/mach-omap2/vc.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> > index 880249b..75878c3 100644
> > --- a/arch/arm/mach-omap2/vc.c
> > +++ b/arch/arm/mach-omap2/vc.c
> > @@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
> >
> > if (initialized) {
> > if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
> > - pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
> > + pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
> > __func__, voltdm->name, i2c_high_speed);
> > return;
> > }
> Acked-by: Nishanth Menon <nm@ti.com>
Thanks I'll apply this into omap-for-v3.7-rc2/fixes-part2-take2.
> while we are at it, could we clean up the pr_warning usage back to
> pr_warn as well?
> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
> index 880249b..2d66f8c 100644
> --- a/arch/arm/mach-omap2/vc.c
> +++ b/arch/arm/mach-omap2/vc.c
> @@ -186,7 +186,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
> loop_cnt++;
>
> if (retries_cnt > 10) {
> - pr_warning("%s: Retry count exceeded\n", __func__);
> + pr_warn("%s: Retry count exceeded\n", __func__);
> return -ETIMEDOUT;
> }
>
Looks like that's in the separate patch you posted for v3.8 that Kevin
is taking.
Regards,
Tony
^ permalink raw reply
* [PATCH V2] ARM: OMAP2+: PM: VP: minor pr_warn updates
From: Kevin Hilman @ 2012-10-25 22:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351190236-23443-1-git-send-email-nm@ti.com>
Nishanth Menon <nm@ti.com> writes:
> change pr_warnings to pr_warn and ensure a newline
> is present in all messages
>
> Cc: linux-omap at vger.kernel.org
> Cc: linux-arm-kernel at lists.infradead.org
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
Thanks queuing for v3.8 as PM cleanup (branch: for_3.8/cleanup/pm.)
Kevin
^ permalink raw reply
* [PATCH 1/2] ARM: vt8500: Convert arch-vt8500 to multiplatform
From: Arnd Bergmann @ 2012-10-25 21:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351188620-30039-1-git-send-email-linux@prisktech.co.nz>
On Thursday 25 October 2012, Tony Prisk wrote:
> This patch almosts completes the conversion to ARCH_MULTI_V5
> for arch-vt8500.
>
> Both single platform and multiplatform configurations are supported
> until earlyprintk support is available for multiplatform.
>
> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
* [PATCH 3/6] ARM: OMAP2+: Move plat/iovmm.h to include/linux/omap-iommu.h
From: Tony Lindgren @ 2012-10-25 21:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351198976.2hJjhe5gKC@avalon>
* Laurent Pinchart <laurent.pinchart@ideasonboard.com> [121025 13:23]:
> Hi Tony,
>
> On Thursday 25 October 2012 09:56:44 Tony Lindgren wrote:
> > * Laurent Pinchart <laurent.pinchart@ideasonboard.com> [121025 01:39]:
> > > I still think you should split this in two files, omap-iommu.h and omap-
> > > iovmm.h. The later would just be arch/arm/plat-omap/include/plat/iovmm.h
> > > moved to include/linux.h.
> >
> > Can you please explain a bit more why you're thinking a separate
> > omap-iovmm.h is needed in addtion to omap-iommu.h?
>
> The IOVMM API is layered top of the IOMMU API. It's really a separate API, so
> two header files make sense. This patch creates a hybrid omap-iommu.h header
> with mixed definitions, it just doesn't feel right :-) I won't insist for a
> split though, if you think it's better to have a single header we can keep it
> that way.
Yes it's true it's a separate layer. But it's still iommu
specific. The functions exported by omap-iovmm.c have iommu_
prefix in the name except for one:
drivers/iommu/omap-iovmm.c:EXPORT_SYMBOL_GPL(omap_find_iovm_area);
drivers/iommu/omap-iovmm.c:EXPORT_SYMBOL_GPL(omap_da_to_va);
drivers/iommu/omap-iovmm.c:EXPORT_SYMBOL_GPL(omap_iommu_vmap);
drivers/iommu/omap-iovmm.c:EXPORT_SYMBOL_GPL(omap_iommu_vunmap);
drivers/iommu/omap-iovmm.c:EXPORT_SYMBOL_GPL(omap_iommu_vmalloc);
drivers/iommu/omap-iovmm.c:EXPORT_SYMBOL_GPL(omap_iommu_vfree);
So it should be OK to keep it all in omap-iommu.h file. Let's
see hear what..
> > My reasoning for not adding it is that neither intel nor amd needs
> > more than intel-iommu.h and amd-iommu.h. And hopefully the iommu
> > framework will eventually provide the API needed. And I'd rather
> > not be the person introducing this second new file into
> > include/linux :)
> >
> > Joerg and Ohad, do you have any opinions on this?
..Joerg and Ohad say.
Regards,
Tony
^ permalink raw reply
* [PATCH V2] ARM: PMU: fix runtime PM enable
From: Kevin Hilman @ 2012-10-25 21:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351196598-26667-1-git-send-email-jon-hunter@ti.com>
Jon Hunter <jon-hunter@ti.com> writes:
> Commit 7be2958 (ARM: PMU: Add runtime PM Support) updated the ARM PMU code to
> use runtime PM which was prototyped and validated on the OMAP devices. In this
> commit, there is no call pm_runtime_enable() and for OMAP devices
> pm_runtime_enable() is currently being called from the OMAP PMU code when the
> PMU device is created. However, there are two problems with this:
>
> 1. For any other ARM device wishing to use runtime PM for PMU they will need
> to call pm_runtime_enable() for runtime PM to work.
> 2. When booting with device-tree and using device-tree to create the PMU
> device, pm_runtime_enable() needs to be called from within the ARM PERF
> driver as we are no longer calling any device specific code to create the
> device. Hence, PMU does not work on OMAP devices that use the runtime PM
> callbacks when using device-tree to create the PMU device.
>
> Therefore, call pm_runtime_enable() directly from the ARM PMU driver when
> registering the device. For platforms that do not use runtime PM,
> pm_runtime_enable() does nothing and for platforms that do use runtime PM but
> may not require it specifically for PMU, this will just add a little overhead
> when initialising and uninitialising the PMU device.
>
> Tested with PERF on OMAP2420, OMAP3430 and OMAP4460.
>
> V2 changes:
> - Call pm_runtime_enable() unconditionally on registering the PMU device.
>
> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
^ permalink raw reply
* [PATCH v4 5/5] zynq: move static peripheral mappings
From: Josh Cartwright @ 2012-10-25 21:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025201701.GA18217@elliptictech.com>
On Thu, Oct 25, 2012 at 04:17:01PM -0400, Nick Bowler wrote:
> Hi Josh,
>
> On 2012-10-24 15:04 -0500, Josh Cartwright wrote:
> > Shifting them up into the vmalloc region prevents the following warning,
> > when booting a zynq qemu target with more than 512mb of RAM:
> [...]
> > -/* For now, all mappings are flat (physical = virtual)
> > +/* Static peripheral mappings are mapped at the top of the
> > + * vmalloc region
> > */
> > -#define UART0_PHYS 0xE0000000
> > -#define UART0_VIRT UART0_PHYS
> > +#define UART0_PHYS 0xE0000000
> > +#define UART0_SIZE SZ_4K
> > +#define UART0_VIRT (VMALLOC_END - UART0_SIZE)
>
> Did you test this on any real hardware? I can't get the ZC702 to work
> with the UART mapped at this address (this ends up being mapped at
> 0xFEFFF000), although I can't for the life of me figure out why the
> virtual address even matters. Note that for the ZC702, the physical
> address of the "main" UART is 0xE0001000.
Ugh, not yet; My testing has been on a qemu model. I also
unfortunately neglected to mention I am carrying a qemu patch that
forces RX_EN/TX_EN of the uarts out of reset. There is an (incomplete)
thread on qemu-devel discussing whose responsibility it really is to
enable the uarts:
http://lists.gnu.org/archive/html/qemu-devel/2012-10/msg03779.html
Clearly, though, if you are seeing the "Uncompressing Linux..."
messages, then the uart is enabled, so I don't think that's the problem.
> All I end up seeing is "Uncompressing Linux... done, booting the
> kernel." with no further messages. With the UART mapped at
> 0xF0001000, all printouts make it to the console. I tried a couple
> different virtual addresses and I'm surprised at the results, since
> the behaviour seems to vary wildly. I saw three behaviours depending
> only on the virtual address of the static mapping; all results are 100%
> reproducible:
>
> "Works": all printouts make it to the console
> "Fails": no printouts make it to the console after decompression
> "Truncated": the first few lines of output do not make it to the
> console, but after that it "Works". The first line
> successfully printed is always
> "Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096"
Odd, I'm wondering the uart gets into a weird state, and some bits get
knocked loose at console_initcall() time, when the console driver comes
up (Assuming CONFIG_SERIAL_XILINX_PS_UART)?
> And here are the addresses I tested:
>
> Address Result
> -----------------------
> 0xf0000000 Truncated
> 0xf0001000 Works
> 0xf0007000 Truncated
> 0xf0008000 Fails
> 0xf0009000 Fails
> 0xf000e000 Truncated
> 0xf000f000 Fails
> 0xf8000000 Truncated
> 0xf8001000 Works
> 0xfef00000 Truncated
> 0xfef01000 Works
> 0xfef08000 Fails
> 0xfef0f000 Fails
> 0xfeff0000 Fails
> 0xfeff1000 Fails
> 0xfeffe000 Fails
> 0xfefff000 Fails
>
> Judging by the list, the console seems to only work properly if the
> defined virtual address is Fxxx1000 and xxx is not too big...
Very odd. Do you mind sending out your patch allowing the selection of
the secondary uart for DEBUG_LL?
Thanks,
Josh
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* [PATCH 6/7] watchdog: OMAP: use standard GETBOOTSTATUS interface; use platform_data fn ptr
From: Paul Walmsley @ 2012-10-25 21:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025205926.GA19439@arwen.pp.htv.fi>
On Thu, 25 Oct 2012, Felipe Balbi wrote:
> should be "exported functions from those drivers directly."
Thanks, will update the patch description.
- Paul
^ permalink raw reply
* [PATCH 6/7] watchdog: OMAP: use standard GETBOOTSTATUS interface; use platform_data fn ptr
From: Felipe Balbi @ 2012-10-25 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1210252028330.21193@utopia.booyaka.com>
On Thu, Oct 25, 2012 at 08:29:26PM +0000, Paul Walmsley wrote:
> On Thu, 25 Oct 2012, Paul Walmsley wrote:
>
> > On Thu, 25 Oct 2012, Jon Hunter wrote:
> >
> > > In the case of booting with device-tree, pdata could be null and so
> > > should we check for this too? In other words ...
> > >
> > > + if (!pdata || !pdata->read_reset_sources)
> > > + return put_user(0, (int __user *)arg);
> >
> > Thanks, good catch, will integrate that fix.
>
> Here's the updated patch.
>
> - Paul
>
> From: Paul Walmsley <paul@pwsan.com>
> Date: Sun, 7 Oct 2012 20:13:26 -0600
> Subject: [PATCH] watchdog: OMAP: use standard GETBOOTSTATUS interface; use
> platform_data fn ptr
>
> Previously the OMAP watchdog driver used a non-standard way to report
> the chip reset source via the GETBOOTSTATUS ioctl. This patch
> converts the driver to use the standard WDIOF_* flags for this
> purpose.
>
> This patch may break existing userspace code that uses the existing
> non-standard data format returned by the OMAP watchdog driver's
> GETBOOTSTATUS ioctl. To fetch detailed reset source information,
> userspace code will need to retrieve it directly from the CGRM or PRM
> drivers when those are completed.
>
> Previously, to fetch the reset source, the driver either read a
> register outside the watchdog IP block (OMAP1), or called a function
> exported directly from arch/arm/mach-omap2. Both approaches are
> broken. This patch also converts the driver to use a platform_data
> function pointer. This approach is temporary, and is due to the lack
> of drivers for the OMAP16xx+ Clock Generation and Reset Management IP
> block and the OMAP2+ Power and Reset Management IP block. Once
> drivers are available for those IP blocks, the watchdog driver can be
> converted to call exported drivers from those functions directly.
should be "exported functions from those drivers directly."
--
balbi
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^ permalink raw reply
* [PATCHv2] Input: omap4-keypad: Add pinctrl support
From: Mark Brown @ 2012-10-25 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024185818.GB772@arwen.pp.htv.fi>
On Wed, Oct 24, 2012 at 09:58:19PM +0300, Felipe Balbi wrote:
> need a way to tell drivers/base "hey, don't touch pinctrl at all because
> I know what I'm doing" and that has to happen before probe() too,
> otherwise it's already too late and, according to what you suggest,
> drivers/base will already have touched pinctrl. The only way I see would
> be to add an extra "dont_touch_my_pins" field to every driver structure
> in the kernel. Clearly what you say is nonsense.
I suspect that's not actually a big deal and that if we went down this
route we'd have the driver take over control from the core code during
probe() with the core still setting up the default state.
Personally I do think we want to be factoring bolierplate out of
drivers, if they're not doing anything constructive with pinctrl they
should be able to avoid having code for it. There definitely are issues
to work through but it seems like we ought to be able to do something.
^ permalink raw reply
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