* [GIT PULL] Convert arch-vt8500 to multiplatform
From: Tony Prisk @ 2012-10-26 3:51 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit
ddffeb8c4d0331609ef2581d84de4d763607bd37:
Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
are available in the git repository at:
git://server.prisktech.co.nz/git/linuxwmt.git/ tags/armsoc-for-3.8
for you to fetch changes up to 6f35f9a9fabe8f0a89a17e353a77a7edef461bb2:
ARM: vt8500: Convert arch-vt8500 to multiplatform (2012-10-26 16:45:19
+1300)
----------------------------------------------------------------
Two patches for 3.8 to finish converting arch-vt8500 to multiplatform.
Single arch build is maintained as we still need earlyprintk for
development work.
----------------------------------------------------------------
Tony Prisk (2):
arm: vt8500: Convert irq.c for multiplatform integration
ARM: vt8500: Convert arch-vt8500 to multiplatform
arch/arm/Kconfig | 6 +-
arch/arm/mach-vt8500/Kconfig | 12 +++
arch/arm/mach-vt8500/common.h | 3 +
arch/arm/mach-vt8500/include/mach/entry-macro.S | 26 ------
arch/arm/mach-vt8500/include/mach/irqs.h | 22 -----
arch/arm/mach-vt8500/irq.c | 108
+++++++++++++++--------
arch/arm/mach-vt8500/vt8500.c | 1 +
7 files changed, 91 insertions(+), 87 deletions(-)
create mode 100644 arch/arm/mach-vt8500/Kconfig
delete mode 100644 arch/arm/mach-vt8500/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-vt8500/include/mach/irqs.h
^ permalink raw reply
* [PATCH 1/2] input: qt1070: add pinctrl consumer
From: Bo Shen @ 2012-10-26 3:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350998942-713-1-git-send-email-plagnioj@jcrosoft.com>
On 10/23/2012 21:29, Jean-Christophe PLAGNIOL-VILLARD wrote:
> If no pinctrl available just report a warning as some architecture may not
> need to do anything.
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: linux-input at vger.kernel.org
> ---
> drivers/input/keyboard/qt1070.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
Test it on sam9x5ek board with qt1070. It works well.
Tested-by: Bo Shen <voice.shen@atmel.com>
> diff --git a/drivers/input/keyboard/qt1070.c b/drivers/input/keyboard/qt1070.c
> index ca68f29..967734e 100644
> --- a/drivers/input/keyboard/qt1070.c
> +++ b/drivers/input/keyboard/qt1070.c
> @@ -33,6 +33,7 @@
> #include <linux/interrupt.h>
> #include <linux/jiffies.h>
> #include <linux/delay.h>
> +#include <linux/pinctrl/consumer.h>
>
> /* Address for each register */
> #define CHIP_ID 0x00
> @@ -147,6 +148,7 @@ static int __devinit qt1070_probe(struct i2c_client *client,
> struct input_dev *input;
> int i;
> int err;
> + struct pinctrl *pinctrl;
>
> err = i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE);
> if (!err) {
> @@ -155,6 +157,15 @@ static int __devinit qt1070_probe(struct i2c_client *client,
> return -ENODEV;
> }
>
> + pinctrl = devm_pinctrl_get_select_default(&client->dev);
> + if (IS_ERR(pinctrl)) {
> + err = PTR_ERR(pinctrl);
> + if (err == -EPROBE_DEFER)
> + return err;
> +
> + dev_warn(&client->dev, "No pinctrl provided\n");
> + }
> +
> if (!client->irq) {
> dev_err(&client->dev, "please assign the irq to this device\n");
> return -EINVAL;
>
^ permalink raw reply
* [PATCH 2/2] cpufreq: governors: remove redundant code
From: Viresh Kumar @ 2012-10-26 3:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1707056.POnhGSP0pg@vostro.rjw.lan>
On 26 October 2012 05:43, Rafael J. Wysocki <rjw@sisk.pl> wrote:
> I have applied this patch only because of the fixes on top of it. It broke
> kernel compliation due to some missing EXPORT_SYMBOL_GPLs in cpufreq_governor.c,
> so I woulnd't have applied it otherwise.
Hi Rafael,
So sorry for this. I am really feeling bad for that. I should have
tried compiling
them as modules too. I had that in mind while coding it, but forgot it later.
Thanks for making changes on my behalf.
--
viresh
^ permalink raw reply
* linux-next: manual merge of the arm-soc tree with the pinctrl tree
From: Stephen Rothwell @ 2012-10-26 3:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in
arch/arm/mach-ux500/cpu-db8500.c between commit 63c53906312f
("pinctrl/nomadik: move the platform data header") from the pinctrl tree
and commit 4040d10a3d44 ("ARM: ux500: add DB serial number to entropy
pool") from the arm-soc tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
diff --cc arch/arm/mach-ux500/cpu-db8500.c
index 87a8f9f,50202a1..0000000
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@@ -18,7 -18,7 +18,8 @@@
#include <linux/io.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/platform_data/usb-musb-ux500.h>
+#include <linux/platform_data/pinctrl-nomadik.h>
+ #include <linux/random.h>
#include <asm/pmu.h>
#include <asm/mach/map.h>
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^ permalink raw reply
* linux-next: manual merge of the arm-soc tree with the gpio-lw tree
From: Stephen Rothwell @ 2012-10-26 3:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in
arch/arm/Kconfig between commit a3b8d4a51357 ("GPIO: Add support for GPIO
on CLPS711X-target platform") from the gpio-lw tree and commit
4a8355c4c34f ("ARM: clps711x: convert to clockevents") from the arm-soc
tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
diff --cc arch/arm/Kconfig
index a7c541e,d9b7a84..0000000
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -366,8 -364,6 +366,7 @@@ config ARCH_CNS3XX
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
+ select ARCH_REQUIRE_GPIOLIB
- select ARCH_USES_GETTIMEOFFSET
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_ARM720T
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* [PATCH] ARM: highbank: retry wfi on reset request
From: Rob Herring @ 2012-10-26 3:20 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
In some cases, an interrupt can occur and prevent cause failure to enter
wfi. This causes reset to hang. Retrying the wfi should be enough to
prevent reset from hanging.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/mach-highbank/system.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 82c2723..86e37cd 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd)
hignbank_set_pwr_soft_reset();
scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
- cpu_do_idle();
+ while (1)
+ cpu_do_idle();
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH] ARM: bcm2835: implement machine restart hook
From: Stephen Warren @ 2012-10-26 2:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
On 09/27/2012 10:08 PM, Stephen Warren wrote:
> Implement the machine restart hook using the SoC's watchdog timer module.
> To support this, define a DT binding for the watchdog module, and add it
> to the device tree.
>
> The downstream rpi-split branch contains a full watchdog timer driver
> implementation, which also implements the restart hook. However, the
> restart function is largely separate from the watchdog driver, so for
> simplicity, the restart hook is implemented here directly in the main
> machine source file.
>
> Overall structure (separate setup/restart) functions derived from the
> picoxcell ARM support.
>
> Watchdog register IO sequence taken from code by Simon Arlott. Note that
> the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf.
Applied to rpi's for-3.8/soc branch.
^ permalink raw reply
* [PATCH 2/2] ARM: bcm2835: enable GPIO/pinctrl
From: Stephen Warren @ 2012-10-26 2:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348805412-7804-2-git-send-email-swarren@wwwdotorg.org>
On 09/27/2012 10:10 PM, Stephen Warren wrote:
> Enable GPIO and pinctrl in Kconfig.
>
> Add required <mach/gpio.h> for gpiolib.
>
> Instantiate the BCM2835 GPIO module in bcm2835.dtsi.
>
> Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the
> board's required pinmux configuration. GPIO aren't specified; that's
> left to gpio_request().
Applied to rpi's for-3.8/soc branch.
^ permalink raw reply
* [PATCH] arm: bcm2835: remove useless variables from Makefile.boot
From: Stephen Warren @ 2012-10-26 2:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351166358-6134-1-git-send-email-thomas.petazzoni@free-electrons.com>
On 10/25/2012 05:59 AM, Thomas Petazzoni wrote:
> Neither params_phys-y nor initrd_phys-y are needed when booting with a
> Device Tree. Those values are passed through the Device Tree blob. So
> get rid of those variable definitions from Makefile.boot.
Thanks, applied to linux-rpi's for-3.8/cleanup branch.
^ permalink raw reply
* [PATCH 1/2] ARM: bcm2835: Add missing static modifiers
From: Stephen Warren @ 2012-10-26 2:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121020013756.779089206@gmail.com>
> Add two missing static modifiers.
Thanks, the series is applied to linux-rpi's for-3.8/cleanup branch.
^ permalink raw reply
* [PATCH v2 06/14] mtd: onenand: omap: use pdata info instead of cpu_is
From: Paul Walmsley @ 2012-10-26 1:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <860ba92c34cbb490beccd5442087087c1751a6a2.1349672877.git.afzal@ti.com>
Hi Afzal
On Mon, 8 Oct 2012, Afzal Mohammed wrote:
> platform data now contains a field to indicate whether
> soc belongs to omap34xx family, use it instead of
> cpu_is_* check.
>
> This helps in removing dependency of platform specific
> header file - cpu.h
>
> Signed-off-by: Afzal Mohammed <afzal@ti.com>
This one breaks an N800 multi-OMAP build here:
LD init/built-in.o
drivers/built-in.o: In function `omap2_onenand_probe':
/home/paul/linux-bisect/drivers/mtd/onenand/omap2.c:788: undefined
reference to `omap3_onenand_read_bufferram'
/home/paul/linux-bisect/drivers/mtd/onenand/omap2.c:788: undefined
reference to `omap3_onenand_write_bufferram'
make: *** [vmlinux] Error 1
A fix is below.
- Paul
---
drivers/mtd/onenand/omap2.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 53069ae..f87cf39 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -445,13 +445,19 @@ out_copy:
#else
-int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
- unsigned char *buffer, int offset,
- size_t count);
+static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
+ unsigned char *buffer, int offset,
+ size_t count)
+{
+ return -ENOSYS;
+}
-int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
- const unsigned char *buffer,
- int offset, size_t count);
+static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
+ const unsigned char *buffer,
+ int offset, size_t count)
+{
+ return -ENOSYS;
+}
#endif
--
1.7.10.4
^ permalink raw reply related
* [PATCH 08/10] pinctrl: single: support pinconf generic
From: Haojian Zhuang @ 2012-10-26 1:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025234328.GF11928@atomide.com>
On Fri, Oct 26, 2012 at 7:43 AM, Tony Lindgren <tony@atomide.com> wrote:
> * Tony Lindgren <tony@atomide.com> [121022 10:11]:
>> * Haojian Zhuang <haojian.zhuang@gmail.com> [121022 03:11]:
>> > On Sat, Oct 20, 2012 at 3:13 AM, Tony Lindgren <tony@atomide.com> wrote:
>> > > * Haojian Zhuang <haojian.zhuang@gmail.com> [121018 02:08]:
>> > >> Add pinconf generic support with POWER SOURCE, BIAS PULL.
>> > > ...
>> > >
>> > >> + case PIN_CONFIG_POWER_SOURCE:
>> > >> + if (pcs->psmask == PCS_OFF_DISABLED
>> > >> + || pcs->psshift == PCS_OFF_DISABLED)
>> > >> + return -ENOTSUPP;
>> > >> + data &= pcs->psmask;
>> > >> + data = data >> pcs->psshift;
>> > >> + *config = data;
>> > >> + return 0;
>> > >> + break;
>> > >
>> > > Hmm, only slightly related to this patch, mostly a generic
>> > > question to others: Do others have any mux registers with
>> > > status bits for things like PIN_CONFIG_POWER_SOURCE?
>> > >
>> > > I could use PIN_CONFIG_POWER_SOURCE for controlling the PBIAS
>> > > for omap MMC. But there's also a status bit that needs to be
>> > > checked for that. I think there was some other similar mux
>> > > register for USB PHY that has a status register.
>> > >
>> > > So I'm wondering should the checking for status bit be handled
>> > > in the pinctrl consume driver? Or should we have some bindings
>> > > for that?
>> > >
>> >
>> > Do you mean that the status register only exists in USB PHY controller or
>> > MMC controller?
>>
>> The status register is in the MMC PBIAS register that is mux
>> related otherwise. From OMAP4470_ES1.0_PUBLIC_TRM_vE.pdf,
>> Table 19-599. CONTROL_PBIASLITE:
>>
>> Bits
>> 26 MMC1_PWDNZ
>> 25 MMC1_PBIASLITE_HIZ_MODE
>> 24 MMC1_PBIASLITE_SUPPLY_HI_OUT
>> 23 MMC1_PBIASLITE_VMODE_ERROR then this bit needs to clear..
>> 22 MMC1_PBIASLITE_PWRDNZ
>> 21 MMC1_PBIASLITE_VMODE ..after VMODE bit is set to 3V
>>
>> > If so, could we use regulator framework in USB PHY or MMC driver?
>>
>> Yes we could use regulator framework for that that. Or just read the
>> status in the MMC driver for that bit if nobody else has mixed
>> mux-regulator needs like this.
>>
>> The sequence is MMC specific, so from that point of view it would
>> make sense to have the logic in the MMC driver.
>
> Well it turns out the VMODE_ERROR bit is not just for VMODE, it's a
> comparator that can also triggers for the other invalid states for
> CONTROL_PBIASLITE pinconf register. So hiding VMODE_ERROR into a
> regulator would be wrong. For now, VMODE best handled using
> PIN_CONFIG_POWER_SOURCE and let the MMC driver do the checking
> using the pinconf API.
>
> Regards,
>
> Tony
Could you share the link of downloading the spec?
Regards
Haojian
^ permalink raw reply
* [PATCH 10/16] ARM: OMAP: Make omap_device local to mach-omap2
From: Paul Walmsley @ 2012-10-26 1:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121004220456.26676.31050.stgit@muffinssi.local>
Hi Tony
On Thu, 4 Oct 2012, Tony Lindgren wrote:
> Let's make omap_device local to mach-omap2 for
> ARM common zImage support.
>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
This one breaks a 5912-only build:
arch/arm/mach-omap1/pm_bus.c: In function 'omap1_pm_runtime_init':
arch/arm/mach-omap1/pm_bus.c:69:2: error: implicit declaration of function
'cpu_class_is_omap1'
make[1]: *** [arch/arm/mach-omap1/pm_bus.o] Error 1
Fixed by the usual change; it's below.
- Paul
---
arch/arm/mach-omap1/pm_bus.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index 16bf2f9..3f2d396 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -19,6 +19,8 @@
#include <linux/clk.h>
#include <linux/err.h>
+#include "soc.h"
+
#ifdef CONFIG_PM_RUNTIME
static int omap1_pm_runtime_suspend(struct device *dev)
{
--
1.7.10.4
^ permalink raw reply related
* Question about move atmel audio part to DT support
From: Bo Shen @ 2012-10-26 1:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025164008.GQ18814@opensource.wolfsonmicro.com>
Hi Mark,
On 10/26/2012 0:40, Mark Brown wrote:
> On Fri, Oct 19, 2012 at 04:18:16PM +0800, Bo Shen wrote:
>
>> Cc:
>> linux-arm-kernel mailing list
>> devicetree-discuss mailing list
>> alsa-devel mailing list
>> linux-sound mailing list
>
> Better to resend for things like this rather than double quote.
Got it. Thanks.
>>
>>> Atmel audio part has three platform device:
>>> -> atmel ssc: ssc library (different SOC has different number)
>>> -> atmel ssc dai: dai for audio
>>> -> atmel pcm: for pdc or dma transfer (now only support pdc, dma
>>> support will add soon)
>
>>> In DT support kernel, I don't find any similar case. So, if I want to
>>> keep ssc as library, and use dai to register pcm. Then the dts file will
>>> like:
>
> I'm not seeing anything at all unusual about the above situation - it'd
> help if you could explain what you think is complex here?
This is only a little different with others. We have one more DT node:
dai in dts file. I am worry about this won't be acceptable.
Anyway, I have sent out the patches. Please help review the code if
possible.
Thanks.
BRs,
Bo Shen
^ permalink raw reply
* [PATCH v4 5/5] zynq: move static peripheral mappings
From: Josh Cartwright @ 2012-10-26 1:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025224108.GA30705@elliptictech.com>
On Thu, Oct 25, 2012 at 06:41:08PM -0400, Nick Bowler wrote:
> On 2012-10-25 16:29 -0500, Josh Cartwright wrote:
> > On Thu, Oct 25, 2012 at 04:17:01PM -0400, Nick Bowler wrote:
> > > Did you test this on any real hardware? I can't get the ZC702 to work
> > > with the UART mapped at this address (this ends up being mapped at
> > > 0xFEFFF000), although I can't for the life of me figure out why the
> > > virtual address even matters. Note that for the ZC702, the physical
> > > address of the "main" UART is 0xE0001000.
Good news is you're not crazy; I was able to duplicate the problem here.
> If I were to guess, I would guess that, except for when it "Works",
> the really really early printk stuff isn't actually hitting the uart
> at all. The "Fails" case would then be due to the stray writes
> crashing the board, and the "Truncated" case due to the stray writes
> being (ostensibly) benign.
If I'm not mistaken, this hypothesis is predicated on the early bootup
code establishing a (linear?) mapping for addresses > VMALLOC_START;
before the mdesc->map_io() is even handled. That seems odd to me.
> But I really have no way right now to test this hypothesis, since I
> can't print anything in the failing case.
Not sure if I'll be able to get anything meaningful out of it yet (I've
not historically had good luck with Xilinx's debugging tools), but I did
finally get a JTAG debugger hooked up to the zc702. I'll see if I can
get any useful information tomorrow.
Thanks,
Josh
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* [PATCH v2 5/7] crypto: omap-sham: Convert to use pm_runtime API
From: Kevin Hilman @ 2012-10-26 0:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351046167-4882-6-git-send-email-mgreer@animalcreek.com>
Hi Mark,
"Mark A. Greer" <mgreer@animalcreek.com> writes:
> From: "Mark A. Greer" <mgreer@animalcreek.com>
>
> Convert the omap-sham crypto driver to use the
> pm_runtime API instead of the clk API.
>
> CC: Kevin Hilman <khilman@deeprootsystems.com>
> CC: Paul Walmsley <paul@pwsan.com>
> CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com>
> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
I can't pretend to fully understand this driver, It looks like the
current code is doing a bit more fine-grained clock gating, and leaving
the IP clocked only when needed.
The proposed version does a 'get' in probe and a 'put' in remove, which
means the IP will always be enabled (and thus preventing low-power
states), even when it's not in use.
If that's really needed, it should be thoroughly described in the
changelog, otherwise I suggest doing the runtime PM 'get' and 'put' in
roughtly the same spots as the current clk enable/disable which makes
this a more straight-forward conversion.
Kevin
^ permalink raw reply
* [PATCH 2/2] cpufreq: governors: remove redundant code
From: Rafael J. Wysocki @ 2012-10-26 0:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKohpo=Nv6DfXqyv=v-1Eo=pvx25qyrQ2qs+pGqJvbJu2bwWaw@mail.gmail.com>
On Thursday, October 25, 2012 08:59:11 AM Viresh Kumar wrote:
> On 25 October 2012 02:42, Rafael J. Wysocki <rjw@sisk.pl> wrote:
> > On Wednesday 24 of October 2012 21:43:46 Rafael J. Wysocki wrote:
> >> On Wednesday 24 of October 2012 11:37:13 Viresh Kumar wrote:
> >> > On 22 October 2012 14:16, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> >> > > On 20 October 2012 01:42, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> >> > >> Initially ondemand governor was written and then using its code conservative
> >> > >> governor is written. It used a lot of code from ondemand governor, but copy of
> >> > >> code was created instead of using the same routines from both governors. Which
> >> > >> increased code redundancy, which is difficult to manage.
> >> > >>
> >> > >> This patch is an attempt to move common part of both the governors to
> >> > >> cpufreq_governor.c file to come over above mentioned issues.
> >> > >>
> >> > >> This shouldn't change anything from functionality point of view.
> >> > >>
> >> > >> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
> >> >
> >> > For everybody else, this patch is already pushed by Rafael in his linux-next
> >> > branch.
> >>
> >> Well, not yet, although I'm going to do that.
> >
> > Or I would if it still applied. Unfortunately, though, it doesn't apply any
> > more to my linux-next branch due to some previous changes in it.
> >
> > Care to rebase?
>
> Ahh.. I got confused by the following patch:
>
> commit 83a73f712f2275033b2dc7f5c664988a1823ebc7
> Author: viresh kumar <viresh.kumar@linaro.org>
> Date: Tue Oct 23 01:28:05 2012 +0200
>
> cpufreq: Move common part from governors to separate file, v2
>
> Multiple cpufreq governers have defined similar get_cpu_idle_time_***()
> routines. These routines must be moved to some common place, so that all
> governors can use them.
>
> So moving them to cpufreq_governor.c, which seems to be a better place for
> keeping these routines.
>
> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
>
>
> Actually, i should i have replied on this patch (and i forgot). I
> wanted you to skip
> this patch, as the latest patch already had this change.
>
> But now i see commits from others on cpufreq_governor.c file.
>
> Hmm... So you can keep your tree as it is and apply the attached
> patch. It is the
> same patch getting discussed in this thread. Just rebased over your latest next.
I have applied this patch only because of the fixes on top of it. It broke
kernel compliation due to some missing EXPORT_SYMBOL_GPLs in cpufreq_governor.c,
so I woulnd't have applied it otherwise.
Thanks,
Rafael
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH v3] gpio/omap: fix off-mode bug: clear debounce clock enable mask on free/reset
From: Kevin Hilman @ 2012-10-25 23:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5089C2B6.5020606@ti.com>
Jon Hunter <jon-hunter@ti.com> writes:
> Hi Kevin,
>
> On 10/25/2012 11:34 AM, Kevin Hilman wrote:
>> From: Kevin Hilman <khilman@ti.com>
>>
>> When a GPIO is freed or shutdown, ensure that the proper bit in
>> dbck_enable_mask is cleared also. Otherwise, context restore on
>> subsequent off-mode transition will restore previous debounce values
>> from the shadow copies (bank->context.debounce*) leading to mismatch
>> state between driver state and hardware state.
>>
>> This was discovered when board code was doing
>>
>> gpio_request_one()
>> gpio_set_debounce()
>> gpio_free()
>>
>> which was leaving the GPIO debounce settings in a confused state. If
>> that GPIO bank is subsequently used with off-mode enabled, bogus state
>> would be restored, leaving GPIO debounce enabled which then prevented
>> the CORE powerdomain from transitioning.
>>
>> To fix, ensure that right bit in bank->dbck_enable_mask is cleared
>> when a GPIO is freed/shutdown so debounce state doesn't persist after
>> free/reset. If this GPIO is the last debounce-enabled GPIO in the
>> bank, the debounce will also be cut.
>>
>> Special thanks to Grazvydas Ignotas for pointing out a bug in the
>> first version that would've disabled debounce on any runtime PM
>> transition.
>>
>> And, special thanks to Jon Hunter for pointing out a bug in the second
>> version which was mistakenly clearing all debounce bits on reset
>> instead of individual GPIOs, as well as suggesting cutting the
>> debounce clock after all debounce bits are cleared.
>
> ... and for introducing yet another bug :-(
>
>> Tesed on 37xx/EVM board which configures GPIO debounce for the ads7846
>> touchscreen in its board file using the above sequence, and so was
>> failing off-mode tests in dynamic idle. Verified that off-mode tests
>> are passing with this patch.
>>
>> Reported-by: Paul Walmsley <paul@pwsan.com>
>> Cc: Igor Grinberg <grinberg@compulab.co.il>
>> Cc: Grazvydas Ignotas <notasas@gmail.com>
>> Cc: Jon Hunter <jon-hunter@ti.com>
>> Signed-off-by: Kevin Hilman <khilman@ti.com>
>> ---
>> drivers/gpio/gpio-omap.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
>> index 94cbc84..ce1da19 100644
>> --- a/drivers/gpio/gpio-omap.c
>> +++ b/drivers/gpio/gpio-omap.c
>> @@ -539,6 +539,8 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
>> _set_gpio_irqenable(bank, gpio, 0);
>> _clear_gpio_irqstatus(bank, gpio);
>> _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
>> + bank->dbck_enable_mask &= ~(GPIO_BIT(bank, gpio));
>> + _gpio_dbck_disable(bank);
>
> We can't use _gpio_dbck_disable() here. This has been specifically implemented
> for the suspend path and is designed to disable the debounce clock while
> debounce is enabled (which makes sense).
I agree, it makes sense. It reminds me that this driver could use some
comments, since each time I come back to it I forget why some of this
stuff is there.
> Yes this needs to be cleaned up.
Most certainly agree.
> I have implemented the following and unit tested. Care to test on your 37xx
> board? Sorry I would do it myself I had one.
Yes, it fixes the off-mode dynamic idle problem on my 37xx EVM.
> Also not sure if you just wish to squash your patch and mine together.
> This is based on top of yours.
Let's just drop mine and you can take this forward.
> Cheers
> Jon
>
> From 33812f3bd4f7aab1154e7194b7f11fba700a5086 Mon Sep 17 00:00:00 2001
> From: Jon Hunter <jon-hunter@ti.com>
> Date: Thu, 25 Oct 2012 16:00:51 -0500
> Subject: [PATCH] gpio/omap: fix clearing of debounce settings on gpio
> free/reset
>
> When a GPIO is freed or shutdown, we need to ensure that any debounce settings
> are cleared and if the GPIO is the only GPIO in the bank that is currently
> using debounce, then disable the debounce clock as well to save power.
Since this is a fix needed for v3.7-rc, you should add a bit more here
describing what was broken (bogus context restore, etc.) Basically
answering "why" to your the "we need to ensure that..." statement.
> Therefore, introduce a new function called _clear_gpio_debounce() to clear
> any debounce settings when the GPIO is freed or shutdown.
>
> Please note that we cannot use _gpio_dbck_disable() to disable the debounce
> clock because this has been specifically created for the gpio suspend path
> and is intended to shutdown the debounce clock while debounce is enabled.
>
> This has been unit tested on an OMAP3430 Beagle board, by requesting a gpio,
> enabling debounce and then freeing the gpio and checking the register contents,
> the saved register context and the debounce clock state.
>
> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
(though not that that matters now that I've shown a high-level of
incompetence with this patch) ;)
Also,
Tested-by: Kevin Hilman <khilman@ti.com>
When reposting for Linus W., you might make this 'v4' so that it's clear
that it superceeds the other bungling attempts at the same fix.
Thanks for following this through,
Kevin
^ permalink raw reply
* [PATCH 08/10] pinctrl: single: support pinconf generic
From: Tony Lindgren @ 2012-10-25 23:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121022170917.GB4730@atomide.com>
* Tony Lindgren <tony@atomide.com> [121022 10:11]:
> * Haojian Zhuang <haojian.zhuang@gmail.com> [121022 03:11]:
> > On Sat, Oct 20, 2012 at 3:13 AM, Tony Lindgren <tony@atomide.com> wrote:
> > > * Haojian Zhuang <haojian.zhuang@gmail.com> [121018 02:08]:
> > >> Add pinconf generic support with POWER SOURCE, BIAS PULL.
> > > ...
> > >
> > >> + case PIN_CONFIG_POWER_SOURCE:
> > >> + if (pcs->psmask == PCS_OFF_DISABLED
> > >> + || pcs->psshift == PCS_OFF_DISABLED)
> > >> + return -ENOTSUPP;
> > >> + data &= pcs->psmask;
> > >> + data = data >> pcs->psshift;
> > >> + *config = data;
> > >> + return 0;
> > >> + break;
> > >
> > > Hmm, only slightly related to this patch, mostly a generic
> > > question to others: Do others have any mux registers with
> > > status bits for things like PIN_CONFIG_POWER_SOURCE?
> > >
> > > I could use PIN_CONFIG_POWER_SOURCE for controlling the PBIAS
> > > for omap MMC. But there's also a status bit that needs to be
> > > checked for that. I think there was some other similar mux
> > > register for USB PHY that has a status register.
> > >
> > > So I'm wondering should the checking for status bit be handled
> > > in the pinctrl consume driver? Or should we have some bindings
> > > for that?
> > >
> >
> > Do you mean that the status register only exists in USB PHY controller or
> > MMC controller?
>
> The status register is in the MMC PBIAS register that is mux
> related otherwise. From OMAP4470_ES1.0_PUBLIC_TRM_vE.pdf,
> Table 19-599. CONTROL_PBIASLITE:
>
> Bits
> 26 MMC1_PWDNZ
> 25 MMC1_PBIASLITE_HIZ_MODE
> 24 MMC1_PBIASLITE_SUPPLY_HI_OUT
> 23 MMC1_PBIASLITE_VMODE_ERROR then this bit needs to clear..
> 22 MMC1_PBIASLITE_PWRDNZ
> 21 MMC1_PBIASLITE_VMODE ..after VMODE bit is set to 3V
>
> > If so, could we use regulator framework in USB PHY or MMC driver?
>
> Yes we could use regulator framework for that that. Or just read the
> status in the MMC driver for that bit if nobody else has mixed
> mux-regulator needs like this.
>
> The sequence is MMC specific, so from that point of view it would
> make sense to have the logic in the MMC driver.
Well it turns out the VMODE_ERROR bit is not just for VMODE, it's a
comparator that can also triggers for the other invalid states for
CONTROL_PBIASLITE pinconf register. So hiding VMODE_ERROR into a
regulator would be wrong. For now, VMODE best handled using
PIN_CONFIG_POWER_SOURCE and let the MMC driver do the checking
using the pinconf API.
Regards,
Tony
^ permalink raw reply
* [PATCH 13/13] ARM: OMAP2+: PRCM: remove obsolete prcm.[ch]
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
arch/arm/mach-omap2/prcm.c and arch/arm/plat-omap/include/plat/prcm.h
are now completely unused and can be removed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap1/reset.c | 2 -
arch/arm/mach-omap2/Makefile | 2 +
arch/arm/mach-omap2/clkt2xxx_apll.c | 1 -
arch/arm/mach-omap2/clkt_iclk.c | 1 -
arch/arm/mach-omap2/clock.c | 1 -
arch/arm/mach-omap2/cpuidle34xx.c | 1 -
arch/arm/mach-omap2/io.c | 1 -
arch/arm/mach-omap2/omap_hwmod.c | 1 -
arch/arm/mach-omap2/pm34xx.c | 1 -
arch/arm/mach-omap2/powerdomain.c | 2 -
arch/arm/mach-omap2/prcm.c | 63 --------------------------------
arch/arm/mach-omap2/prm2xxx.c | 1 -
arch/arm/mach-omap2/prm3xxx.c | 1 -
arch/arm/mach-omap2/prm44xx.c | 1 -
arch/arm/mach-omap2/prm_common.c | 1 -
arch/arm/plat-omap/include/plat/prcm.h | 35 ------------------
16 files changed, 1 insertion(+), 114 deletions(-)
delete mode 100644 arch/arm/mach-omap2/prcm.c
delete mode 100644 arch/arm/plat-omap/include/plat/prcm.h
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index a0a9f97..2007d41 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -4,8 +4,6 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <plat/prcm.h>
-
#include <mach/hardware.h>
#include "common.h"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index aa0f59c..870f63e 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -98,7 +98,7 @@ obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o
endif
# PRCM
-obj-y += prcm.o prm_common.o cm_common.o
+obj-y += prm_common.o cm_common.o
obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index d47f6f7..6c8a8fc 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -22,7 +22,6 @@
#include <linux/io.h>
#include <plat/clock.h>
-#include <plat/prcm.h>
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba..66a7475 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -15,7 +15,6 @@
#include <linux/io.h>
#include <plat/clock.h>
-#include <plat/prcm.h>
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 19acf08..bbd6184 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -26,7 +26,6 @@
#include <asm/cpu.h>
#include <plat/clock.h>
-#include <plat/prcm.h>
#include <trace/events/power.h>
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index bc27569..bca7a88 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -27,7 +27,6 @@
#include <linux/export.h>
#include <linux/cpu_pm.h>
-#include <plat/prcm.h>
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 8573e6c..49b0d8e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -32,7 +32,6 @@
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
#include <plat/dma.h>
-#include <plat/prcm.h>
#include "soc.h"
#include "iomap.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 85e8874..ad98d97 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -141,7 +141,6 @@
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
-#include <plat/prcm.h>
#include "soc.h"
#include "common.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c0f8a78..26ea418 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -39,7 +39,6 @@
#include "clockdomain.h"
#include "powerdomain.h"
#include <plat/sdrc.h>
-#include <plat/prcm.h>
#include <plat/gpmc.h>
#include <plat/dma.h>
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 1678a32..dea62a9 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -29,8 +29,6 @@
#include <asm/cpu.h>
-#include <plat/prcm.h>
-
#include "powerdomain.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
deleted file mode 100644
index 8a603fe..0000000
--- a/arch/arm/mach-omap2/prcm.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/prcm.c
- *
- * OMAP 24xx Power Reset and Clock Management (PRCM) functions
- *
- * Copyright (C) 2005 Nokia Corporation
- *
- * Written by Tony Lindgren <tony.lindgren@nokia.com>
- *
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Rajendra Nayak <rnayak@ti.com>
- *
- * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc.
- * Upgraded with OMAP4 support by Abhijit Pagare <abhijitpagare@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/export.h>
-
-#include "common.h"
-#include <plat/prcm.h>
-
-#include "clock.h"
-#include "clock2xxx.h"
-#include "cm2xxx_3xxx.h"
-#include "prm2xxx_3xxx.h"
-#include "prm44xx.h"
-#include "prminst44xx.h"
-#include "cminst44xx.h"
-#include "prm-regbits-24xx.h"
-#include "prm-regbits-44xx.h"
-#include "control.h"
-
-
-/*
- * Stubbed functions so that common files continue to build when
- * custom builds are used
- * XXX These are temporary and should be removed at the earliest possible
- * opportunity
- */
-int __weak omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
- u16 clkctrl_offs)
-{
- return 0;
-}
-
-void __weak omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
- s16 cdoffs, u16 clkctrl_offs)
-{
-}
-
-void __weak omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
- u16 clkctrl_offs)
-{
-}
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 1f777bf..bf24fc4 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -20,7 +20,6 @@
#include "common.h"
#include <plat/cpu.h>
-#include <plat/prcm.h>
#include "vp.h"
#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 5435673..b86116c 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -20,7 +20,6 @@
#include "common.h"
#include <plat/cpu.h>
-#include <plat/prcm.h>
#include "vp.h"
#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a799e95..6d3467a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -18,7 +18,6 @@
#include <linux/err.h>
#include <linux/io.h>
-#include <plat/prcm.h>
#include "soc.h"
#include "iomap.h"
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index c089246..2216505 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -25,7 +25,6 @@
#include <linux/slab.h>
#include <plat/common.h>
-#include <plat/prcm.h>
#include "prm2xxx_3xxx.h"
#include "prm2xxx.h"
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
deleted file mode 100644
index 08eda93..0000000
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/prcm.h
- *
- * Access definations for use in OMAP24XX clock and power management
- *
- * Copyright (C) 2005 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem,
- * so this file doesn't belong in plat-omap/include/plat. Please
- * do not add anything new to this file.
- */
-
-#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
-#define __ASM_ARM_ARCH_OMAP_PRCM_H
-
-/* XXX To be removed */
-
-#endif
-
-
-
^ permalink raw reply related
* [PATCH 12/13] ARM: OMAP2+: hwmod: call to _omap4_disable_module() should use the SoC-specific call
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
The hwmod code unconditionally calls _omap4_disable_module() on all
SoCs when a module doesn't enable correctly. This "worked" due to the
weak function omap4_cminst_wait_module_idle() in
arch/arm/mach-omap2/prcm.c, which was a no-op. But now those weak
functions are going away - they should not be used. So this patch
will now call the SoC-specific disable_module code, assuming it
exists.
Needs to be done before the weak function is removed, otherwise AM33xx
will crash early in boot.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index bc891e9..85e8874 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2062,7 +2062,8 @@ static int _enable(struct omap_hwmod *oh)
_enable_sysc(oh);
}
} else {
- _omap4_disable_module(oh);
+ if (soc_ops.disable_module)
+ soc_ops.disable_module(oh);
_disable_clocks(oh);
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
oh->name, r);
^ permalink raw reply related
* [PATCH 11/13] ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macros
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and
MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/display.c | 2 +-
arch/arm/mach-omap2/hdq1w.c | 4 +---
arch/arm/mach-omap2/i2c.c | 6 ++----
arch/arm/mach-omap2/msdi.c | 4 +---
arch/arm/mach-omap2/omap_hwmod.c | 4 +---
arch/arm/mach-omap2/prcm-common.h | 6 ------
arch/arm/mach-omap2/prm.h | 17 +++++++++++++++++
arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 -------
arch/arm/mach-omap2/wd_timer.c | 5 ++---
9 files changed, 25 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 1011995..8a92ee6 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -34,6 +34,7 @@
#include "mux.h"
#include "control.h"
#include "display.h"
+#include "prm.h"
#define DISPC_CONTROL 0x0040
#define DISPC_CONTROL2 0x0238
@@ -473,7 +474,6 @@ static void dispc_disable_outputs(void)
}
}
-#define MAX_MODULE_SOFTRESET_WAIT 10000
int omap_dss_reset(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c
index e003f2b..0e30a97 100644
--- a/arch/arm/mach-omap2/hdq1w.c
+++ b/arch/arm/mach-omap2/hdq1w.c
@@ -31,11 +31,9 @@
#include <plat/omap_device.h>
#include "hdq1w.h"
+#include "prm.h"
#include "common.h"
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT 10000
-
/**
* omap_hdq1w_reset - reset the OMAP HDQ1W module
* @oh: struct omap_hwmod *
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index fc57e67..aaaf09e 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -20,9 +20,10 @@
*/
#include <plat/i2c.h>
-#include "common.h"
#include <plat/omap_hwmod.h>
+#include "prm.h"
+#include "common.h"
#include "mux.h"
/* In register I2C_CON, Bit 15 is the I2C enable bit */
@@ -30,9 +31,6 @@
#define OMAP2_I2C_CON_OFFSET 0x24
#define OMAP4_I2C_CON_OFFSET 0xA4
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT 10000
-
void __init omap2_i2c_mux_pins(int bus_id)
{
char mux_name[sizeof("i2c2_scl.i2c2_scl")];
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index 9e57b4a..5438c62 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -29,6 +29,7 @@
#include <plat/omap_device.h>
#include <plat/mmc.h>
+#include "prm.h"
#include "common.h"
#include "control.h"
#include "mux.h"
@@ -44,9 +45,6 @@
#define MSDI_CON_CLKD_MASK (0x3f << 0)
#define MSDI_CON_CLKD_SHIFT 0
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT 10000
-
/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
#define MSDI_TARGET_RESET_CLKD 0x3ff
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 504e0e0..bc891e9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -151,6 +151,7 @@
#include "cm3xxx.h"
#include "cminst44xx.h"
#include "cm33xx.h"
+#include "prm.h"
#include "prm3xxx.h"
#include "prm44xx.h"
#include "prm33xx.h"
@@ -158,9 +159,6 @@
#include "mux.h"
#include "pm.h"
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT 10000
-
/* Name of the OMAP hwmod for the MPU */
#define MPU_INITIATOR_NAME "mpu"
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index b25a32a..c7d355f 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -406,11 +406,6 @@
#define OMAP3430_EN_CORE_MASK (1 << 0)
-/*
- * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
- * submodule to exit hardreset
- */
-#define MAX_MODULE_HARDRESET_WAIT 10000
/*
* Maximum time(us) it takes to output the signal WUCLKOUT of the last
@@ -419,7 +414,6 @@
* microseconds on OMAP4, so this timeout may be too high.
*/
#define MAX_IOPAD_LATCH_TIME 100
-
# ifndef __ASSEMBLER__
/**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index fb7dee2..a1a266c 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -20,6 +20,23 @@ extern void __iomem *prm_base;
extern void omap2_set_globals_prm(void __iomem *prm);
# endif
+
+/*
+ * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
+ * module to softreset
+ */
+#define MAX_MODULE_SOFTRESET_WAIT 10000
+
+/*
+ * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
+ * submodule to exit hardreset
+ */
+#define MAX_MODULE_HARDRESET_WAIT 10000
+
+/*
+ * Register bitfields
+ */
+
/*
* 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
*
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 3330b1b..78532d6 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -241,11 +241,4 @@ extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm);
#define OMAP_LOGICRETSTATE_MASK (1 << 2)
-/*
- * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
- * submodule to exit hardreset
- */
-#define MAX_MODULE_HARDRESET_WAIT 10000
-
-
#endif
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index 00ef54c..30e2cb9 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -1,6 +1,8 @@
/*
* OMAP2+ MPU WD_TIMER-specific code
*
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@@ -30,9 +32,6 @@
#define OMAP_WDT_WPS 0x34
#define OMAP_WDT_SPR 0x48
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT 10000
-
int omap2_wd_timer_disable(struct omap_hwmod *oh)
{
void __iomem *base;
^ permalink raw reply related
* [PATCH 10/13] ARM: OMAP2+: PRCM: split and relocate the PRM/CM globals setup
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Split omap2_set_globals_prcm() into PRM, CM, and PRCM_MPU variants, since
these are all separate IP blocks. This should make it easier to move the
PRM, CM, PRCM_MPU code into drivers/ in future patchsets.
At this point arch/arm/plat-omap/include/plat/prcm.h is empty; a
subsequent patch will remove it, and remove the #include from all the
files that #include it.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 2 +
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 2 +
arch/arm/mach-omap2/cm.h | 8 ++++
arch/arm/mach-omap2/cm2xxx_3xxx.h | 2 +
arch/arm/mach-omap2/cm_common.c | 22 +++++++++++
arch/arm/mach-omap2/cminst44xx.h | 2 +
arch/arm/mach-omap2/io.c | 51 ++++++++++++++------------
arch/arm/mach-omap2/mcbsp.c | 2 +
arch/arm/mach-omap2/omap4-common.c | 1 +
arch/arm/mach-omap2/prcm-common.h | 16 --------
arch/arm/mach-omap2/prcm.c | 19 ----------
arch/arm/mach-omap2/prcm_mpu44xx.c | 17 +++++++++
arch/arm/mach-omap2/prcm_mpu44xx.h | 9 ++++-
arch/arm/mach-omap2/prm.h | 7 +++-
arch/arm/mach-omap2/prm_common.c | 15 ++++++++
arch/arm/mach-omap2/prminst44xx.h | 2 +
arch/arm/plat-omap/include/plat/prcm.h | 6 +--
17 files changed, 111 insertions(+), 72 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 38a06d9..53d45bc 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -32,7 +32,7 @@
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
#include "cm-regbits-24xx.h"
/* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index f9c71f3..18ef044 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -41,7 +41,7 @@
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
#include "cm-regbits-24xx.h"
const struct prcm_config *curr_prcm_set;
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index e419ecb..93473f9 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -1,7 +1,7 @@
/*
* OMAP2+ Clock Management prototypes
*
- * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
* Copyright (C) 2007-2009 Nokia Corporation
*
* Written by Paul Walmsley
@@ -22,6 +22,12 @@
*/
#define MAX_MODULE_READY_TIME 2000
+# ifndef __ASSEMBLER__
+extern void __iomem *cm_base;
+extern void __iomem *cm2_base;
+extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
+# endif
+
/*
* MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
* the PRCM to request that a module enter the inactive state in the
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index f74a5d1..98e6b3c 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -16,7 +16,7 @@
#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
#define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
-#include "prcm-common.h"
+#include "cm.h"
/*
* Module specific CM register offsets from CM_BASE + domain offset
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 561969b..0bab493 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -2,7 +2,7 @@
* OMAP2+ common Clock Management (CM) IP block functions
*
* Copyright (C) 2012 Texas Instruments, Inc.
- * Paul Walmsley <paul@pwsan.com>
+ * Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -17,6 +17,7 @@
#include "cm2xxx.h"
#include "cm3xxx.h"
#include "cm44xx.h"
+#include "common.h"
/*
* cm_ll_data: function pointers to SoC-specific implementations of
@@ -25,6 +26,25 @@
static struct cm_ll_data null_cm_ll_data;
static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
+/* cm_base: base virtual address of the CM IP block */
+void __iomem *cm_base;
+
+/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
+void __iomem *cm2_base;
+
+/**
+ * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
+ * @cm: CM base virtual address
+ * @cm2: CM2 base virtual address (if present on the booted SoC)
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
+{
+ cm_base = cm;
+ cm2_base = cm2;
+}
+
/**
* cm_split_idlest_reg - split CM_IDLEST reg addr into its components
* @idlest_reg: CM_IDLEST* virtual address
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index d69fdef..bd7bab8 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -38,4 +38,6 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst,
extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
u32 mask);
+extern void omap_cm_base_init(void);
+
#endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a52d399..8573e6c 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -48,7 +48,11 @@
#include "control.h"
#include "cm2xxx.h"
#include "cm3xxx.h"
-
+#include "prm.h"
+#include "cm.h"
+#include "prcm_mpu44xx.h"
+#include "prminst44xx.h"
+#include "cminst44xx.h"
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
@@ -387,9 +391,8 @@ void __init omap2420_init_early(void)
OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
omap2xxx_check_revision();
omap2xxx_cm_init();
omap_common_init_early();
@@ -417,9 +420,8 @@ void __init omap2430_init_early(void)
OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
omap2xxx_check_revision();
omap2xxx_cm_init();
omap_common_init_early();
@@ -451,9 +453,8 @@ void __init omap3_init_early(void)
OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
omap3xxx_cm_init();
@@ -492,9 +493,8 @@ void __init ti81xx_init_early(void)
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
- OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap_common_init_early();
@@ -556,9 +556,8 @@ void __init am33xx_init_early(void)
AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
- AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
+ omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap_common_init_early();
@@ -578,10 +577,12 @@ void __init omap4430_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
+ omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+ omap_prm_base_init();
+ omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
omap_common_init_early();
@@ -608,10 +609,12 @@ void __init omap5_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
+ omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+ omap_prm_base_init();
+ omap_cm_base_init();
omap5xxx_check_revision();
omap_common_init_early();
}
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 37f8f94..3e6e3e9 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -28,7 +28,7 @@
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
* Sidetone needs non-gated ICLK and sidetone autoidle is broken.
*/
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
static int omap3_enable_st_clock(unsigned int id, bool enable)
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 5348788..f207f88 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -36,6 +36,7 @@
#include "common.h"
#include "hsmmc.h"
#include "prminst44xx.h"
+#include "prcm_mpu44xx.h"
#include "omap4-sar-layout.h"
#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 72df974..b25a32a 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -421,22 +421,6 @@
#define MAX_IOPAD_LATCH_TIME 100
# ifndef __ASSEMBLER__
-extern void __iomem *prm_base;
-extern void __iomem *cm_base;
-extern void __iomem *cm2_base;
-extern void __iomem *prcm_mpu_base;
-
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
-extern void omap_prm_base_init(void);
-extern void omap_cm_base_init(void);
-#else
-static inline void omap_prm_base_init(void)
-{
-}
-static inline void omap_cm_base_init(void)
-{
-}
-#endif
/**
* struct omap_prcm_irq - describes a PRCM interrupt bit
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 827769c..8a603fe 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -39,25 +39,6 @@
#include "prm-regbits-44xx.h"
#include "control.h"
-void __iomem *prm_base;
-void __iomem *cm_base;
-void __iomem *cm2_base;
-void __iomem *prcm_mpu_base;
-
-
-void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
- void __iomem *cm2, void __iomem *prcm_mpu)
-{
- prm_base = prm;
- cm_base = cm;
- cm2_base = cm2;
- prcm_mpu_base = prcm_mpu;
-
- if (cpu_is_omap44xx() || soc_is_omap54xx()) {
- omap_prm_base_init();
- omap_cm_base_init();
- }
-}
/*
* Stubbed functions so that common files continue to build when
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index 928dbd4..c30e44a 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -20,6 +20,12 @@
#include "prcm_mpu44xx.h"
#include "cm-regbits-44xx.h"
+/*
+ * prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP
+ * block registers
+ */
+void __iomem *prcm_mpu_base;
+
/* PRCM_MPU low-level functions */
u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
@@ -43,3 +49,14 @@ u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
return v;
}
+
+/**
+ * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use)
+ * @prcm_mpu: PRCM_MPU base virtual address
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu)
+{
+ prcm_mpu_base = prcm_mpu;
+}
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 8a6e250..884af7b 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -1,7 +1,7 @@
/*
* OMAP44xx PRCM MPU instance offset macros
*
- * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010, 2012 Texas Instruments, Inc.
* Copyright (C) 2010 Nokia Corporation
*
* Paul Walmsley (paul at pwsan.com)
@@ -25,6 +25,12 @@
#ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
#define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
+#include "common.h"
+
+# ifndef __ASSEMBLER__
+extern void __iomem *prcm_mpu_base;
+# endif
+
#define OMAP4430_PRCM_MPU_BASE 0x48243000
#define OMAP44XX_PRCM_MPU_REGADDR(inst, reg) \
@@ -98,6 +104,7 @@ extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
+extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu);
# endif
#endif
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index c30ab5d..fb7dee2 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -1,7 +1,7 @@
/*
* OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions
*
- * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
* Copyright (C) 2010 Nokia Corporation
*
* Paul Walmsley
@@ -15,6 +15,11 @@
#include "prcm-common.h"
+# ifndef __ASSEMBLER__
+extern void __iomem *prm_base;
+extern void omap2_set_globals_prm(void __iomem *prm);
+# endif
+
/*
* 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
*
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index e200e4f..c089246 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -31,6 +31,7 @@
#include "prm2xxx.h"
#include "prm3xxx.h"
#include "prm44xx.h"
+#include "common.h"
/*
* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -55,6 +56,9 @@ static struct irq_chip_generic **prcm_irq_chips;
*/
static struct omap_prcm_irq_setup *prcm_irq_setup;
+/* prm_base: base virtual address of the PRM IP block */
+void __iomem *prm_base;
+
/*
* prm_ll_data: function pointers to SoC-specific implementations of
* common PRM functions
@@ -329,6 +333,17 @@ err:
}
/**
+ * omap2_set_globals_prm - set the PRM base address (for early use)
+ * @prm: PRM base virtual address
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_prm(void __iomem *prm)
+{
+ prm_base = prm;
+}
+
+/**
* prm_read_reset_sources - return the sources of the SoC's last reset
*
* Return a u32 bitmask representing the reset sources that caused the
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index 46f2efb..a2ede2d 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -30,4 +30,6 @@ extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
u16 rstctrl_offs);
+extern void omap_prm_base_init(void);
+
#endif
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index 3ccee9f..08eda93 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -27,11 +27,7 @@
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
#define __ASM_ARM_ARCH_OMAP_PRCM_H
-#include <linux/kernel.h>
-#include <linux/io.h>
-
-void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
- void __iomem *cm2, void __iomem *prcm_mpu);
+/* XXX To be removed */
#endif
^ permalink raw reply related
* [PATCH 09/13] ARM: OMAP2+: PRCM: remove omap2_cm_wait_idlest()
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Now that all users of mach-omap2/omap2_cm_wait_idlest() have been removed,
delete the function and its supporting macros and prototypes.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/prcm.c | 39 --------------------------------
arch/arm/plat-omap/include/plat/prcm.h | 2 --
2 files changed, 41 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 8cb55d3..827769c 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -44,45 +44,6 @@ void __iomem *cm_base;
void __iomem *cm2_base;
void __iomem *prcm_mpu_base;
-#define MAX_MODULE_ENABLE_WAIT 100000
-
-/**
- * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
- * @reg: physical address of module IDLEST register
- * @mask: value to mask against to determine if the module is active
- * @idlest: idle state indicator (0 or 1) for the clock
- * @name: name of the clock (for printk)
- *
- * Returns 1 if the module indicated readiness in time, or 0 if it
- * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds.
- *
- * XXX This function is deprecated. It should be removed once the
- * hwmod conversion is complete.
- */
-int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
- const char *name)
-{
- int i = 0;
- int ena = 0;
-
- if (idlest)
- ena = 0;
- else
- ena = mask;
-
- /* Wait for lock */
- omap_test_timeout(((__raw_readl(reg) & mask) == ena),
- MAX_MODULE_ENABLE_WAIT, i);
-
- if (i < MAX_MODULE_ENABLE_WAIT)
- pr_debug("cm: Module associated with clock %s ready after %d loops\n",
- name, i);
- else
- pr_err("cm: Module associated with clock %s didn't enable in %d tries\n",
- name, MAX_MODULE_ENABLE_WAIT);
-
- return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
-};
void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
void __iomem *cm2, void __iomem *prcm_mpu)
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index a950a83..3ccee9f 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -30,8 +30,6 @@
#include <linux/kernel.h>
#include <linux/io.h>
-int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
- const char *name);
void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
void __iomem *cm2, void __iomem *prcm_mpu);
^ permalink raw reply related
* [PATCH 08/13] ARM: OMAP2+: CM/clock: convert _omap2_module_wait_ready() to use SoC-independent CM functions
From: Paul Walmsley @ 2012-10-25 23:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025231818.17558.57884.stgit@dusk.lan>
Convert the OMAP clock code's _omap2_module_wait_ready() to use
SoC-independent CM functions that are provided by the CM code, rather
than using a deprecated function from mach-omap2/prcm.c.
This facilitates the future conversion of the CM code to a driver, and
also removes a mach-omap2/prcm.c user. mach-omap2/prcm.c will be removed
by a subsequent patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock.c | 14 +++++++-
arch/arm/mach-omap2/cm.h | 12 +++++++
arch/arm/mach-omap2/cm2xxx.c | 65 ++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/cm2xxx.h | 4 ++
arch/arm/mach-omap2/cm3xxx.c | 66 +++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/cm3xxx.h | 5 +++
arch/arm/mach-omap2/cm_common.c | 48 ++++++++++++++++++++++++++++
arch/arm/mach-omap2/io.c | 5 +++
8 files changed, 215 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d0c6d9b..19acf08 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -33,6 +33,7 @@
#include "soc.h"
#include "clockdomain.h"
#include "clock.h"
+#include "cm.h"
#include "cm2xxx.h"
#include "cm3xxx.h"
#include "cm-regbits-24xx.h"
@@ -67,7 +68,9 @@ static bool clkdm_control = true;
static void _omap2_module_wait_ready(struct clk *clk)
{
void __iomem *companion_reg, *idlest_reg;
- u8 other_bit, idlest_bit, idlest_val;
+ u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
+ s16 prcm_mod;
+ int r;
/* Not all modules have multiple clocks that their IDLEST depends on */
if (clk->ops->find_companion) {
@@ -78,8 +81,13 @@ static void _omap2_module_wait_ready(struct clk *clk)
clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
- omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val,
- __clk_get_name(clk));
+ r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id);
+ if (r) {
+ pr_err("clock: %s: could not split idlest reg va\n", clk->name);
+ return;
+ }
+
+ cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
}
/* Public functions */
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index b3cee91..e419ecb 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -37,8 +37,18 @@
/**
* struct cm_ll_data - fn ptrs to per-SoC CM function implementations
+ * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
+ * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
*/
-struct cm_ll_data {};
+struct cm_ll_data {
+ int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id);
+ int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+};
+
+extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id);
+extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index e96cd70..db65069 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -198,6 +198,43 @@ void omap2xxx_cm_apll96_disable(void)
_omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
}
+/**
+ * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * XXX This function is only needed until absolute register addresses are
+ * removed from the OMAP struct clk records.
+ */
+int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id)
+{
+ unsigned long offs;
+ u8 idlest_offs;
+ int i;
+
+ if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff))
+ return -EINVAL;
+
+ idlest_offs = (unsigned long)idlest_reg & 0xff;
+ for (i = 0; i < ARRAY_SIZE(omap2xxx_cm_idlest_offs); i++) {
+ if (idlest_offs == omap2xxx_cm_idlest_offs[i]) {
+ *idlest_reg_id = i + 1;
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(omap2xxx_cm_idlest_offs))
+ return -EINVAL;
+
+ offs = idlest_reg - cm_base;
+ offs &= 0xff00;
+ *prcm_inst = offs;
+
+ return 0;
+}
+
/*
*
*/
@@ -314,3 +351,31 @@ struct clkdm_ops omap2_clkdm_operations = {
.clkdm_clk_enable = omap2xxx_clkdm_clk_enable,
.clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
};
+
+/*
+ *
+ */
+
+static struct cm_ll_data omap2xxx_cm_ll_data = {
+ .split_idlest_reg = &omap2xxx_cm_split_idlest_reg,
+ .wait_module_ready = &omap2xxx_cm_wait_module_ready,
+};
+
+int __init omap2xxx_cm_init(void)
+{
+ if (!cpu_is_omap24xx())
+ return 0;
+
+ return cm_register(&omap2xxx_cm_ll_data);
+}
+
+static void __exit omap2xxx_cm_exit(void)
+{
+ if (!cpu_is_omap24xx())
+ return;
+
+ /* Should never happen */
+ WARN(cm_unregister(&omap2xxx_cm_ll_data),
+ "%s: cm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap2xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index bce3c4b..4cbb39b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -60,6 +60,10 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
u8 idlest_shift);
+extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+ s16 *prcm_inst, u8 *idlest_reg_id);
+
+extern int __init omap2xxx_cm_init(void);
#endif
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 8b03ec2..c2086f2 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -110,6 +110,44 @@ int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
}
+/**
+ * omap3xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * XXX This function is only needed until absolute register addresses are
+ * removed from the OMAP struct clk records.
+ */
+int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id)
+{
+ unsigned long offs;
+ u8 idlest_offs;
+ int i;
+
+ if (idlest_reg < (cm_base + OMAP3430_IVA2_MOD) ||
+ idlest_reg > (cm_base + 0x1ffff))
+ return -EINVAL;
+
+ idlest_offs = (unsigned long)idlest_reg & 0xff;
+ for (i = 0; i < ARRAY_SIZE(omap3xxx_cm_idlest_offs); i++) {
+ if (idlest_offs == omap3xxx_cm_idlest_offs[i]) {
+ *idlest_reg_id = i + 1;
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(omap3xxx_cm_idlest_offs))
+ return -EINVAL;
+
+ offs = idlest_reg - cm_base;
+ offs &= 0xff00;
+ *prcm_inst = offs;
+
+ return 0;
+}
+
/* Clockdomain low-level operations */
static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1,
@@ -597,3 +635,31 @@ void omap3_cm_restore_context(void)
omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
OMAP3_CM_CLKOUT_CTRL_OFFSET);
}
+
+/*
+ *
+ */
+
+static struct cm_ll_data omap3xxx_cm_ll_data = {
+ .split_idlest_reg = &omap3xxx_cm_split_idlest_reg,
+ .wait_module_ready = &omap3xxx_cm_wait_module_ready,
+};
+
+int __init omap3xxx_cm_init(void)
+{
+ if (!cpu_is_omap34xx())
+ return 0;
+
+ return cm_register(&omap3xxx_cm_ll_data);
+}
+
+static void __exit omap3xxx_cm_exit(void)
+{
+ if (!cpu_is_omap34xx())
+ return;
+
+ /* Should never happen */
+ WARN(cm_unregister(&omap3xxx_cm_ll_data),
+ "%s: cm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap3xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 4a6ac81..e8e146f 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -78,9 +78,14 @@ extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
u8 idlest_shift);
+extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+ s16 *prcm_inst, u8 *idlest_reg_id);
+
extern void omap3_cm_save_context(void);
extern void omap3_cm_restore_context(void);
+extern int __init omap3xxx_cm_init(void);
+
#endif
#endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 3246cef..561969b 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -26,6 +26,54 @@ static struct cm_ll_data null_cm_ll_data;
static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
/**
+ * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * Given an absolute CM_IDLEST register address @idlest_reg, passes
+ * the PRCM instance offset and IDLEST register ID back to the caller
+ * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
+ * or 0 upon success. XXX This function is only needed until absolute
+ * register addresses are removed from the OMAP struct clk records.
+ */
+int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+ u8 *idlest_reg_id)
+{
+ if (!cm_ll_data->split_idlest_reg) {
+ WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
+ idlest_reg_id);
+}
+
+/**
+ * cm_wait_module_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
+ * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
+ * no per-SoC wait_module_ready() function pointer has been registered
+ * or if the idlest register is unknown on the SoC.
+ */
+int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+{
+ if (!cm_ll_data->wait_module_ready) {
+ WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift);
+}
+
+/**
* cm_register - register per-SoC low-level data with the CM
* @cld: low-level per-SoC OMAP CM data & function pointers to register
*
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index b853401..a52d399 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -46,6 +46,8 @@
#include "clock44xx.h"
#include "sdrc.h"
#include "control.h"
+#include "cm2xxx.h"
+#include "cm3xxx.h"
/*
* The machine specific code may provide the extra mapping besides the
@@ -389,6 +391,7 @@ void __init omap2420_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
NULL, NULL);
omap2xxx_check_revision();
+ omap2xxx_cm_init();
omap_common_init_early();
omap2xxx_voltagedomains_init();
omap242x_powerdomains_init();
@@ -418,6 +421,7 @@ void __init omap2430_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
NULL, NULL);
omap2xxx_check_revision();
+ omap2xxx_cm_init();
omap_common_init_early();
omap2xxx_voltagedomains_init();
omap243x_powerdomains_init();
@@ -452,6 +456,7 @@ void __init omap3_init_early(void)
NULL, NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
+ omap3xxx_cm_init();
omap_common_init_early();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
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