* S-o-b for 48efdd2 "Add a pm_power_off function that resets us, ..."
From: Dominic Cobley @ 2012-11-09 11:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <509C7328.9030104@wwwdotorg.org>
I'm happy to give permission for s.o.b. to be commits made by me. Is that sufficient?
If that's not sufficient can you give me git commands that will do what you want?
-----Original Message-----
From: Stephen Warren [mailto:swarren at wwwdotorg.org]
Sent: 09 November 2012 03:06
To: Dominic Cobley
Cc: linux-rpi-kernel at lists.infradead.org; linux-arm-kernel at lists.infradead.org
Subject: Re: S-o-b for 48efdd2 "Add a pm_power_off function that resets us, ..."
On 10/27/2012 09:21 PM, Stephen Warren wrote:
> Dom,
>
> Are you able to provide your S-o-b for the following commit:
>
> 48efdd2 Add a pm_power_off function that resets us, and indicates to
> bootcode.bin not to reboot us. Should allow a lower power 'off' state
>
> I would like to upstream that, but can't without an S-o-b [from you].
>
> Thanks.
Dom, are you able to provide an S-o-b line for this or any other commits
in you kernel trees? It'd be really helpful if you could add S-o-bs to
any/all commits in your branches where you can. Thanks.
^ permalink raw reply
* [PATCH v2 2/6] ARM: EXYNOS5: DT Support for SATA and SATA PHY
From: Kukjin Kim @ 2012-11-09 11:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351612897-14923-3-git-send-email-vasanthananthan@gmail.com>
Vasanth Ananthan wrote:
>
> This patch adds Device Nodes for SATA and SATA PHY device.
>
[...]
> @@ -188,6 +188,9 @@
> #define EXYNOS4_PA_SATA 0x12560000
> #define EXYNOS4_PA_SATAPHY 0x125D0000
> #define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000
> +#define EXYNOS5_PA_SATA_PHY_CTRL 0x12170000
> +#define EXYNOS5_PA_SATA_PHY_I2C 0x121D0000
> +#define EXYNOS5_PA_SATA_BASE 0x122F0000
>
> #define EXYNOS4_PA_SROMC 0x12570000
> #define EXYNOS5_PA_SROMC 0x12250000
> diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-
> exynos/mach-exynos5-dt.c
> index db1cd8e..7dbd4cc 100644
> --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
> +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
> @@ -61,6 +61,12 @@ static const struct of_dev_auxdata
> exynos5250_auxdata_lookup[] __initconst = {
> "exynos4210-spi.1", NULL),
> OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
> "exynos4210-spi.2", NULL),
> + OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", EXYNOS5_PA_SATA_BASE,
> + "exynos5-sata", NULL),
> + OF_DEV_AUXDATA("samsung,exynos5-sata-phy", EXYNOS5_PA_SATA_PHY_CTRL,
> + "exynos5-sata-phy", NULL),
> + OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c",
> EXYNOS5_PA_SATA_PHY_I2C,
> + "exynos5-sata-phy-i2c", NULL),
> OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
> OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
> OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
> --
> 1.7.4.1
Just following is enough? Because we don't need the definitions only for
here...
8<-------
+ OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
+ "exynos5-sata", NULL),
+ OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x126B0000,
+ "exynos5-sata-phy", NULL),
+ OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
+ "exynos5-sata-phy-i2c", NULL),
8<-------
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH v2 04/10] pwm: pwm-tiecap: Add device-tree binding support for APWM driver
From: Thierry Reding @ 2012-11-09 11:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <518397C60809E147AF5323E0420B992E3E9E44FC@DBDE01.ent.ti.com>
On Fri, Nov 09, 2012 at 10:59:30AM +0000, Philip, Avinash wrote:
> On Fri, Nov 09, 2012 at 13:22:19, Thierry Reding wrote:
> > On Thu, Nov 08, 2012 at 01:23:11PM +0530, Philip, Avinash wrote:
> > > +#define ECAPCLK_EN BIT(0)
> > > +#define ECAPCLK_STOP_REQ BIT(1)
> >
> > This one doesn't seem to align with the rest. Also, why is bit 0 called
> > _EN and bit 1 _STOP_REQ? Couldn't they be made more consistent, i.e.
> > _START and _STOP? Or _ENABLE and _DISABLE?
>
> Ok I will change to PWMSS_ECAPCLK_EN & PWMSS_ECAPCLK_STPO_REQ
While at it, maybe move these defines to the pwm-tipwmss.h header file?
After all that's the module that accesses the register that contains
these bits.
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* [PATCH 1/1] ARM: mm: Remove unused variable in mmap.c
From: Sachin Kamat @ 2012-11-09 11:42 UTC (permalink / raw)
To: linux-arm-kernel
Variable 'start_addr' is not used and hence can be removed.
Silences the following compilation warning:
arch/arm/mm/mmap.c: In function ?arch_get_unmapped_area?:
arch/arm/mm/mmap.c:60:16: warning:
unused variable ?start_addr? [-Wunused-variable]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
This patch is based linux-next tree of 20121109
---
arch/arm/mm/mmap.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index f4fec6d..10062ce 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -57,7 +57,6 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
{
struct mm_struct *mm = current->mm;
struct vm_area_struct *vma;
- unsigned long start_addr;
int do_align = 0;
int aliasing = cache_is_vipt_aliasing();
struct vm_unmapped_area_info info;
--
1.7.4.1
^ permalink raw reply related
* [RESEND PATCH 1/2] ASoC: Ux500: Fixup use of clocks
From: Mark Brown @ 2012-11-09 11:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352302962-25201-1-git-send-email-ulf.hansson@stericsson.com>
On Wed, Nov 07, 2012 at 04:42:41PM +0100, Ulf Hansson wrote:
> From: Ulf Hansson <ulf.hansson@linaro.org>
>
> Make sure clocks are being prepared and unprepared as well
> as enabled and disabled.
Both of these patches are already applied...
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* [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs
From: Felipe Balbi @ 2012-11-09 11:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351573057-22249-1-git-send-email-p.paneri@samsung.com>
Hi,
On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
> Changes from v6:
> Modified register definitions according to the existing ones.
> Changed default PHY clk selection for SoCs.
> Improved binding text and rebased to the latest usb-next.
>
> Changes from v5:
> Moved clk_get() to driver's probe function. Now reference clock frequency
> selection value is stored in samsung_usbphy structure for later use. Used
> IS_ENABLED() instead of #ifdef in samsung_usbphy_get_driver_data().
>
> Changes from v4:
> Moved header file contents to driver's source file
> Removed unnecessary print message from driver's probe function
> Dropped the Free Software Foundation address from the header
> Changed the platform data code to use __initdata
>
> Changes from v3:
> Replaced susbsys_initcall()/module_exit() by module_platform_driver().
> Accordingly in the hsotg driver returned -EPROBE_DEFER until phy driver
> is registered
> Removed unnecessary devm_usb_put_phy() call from the hsotg driver remove.
>
> Changes from v2:
> Changed the driver filenames to samsung-usbphy
> Changed 's3c' to 'samsung' for platform device as well as platform data
> Moved platform data structure to a separate file
> Rectified coding style related errors
>
> Changes from v1:
> Rebased patches to latest usb-next branch
> Changed the name 'sec_usbphy' to 'samsung_usbphy'
>
> This patch set introduces a phy driver for samsung SoCs. It uses the existing
> transceiver infrastructure to provide phy control functions. Use of this driver
> can be extended for usb host phy as well. Over the period of time all the phy
> related code for most of the samsung SoCs can be integrated here.
> Removing the existing phy code from mach-s3c64xx. Same can be done for other SoCs
> when they start supporting this phy driver.
> This driver is tested with smdk6410 and Exynos4210(with DT).
>
> Praveen Paneri (5):
> usb: phy: samsung: Introducing usb phy driver for hsotg
> usb: s3c-hsotg: Adding phy driver support
> ARM: S3C64XX: Removing old phy setup code
> ARM: S3C64XX: Enabling samsung-usbphy driver
> ARM: Exynos4210: Enabling samsung-usbphy driver
guys I can't wait any longer. If I don't get proper Acks today, I will
go ahead without all the PHY changes from Samsung :-s
--
balbi
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* [RFC] arm: memtest
From: Alexander Holler @ 2012-11-09 12:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <509C1A92.9080407@ahsoftware.de>
On Thu, Nov 08, 2012 at 09:48:18PM +0100, Alexander Holler wrote:
> Hello,
>
> I've recently discovered the lack of the command line parameter
> memtest for ARM. So I've made a patch.
Sorry, I've made again the failure to just use xclip with thunderbird
which resulted in a malformed patch. I've now even tried the "external
editor" extension, it doesn't help too. So now I'm using mutt.
Below is the patch again, hopefully not malformed. I've also noticed
that the existent memtest does an unnecessary step to zero the tested
memory, I've removed it by reversing the order of the tests.
So instead of
> Here is how dmesg does look like (memtest=4):
>
> --------- no error ---------
> [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
> [ 0.000000] early_memtest: # of tests: 4
> [ 0.000000] 0000000000 - 0000004000 pattern 00000000
> [ 0.000000] 0000000000 - 0000004000 pattern ffffffff
> [ 0.000000] 0000000000 - 0000004000 pattern 55555555
> [ 0.000000] 0000000000 - 0000004000 pattern aaaaaaaa
> [ 0.000000] early_memtest: wipe out test pattern from memory
> [ 0.000000] 0000000000 - 0000004000 pattern 00000000
> [ 0.000000] early_memtest: # of tests: 4
> [ 0.000000] 000054c000 - 0007ffb000 pattern 00000000
> [ 0.000000] 000054c000 - 0007ffb000 pattern ffffffff
> [ 0.000000] 000054c000 - 0007ffb000 pattern 55555555
> [ 0.000000] 000054c000 - 0007ffb000 pattern aaaaaaaa
> [ 0.000000] early_memtest: wipe out test pattern from memory
> [ 0.000000] 000054c000 - 0007ffb000 pattern 00000000
> [ 0.000000] Memory: 128MB = 128MB total
> [ 0.000000] Memory: 125648k/125648k available, 5424k reserved, 0K highmem
> --------- no error ---------
it now does look like
--------- no error ---------
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] early_memtest: # of tests: 4
[ 0.000000] 0000000000 - 0000004000 pattern aaaaaaaa
[ 0.000000] 0000000000 - 0000004000 pattern 55555555
[ 0.000000] 0000000000 - 0000004000 pattern ffffffff
[ 0.000000] 0000000000 - 0000004000 pattern 00000000
[ 0.000000] early_memtest: # of tests: 4
[ 0.000000] 000054c000 - 0007ffb000 pattern aaaaaaaa
[ 0.000000] 000054c000 - 0007ffb000 pattern 55555555
[ 0.000000] 000054c000 - 0007ffb000 pattern ffffffff
[ 0.000000] 000054c000 - 0007ffb000 pattern 00000000
[ 0.000000] Memory: 128MB = 128MB total
[ 0.000000] Memory: 125648k/125648k available, 5424k reserved, 0K highmem
--------- no error ---------
Regards,
Alexander
From: Alexander Holler <holler@ahsoftware.de>
Date: Wed, 31 Oct 2012 22:24:04 +0100
Subject: [PATCH] arm: add memtest
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
---
arch/arm/mm/Kconfig | 11 ++++
arch/arm/mm/Makefile | 2 +
arch/arm/mm/init.c | 36 +++++++++++++-
arch/arm/mm/memtest32.c | 120 +++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 167 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mm/memtest32.c
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 101b968..b14941f 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -874,3 +874,14 @@ config ARCH_HAS_BARRIERS
help
This option allows the use of custom mandatory barriers
included via the mach/barriers.h file.
+
+config MEMTEST
+ bool "Memtest"
+ ---help---
+ This option adds a kernel parameter 'memtest', which allows memtest
+ to be set.
+ memtest=0, mean disabled; -- default
+ memtest=1, mean do 1 test pattern;
+ ...
+ memtest=4, mean do 4 test patterns.
+ If you are unsure how to answer this question, answer N.
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 8a9c4cb..8cbfda1 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -96,3 +96,5 @@ obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o
obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o
+
+obj-$(CONFIG_MEMTEST) += memtest32.o
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9aec41f..0941946 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -584,6 +584,10 @@ static void __init free_highpages(void)
#endif
}
+#ifdef CONFIG_MEMTEST
+extern void early_memtest32(unsigned long start, unsigned long end);
+#endif
+
/*
* mem_init() marks the free areas in the mem_map and tells us how much
* memory is free. This is done after various parts of the system have
@@ -618,6 +622,9 @@ void __init mem_init(void)
reserved_pages = free_pages = 0;
for_each_bank(i, &meminfo) {
+#ifdef CONFIG_MEMTEST
+ phys_addr_t memtest_start = 0xffffffff, memtest_end;
+#endif
struct membank *bank = &meminfo.bank[i];
unsigned int pfn1, pfn2;
struct page *page, *end;
@@ -629,12 +636,37 @@ void __init mem_init(void)
end = pfn_to_page(pfn2 - 1) + 1;
do {
- if (PageReserved(page))
+ if (PageReserved(page)) {
reserved_pages++;
- else if (!page_count(page))
+#ifdef CONFIG_MEMTEST
+ /* something has cut a hole */
+ if (memtest_start != 0xffffffff) {
+ early_memtest32(memtest_start, memtest_end);
+ memtest_start = 0xffffffff;
+ }
+#endif
+ } else if (!page_count(page)) {
free_pages++;
+#ifdef CONFIG_MEMTEST
+ if (memtest_start == 0xffffffff) {
+ /* start of a block for memtest */
+ memtest_start = page_to_phys(page);
+ } else if (memtest_end != page_to_phys(page)) {
+ /* hole detected, call memtest */
+ early_memtest32(memtest_start, memtest_end);
+ /* and start with new values */
+ memtest_start = page_to_phys(page);
+ }
+ memtest_end = page_to_phys(page)+PAGE_SIZE;
+#endif
+ }
page++;
} while (page < end);
+#ifdef CONFIG_MEMTEST
+ if (memtest_start != 0xffffffff)
+ early_memtest32(memtest_start, memtest_end);
+ /* if bad memory was found, reserved_pages is wrong (without bad mem) */
+#endif
}
/*
diff --git a/arch/arm/mm/memtest32.c b/arch/arm/mm/memtest32.c
new file mode 100644
index 0000000..103c49f
--- /dev/null
+++ b/arch/arm/mm/memtest32.c
@@ -0,0 +1,120 @@
+/* This is just a checkpatch'ed copy of arch/x86/mm/memtest.c modified to use 32bit */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/pfn.h>
+#include <linux/memblock.h>
+
+static u32 patterns[] __initdata = {
+ 0, /* Has has to be 0 to leave memtest with zeroed memory */
+ 0xffffffffUL,
+ 0x55555555UL,
+ 0xaaaaaaaaUL,
+ 0x11111111UL,
+ 0x22222222UL,
+ 0x44444444UL,
+ 0x88888888UL,
+ 0x33333333UL,
+ 0x66666666UL,
+ 0x99999999UL,
+ 0xccccccccUL,
+ 0x77777777UL,
+ 0xbbbbbbbbUL,
+ 0xddddddddUL,
+ 0xeeeeeeeeUL,
+ 0x7a6c7258UL, /* yeah ;-) */
+};
+
+static void __init reserve_bad_mem(u32 pattern, u32 start_bad, u32 end_bad)
+{
+ pr_info(" %08lx bad mem addr %010lx - %010lx reserved\n",
+ (unsigned long) pattern,
+ (unsigned long) start_bad,
+ (unsigned long) end_bad);
+ memblock_reserve(start_bad, end_bad - start_bad);
+}
+
+static void __init memtest(u32 pattern, u32 start_phys, u32 size)
+{
+ u32 *p, *start, *end;
+ u32 start_bad, last_bad;
+ u32 start_phys_aligned;
+ const size_t incr = sizeof(pattern);
+
+ start_phys_aligned = ALIGN(start_phys, incr);
+ start = __va(start_phys_aligned);
+ end = start + (size - (start_phys_aligned - start_phys)) / incr;
+ start_bad = 0;
+ last_bad = 0;
+
+ for (p = start; p < end; p++)
+ *p = pattern;
+
+ for (p = start; p < end; p++, start_phys_aligned += incr) {
+ if (*p == pattern)
+ continue;
+ if (start_phys_aligned == last_bad + incr) {
+ last_bad += incr;
+ continue;
+ }
+ if (start_bad)
+ reserve_bad_mem(pattern, start_bad, last_bad + incr);
+ start_bad = last_bad = start_phys_aligned;
+ }
+ if (start_bad)
+ reserve_bad_mem(pattern, start_bad, last_bad + incr);
+}
+
+static void __init do_one_pass(u32 pattern, u32 start, u32 end)
+{
+ u64 i;
+ phys_addr_t this_start, this_end;
+
+ for_each_free_mem_range(i, MAX_NUMNODES, &this_start, &this_end, NULL) {
+ this_start = clamp_t(phys_addr_t, this_start, start, end);
+ this_end = clamp_t(phys_addr_t, this_end, start, end);
+ if (this_start < this_end) {
+ pr_info(" %010lx - %010lx pattern %08lx\n",
+ (unsigned long)this_start,
+ (unsigned long)this_end,
+ (unsigned long)cpu_to_be32(pattern));
+ memtest(pattern, this_start, this_end - this_start);
+ }
+ }
+}
+
+/* default is disabled */
+static int memtest_pattern __initdata;
+
+static int __init parse_memtest(char *arg)
+{
+ ssize_t ret __always_unused;
+
+ if (arg)
+ ret = kstrtoint(arg, 0, &memtest_pattern);
+ else
+ memtest_pattern = ARRAY_SIZE(patterns);
+
+ return 0;
+}
+
+early_param("memtest", parse_memtest);
+
+void __init early_memtest32(unsigned long start, unsigned long end)
+{
+ unsigned int i;
+ unsigned int idx = 0;
+
+ if (!memtest_pattern)
+ return;
+
+ pr_info("early_memtest: # of tests: %d\n", memtest_pattern);
+ for (i = memtest_pattern-1; i < UINT_MAX; --i) {
+ idx = i % ARRAY_SIZE(patterns);
+ do_one_pass(patterns[idx], start, end);
+ }
+}
--
1.7.8.6
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* [PATCH] ARM: EXYNOS5: Add arm down clock support
From: Abhilash Kesavan @ 2012-11-09 12:14 UTC (permalink / raw)
To: linux-arm-kernel
In idle state down clocking the arm cores can result in power
savings. Program the power control registers to achieve this and
save these registers across a suspend/resume cycle.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
---
arch/arm/mach-exynos/clock-exynos5.c | 2 +
arch/arm/mach-exynos/cpuidle.c | 36 ++++++++++++++++++++++++
arch/arm/mach-exynos/include/mach/regs-clock.h | 19 ++++++++++++
3 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index a88e0d9..9bb6567 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -80,6 +80,8 @@ static struct sleep_save exynos5_clock_save[] = {
SAVE_ITEM(EXYNOS5_VPLL_CON0),
SAVE_ITEM(EXYNOS5_VPLL_CON1),
SAVE_ITEM(EXYNOS5_VPLL_CON2),
+ SAVE_ITEM(EXYNOS5_PWR_CTRL1),
+ SAVE_ITEM(EXYNOS5_PWR_CTRL2),
};
#endif
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index cff0595..4ddda91 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -21,6 +21,7 @@
#include <asm/suspend.h>
#include <asm/unified.h>
#include <asm/cpuidle.h>
+#include <mach/regs-clock.h>
#include <mach/regs-pmu.h>
#include <mach/pmu.h>
@@ -156,12 +157,47 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
return exynos4_enter_core0_aftr(dev, drv, new_index);
}
+static void __init exynos5_core_down_clk(void)
+{
+ unsigned int tmp;
+
+ /*
+ * Enable arm clock down (in idle) and set arm divider
+ * ratios in WFI/WFE state.
+ */
+ tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \
+ PWR_CTRL1_CORE1_DOWN_RATIO | \
+ PWR_CTRL1_DIV2_DOWN_EN | \
+ PWR_CTRL1_DIV1_DOWN_EN | \
+ PWR_CTRL1_USE_CORE1_WFE | \
+ PWR_CTRL1_USE_CORE0_WFE | \
+ PWR_CTRL1_USE_CORE1_WFI | \
+ PWR_CTRL1_USE_CORE0_WFI;
+ __raw_writel(tmp, EXYNOS5_PWR_CTRL1);
+
+ /*
+ * Enable arm clock up (on exiting idle). Set arm divider
+ * ratios when not in idle along with the standby duration
+ * ratios.
+ */
+ tmp = PWR_CTRL2_DIV2_UP_EN | \
+ PWR_CTRL2_DIV1_UP_EN | \
+ PWR_CTRL2_DUR_STANDBY2_VAL | \
+ PWR_CTRL2_DUR_STANDBY1_VAL | \
+ PWR_CTRL2_CORE2_UP_RATIO | \
+ PWR_CTRL2_CORE1_UP_RATIO;
+ __raw_writel(tmp, EXYNOS5_PWR_CTRL2);
+}
+
static int __init exynos4_init_cpuidle(void)
{
int i, max_cpuidle_state, cpu_id;
struct cpuidle_device *device;
struct cpuidle_driver *drv = &exynos4_idle_driver;
+ if (soc_is_exynos5250())
+ exynos5_core_down_clk();
+
/* Setup cpuidle driver */
drv->state_count = (sizeof(exynos4_cpuidle_set) /
sizeof(struct cpuidle_state));
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 8c9b38c..d36ad76 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -267,6 +267,9 @@
#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
+#define EXYNOS5_PWR_CTRL1 EXYNOS_CLKREG(0x01020)
+#define EXYNOS5_PWR_CTRL2 EXYNOS_CLKREG(0x01024)
+
#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
@@ -344,6 +347,22 @@
#define EXYNOS5_EPLLCON0_LOCKED_SHIFT (29)
+#define PWR_CTRL1_CORE2_DOWN_RATIO (7 << 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8)
+#define PWR_CTRL1_USE_CORE1_WFE (1 << 5)
+#define PWR_CTRL1_USE_CORE0_WFE (1 << 4)
+#define PWR_CTRL1_USE_CORE1_WFI (1 << 1)
+#define PWR_CTRL1_USE_CORE0_WFI (1 << 0)
+
+#define PWR_CTRL2_DIV2_UP_EN (1 << 25)
+#define PWR_CTRL2_DIV1_UP_EN (1 << 24)
+#define PWR_CTRL2_DUR_STANDBY2_VAL (1 << 16)
+#define PWR_CTRL2_DUR_STANDBY1_VAL (1 << 8)
+#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
+#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
+
/* Compatibility defines and inclusion */
#include <mach/regs-pmu.h>
--
1.6.6.1
^ permalink raw reply related
* [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs
From: Praveen Paneri @ 2012-11-09 12:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121109115440.GC8078@arwen.pp.htv.fi>
Hi Kukjin,
On Fri, Nov 9, 2012 at 5:24 PM, Felipe Balbi <balbi@ti.com> wrote:
> Hi,
>
> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
>> Changes from v6:
>> Modified register definitions according to the existing ones.
>> Changed default PHY clk selection for SoCs.
>> Improved binding text and rebased to the latest usb-next.
>>
>> Changes from v5:
>> Moved clk_get() to driver's probe function. Now reference clock frequency
>> selection value is stored in samsung_usbphy structure for later use. Used
>> IS_ENABLED() instead of #ifdef in samsung_usbphy_get_driver_data().
>>
>> Changes from v4:
>> Moved header file contents to driver's source file
>> Removed unnecessary print message from driver's probe function
>> Dropped the Free Software Foundation address from the header
>> Changed the platform data code to use __initdata
>>
>> Changes from v3:
>> Replaced susbsys_initcall()/module_exit() by module_platform_driver().
>> Accordingly in the hsotg driver returned -EPROBE_DEFER until phy driver
>> is registered
>> Removed unnecessary devm_usb_put_phy() call from the hsotg driver remove.
>>
>> Changes from v2:
>> Changed the driver filenames to samsung-usbphy
>> Changed 's3c' to 'samsung' for platform device as well as platform data
>> Moved platform data structure to a separate file
>> Rectified coding style related errors
>>
>> Changes from v1:
>> Rebased patches to latest usb-next branch
>> Changed the name 'sec_usbphy' to 'samsung_usbphy'
>>
>> This patch set introduces a phy driver for samsung SoCs. It uses the existing
>> transceiver infrastructure to provide phy control functions. Use of this driver
>> can be extended for usb host phy as well. Over the period of time all the phy
>> related code for most of the samsung SoCs can be integrated here.
>> Removing the existing phy code from mach-s3c64xx. Same can be done for other SoCs
>> when they start supporting this phy driver.
>> This driver is tested with smdk6410 and Exynos4210(with DT).
>>
>> Praveen Paneri (5):
>> usb: phy: samsung: Introducing usb phy driver for hsotg
>> usb: s3c-hsotg: Adding phy driver support
>> ARM: S3C64XX: Removing old phy setup code
>> ARM: S3C64XX: Enabling samsung-usbphy driver
>> ARM: Exynos4210: Enabling samsung-usbphy driver
>
> guys I can't wait any longer. If I don't get proper Acks today, I will
> go ahead without all the PHY changes from Samsung :-s
Can you please ack this patch series.
Thanks,
Praveen
>
> --
> balbi
^ permalink raw reply
* [PATCH] pinctrl/nomadik: db8540: fix moduartstmmux_oc4_1 pin group definition.
From: Linus Walleij @ 2012-11-09 12:36 UTC (permalink / raw)
To: linux-arm-kernel
From: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
One group definition was missing, so add it.
Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-nomadik-db8540.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/pinctrl-nomadik-db8540.c b/drivers/pinctrl/pinctrl-nomadik-db8540.c
index 52fc301..bce0583 100644
--- a/drivers/pinctrl/pinctrl-nomadik-db8540.c
+++ b/drivers/pinctrl/pinctrl-nomadik-db8540.c
@@ -822,6 +822,7 @@ static const struct nmk_pingroup nmk_db8540_groups[] = {
DB8540_PIN_GROUP(modaccuarttxrx_oc4_1, NMK_GPIO_ALT_C4),
DB8540_PIN_GROUP(modaccuartrtscts_oc4_1, NMK_GPIO_ALT_C4),
DB8540_PIN_GROUP(stmmod_oc4_1, NMK_GPIO_ALT_C4),
+ DB8540_PIN_GROUP(moduartstmmux_oc4_1, NMK_GPIO_ALT_C4),
};
--
1.7.11.3
^ permalink raw reply related
* [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs
From: Kyungmin Park @ 2012-11-09 12:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121109115440.GC8078@arwen.pp.htv.fi>
On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi <balbi@ti.com> wrote:
> Hi,
>
> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
>> Changes from v6:
>> Modified register definitions according to the existing ones.
>> Changed default PHY clk selection for SoCs.
>> Improved binding text and rebased to the latest usb-next.
>>
>> Changes from v5:
>> Moved clk_get() to driver's probe function. Now reference clock frequency
>> selection value is stored in samsung_usbphy structure for later use. Used
>> IS_ENABLED() instead of #ifdef in samsung_usbphy_get_driver_data().
>>
>> Changes from v4:
>> Moved header file contents to driver's source file
>> Removed unnecessary print message from driver's probe function
>> Dropped the Free Software Foundation address from the header
>> Changed the platform data code to use __initdata
>>
>> Changes from v3:
>> Replaced susbsys_initcall()/module_exit() by module_platform_driver().
>> Accordingly in the hsotg driver returned -EPROBE_DEFER until phy driver
>> is registered
>> Removed unnecessary devm_usb_put_phy() call from the hsotg driver remove.
>>
>> Changes from v2:
>> Changed the driver filenames to samsung-usbphy
>> Changed 's3c' to 'samsung' for platform device as well as platform data
>> Moved platform data structure to a separate file
>> Rectified coding style related errors
>>
>> Changes from v1:
>> Rebased patches to latest usb-next branch
>> Changed the name 'sec_usbphy' to 'samsung_usbphy'
>>
>> This patch set introduces a phy driver for samsung SoCs. It uses the existing
>> transceiver infrastructure to provide phy control functions. Use of this driver
>> can be extended for usb host phy as well. Over the period of time all the phy
>> related code for most of the samsung SoCs can be integrated here.
>> Removing the existing phy code from mach-s3c64xx. Same can be done for other SoCs
>> when they start supporting this phy driver.
>> This driver is tested with smdk6410 and Exynos4210(with DT).
>>
>> Praveen Paneri (5):
>> usb: phy: samsung: Introducing usb phy driver for hsotg
>> usb: s3c-hsotg: Adding phy driver support
For usb parts:
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ARM: S3C64XX: Removing old phy setup code
>> ARM: S3C64XX: Enabling samsung-usbphy driver
>> ARM: Exynos4210: Enabling samsung-usbphy driver
>
> guys I can't wait any longer. If I don't get proper Acks today, I will
> go ahead without all the PHY changes from Samsung :-s
To Praveen,
To remove these dependency and merge issue, please send patches for
each subsystem. In this case, usb patches for usb tree and others are
for arm arch.
Thank you,
Kyungmin Park
>
> --
> balbi
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply
* [PATCH v2] ARM: mxs: apf28dev: Add I2C and SPI support
From: Gwenhael Goavec-Merou @ 2012-11-09 12:42 UTC (permalink / raw)
To: linux-arm-kernel
Changes since v1:
- Removed the spidev support.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
---
arch/arm/boot/dts/imx28-apf28dev.dts | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts
index 1643d25..6d8865b 100644
--- a/arch/arm/boot/dts/imx28-apf28dev.dts
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -27,6 +27,13 @@
status = "okay";
};
+ ssp2: ssp at 80014000 {
+ compatible = "fsl,imx28-spi";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>;
+ status = "okay";
+ };
+
pinctrl at 80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_apf28dev>;
@@ -74,6 +81,12 @@
status = "okay";
};
+ i2c0: i2c at 80058000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+ };
+
pwm: pwm at 80064000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>;
--
1.7.8.6
^ permalink raw reply related
* [Xen-devel] BUG: ARM build failures due to Xen
From: Konrad Rzeszutek Wilk @ 2012-11-09 12:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201211081745.06518.arnd@arndb.de>
On Thu, Nov 08, 2012 at 05:45:06PM +0000, Arnd Bergmann wrote:
> On Thursday 08 November 2012, Stefano Stabellini wrote:
> > From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> >
> > xen/arm: Fix compile errors when drivers are compiled as modules.
> >
> > We end up with:
> >
> > ERROR: "HYPERVISOR_event_channel_op" [drivers/xen/xen-gntdev.ko] undefined!
> > ERROR: "privcmd_call" [drivers/xen/xen-privcmd.ko] undefined!
> > ERROR: "HYPERVISOR_grant_table_op" [drivers/net/xen-netback/xen-netback.ko] undefined!
> >
> > and this patch exports said function (which is implemented in hypercall.S).
> >
> > Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> > Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
> >
>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
>
> I guess it's best to merge that through the Xen tree.
applied.
^ permalink raw reply
* [PATCH] i2c: at91: fix compilation issue due to header move
From: Sergei Shtylyov @ 2012-11-09 12:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352455900-21074-1-git-send-email-ludovic.desroches@atmel.com>
Hello.
On 09-11-2012 14:11, ludovic.desroches at atmel.com wrote:
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
> arch/arm/mach-at91/include/mach/at_hdmac.h has been move to
> include/linux/platform_data/dma-atmel.h, commit 7cdc39e.
Need to also specify that commit's summary in parens.
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
WBR, Sergei
^ permalink raw reply
* [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs
From: Praveen Paneri @ 2012-11-09 13:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAH9JG2X1a8MqBpnk8uHRjsGnaD7uob5GBhUh_aS5iCprEvi2XQ@mail.gmail.com>
Hi,
On Fri, Nov 9, 2012 at 6:06 PM, Kyungmin Park <kmpark@infradead.org> wrote:
> On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi <balbi@ti.com> wrote:
>> Hi,
>>
>> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
>>> Changes from v6:
>>> Modified register definitions according to the existing ones.
>>> Changed default PHY clk selection for SoCs.
>>> Improved binding text and rebased to the latest usb-next.
>>>
>>> Changes from v5:
>>> Moved clk_get() to driver's probe function. Now reference clock frequency
>>> selection value is stored in samsung_usbphy structure for later use. Used
>>> IS_ENABLED() instead of #ifdef in samsung_usbphy_get_driver_data().
>>>
>>> Changes from v4:
>>> Moved header file contents to driver's source file
>>> Removed unnecessary print message from driver's probe function
>>> Dropped the Free Software Foundation address from the header
>>> Changed the platform data code to use __initdata
>>>
>>> Changes from v3:
>>> Replaced susbsys_initcall()/module_exit() by module_platform_driver().
>>> Accordingly in the hsotg driver returned -EPROBE_DEFER until phy driver
>>> is registered
>>> Removed unnecessary devm_usb_put_phy() call from the hsotg driver remove.
>>>
>>> Changes from v2:
>>> Changed the driver filenames to samsung-usbphy
>>> Changed 's3c' to 'samsung' for platform device as well as platform data
>>> Moved platform data structure to a separate file
>>> Rectified coding style related errors
>>>
>>> Changes from v1:
>>> Rebased patches to latest usb-next branch
>>> Changed the name 'sec_usbphy' to 'samsung_usbphy'
>>>
>>> This patch set introduces a phy driver for samsung SoCs. It uses the existing
>>> transceiver infrastructure to provide phy control functions. Use of this driver
>>> can be extended for usb host phy as well. Over the period of time all the phy
>>> related code for most of the samsung SoCs can be integrated here.
>>> Removing the existing phy code from mach-s3c64xx. Same can be done for other SoCs
>>> when they start supporting this phy driver.
>>> This driver is tested with smdk6410 and Exynos4210(with DT).
>>>
>>> Praveen Paneri (5):
>>> usb: phy: samsung: Introducing usb phy driver for hsotg
>>> usb: s3c-hsotg: Adding phy driver support
> For usb parts:
> Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Thanks for the ack.
>
>>> ARM: S3C64XX: Removing old phy setup code
>>> ARM: S3C64XX: Enabling samsung-usbphy driver
>>> ARM: Exynos4210: Enabling samsung-usbphy driver
>>
>> guys I can't wait any longer. If I don't get proper Acks today, I will
>> go ahead without all the PHY changes from Samsung :-s
>
> To Praveen,
>
> To remove these dependency and merge issue, please send patches for
> each subsystem. In this case, usb patches for usb tree and others are
> for arm arch.
I will surely take care of this from now onwards. Hope these can be
taken as it is for now.
Thanks,
Praveen
>
> Thank you,
> Kyungmin Park
>>
>> --
>> balbi
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH] i2c: at91: fix compilation issue due to header move
From: ludovic.desroches @ 2012-11-09 13:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352455900-21074-1-git-send-email-ludovic.desroches@atmel.com>
Le 11/09/2012 11:11 AM, ludovic.desroches at atmel.com a ?crit :
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
>
> arch/arm/mach-at91/include/mach/at_hdmac.h has been move to
> include/linux/platform_data/dma-atmel.h, commit 7cdc39e.
>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
> ---
>
> Hi,
>
> This is a fix for 3.7.
>
> Regards
>
> Ludovic
Sorry don't take care about this patch, I'll put it into the dma patch
I've to update.
I have it into my tree for a while, I've forgotten it is not yet included.
Sorry for the noise.
Regards
Ludovic
>
> drivers/i2c/busses/i2c-at91.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
> index a9fbad8..e2e9837 100644
> --- a/drivers/i2c/busses/i2c-at91.c
> +++ b/drivers/i2c/busses/i2c-at91.c
> @@ -32,7 +32,7 @@
> #include <linux/platform_device.h>
> #include <linux/slab.h>
>
> -#include <mach/at_hdmac.h>
> +#include <linux/platform_data/dma-atmel.h>
>
> #define TWI_CLK_HZ 100000 /* max 400 Kbits/s */
> #define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
>
^ permalink raw reply
* [kvmarm] [PATCH v3 01/13] KVM: ARM: Introduce KVM_SET_DEVICE_ADDRESS ioctl
From: Peter Maydell @ 2012-11-09 13:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121022065122.18672.86203.stgit@ubuntu>
On 22 October 2012 08:51, Christoffer Dall
<c.dall@virtualopensystems.com> wrote:
> +struct kvm_device_address {
> + __u32 id;
> + __u64 addr;
> +};
Ben suggested that this should either be a 64 bit id or have explicit
padding. Other than that I think that our current proposed ABI for
ARM irqchips is in line with the discussion we just had at KVM Forum
for handling non-x86 in-kernel irqchips [hopefully somebody will
write the details of that up...]
Ben, do I have that right?
thanks
-- PMM
^ permalink raw reply
* [kvmarm] [PATCH v3 01/13] KVM: ARM: Introduce KVM_SET_DEVICE_ADDRESS ioctl
From: Benjamin Herrenschmidt @ 2012-11-09 13:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAFEAcA8FkmNhiemrLaWLGA8=dToHgnwJdrmOknffgLE18sULBg@mail.gmail.com>
On Fri, 2012-11-09 at 14:45 +0100, Peter Maydell wrote:
> On 22 October 2012 08:51, Christoffer Dall
> <c.dall@virtualopensystems.com> wrote:
> > +struct kvm_device_address {
> > + __u32 id;
> > + __u64 addr;
> > +};
>
> Ben suggested that this should either be a 64 bit id or have explicit
> padding. Other than that I think that our current proposed ABI for
> ARM irqchips is in line with the discussion we just had at KVM Forum
> for handling non-x86 in-kernel irqchips [hopefully somebody will
> write the details of that up...]
>
> Ben, do I have that right?
I believe it is :-)
Cheers,
Ben.
^ permalink raw reply
* [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs
From: Felipe Balbi @ 2012-11-09 13:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAD6zSYN6xpHt54d-w=6veb6AErTq6ERQcneo7ewC-qsBoMuThQ@mail.gmail.com>
Hi,
On Fri, Nov 09, 2012 at 06:50:44PM +0530, Praveen Paneri wrote:
> Hi,
>
> On Fri, Nov 9, 2012 at 6:06 PM, Kyungmin Park <kmpark@infradead.org> wrote:
> > On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi <balbi@ti.com> wrote:
> >> Hi,
> >>
> >> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
> >>> Changes from v6:
> >>> Modified register definitions according to the existing ones.
> >>> Changed default PHY clk selection for SoCs.
> >>> Improved binding text and rebased to the latest usb-next.
> >>>
> >>> Changes from v5:
> >>> Moved clk_get() to driver's probe function. Now reference clock frequency
> >>> selection value is stored in samsung_usbphy structure for later use. Used
> >>> IS_ENABLED() instead of #ifdef in samsung_usbphy_get_driver_data().
> >>>
> >>> Changes from v4:
> >>> Moved header file contents to driver's source file
> >>> Removed unnecessary print message from driver's probe function
> >>> Dropped the Free Software Foundation address from the header
> >>> Changed the platform data code to use __initdata
> >>>
> >>> Changes from v3:
> >>> Replaced susbsys_initcall()/module_exit() by module_platform_driver().
> >>> Accordingly in the hsotg driver returned -EPROBE_DEFER until phy driver
> >>> is registered
> >>> Removed unnecessary devm_usb_put_phy() call from the hsotg driver remove.
> >>>
> >>> Changes from v2:
> >>> Changed the driver filenames to samsung-usbphy
> >>> Changed 's3c' to 'samsung' for platform device as well as platform data
> >>> Moved platform data structure to a separate file
> >>> Rectified coding style related errors
> >>>
> >>> Changes from v1:
> >>> Rebased patches to latest usb-next branch
> >>> Changed the name 'sec_usbphy' to 'samsung_usbphy'
> >>>
> >>> This patch set introduces a phy driver for samsung SoCs. It uses the existing
> >>> transceiver infrastructure to provide phy control functions. Use of this driver
> >>> can be extended for usb host phy as well. Over the period of time all the phy
> >>> related code for most of the samsung SoCs can be integrated here.
> >>> Removing the existing phy code from mach-s3c64xx. Same can be done for other SoCs
> >>> when they start supporting this phy driver.
> >>> This driver is tested with smdk6410 and Exynos4210(with DT).
> >>>
> >>> Praveen Paneri (5):
> >>> usb: phy: samsung: Introducing usb phy driver for hsotg
> >>> usb: s3c-hsotg: Adding phy driver support
> > For usb parts:
> > Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
> Thanks for the ack.
> >
> >>> ARM: S3C64XX: Removing old phy setup code
> >>> ARM: S3C64XX: Enabling samsung-usbphy driver
> >>> ARM: Exynos4210: Enabling samsung-usbphy driver
> >>
> >> guys I can't wait any longer. If I don't get proper Acks today, I will
> >> go ahead without all the PHY changes from Samsung :-s
> >
> > To Praveen,
> >
> > To remove these dependency and merge issue, please send patches for
> > each subsystem. In this case, usb patches for usb tree and others are
> > for arm arch.
> I will surely take care of this from now onwards. Hope these can be
> taken as it is for now.
Sure, but I still need Kukjin's 'say-so' for the arch/arm/plat-samsung
and arch/arm/mach-exynos part.
--
balbi
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^ permalink raw reply
* [PATCH 0/6] of: add support for imx-wm8974
From: Steffen Trumtrar @ 2012-11-09 14:00 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
This series adds devicetree support for the wm8974 connected via SPI/SSI to an
imx. The series was developed on an imx27 with a wm8974 connected via SPI.
That is why two patches for the SPI subsystem are also provided, which may be
also usefull without the wm8974 stuff. As they are needed, I included them in
this series and did not send them separately. If this is wrong, please let me
know.
The driver and bindings are based on the imx-sgtl5000 driver and are tested with
* spi-imx
* fsl_ssi
* imx-audmux (v1)
Regards,
Steffen
Steffen Trumtrar (6):
spi: imx: specify spi base for device tree probe
spi/devicetree: find spi_device via device_node
ASoC: wm8974: include MCLKDIV in pll_factors
ASoC: wm8974: add SPI as a possible bus master
ARM i.MX: rename ssi1 clock for imx27
ASoC: fsl: add imx-wm8974 machine driver
.../devicetree/bindings/sound/imx-audio-wm8974.txt | 48 ++++
arch/arm/mach-imx/clk-imx27.c | 2 +-
arch/arm/mach-imx/imx27-dt.c | 1 +
drivers/spi/spi-imx.c | 2 +-
drivers/spi/spi.c | 20 ++
include/linux/spi/spi.h | 3 +
sound/soc/codecs/Kconfig | 2 +-
sound/soc/codecs/wm8974.c | 101 ++++++++-
sound/soc/fsl/Kconfig | 12 +
sound/soc/fsl/Makefile | 2 +
sound/soc/fsl/imx-wm8974.c | 233 ++++++++++++++++++++
11 files changed, 419 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/imx-audio-wm8974.txt
create mode 100644 sound/soc/fsl/imx-wm8974.c
--
1.7.10.4
^ permalink raw reply
* [PATCH 1/6] spi: imx: specify spi base for device tree probe
From: Steffen Trumtrar @ 2012-11-09 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352469625-32024-1-git-send-email-s.trumtrar@pengutronix.de>
The DT probe uses a dynamically allocated base for the spi core. This is a
completely different numbering scheme than in the non-DT probe.
* This breaks compatibility with user space applications between non-DT and DT.
* On platforms that are in between DT and non-DT, it breaks registration of
devices via spi_board_info.
Use the same method as 7e6086d9e54a159a6257c02bb7fc5805c614aad2 does for gpios:
Use alias to identify the spi port, and then specify the base via the port id.
If alias is not defined in DT, allocate the base dynamically.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
drivers/spi/spi-imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index c9a0d84..d1e92b4 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -783,7 +783,7 @@ static int __devinit spi_imx_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, master);
- master->bus_num = pdev->id;
+ master->bus_num = (pdev->id < 0) ? of_alias_get_id(np, "spi") : pdev->id;
master->num_chipselect = num_cs;
spi_imx = spi_master_get_devdata(master);
--
1.7.10.4
^ permalink raw reply related
* [PATCH 2/6] spi/devicetree: find spi_device via device_node
From: Steffen Trumtrar @ 2012-11-09 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352469625-32024-1-git-send-email-s.trumtrar@pengutronix.de>
Add a function to find a spi_device via DT device_node.
The patch is based on the way i2c does it.
This is intended for devices that depend on multiple subsystems and are therefore
not a child of the spi-master node (e.g. sound devices that are controlled via spi
and get their data via another bus). The driver instead can find the desired device
via scanning the spi bus.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
drivers/spi/spi.c | 20 ++++++++++++++++++++
include/linux/spi/spi.h | 3 +++
2 files changed, 23 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 84c2861..e25487f 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -801,6 +801,26 @@ err_init_queue:
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_OF) && !defined(CONFIG_SPARC)
+
+static int of_dev_node_match(struct device *dev, void *data)
+{
+ return dev->of_node == data;
+}
+
+/* must call spi_dev_put() when done with returned spi_device device */
+struct spi_device *of_find_spi_device_by_node(struct device_node *node)
+{
+ struct device *dev;
+
+ dev = bus_find_device(&spi_bus_type, NULL, node, of_dev_node_match);
+
+ if (!dev)
+ return NULL;
+
+ return to_spi_device(dev);
+}
+EXPORT_SYMBOL_GPL(of_find_spi_device_by_node);
+
/**
* of_register_spi_devices() - Register child devices onto the SPI bus
* @master: Pointer to spi_master device
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index fa702ae..db3a630 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -23,6 +23,7 @@
#include <linux/mod_devicetable.h>
#include <linux/slab.h>
#include <linux/kthread.h>
+#include <linux/of.h>
/*
* INTERFACES between SPI master-side drivers and SPI infrastructure.
@@ -387,6 +388,8 @@ static inline void spi_master_put(struct spi_master *master)
put_device(&master->dev);
}
+extern struct spi_device *of_find_spi_device_by_node(struct device_node *node);
+
/* PM calls that need to be issued by the driver */
extern int spi_master_suspend(struct spi_master *master);
extern int spi_master_resume(struct spi_master *master);
--
1.7.10.4
^ permalink raw reply related
* [PATCH 3/6] ASoC: wm8974: include MCLKDIV in pll_factors
From: Steffen Trumtrar @ 2012-11-09 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352469625-32024-1-git-send-email-s.trumtrar@pengutronix.de>
To calculate the integer part of the frequency ratio, the whole output
path has to be considered (post and pre are optional):
Ndiv = (pre * target * 4 * post) / source
In the current implementation only the fixed- and pre-divider is
considered, but the post-divider is omitted.
To calculate Ndiv, this post divider has to be applied before any
calculation happens. Otherwise Ndiv is considered to be to low in the
later stages. This leads to a wrong value in the PLLN register, which
in turn produces a wrong playback speed of the audio signal.
This patch adds the post divider to the pll calculation.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
sound/soc/codecs/wm8974.c | 39 +++++++++++++++++++++++++++++++++++++--
1 file changed, 37 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c
index 9a39511..b012e4d 100644
--- a/sound/soc/codecs/wm8974.c
+++ b/sound/soc/codecs/wm8974.c
@@ -275,16 +275,51 @@ struct pll_ {
* to allow rounding later */
#define FIXED_PLL_SIZE ((1 << 24) * 10)
-static void pll_factors(struct pll_ *pll_div,
+static void pll_factors(struct pll_ *pll_div, struct snd_soc_codec *codec,
unsigned int target, unsigned int source)
{
unsigned long long Kpart;
unsigned int K, Ndiv, Nmod;
+ u16 reg;
/* There is a fixed divide by 4 in the output path */
+
target *= 4;
+ /* target also depends on MCLKDIV */
+ reg = (snd_soc_read(codec, WM8974_CLOCK) & 0xe0) >> 5;
+
+ switch (reg) {
+ case WM8974_MCLKDIV_1:
+ reg = 1;
+ break;
+ case WM8974_MCLKDIV_1_5:
+ case WM8974_MCLKDIV_2:
+ reg = 2;
+ break;
+ case WM8974_MCLKDIV_3:
+ reg = 3;
+ break;
+ case WM8974_MCLKDIV_4:
+ reg = 4;
+ break;
+ case WM8974_MCLKDIV_6:
+ reg = 6;
+ break;
+ case WM8974_MCLKDIV_8:
+ reg = 8;
+ break;
+ case WM8974_MCLKDIV_12:
+ reg = 12;
+ break;
+ default:
+ reg = 2;
+ }
+
+ target *= reg;
+
Ndiv = target / source;
+
if (Ndiv < 6) {
source /= 2;
pll_div->pre_div = 1;
@@ -333,7 +368,7 @@ static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
return 0;
}
- pll_factors(&pll_div, freq_out, freq_in);
+ pll_factors(&pll_div, codec, freq_out, freq_in);
snd_soc_write(codec, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
snd_soc_write(codec, WM8974_PLLK1, pll_div.k >> 18);
--
1.7.10.4
^ permalink raw reply related
* [PATCH 4/6] ASoC: wm8974: add SPI as a possible bus master
From: Steffen Trumtrar @ 2012-11-09 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352469625-32024-1-git-send-email-s.trumtrar@pengutronix.de>
The wm8974 can be controlled via i2c or spi. The current driver only supports
i2c. Add SPI as possible bus.
As the driver has to distinguish the bus type, pass this info via the wm8974_priv.
This reverts c2562a8e3b5f871ad0b73caf98bb7541e8724efc, because the driver now
needs it back.
This is based on earlier work by Uwe Kleine-K?nig.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
sound/soc/codecs/Kconfig | 2 +-
sound/soc/codecs/wm8974.c | 62 +++++++++++++++++++++++++++++++++++++++++++--
2 files changed, 61 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index b92759a..cc6069d 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -104,7 +104,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_WM8961 if I2C
select SND_SOC_WM8962 if I2C
select SND_SOC_WM8971 if I2C
- select SND_SOC_WM8974 if I2C
+ select SND_SOC_WM8974 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8978 if I2C
select SND_SOC_WM8983 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8985 if SND_SOC_I2C_AND_SPI
diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c
index b012e4d..8af553c 100644
--- a/sound/soc/codecs/wm8974.c
+++ b/sound/soc/codecs/wm8974.c
@@ -17,6 +17,7 @@
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
+#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -48,6 +49,10 @@ static const u16 wm8974_reg[WM8974_CACHEREGNUM] = {
#define WM8974_POWER1_BIASEN 0x08
#define WM8974_POWER1_BUFIOEN 0x04
+struct wm8974_priv {
+ enum snd_soc_control_type control_type;
+};
+
#define wm8974_reset(c) snd_soc_write(c, WM8974_RESET, 0)
static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
@@ -617,8 +622,9 @@ static int wm8974_resume(struct snd_soc_codec *codec)
static int wm8974_probe(struct snd_soc_codec *codec)
{
int ret = 0;
+ struct wm8974_priv *wm8974 = snd_soc_codec_get_drvdata(codec);
- ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_I2C);
+ ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8974->control_type);
if (ret < 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
@@ -660,13 +666,64 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8974 = {
.num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes),
};
+#if defined(CONFIG_SPI_MASTER)
+static int __devinit wm8974_spi_probe(struct spi_device *spi)
+{
+ struct wm8974_priv *wm8974;
+ int ret;
+
+ wm8974 = kzalloc(sizeof(*wm8974), GFP_KERNEL);
+ if (!wm8974)
+ return -ENOMEM;
+
+ wm8974->control_type = SND_SOC_SPI;
+ spi_set_drvdata(spi, wm8974);
+
+ ret = snd_soc_register_codec(&spi->dev,
+ &soc_codec_dev_wm8974, &wm8974_dai, 1);
+ if (ret)
+ kfree(wm8974);
+
+ return ret;
+}
+
+static int __devexit wm8974_spi_remove(struct spi_device *spi)
+{
+ snd_soc_unregister_codec(&spi->dev);
+ kfree(spi_get_drvdata(spi));
+ return 0;
+}
+
+static struct spi_driver wm8974_spi_driver = {
+ .driver = {
+ .name = "wm8974",
+ .owner = THIS_MODULE,
+ },
+ .probe = wm8974_spi_probe,
+ .remove = __devexit_p(wm8974_spi_remove),
+};
+
+module_spi_driver(wm8974_spi_driver);
+#endif
+
+#if IS_ENABLED(CONFIG_I2C)
static __devinit int wm8974_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
+ struct wm8974_priv *wm8974;
int ret;
+ wm8974 = kzalloc(sizeof(*wm8974), GFP_KERNEL);
+ if (!wm8974)
+ return -ENOMEM;
+
+ wm8974->control_type = SND_SOC_I2C;
+ i2c_set_clientdata(i2c, wm8974);
+
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8974, &wm8974_dai, 1);
+ if (ret)
+ kfree(wm8974);
return ret;
}
@@ -674,7 +731,7 @@ static __devinit int wm8974_i2c_probe(struct i2c_client *i2c,
static __devexit int wm8974_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
-
+ kfree(i2c_get_clientdata(client));
return 0;
}
@@ -695,6 +752,7 @@ static struct i2c_driver wm8974_i2c_driver = {
};
module_i2c_driver(wm8974_i2c_driver);
+#endif
MODULE_DESCRIPTION("ASoC WM8974 driver");
MODULE_AUTHOR("Liam Girdwood");
--
1.7.10.4
^ permalink raw reply related
* [PATCH 5/6] ARM i.MX: rename ssi1 clock for imx27
From: Steffen Trumtrar @ 2012-11-09 14:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352469625-32024-1-git-send-email-s.trumtrar@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/mach-imx/clk-imx27.c | 2 +-
arch/arm/mach-imx/imx27-dt.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 366e5d5..d269532 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -236,7 +236,7 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.2");
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
+ clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "10010000.ssi");
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index e80d523..60eed17 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -29,6 +29,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx21-ssi", MX27_SSI1_BASE_ADDR, "10010000.ssi", NULL),
{ /* sentinel */ }
};
--
1.7.10.4
^ permalink raw reply related
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