* [PATCH 0/5] clk: ux500: Add clock lookups for u8500
From: Mike Turquette @ 2012-11-10 1:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121025075138.GD971@gmail.com>
Quoting Lee Jones (2012-10-25 00:51:38)
> On Mon, 22 Oct 2012, Ulf Hansson wrote:
>
> > From: Ulf Hansson <ulf.hansson@linaro.org>
> >
> > Step by step, clock lookups for u8500 are being added in this set
> > of patches.
> >
> > These patches will require additional patches for sound/soc/ux500/
> > driver as well as drivers/i2c/busses/i2c-nomadik driver to prevent
> > the boot for ux500 from break. Those patches are being merged through
> > separate trees.
> >
> > Ulf Hansson (5):
> > clk: ux500: Register i2c clock lookups for u8500
> > clk: ux500: Register ssp clock lookups for u8500
> > clk: ux500: Register msp clock lookups for u8500
> > clk: ux500: Update rtc clock lookup for u8500
> > clk: ux500: Register slimbus clock lookups for u8500
>
> Acked-by: Lee Jones <lee.jones@linaro.org>
>
> Can I also mention that these need to go into the -rcs at the
> earliest opportunity please, as it is preventing ~50% of the
> devices from functioning on all of the ST-Ericsson development
> boards.
>
> This is a massive blocker for us!
>
I've taken these patches into clk-next. Do you need them in as a late
fix in the 3.7 cycle or is your urgent need only for 3.8 development?
Regards,
Mike
> --
> Lee Jones
> Linaro ST-Ericsson Landing Team Lead
> Linaro.org ? Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH 0/2] clk: ux500: Make mtu driver use apb_pclock
From: Mike Turquette @ 2012-11-10 1:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdb3dcDhVD5qkOrRkLJ-RXdmqJ2tAkosoeEB_DwSDSShKw@mail.gmail.com>
Quoting Linus Walleij (2012-10-24 10:25:26)
> On Wed, Oct 24, 2012 at 2:13 PM, Ulf Hansson <ulf.hansson@stericsson.com> wrote:
>
> > From: Ulf Hansson <ulf.hansson@linaro.org>
> >
> > The apb clock was before the "common" clock driver for ux500 was merged,
> > handled internally by the clock driver. Now this clock needs to be managed
> > from the mtu driver as a separate clock.
> >
> > This patches is based in 3.7 rc2.
> >
> > It is important the "ARM nomadik patch" is merged together with the
> > clock patch to not break boot. Therefore I suggest this series to go
> > through Mike Turquettes clock tree.
>
> OK go ahead:
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>
I've taken these into clk-next. While the patches are trivial I'd still
prefer a changelog in the future. For instance, it would be nice to
explain why removing the block comment is OK in the first patch.
Thanks,
Mike
> Yours,
> Linus Walleij
^ permalink raw reply
* [PATCH V4 0/3] Add clock framework for armada 370/XP
From: Mike Turquette @ 2012-11-10 1:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351621413-3637-1-git-send-email-gregory.clement@free-electrons.com>
Quoting Gregory CLEMENT (2012-10-30 11:23:30)
> Hello Mike,
>
> I hope this 4th version will meet your expectations. Beside the
> corrections you have asked I also changed the way I get resources for
> the clocks. Instead of referring to a node name, now I refer to a
> compatible name which should be a better use of the device tree.
>
> Rather than taking this series in your git tree, would it possible to
> give your ack to the patches and let Jason Cooper take the patch set
> in his git tree. We have other series for mvebu which depend on this
> one (SMP, HWIOCC and SATA for now and more to come), and it will be
> easier for us to have everything in the same place.
>
Hi Gregory,
After much delay:
Acked-by: Mike Turquette <mturquette@linaro.org>
Regards,
Mike
> The purpose of this patch set is to add support for clock framework
> for Armada 370 and Armada XP SoCs. All the support is done under the
> directory drivers/clk/mvebu/ as the support for other mvebu SoCs was
> in mind during the writing of the code.
>
> Two kinds of clocks are added:
>
> - The CPU clocks are only for Armada XP (which is multi-core)
>
> - The core clocks are clocks which have their rate fixed during
> reset.
>
> Many thanks to Thomas Petazzoni and Sebastian Hesselbarth for their
> review and feedback. The device tree bindings were really improved
> with the advices of Sebastian.
>
> Changelog:
> V3 -> V4
> - Rebased on top of 3.7-rc3
> - Replaced the whitespace by tab in the Documentation files
> - Fixed the comment style according to the CodingStyle documentation
> - Fixed incorrect indentation
> - Removed redundant header in clk-cpu.c
> - Replaced improper whitespace by tabs in armada-xp.dtsi
> - In the device tree, the resources for the clocks do not rely anymore
> on the node name mvebu-sar but now only depend on the compatible
> name. (Issue reported by Sebastian Hesselbarth)
>
> V2 -> V3:
> - Rebased on top of v3.7-rc1
> - Fixed a typo in device trees
> - Fixed warning from checkpatch
>
> V1 -> V2:
> - Improved the spelling and the wording of the documentation and the
> 1st commit log
> - Removed the "end_of_list" name which are unused here.
> - Fix the cpu clock by using of_clk_src_onecell_get in the same way it
> was used for the core clocks
>
> Regards,
>
>
> Gregory CLEMENT (3):
> clk: mvebu: add armada-370-xp specific clocks
> clk: armada-370-xp: add support for clock framework
> clocksource: time-armada-370-xp converted to clk framework
>
> .../devicetree/bindings/clock/mvebu-core-clock.txt | 40 +++
> .../devicetree/bindings/clock/mvebu-cpu-clock.txt | 21 ++
> arch/arm/boot/dts/armada-370-db.dts | 4 -
> arch/arm/boot/dts/armada-370-xp.dtsi | 1 +
> arch/arm/boot/dts/armada-370.dtsi | 12 +
> arch/arm/boot/dts/armada-xp.dtsi | 48 +++
> arch/arm/mach-mvebu/Kconfig | 5 +
> arch/arm/mach-mvebu/armada-370-xp.c | 8 +-
> arch/arm/mach-mvebu/common.h | 1 +
> drivers/clk/Makefile | 1 +
> drivers/clk/mvebu/Makefile | 2 +
> drivers/clk/mvebu/clk-core.c | 318 ++++++++++++++++++++
> drivers/clk/mvebu/clk-core.h | 19 ++
> drivers/clk/mvebu/clk-cpu.c | 154 ++++++++++
> drivers/clk/mvebu/clk-cpu.h | 19 ++
> drivers/clk/mvebu/clk.c | 36 +++
> drivers/clocksource/time-armada-370-xp.c | 11 +-
> 17 files changed, 690 insertions(+), 10 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
> create mode 100644 Documentation/devicetree/bindings/clock/mvebu-cpu-clock.txt
> create mode 100644 drivers/clk/mvebu/Makefile
> create mode 100644 drivers/clk/mvebu/clk-core.c
> create mode 100644 drivers/clk/mvebu/clk-core.h
> create mode 100644 drivers/clk/mvebu/clk-cpu.c
> create mode 100644 drivers/clk/mvebu/clk-cpu.h
> create mode 100644 drivers/clk/mvebu/clk.c
>
> --
> 1.7.9.5
^ permalink raw reply
* [PATCH 0/2] clk: ux500: Add some more clk lookups for u8500
From: Mike Turquette @ 2012-11-10 1:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351690853-13021-1-git-send-email-ulf.hansson@stericsson.com>
Quoting Ulf Hansson (2012-10-31 06:40:51)
> From: Ulf Hansson <ulf.hansson@linaro.org>
>
> Some more clock lookups added for rng clocks and for the nomadik ske
> keypad clocks.
>
Taken into clk-next.
Thanks,
Mike
> Ulf Hansson (2):
> clk: ux500: Register rng clock lookups for u8500
> clk: ux500: Register nomadik keypad clock lookups for u8500
>
> drivers/clk/ux500/u8500_clk.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> --
> 1.7.10
^ permalink raw reply
* [PATCH v3 02/11] clk: davinci - add PSC clock driver
From: Mike Turquette @ 2012-11-10 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5097D6FC.7040202@ti.com>
Quoting Murali Karicheri (2012-11-05 07:10:52)
> On 11/03/2012 08:07 AM, Sekhar Nori wrote:
> > On 10/25/2012 9:41 PM, Murali Karicheri wrote:
> >> This is the driver for the Power Sleep Controller (PSC) hardware
> >> found on DM SoCs as well Keystone SoCs (c6x). This driver borrowed
> >> code from arch/arm/mach-davinci/psc.c and implemented the driver
> >> as per common clock provider API. The PSC module is responsible for
> >> enabling/disabling the Power Domain and Clock domain for different IPs
> >> present in the SoC. The driver is configured through the clock data
> >> passed to the driver through struct clk_psc_data.
> >>
> >> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
> >> ---
> >> +/**
> >> + * struct clk_psc - DaVinci PSC clock driver data
> >> + *
> >> + * @hw: clk_hw for the psc
> >> + * @psc_data: Driver specific data
> >> + */
> >> +struct clk_psc {
> >> + struct clk_hw hw;
> >> + struct clk_psc_data *psc_data;
> >> + spinlock_t *lock;
> > Unused member? I don't see this being used.
>
> OK. Will remove.
Those locks are only used for the case where a register might contain
bits for several clocks. Thus RMW operations are protected. On OMAP
this isn't necessary due to a very generous register layout (typically
one 32-bit reg per module) controlling clocks. Seems tha tmaybe this is
not needed for PSC module either?
Regards,
Mike
> >
> > Thanks,
> > Sekhar
> >
^ permalink raw reply
* [PATCH] ARM: OMAP2+: Prevent redefinition errors for soc.h
From: Jon Hunter @ 2012-11-10 2:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121110002142.GC6801@atomide.com>
On 11/09/2012 06:21 PM, Tony Lindgren wrote:
> * Jon Hunter <jon-hunter@ti.com> [121109 15:59]:
>>
>> Sorry, I meant in the fixes series I have posted for dmtimer, I am
>> adding a new function called omap_dm_timer_populate_errata() that is
>> using cpu_is_xxxx() [1]. I had done this a while back, but now I see
>> that we want to get away from doing that right?
>
> Yes. Looks like everything we have under plat-omap can be moved
> to live under drivers eventually, so let's not use cpu_is_omap
> there either. For legacy boot, you can use pdata->timer_capability
> for passing that?
Yes, but I prefer to keep capability and errata separate. So I have
added an timer_errata variable to the pdata for now.
>> I was planning on sending you a pull request for that series on Monday
>> but now I am wondering if I should fix this now or later. I was hoping
>> this series would make 3.8.
>
> Yeah, sounds like that should be fixed though as we still have a bit
> of time early next week.
Ok, great. I have re-worked and will stress test over the weekend. I
will send out an updated series Monday and then send a pull request
later in the week if you are ok with it.
Cheers
Jon
^ permalink raw reply
* [PATCH 04/11] ARM: set arch_gettimeoffset directly
From: Ryan Mallon @ 2012-11-10 3:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <509D708E.6080703@wwwdotorg.org>
On 10/11/12 08:07, Stephen Warren wrote:
> On 11/08/2012 04:06 PM, Ryan Mallon wrote:
>> On 09/11/12 08:01, Stephen Warren wrote:
>>> remove ARM's struct sys_timer .offset function pointer, and instead
>>> directly set the arch_gettimeoffset function pointer when the timer
>>> driver is initialized. This requires multiplying all function results
>>> by 1000, since the removed arm_gettimeoffset() did this. Also,
>>> s/unsigned long/u32/ just to make the function prototypes exactly
>>> match that of arch_gettimeoffset.
>
>>> +static u32 ep93xx_gettimeoffset(void)
>>> +{
>>> + int offset;
>>> +
>>> + offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
>>> +
>>> + /* Calculate (1000000 / 983040) * offset. */
>>
>> This comment is now incorrect, it should say:
>>
>> /* Calculate (1000000000 / 983040) * offset */
>>
>> or perhaps to better explain what is being done:
>>
>> /*
>> * Timer 4 is based on a 983.04 kHz reference clock,
>> * so dividing by 983040 gives a milli-second value.
>> * Refactor the calculation to avoid overflow.
>> */
>>
>>> + return (offset + (53 * offset / 3072)) * 1000;
>
> Thanks. I expanded on that slightly and went for:
>
> /*
> * Timer 4 is based on a 983.04 kHz reference clock,
> * so dividing by 983040 gives the fraction of a second,
> * so dividing by 0.983040 converts to uS.
> * Refactor the calculation to avoid overflow.
> * Finally, multiply by 1000 to give nS.
> */
>
Looks good, thanks.
~Ryan
^ permalink raw reply
* [PATCH v4 4/9] ARM: dts: support pinctrl single in pxa910
From: Haojian Zhuang @ 2012-11-10 5:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121109224821.GA6801@atomide.com>
On Sat, Nov 10, 2012 at 6:48 AM, Tony Lindgren <tony@atomide.com> wrote:
> Hi,
>
> To clarify my binding change comment for the generic pinconf
> support, here's an example.
>
> We need to move pinctrl-single pinconf properties here for
> each pin group:
>
> * Haojian Zhuang <haojian.zhuang@gmail.com> [121107 07:21]:
>> + uart1_pins: pinmux_uart1_pins {
>> + pinctrl-single,pins = <
>> + 0x198 0x6 /* GPIO47_UART1_RXD */
>> + 0x19c 0x6 /* GPIO48_UART1_TXD */
>> + >;
>> + pinctrl-single,power-source = <0x2>;
>> + pinctrl-single,bias = <0x6>;
> pinctrl-single,power-source-mask = <0x1800>;
> pinctrl-single,bias-mask = <0xe000>;
> pinctrl-single,bias-disable = <0>;
> pinctrl-single,bias-pull-down = <0xa000>;
> pinctrl-single,bias-pull-up = <0xc000>;
It's OK.
>> + };
>
>
>
>> --- a/arch/arm/boot/dts/pxa910.dtsi
>> +++ b/arch/arm/boot/dts/pxa910.dtsi
>> @@ -54,6 +54,80 @@
>> reg = <0xd4000000 0x00200000>;
>> ranges;
>>
>> + pmx: pinmux at d401e000 {
>> + compatible = "pinconf-single";
>> + reg = <0xd401e000 0x0330>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + pinctrl-single,register-width = <32>;
>> + pinctrl-single,function-mask = <7>;
>
> And then..
>
>> + pinctrl-single,power-source-mask = <0x1800>;
>> + pinctrl-single,bias-mask = <0xe000>;
>> + pinctrl-single,bias-disable = <0>;
>> + pinctrl-single,bias-pull-down = <0xa000>;
>> + pinctrl-single,bias-pull-up = <0xc000>;
>> + pinctrl-single,input-schmitt-mask = <0x70>;
>
> ..remove these from here. Otherwise pinctrl-single,bits type controllers
> won't be able to use the pinconf functions as we can have multiple pins
> supported in a single register.
>
Will do
^ permalink raw reply
* [PATCH 0/8] CLK: SPEAr: Fixes & updates
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi Mike,
These are fixes for SPEAr clock stuff. Most of them are fixes, but we don't mind
getting them in 3.8.
Deepak Sikri (2):
CLK: SPEAr1340: Update clock rate table
CLK: SPEAr: Correct index scanning done for clock synths
Rajeev Kumar (1):
CLK: SPEAr: Fix dev_id & con_id for multiple clocks
Shiraz Hashim (2):
CLK: SPEAr13xx: Fix mux clock names
CLK: SPEAr13xx: fix parent names of multiple clocks
Vipul Kumar Samar (3):
CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks
CLK: SPEAr: Add missing clocks
CLK: SPEAr: Remove unused dummy apb_pclk
drivers/clk/spear/clk-aux-synth.c | 3 +-
drivers/clk/spear/clk.c | 3 +
drivers/clk/spear/spear1310_clock.c | 106 +++++++++-------
drivers/clk/spear/spear1340_clock.c | 237 ++++++++++++++++++++++--------------
drivers/clk/spear/spear3xx_clock.c | 148 +++++++++++++---------
drivers/clk/spear/spear6xx_clock.c | 13 +-
6 files changed, 306 insertions(+), 204 deletions(-)
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply
* [PATCH 1/8] CLK: SPEAr: Fix dev_id & con_id for multiple clocks
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Rajeev Kumar <rajeev-dlh.kumar@st.com>
dev_id & con_id names of multiple clocks are incorrect. This patch fixes these
names with the names that come via DT.
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/spear1310_clock.c | 30 +++++++++++++-------------
drivers/clk/spear/spear1340_clock.c | 42 +++++++++++++++++++------------------
drivers/clk/spear/spear3xx_clock.c | 12 ++++++-----
drivers/clk/spear/spear6xx_clock.c | 6 ++++--
4 files changed, 49 insertions(+), 41 deletions(-)
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 0fcec2a..f13b1d2 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -401,7 +401,7 @@ void __init spear1310_clk_init(void)
clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_RTC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "fc900000.rtc");
+ clk_register_clkdev(clk, NULL, "e0580000.rtc");
/* clock derived from 24 or 25 MHz osc clk */
/* vco-pll */
@@ -615,7 +615,7 @@ void __init spear1310_clk_init(void)
ARRAY_SIZE(gmac_phy_parents), 0,
SPEAR1310_PERIP_CLK_CFG, SPEAR1310_GMAC_PHY_CLK_SHIFT,
SPEAR1310_GMAC_PHY_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, NULL, "stmmacphy.0");
+ clk_register_clkdev(clk, "stmmacphy.0", NULL);
/* clcd */
clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,
@@ -638,7 +638,7 @@ void __init spear1310_clk_init(void)
clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, "clcd_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e1000000.clcd");
/* i2s */
clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,
@@ -705,35 +705,37 @@ void __init spear1310_clk_init(void)
clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UHC0_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, "usbh.0_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e4000000.ohci");
+ clk_register_clkdev(clk, NULL, "e4800000.ehci");
clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UHC1_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, "usbh.1_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e5000000.ohci");
+ clk_register_clkdev(clk, NULL, "e5800000.ehci");
clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UOC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "uoc");
+ clk_register_clkdev(clk, NULL, "e3800000.otg");
clk = clk_register_gate(NULL, "pcie_sata_0_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_0_CLK_ENB,
0, &_lock);
clk_register_clkdev(clk, NULL, "dw_pcie.0");
- clk_register_clkdev(clk, NULL, "ahci.0");
+ clk_register_clkdev(clk, NULL, "b1000000.ahci");
clk = clk_register_gate(NULL, "pcie_sata_1_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_1_CLK_ENB,
0, &_lock);
clk_register_clkdev(clk, NULL, "dw_pcie.1");
- clk_register_clkdev(clk, NULL, "ahci.1");
+ clk_register_clkdev(clk, NULL, "b1800000.ahci");
clk = clk_register_gate(NULL, "pcie_sata_2_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_2_CLK_ENB,
0, &_lock);
clk_register_clkdev(clk, NULL, "dw_pcie.2");
- clk_register_clkdev(clk, NULL, "ahci.2");
+ clk_register_clkdev(clk, NULL, "b4000000.ahci");
clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SYSRAM0_CLK_ENB, 0,
@@ -754,7 +756,7 @@ void __init spear1310_clk_init(void)
clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "adc_clk");
+ clk_register_clkdev(clk, NULL, "e0080000.adc");
/* clock derived from apb clk */
clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0,
@@ -916,15 +918,15 @@ void __init spear1310_clk_init(void)
SPEAR1310_RAS_CTRL_REG1,
SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT,
SPEAR1310_PHY_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, NULL, "stmmacphy.1");
- clk_register_clkdev(clk, NULL, "stmmacphy.2");
- clk_register_clkdev(clk, NULL, "stmmacphy.4");
+ clk_register_clkdev(clk, "stmmacphy.1", NULL);
+ clk_register_clkdev(clk, "stmmacphy.2", NULL);
+ clk_register_clkdev(clk, "stmmacphy.4", NULL);
clk = clk_register_mux(NULL, "rmii_phy_mclk", rmii_phy_parents,
ARRAY_SIZE(rmii_phy_parents), 0,
SPEAR1310_RAS_CTRL_REG1, SPEAR1310_RMII_PHY_CLK_SHIFT,
SPEAR1310_PHY_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, NULL, "stmmacphy.3");
+ clk_register_clkdev(clk, "stmmacphy.3", NULL);
clk = clk_register_mux(NULL, "uart1_mclk", uart_parents,
ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 2352cee..dae2ba6 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -425,7 +425,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_RTC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "fc900000.rtc");
+ clk_register_clkdev(clk, NULL, "e0580000.rtc");
/* clock derived from 24 or 25 MHz osc clk */
/* vco-pll */
@@ -499,7 +499,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0,
SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_THSENS_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "spear_thermal");
+ clk_register_clkdev(clk, NULL, "e07008c4.thermal");
/* clock derived from pll4 clk */
clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1,
@@ -659,7 +659,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "c3");
+ clk_register_clkdev(clk, NULL, "e1800000.c3");
/* gmac */
clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents,
@@ -679,7 +679,7 @@ void __init spear1340_clk_init(void)
ARRAY_SIZE(gmac_phy_parents), 0,
SPEAR1340_PERIP_CLK_CFG, SPEAR1340_GMAC_PHY_CLK_SHIFT,
SPEAR1340_GMAC_PHY_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, NULL, "stmmacphy.0");
+ clk_register_clkdev(clk, "stmmacphy.0", NULL);
/* clcd */
clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,
@@ -702,7 +702,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, "clcd_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e1000000.clcd");
/* i2s */
clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,
@@ -769,23 +769,25 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UHC0_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, "usbh.0_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e4000000.ohci");
+ clk_register_clkdev(clk, NULL, "e4800000.ehci");
clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UHC1_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, "usbh.1_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e5000000.ohci");
+ clk_register_clkdev(clk, NULL, "e5800000.ehci");
clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UOC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "uoc");
+ clk_register_clkdev(clk, NULL, "e3800000.otg");
clk = clk_register_gate(NULL, "pcie_sata_clk", "ahb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_PCIE_SATA_CLK_ENB,
0, &_lock);
clk_register_clkdev(clk, NULL, "dw_pcie");
- clk_register_clkdev(clk, NULL, "ahci");
+ clk_register_clkdev(clk, NULL, "b1000000.ahci");
clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SYSRAM0_CLK_ENB, 0,
@@ -806,7 +808,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "adc_clk");
+ clk_register_clkdev(clk, NULL, "e0080000.adc");
/* clock derived from apb clk */
clk = clk_register_gate(NULL, "ssp_clk", "apb_clk", 0,
@@ -827,12 +829,12 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "i2s_play_clk", "apb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2S_PLAY_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "b2400000.i2s");
+ clk_register_clkdev(clk, NULL, "b2400000.i2s-play");
clk = clk_register_gate(NULL, "i2s_rec_clk", "apb_clk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2S_REC_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "b2000000.i2s");
+ clk_register_clkdev(clk, NULL, "b2000000.i2s-rec");
clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0,
SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_KBD_CLK_ENB, 0,
@@ -896,7 +898,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB,
0, &_lock);
- clk_register_clkdev(clk, NULL, "spdif-out");
+ clk_register_clkdev(clk, NULL, "d0000000.spdif-out");
clk = clk_register_mux(NULL, "spdif_in_mclk", spdif_in_parents,
ARRAY_SIZE(spdif_in_parents), 0,
@@ -907,7 +909,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "spdif-in");
+ clk_register_clkdev(clk, NULL, "d0100000.spdif-in");
clk = clk_register_gate(NULL, "acp_clk", "acp_mclk", 0,
SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_ACP_CLK_ENB, 0,
@@ -917,7 +919,7 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PLGPIO_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "plgpio");
+ clk_register_clkdev(clk, NULL, "e2800000.gpio");
clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_DEC_CLK_ENB,
@@ -937,25 +939,25 @@ void __init spear1340_clk_init(void)
clk = clk_register_gate(NULL, "cam0_clk", "cam0_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM0_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "spear_camif.0");
+ clk_register_clkdev(clk, NULL, "d0200000.cam0");
clk = clk_register_gate(NULL, "cam1_clk", "cam1_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM1_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "spear_camif.1");
+ clk_register_clkdev(clk, NULL, "d0300000.cam1");
clk = clk_register_gate(NULL, "cam2_clk", "cam2_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM2_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "spear_camif.2");
+ clk_register_clkdev(clk, NULL, "d0400000.cam2");
clk = clk_register_gate(NULL, "cam3_clk", "cam3_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM3_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "spear_camif.3");
+ clk_register_clkdev(clk, NULL, "d0500000.cam3");
clk = clk_register_gate(NULL, "pwm_clk", "pwm_mclk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0,
&_lock);
- clk_register_clkdev(clk, NULL, "pwm");
+ clk_register_clkdev(clk, NULL, "e0180000.pwm");
}
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index c315745..e6461f7 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -251,7 +251,7 @@ static void __init spear320_clk_init(void)
clk = clk_register_fixed_factor(NULL, "pwm_clk", "ras_ahb_clk", 0, 1,
1);
- clk_register_clkdev(clk, "pwm", NULL);
+ clk_register_clkdev(clk, NULL, "a8000000.pwm");
clk = clk_register_fixed_factor(NULL, "ssp1_clk", "ras_ahb_clk", 0, 1,
1);
@@ -271,7 +271,7 @@ static void __init spear320_clk_init(void)
clk = clk_register_fixed_factor(NULL, "i2s_clk", "ras_apb_clk", 0, 1,
1);
- clk_register_clkdev(clk, NULL, "i2s");
+ clk_register_clkdev(clk, NULL, "a9400000.i2s");
clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents,
ARRAY_SIZE(i2s_ref_parents), 0, SPEAR320_CONTROL_REG,
@@ -480,7 +480,9 @@ void __init spear3xx_clk_init(void)
/* clock derived from pll3 clk */
clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
USBH_CLK_ENB, 0, &_lock);
- clk_register_clkdev(clk, "usbh_clk", NULL);
+ clk_register_clkdev(clk, NULL, "e1800000.ehci");
+ clk_register_clkdev(clk, NULL, "e1900000.ohci");
+ clk_register_clkdev(clk, NULL, "e2100000.ohci");
clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1,
1);
@@ -492,7 +494,7 @@ void __init spear3xx_clk_init(void)
clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
USBD_CLK_ENB, 0, &_lock);
- clk_register_clkdev(clk, NULL, "designware_udc");
+ clk_register_clkdev(clk, NULL, "e1100000.usbd");
/* clock derived from ahb clk */
clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,
@@ -540,7 +542,7 @@ void __init spear3xx_clk_init(void)
/* clock derived from apb clk */
clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,
ADC_CLK_ENB, 0, &_lock);
- clk_register_clkdev(clk, NULL, "adc");
+ clk_register_clkdev(clk, NULL, "d0080000.adc");
clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB,
GPIO_CLK_ENB, 0, &_lock);
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index a98d086..c7fa67c 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -261,11 +261,13 @@ void __init spear6xx_clk_init(void)
/* clock derived from pll3 clk */
clk = clk_register_gate(NULL, "usbh0_clk", "pll3_clk", 0,
PERIP1_CLK_ENB, USBH0_CLK_ENB, 0, &_lock);
- clk_register_clkdev(clk, NULL, "usbh.0_clk");
+ clk_register_clkdev(clk, NULL, "e1800000.ehci");
+ clk_register_clkdev(clk, NULL, "e1900000.ohci");
clk = clk_register_gate(NULL, "usbh1_clk", "pll3_clk", 0,
PERIP1_CLK_ENB, USBH1_CLK_ENB, 0, &_lock);
- clk_register_clkdev(clk, NULL, "usbh.1_clk");
+ clk_register_clkdev(clk, NULL, "e2000000.ehci");
+ clk_register_clkdev(clk, NULL, "e2100000.ohci");
clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
USBD_CLK_ENB, 0, &_lock);
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 2/8] CLK: SPEAr13xx: Fix mux clock names
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Shiraz Hashim <shiraz.hashim@st.com>
This patch updates mux clock names of multiple clocks. It updates _clk with
_mclk to make it more readable.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/spear1310_clock.c | 4 ++--
drivers/clk/spear/spear1340_clock.c | 20 ++++++++++----------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index f13b1d2..2f1cb71 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -633,7 +633,7 @@ void __init spear1310_clk_init(void)
ARRAY_SIZE(clcd_pixel_parents), 0,
SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT,
SPEAR1310_CLCD_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, "clcd_pixel_clk", NULL);
+ clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);
clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0,
@@ -645,7 +645,7 @@ void __init spear1310_clk_init(void)
ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG,
SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK,
0, &_lock);
- clk_register_clkdev(clk, "i2s_src_clk", NULL);
+ clk_register_clkdev(clk, "i2s_src_mclk", NULL);
clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,
SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index dae2ba6..4733d99 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -521,7 +521,7 @@ void __init spear1340_clk_init(void)
ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL,
SPEAR1340_SCLK_SRC_SEL_SHIFT,
SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock);
- clk_register_clkdev(clk, "sys_clk", NULL);
+ clk_register_clkdev(clk, "sys_mclk", NULL);
clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1,
2);
@@ -697,7 +697,7 @@ void __init spear1340_clk_init(void)
ARRAY_SIZE(clcd_pixel_parents), 0,
SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT,
SPEAR1340_CLCD_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, "clcd_pixel_clk", NULL);
+ clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);
clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0,
@@ -709,7 +709,7 @@ void __init spear1340_clk_init(void)
ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG,
SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK,
0, &_lock);
- clk_register_clkdev(clk, "i2s_src_clk", NULL);
+ clk_register_clkdev(clk, "i2s_src_mclk", NULL);
clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,
SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,
@@ -720,7 +720,7 @@ void __init spear1340_clk_init(void)
ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG,
SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0,
&_lock);
- clk_register_clkdev(clk, "i2s_ref_clk", NULL);
+ clk_register_clkdev(clk, "i2s_ref_mclk", NULL);
clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,
SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB,
@@ -846,30 +846,30 @@ void __init spear1340_clk_init(void)
ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1340_PLL_CFG,
SPEAR1340_GEN_SYNT0_1_CLK_SHIFT,
SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, "gen_syn0_1_clk", NULL);
+ clk_register_clkdev(clk, "gen_syn0_1_mclk", NULL);
clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,
ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1340_PLL_CFG,
SPEAR1340_GEN_SYNT2_3_CLK_SHIFT,
SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);
- clk_register_clkdev(clk, "gen_syn2_3_clk", NULL);
+ clk_register_clkdev(clk, "gen_syn2_3_mclk", NULL);
- clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0,
+ clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_mclk", 0,
SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),
&_lock);
clk_register_clkdev(clk, "gen_syn0_clk", NULL);
- clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0,
+ clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_mclk", 0,
SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),
&_lock);
clk_register_clkdev(clk, "gen_syn1_clk", NULL);
- clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0,
+ clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_mclk", 0,
SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),
&_lock);
clk_register_clkdev(clk, "gen_syn2_clk", NULL);
- clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0,
+ clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_mclk", 0,
SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),
&_lock);
clk_register_clkdev(clk, "gen_syn3_clk", NULL);
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 3/8] CLK: SPEAr13xx: fix parent names of multiple clocks
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Shiraz Hashim <shiraz.hashim@st.com>
This patch fixes parent names of multiple clocks.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/spear1310_clock.c | 2 +-
drivers/clk/spear/spear1340_clock.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 2f1cb71..e84b1fb 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -664,7 +664,7 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);
clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk",
- "i2s_ref_pad_clk", 0, SPEAR1310_I2S_CLK_CFG,
+ "i2s_ref_mclk", 0, SPEAR1310_I2S_CLK_CFG,
&i2s_sclk_masks, i2s_sclk_rtbl,
ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1);
clk_register_clkdev(clk, "i2s_sclk_clk", NULL);
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 4733d99..020431a 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -370,7 +370,7 @@ static struct frac_rate_tbl gen_rtbl[] = {
/* clock parents */
static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", };
static const char *sys_parents[] = { "pll1_clk", "pll1_clk", "pll1_clk",
- "pll1_clk", "sys_synth_clk", "sys_synth_clk", "pll2_clk", "pll3_clk", };
+ "pll1_clk", "sys_syn_clk", "sys_syn_clk", "pll2_clk", "pll3_clk", };
static const char *ahb_parents[] = { "cpu_div3_clk", "amba_syn_clk", };
static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", };
static const char *uart0_parents[] = { "pll5_clk", "osc_24m_clk",
@@ -391,7 +391,7 @@ static const char *spdif_in_parents[] = { "pll2_clk", "gen_syn3_clk", };
static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk",
"pll3_clk", };
-static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk",
+static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk",
"pll2_clk", };
void __init spear1340_clk_init(void)
@@ -956,7 +956,7 @@ void __init spear1340_clk_init(void)
&_lock);
clk_register_clkdev(clk, NULL, "d0500000.cam3");
- clk = clk_register_gate(NULL, "pwm_clk", "pwm_mclk", 0,
+ clk = clk_register_gate(NULL, "pwm_clk", "ahb_clk", 0,
SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0,
&_lock);
clk_register_clkdev(clk, NULL, "e0180000.pwm");
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 4/8] CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Vipul Kumar Samar <vipulkumar.samar@st.com>
Flag CLK_SET_RATE_PARENT is required for a clock, where we want to
propagate clk_set_rate to its parent. This patch adds this to multiple clocks.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/clk-aux-synth.c | 3 +-
drivers/clk/spear/spear1310_clock.c | 49 +++++++--------
drivers/clk/spear/spear1340_clock.c | 73 +++++++++++-----------
drivers/clk/spear/spear3xx_clock.c | 119 ++++++++++++++++++++----------------
drivers/clk/spear/spear6xx_clock.c | 3 +-
5 files changed, 133 insertions(+), 114 deletions(-)
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index 6756e7c..bdfb442 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c
@@ -179,7 +179,8 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
if (gate_name) {
struct clk *tgate_clk;
- tgate_clk = clk_register_gate(NULL, gate_name, aux_name, 0, reg,
+ tgate_clk = clk_register_gate(NULL, gate_name, aux_name,
+ CLK_SET_RATE_PARENT, reg,
aux->masks->enable_bit, 0, lock);
if (IS_ERR_OR_NULL(tgate_clk))
goto free_aux;
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index e84b1fb..2809b67 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -483,7 +483,8 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "ddr_clk", NULL);
/* clock derived from pll1 clk */
- clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 2);
+ clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",
+ CLK_SET_RATE_PARENT, 1, 2);
clk_register_clkdev(clk, "cpu_clk", NULL);
clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1,
@@ -547,14 +548,14 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
- ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG,
- SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uart0_parents), CLK_SET_RATE_PARENT,
+ SPEAR1310_PERIP_CLK_CFG, SPEAR1310_UART_CLK_SHIFT,
+ SPEAR1310_UART_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "uart0_mclk", NULL);
- clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0,
- SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk",
+ CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB,
+ SPEAR1310_UART_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "e0000000.serial");
clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk",
@@ -563,9 +564,9 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "sdhci_syn_clk", NULL);
clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL);
- clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0,
- SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk",
+ CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB,
+ SPEAR1310_SDHCI_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "b3000000.sdhci");
clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk",
@@ -574,9 +575,9 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "cfxd_syn_clk", NULL);
clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL);
- clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0,
- SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk",
+ CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB,
+ SPEAR1310_CFXD_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "b2800000.cf");
clk_register_clkdev(clk, NULL, "arasan_xd");
@@ -587,9 +588,9 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk1, "c3_syn_gclk", NULL);
clk = clk_register_mux(NULL, "c3_mclk", c3_parents,
- ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG,
- SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(c3_parents), CLK_SET_RATE_PARENT,
+ SPEAR1310_PERIP_CLK_CFG, SPEAR1310_C3_CLK_SHIFT,
+ SPEAR1310_C3_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "c3_mclk", NULL);
clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,
@@ -630,7 +631,7 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "clcd_syn_clk", NULL);
clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,
- ARRAY_SIZE(clcd_pixel_parents), 0,
+ ARRAY_SIZE(clcd_pixel_parents), CLK_SET_RATE_PARENT,
SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT,
SPEAR1310_CLCD_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);
@@ -653,10 +654,10 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "i2s_prs1_clk", NULL);
clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,
- ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG,
- SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0,
- &_lock);
- clk_register_clkdev(clk, "i2s_ref_clk", NULL);
+ ARRAY_SIZE(i2s_ref_parents), CLK_SET_RATE_PARENT,
+ SPEAR1310_I2S_CLK_CFG, SPEAR1310_I2S_REF_SHIFT,
+ SPEAR1310_I2S_REF_SEL_MASK, 0, &_lock);
+ clk_register_clkdev(clk, "i2s_ref_mclk", NULL);
clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,
SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB,
@@ -753,9 +754,9 @@ void __init spear1310_clk_init(void)
clk_register_clkdev(clk, "adc_syn_clk", NULL);
clk_register_clkdev(clk1, "adc_syn_gclk", NULL);
- clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0,
- SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk",
+ CLK_SET_RATE_PARENT, SPEAR1310_PERIP1_CLK_ENB,
+ SPEAR1310_ADC_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "e0080000.adc");
/* clock derived from apb clk */
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 020431a..aa5ed43 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -594,14 +594,14 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk1, "uart0_syn_gclk", NULL);
clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
- ARRAY_SIZE(uart0_parents), 0, SPEAR1340_PERIP_CLK_CFG,
- SPEAR1340_UART0_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uart0_parents), CLK_SET_RATE_PARENT,
+ SPEAR1340_PERIP_CLK_CFG, SPEAR1340_UART0_CLK_SHIFT,
+ SPEAR1340_UART_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "uart0_mclk", NULL);
- clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0,
- SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART0_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP1_CLK_ENB,
+ SPEAR1340_UART0_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "e0000000.serial");
clk = clk_register_aux("uart1_syn_clk", "uart1_syn_gclk",
@@ -627,9 +627,9 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk, "sdhci_syn_clk", NULL);
clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL);
- clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0,
- SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SDHCI_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP1_CLK_ENB,
+ SPEAR1340_SDHCI_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "b3000000.sdhci");
clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk",
@@ -638,9 +638,9 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk, "cfxd_syn_clk", NULL);
clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL);
- clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0,
- SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CFXD_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP1_CLK_ENB,
+ SPEAR1340_CFXD_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "b2800000.cf");
clk_register_clkdev(clk, NULL, "arasan_xd");
@@ -651,12 +651,12 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk1, "c3_syn_gclk", NULL);
clk = clk_register_mux(NULL, "c3_mclk", c3_parents,
- ARRAY_SIZE(c3_parents), 0, SPEAR1340_PERIP_CLK_CFG,
- SPEAR1340_C3_CLK_SHIFT, SPEAR1340_C3_CLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(c3_parents), CLK_SET_RATE_PARENT,
+ SPEAR1340_PERIP_CLK_CFG, SPEAR1340_C3_CLK_SHIFT,
+ SPEAR1340_C3_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "c3_mclk", NULL);
- clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,
+ clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", CLK_SET_RATE_PARENT,
SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0,
&_lock);
clk_register_clkdev(clk, NULL, "e1800000.c3");
@@ -694,7 +694,7 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk, "clcd_syn_clk", NULL);
clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,
- ARRAY_SIZE(clcd_pixel_parents), 0,
+ ARRAY_SIZE(clcd_pixel_parents), CLK_SET_RATE_PARENT,
SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT,
SPEAR1340_CLCD_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);
@@ -711,15 +711,16 @@ void __init spear1340_clk_init(void)
0, &_lock);
clk_register_clkdev(clk, "i2s_src_mclk", NULL);
- clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,
- SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,
+ clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_I2S_CLK_CFG,
+ &i2s_prs1_masks, i2s_prs1_rtbl,
ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL);
clk_register_clkdev(clk, "i2s_prs1_clk", NULL);
clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,
- ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG,
- SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0,
- &_lock);
+ ARRAY_SIZE(i2s_ref_parents), CLK_SET_RATE_PARENT,
+ SPEAR1340_I2S_CLK_CFG, SPEAR1340_I2S_REF_SHIFT,
+ SPEAR1340_I2S_REF_SEL_MASK, 0, &_lock);
clk_register_clkdev(clk, "i2s_ref_mclk", NULL);
clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,
@@ -805,9 +806,9 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk, "adc_syn_clk", NULL);
clk_register_clkdev(clk1, "adc_syn_gclk", NULL);
- clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0,
- SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP1_CLK_ENB,
+ SPEAR1340_ADC_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "e0080000.adc");
/* clock derived from apb clk */
@@ -874,9 +875,9 @@ void __init spear1340_clk_init(void)
&_lock);
clk_register_clkdev(clk, "gen_syn3_clk", NULL);
- clk = clk_register_gate(NULL, "mali_clk", "gen_syn3_clk", 0,
- SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_MALI_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "mali_clk", "gen_syn3_clk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP3_CLK_ENB,
+ SPEAR1340_MALI_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "mali");
clk = clk_register_gate(NULL, "cec0_clk", "ahb_clk", 0,
@@ -890,25 +891,25 @@ void __init spear1340_clk_init(void)
clk_register_clkdev(clk, NULL, "spear_cec.1");
clk = clk_register_mux(NULL, "spdif_out_mclk", spdif_out_parents,
- ARRAY_SIZE(spdif_out_parents), 0,
+ ARRAY_SIZE(spdif_out_parents), CLK_SET_RATE_PARENT,
SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_OUT_CLK_SHIFT,
SPEAR1340_SPDIF_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "spdif_out_mclk", NULL);
- clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk", 0,
- SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB,
- 0, &_lock);
+ clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP3_CLK_ENB,
+ SPEAR1340_SPDIF_OUT_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "d0000000.spdif-out");
clk = clk_register_mux(NULL, "spdif_in_mclk", spdif_in_parents,
- ARRAY_SIZE(spdif_in_parents), 0,
+ ARRAY_SIZE(spdif_in_parents), CLK_SET_RATE_PARENT,
SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_IN_CLK_SHIFT,
SPEAR1340_SPDIF_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "spdif_in_mclk", NULL);
- clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk", 0,
- SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0,
- &_lock);
+ clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk",
+ CLK_SET_RATE_PARENT, SPEAR1340_PERIP3_CLK_ENB,
+ SPEAR1340_SPDIF_IN_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, NULL, "d0100000.spdif-in");
clk = clk_register_gate(NULL, "acp_clk", "acp_mclk", 0,
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index e6461f7..de28152 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -274,23 +274,26 @@ static void __init spear320_clk_init(void)
clk_register_clkdev(clk, NULL, "a9400000.i2s");
clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents,
- ARRAY_SIZE(i2s_ref_parents), 0, SPEAR320_CONTROL_REG,
- I2S_REF_PCLK_SHIFT, I2S_REF_PCLK_MASK, 0, &_lock);
+ ARRAY_SIZE(i2s_ref_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_CONTROL_REG, I2S_REF_PCLK_SHIFT,
+ I2S_REF_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "i2s_ref_clk", NULL);
- clk = clk_register_fixed_factor(NULL, "i2s_sclk", "i2s_ref_clk", 0, 1,
+ clk = clk_register_fixed_factor(NULL, "i2s_sclk", "i2s_ref_clk",
+ CLK_SET_RATE_PARENT, 1,
4);
clk_register_clkdev(clk, "i2s_sclk", NULL);
clk = clk_register_mux(NULL, "rs485_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,
- SPEAR320_RS485_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_EXT_CTRL_REG, SPEAR320_RS485_PCLK_SHIFT,
+ SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a9300000.serial");
clk = clk_register_mux(NULL, "sdhci_clk", sdhci_parents,
- ARRAY_SIZE(sdhci_parents), 0, SPEAR320_CONTROL_REG,
- SDHCI_PCLK_SHIFT, SDHCI_PCLK_MASK, 0, &_lock);
+ ARRAY_SIZE(sdhci_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_CONTROL_REG, SDHCI_PCLK_SHIFT, SDHCI_PCLK_MASK,
+ 0, &_lock);
clk_register_clkdev(clk, NULL, "70000000.sdhci");
clk = clk_register_mux(NULL, "smii_pclk", smii0_parents,
@@ -302,38 +305,39 @@ static void __init spear320_clk_init(void)
clk_register_clkdev(clk, NULL, "smii");
clk = clk_register_mux(NULL, "uart1_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_CONTROL_REG,
- UART1_PCLK_SHIFT, UART1_PCLK_MASK, 0, &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_CONTROL_REG, UART1_PCLK_SHIFT, UART1_PCLK_MASK,
+ 0, &_lock);
clk_register_clkdev(clk, NULL, "a3000000.serial");
clk = clk_register_mux(NULL, "uart2_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,
- SPEAR320_UART2_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_EXT_CTRL_REG, SPEAR320_UART2_PCLK_SHIFT,
+ SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a4000000.serial");
clk = clk_register_mux(NULL, "uart3_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,
- SPEAR320_UART3_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_EXT_CTRL_REG, SPEAR320_UART3_PCLK_SHIFT,
+ SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a9100000.serial");
clk = clk_register_mux(NULL, "uart4_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,
- SPEAR320_UART4_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_EXT_CTRL_REG, SPEAR320_UART4_PCLK_SHIFT,
+ SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a9200000.serial");
clk = clk_register_mux(NULL, "uart5_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,
- SPEAR320_UART5_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_EXT_CTRL_REG, SPEAR320_UART5_PCLK_SHIFT,
+ SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "60000000.serial");
clk = clk_register_mux(NULL, "uart6_clk", uartx_parents,
- ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,
- SPEAR320_UART6_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,
- &_lock);
+ ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
+ SPEAR320_EXT_CTRL_REG, SPEAR320_UART6_PCLK_SHIFT,
+ SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "60100000.serial");
}
#endif
@@ -380,7 +384,8 @@ void __init spear3xx_clk_init(void)
clk_register_clkdev(clk1, "pll2_clk", NULL);
/* clock derived from pll1 clk */
- clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 1);
+ clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",
+ CLK_SET_RATE_PARENT, 1, 1);
clk_register_clkdev(clk, "cpu_clk", NULL);
clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",
@@ -395,12 +400,14 @@ void __init spear3xx_clk_init(void)
clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
- ARRAY_SIZE(uart0_parents), 0, PERIP_CLK_CFG,
- UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock);
+ ARRAY_SIZE(uart0_parents), CLK_SET_RATE_PARENT,
+ PERIP_CLK_CFG, UART_CLK_SHIFT, UART_CLK_MASK, 0,
+ &_lock);
clk_register_clkdev(clk, "uart0_mclk", NULL);
- clk = clk_register_gate(NULL, "uart0", "uart0_mclk", 0, PERIP1_CLK_ENB,
- UART_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "uart0", "uart0_mclk",
+ CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, UART_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, NULL, "d0000000.serial");
clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk", 0,
@@ -410,40 +417,44 @@ void __init spear3xx_clk_init(void)
clk_register_clkdev(clk1, "firda_syn_gclk", NULL);
clk = clk_register_mux(NULL, "firda_mclk", firda_parents,
- ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG,
- FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock);
+ ARRAY_SIZE(firda_parents), CLK_SET_RATE_PARENT,
+ PERIP_CLK_CFG, FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0,
+ &_lock);
clk_register_clkdev(clk, "firda_mclk", NULL);
- clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0,
- PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "firda_clk", "firda_mclk",
+ CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, NULL, "firda");
/* gpt clocks */
clk_register_gpt("gpt0_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG, gpt_rtbl,
ARRAY_SIZE(gpt_rtbl), &_lock);
clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents,
- ARRAY_SIZE(gpt0_parents), 0, PERIP_CLK_CFG,
- GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
+ ARRAY_SIZE(gpt0_parents), CLK_SET_RATE_PARENT,
+ PERIP_CLK_CFG, GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "gpt0");
clk_register_gpt("gpt1_syn_clk", "pll1_clk", 0, PRSC1_CLK_CFG, gpt_rtbl,
ARRAY_SIZE(gpt_rtbl), &_lock);
clk = clk_register_mux(NULL, "gpt1_mclk", gpt1_parents,
- ARRAY_SIZE(gpt1_parents), 0, PERIP_CLK_CFG,
- GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
+ ARRAY_SIZE(gpt1_parents), CLK_SET_RATE_PARENT,
+ PERIP_CLK_CFG, GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "gpt1_mclk", NULL);
- clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
- PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk",
+ CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, GPT1_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, NULL, "gpt1");
clk_register_gpt("gpt2_syn_clk", "pll1_clk", 0, PRSC2_CLK_CFG, gpt_rtbl,
ARRAY_SIZE(gpt_rtbl), &_lock);
clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents,
- ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG,
- GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
+ ARRAY_SIZE(gpt2_parents), CLK_SET_RATE_PARENT,
+ PERIP_CLK_CFG, GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
clk_register_clkdev(clk, "gpt2_mclk", NULL);
- clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
- PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk",
+ CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, GPT2_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, NULL, "gpt2");
/* general synths clocks */
@@ -581,20 +592,24 @@ void __init spear3xx_clk_init(void)
RAS_CLK_ENB, RAS_48M_CLK_ENB, 0, &_lock);
clk_register_clkdev(clk, "ras_pll3_clk", NULL);
- clk = clk_register_gate(NULL, "ras_syn0_gclk", "gen0_syn_gclk", 0,
- RAS_CLK_ENB, RAS_SYNT0_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "ras_syn0_gclk", "gen0_syn_gclk",
+ CLK_SET_RATE_PARENT, RAS_CLK_ENB, RAS_SYNT0_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, "ras_syn0_gclk", NULL);
- clk = clk_register_gate(NULL, "ras_syn1_gclk", "gen1_syn_gclk", 0,
- RAS_CLK_ENB, RAS_SYNT1_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "ras_syn1_gclk", "gen1_syn_gclk",
+ CLK_SET_RATE_PARENT, RAS_CLK_ENB, RAS_SYNT1_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, "ras_syn1_gclk", NULL);
- clk = clk_register_gate(NULL, "ras_syn2_gclk", "gen2_syn_gclk", 0,
- RAS_CLK_ENB, RAS_SYNT2_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "ras_syn2_gclk", "gen2_syn_gclk",
+ CLK_SET_RATE_PARENT, RAS_CLK_ENB, RAS_SYNT2_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, "ras_syn2_gclk", NULL);
- clk = clk_register_gate(NULL, "ras_syn3_gclk", "gen3_syn_gclk", 0,
- RAS_CLK_ENB, RAS_SYNT3_CLK_ENB, 0, &_lock);
+ clk = clk_register_gate(NULL, "ras_syn3_gclk", "gen3_syn_gclk",
+ CLK_SET_RATE_PARENT, RAS_CLK_ENB, RAS_SYNT3_CLK_ENB, 0,
+ &_lock);
clk_register_clkdev(clk, "ras_syn3_gclk", NULL);
if (of_machine_is_compatible("st,spear300"))
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index c7fa67c..e8d2b31 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -156,7 +156,8 @@ void __init spear6xx_clk_init(void)
clk_register_clkdev(clk, NULL, "wdt");
/* clock derived from pll1 clk */
- clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 1);
+ clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",
+ CLK_SET_RATE_PARENT, 1, 1);
clk_register_clkdev(clk, "cpu_clk", NULL);
clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 5/8] CLK: SPEAr: Add missing clocks
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Vipul Kumar Samar <vipulkumar.samar@st.com>
This patch adds missing clocks: twd and macb.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/spear1310_clock.c | 4 ++++
drivers/clk/spear/spear1340_clock.c | 4 ++++
drivers/clk/spear/spear3xx_clock.c | 8 ++++++++
3 files changed, 16 insertions(+)
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 2809b67..b64d511 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -491,6 +491,10 @@ void __init spear1310_clk_init(void)
2);
clk_register_clkdev(clk, NULL, "ec800620.wdt");
+ clk = clk_register_fixed_factor(NULL, "smp_twd_clk", "cpu_clk", 0, 1,
+ 2);
+ clk_register_clkdev(clk, NULL, "smp_twd");
+
clk = clk_register_fixed_factor(NULL, "ahb_clk", "pll1_clk", 0, 1,
6);
clk_register_clkdev(clk, "ahb_clk", NULL);
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index aa5ed43..8f00533 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -535,6 +535,10 @@ void __init spear1340_clk_init(void)
2);
clk_register_clkdev(clk, NULL, "ec800620.wdt");
+ clk = clk_register_fixed_factor(NULL, "smp_twd_clk", "cpu_clk", 0, 1,
+ 2);
+ clk_register_clkdev(clk, NULL, "smp_twd");
+
clk = clk_register_mux(NULL, "ahb_clk", ahb_parents,
ARRAY_SIZE(ahb_parents), 0, SPEAR1340_SYS_CLK_CTRL,
SPEAR1340_HCLK_SRC_SEL_SHIFT,
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index de28152..1cc034b 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -284,6 +284,14 @@ static void __init spear320_clk_init(void)
4);
clk_register_clkdev(clk, "i2s_sclk", NULL);
+ clk = clk_register_fixed_factor(NULL, "macb1_clk", "ras_apb_clk", 0, 1,
+ 1);
+ clk_register_clkdev(clk, "hclk", "aa000000.eth");
+
+ clk = clk_register_fixed_factor(NULL, "macb2_clk", "ras_apb_clk", 0, 1,
+ 1);
+ clk_register_clkdev(clk, "hclk", "ab000000.eth");
+
clk = clk_register_mux(NULL, "rs485_clk", uartx_parents,
ARRAY_SIZE(uartx_parents), CLK_SET_RATE_PARENT,
SPEAR320_EXT_CTRL_REG, SPEAR320_RS485_PCLK_SHIFT,
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 6/8] CLK: SPEAr: Update clock rate table
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Deepak Sikri <deepak.sikri@st.com>
This patch updates the existing rate tables with new frequencies.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/spear1310_clock.c | 14 ++++++
drivers/clk/spear/spear1340_clock.c | 89 ++++++++++++++++++++++++++++---------
drivers/clk/spear/spear3xx_clock.c | 6 +++
drivers/clk/spear/spear6xx_clock.c | 1 +
4 files changed, 89 insertions(+), 21 deletions(-)
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index b64d511..bc7f37e 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -313,6 +313,20 @@ static struct aux_clk_masks i2s_sclk_masks = {
/* i2s prs1 aux rate configuration table, in ascending order of rates */
static struct aux_rate_tbl i2s_prs1_rtbl[] = {
/* For parent clk = 49.152 MHz */
+ {.xscale = 1, .yscale = 12, .eq = 0}, /* 2.048 MHz, smp freq = 8Khz */
+ {.xscale = 11, .yscale = 96, .eq = 0}, /* 2.816 MHz, smp freq = 11Khz */
+ {.xscale = 1, .yscale = 6, .eq = 0}, /* 4.096 MHz, smp freq = 16Khz */
+ {.xscale = 11, .yscale = 48, .eq = 0}, /* 5.632 MHz, smp freq = 22Khz */
+
+ /*
+ * with parent clk = 49.152, freq gen is 8.192 MHz, smp freq = 32Khz
+ * with parent clk = 12.288, freq gen is 2.048 MHz, smp freq = 8Khz
+ */
+ {.xscale = 1, .yscale = 3, .eq = 0},
+
+ /* For parent clk = 49.152 MHz */
+ {.xscale = 17, .yscale = 37, .eq = 0}, /* 11.289 MHz, smp freq = 44Khz*/
+
{.xscale = 1, .yscale = 2, .eq = 0}, /* 12.288 MHz */
};
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 8f00533..d4de680 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -190,6 +190,7 @@ static struct pll_rate_tbl pll4_rtbl[] = {
* different values of vco1div2
*/
static struct frac_rate_tbl amba_synth_rtbl[] = {
+ {.div = 0x073A8}, /* for vco1div2 = 600 MHz */
{.div = 0x06062}, /* for vco1div2 = 500 MHz */
{.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
{.div = 0x04000}, /* for vco1div2 = 332 MHz */
@@ -220,6 +221,12 @@ static struct frac_rate_tbl amba_synth_rtbl[] = {
* 500 400 200 0x02800
* 500 500 250 0x02000
* --------------------------------------------------------------------
+ * 600 200 100 0x06000
+ * 600 250 125 0x04CCE
+ * 600 332 166 0x039D5
+ * 600 400 200 0x03000
+ * 600 500 250 0x02666
+ * --------------------------------------------------------------------
* 664 200 100 0x06a38
* 664 250 125 0x054FD
* 664 332 166 0x04000
@@ -238,28 +245,50 @@ static struct frac_rate_tbl sys_synth_rtbl[] = {
{.div = 0x08000},
{.div = 0x06a38},
{.div = 0x06666},
+ {.div = 0x06000},
{.div = 0x054FD},
{.div = 0x05000},
{.div = 0x04D18},
+ {.div = 0x04CCE},
{.div = 0x04000},
+ {.div = 0x039D5},
{.div = 0x0351E},
{.div = 0x03333},
{.div = 0x03031},
+ {.div = 0x03000},
{.div = 0x02A7E},
{.div = 0x02800},
{.div = 0x0268D},
+ {.div = 0x02666},
{.div = 0x02000},
};
/* aux rate configuration table, in ascending order of rates */
static struct aux_rate_tbl aux_rtbl[] = {
- /* For VCO1div2 = 500 MHz */
- {.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */
- {.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */
- {.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */
- {.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */
- {.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */
- {.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */
+ /* 12.29MHz for vic1div2=600MHz and 10.24MHz for VCO1div2=500MHz */
+ {.xscale = 5, .yscale = 122, .eq = 0},
+ /* 14.70MHz for vic1div2=600MHz and 12.29MHz for VCO1div2=500MHz */
+ {.xscale = 10, .yscale = 204, .eq = 0},
+ /* 48MHz for vic1div2=600MHz and 40 MHz for VCO1div2=500MHz */
+ {.xscale = 4, .yscale = 25, .eq = 0},
+ /* 57.14MHz for vic1div2=600MHz and 48 MHz for VCO1div2=500MHz */
+ {.xscale = 4, .yscale = 21, .eq = 0},
+ /* 83.33MHz for vic1div2=600MHz and 69.44MHz for VCO1div2=500MHz */
+ {.xscale = 5, .yscale = 18, .eq = 0},
+ /* 100MHz for vic1div2=600MHz and 83.33 MHz for VCO1div2=500MHz */
+ {.xscale = 2, .yscale = 6, .eq = 0},
+ /* 125MHz for vic1div2=600MHz and 104.1MHz for VCO1div2=500MHz */
+ {.xscale = 5, .yscale = 12, .eq = 0},
+ /* 150MHz for vic1div2=600MHz and 125MHz for VCO1div2=500MHz */
+ {.xscale = 2, .yscale = 4, .eq = 0},
+ /* 166MHz for vic1div2=600MHz and 138.88MHz for VCO1div2=500MHz */
+ {.xscale = 5, .yscale = 18, .eq = 1},
+ /* 200MHz for vic1div2=600MHz and 166MHz for VCO1div2=500MHz */
+ {.xscale = 1, .yscale = 3, .eq = 1},
+ /* 250MHz for vic1div2=600MHz and 208.33MHz for VCO1div2=500MHz */
+ {.xscale = 5, .yscale = 12, .eq = 1},
+ /* 300MHz for vic1div2=600MHz and 250MHz for VCO1div2=500MHz */
+ {.xscale = 1, .yscale = 2, .eq = 1},
};
/* gmac rate configuration table, in ascending order of rates */
@@ -273,16 +302,23 @@ static struct aux_rate_tbl gmac_rtbl[] = {
/* clcd rate configuration table, in ascending order of rates */
static struct frac_rate_tbl clcd_rtbl[] = {
+ {.div = 0x18000}, /* 25 Mhz , for vc01div4 = 300 MHz*/
+ {.div = 0x1638E}, /* 27 Mhz , for vc01div4 = 300 MHz*/
{.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/
{.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/
{.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */
{.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */
+ {.div = 0x0A584}, /* 58 Mhz , for vco1div4 = 300 MHz */
+ {.div = 0x093B1}, /* 65 Mhz , for vc01div4 = 300 MHz*/
{.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/
+ {.div = 0x081BA}, /* 74 Mhz , for vc01div4 = 300 MHz*/
{.div = 0x07BA0}, /* 65 Mhz , for vc01div4 = 250 MHz*/
{.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/
{.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */
{.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/
+ {.div = 0x058E3}, /* 108 Mhz , for vc01div4 = 300 MHz*/
{.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/
+ {.div = 0x040A5}, /* 148.5 Mhz , for vc01div4 = 300 MHz*/
{.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/
{.div = 0x0360D}, /* 148 Mhz , for vc01div4 = 250 MHz*/
{.div = 0x035E0}, /* 148.5 MHz, for vc01div4 = 250 MHz*/
@@ -351,20 +387,31 @@ static struct aux_rate_tbl adc_rtbl[] = {
/* General synth rate configuration table, in ascending order of rates */
static struct frac_rate_tbl gen_rtbl[] = {
- /* For vco1div4 = 250 MHz */
- {.div = 0x1624E}, /* 22.5792 MHz */
- {.div = 0x14585}, /* 24.576 MHz */
- {.div = 0x14000}, /* 25 MHz */
- {.div = 0x0B127}, /* 45.1584 MHz */
- {.div = 0x0A000}, /* 50 MHz */
- {.div = 0x061A8}, /* 81.92 MHz */
- {.div = 0x05000}, /* 100 MHz */
- {.div = 0x02800}, /* 200 MHz */
- {.div = 0x02620}, /* 210 MHz */
- {.div = 0x02460}, /* 220 MHz */
- {.div = 0x022C0}, /* 230 MHz */
- {.div = 0x02160}, /* 240 MHz */
- {.div = 0x02000}, /* 250 MHz */
+ {.div = 0x1A92B}, /* 22.5792 MHz for vco1div4=300 MHz*/
+ {.div = 0x186A0}, /* 24.576 MHz for vco1div4=300 MHz*/
+ {.div = 0x18000}, /* 25 MHz for vco1div4=300 MHz*/
+ {.div = 0x1624E}, /* 22.5792 MHz for vco1div4=250 MHz*/
+ {.div = 0x14585}, /* 24.576 MHz for vco1div4=250 MHz*/
+ {.div = 0x14000}, /* 25 MHz for vco1div4=250 MHz*/
+ {.div = 0x0D495}, /* 45.1584 MHz for vco1div4=300 MHz*/
+ {.div = 0x0C000}, /* 50 MHz for vco1div4=300 MHz*/
+ {.div = 0x0B127}, /* 45.1584 MHz for vco1div4=250 MHz*/
+ {.div = 0x0A000}, /* 50 MHz for vco1div4=250 MHz*/
+ {.div = 0x07530}, /* 81.92 MHz for vco1div4=300 MHz*/
+ {.div = 0x061A8}, /* 81.92 MHz for vco1div4=250 MHz*/
+ {.div = 0x06000}, /* 100 MHz for vco1div4=300 MHz*/
+ {.div = 0x05000}, /* 100 MHz for vco1div4=250 MHz*/
+ {.div = 0x03000}, /* 200 MHz for vco1div4=300 MHz*/
+ {.div = 0x02DB6}, /* 210 MHz for vco1div4=300 MHz*/
+ {.div = 0x02BA2}, /* 220 MHz for vco1div4=300 MHz*/
+ {.div = 0x029BD}, /* 230 MHz for vco1div4=300 MHz*/
+ {.div = 0x02800}, /* 200 MHz for vco1div4=250 MHz*/
+ {.div = 0x02666}, /* 250 MHz for vco1div4=300 MHz*/
+ {.div = 0x02620}, /* 210 MHz for vco1div4=250 MHz*/
+ {.div = 0x02460}, /* 220 MHz for vco1div4=250 MHz*/
+ {.div = 0x022C0}, /* 230 MHz for vco1div4=250 MHz*/
+ {.div = 0x02160}, /* 240 MHz for vco1div4=250 MHz*/
+ {.div = 0x02000}, /* 250 MHz for vco1div4=250 MHz*/
};
/* clock parents */
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index 1cc034b..ea6543e 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -107,6 +107,12 @@ static struct pll_rate_tbl pll_rtbl[] = {
/* aux rate configuration table, in ascending order of rates */
static struct aux_rate_tbl aux_rtbl[] = {
/* For PLL1 = 332 MHz */
+ {.xscale = 1, .yscale = 81, .eq = 0}, /* 2.049 MHz */
+ {.xscale = 1, .yscale = 59, .eq = 0}, /* 2.822 MHz */
+ {.xscale = 2, .yscale = 81, .eq = 0}, /* 4.098 MHz */
+ {.xscale = 3, .yscale = 89, .eq = 0}, /* 5.644 MHz */
+ {.xscale = 4, .yscale = 81, .eq = 0}, /* 8.197 MHz */
+ {.xscale = 4, .yscale = 59, .eq = 0}, /* 11.254 MHz */
{.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
{.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
{.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index e8d2b31..8a81770 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -92,6 +92,7 @@ static struct pll_rate_tbl pll_rtbl[] = {
/* aux rate configuration table, in ascending order of rates */
static struct aux_rate_tbl aux_rtbl[] = {
/* For PLL1 = 332 MHz */
+ {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
{.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
{.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */
{.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 7/8] CLK: SPEAr: Correct index scanning done for clock synths
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Deepak Sikri <deepak.sikri@st.com>
The patch corrects the case when the rate table is being scanned for a
given frequency, and the search frequency is beyond the maximum
frequency indexed in the table.
By default, the system should be set at max frequency present in the
rate table. This patch correctly returns the corresponding index value.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/spear/clk.c b/drivers/clk/spear/clk.c
index 7cd6378..628b6d5 100644
--- a/drivers/clk/spear/clk.c
+++ b/drivers/clk/spear/clk.c
@@ -32,5 +32,8 @@ long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,
}
}
+ if ((*index) == rtbl_cnt)
+ (*index)--;
+
return rate;
}
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [PATCH 8/8] CLK: SPEAr: Remove unused dummy apb_pclk
From: Viresh Kumar @ 2012-11-10 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1352529508.git.viresh.kumar@linaro.org>
From: Vipul Kumar Samar <vipulkumar.samar@st.com>
Dummy clocks were added for ARM platforms, so that clk_get() for interface clk
doesn't fail for amba devices from amba_probe(). Because there is no amba device
for SPEAr that doesn't have a valid clock with dev_id for SPEAr, we don't need
these dummy clocks. Hence, remove them.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/clk/spear/spear1310_clock.c | 3 ---
drivers/clk/spear/spear1340_clock.c | 3 ---
drivers/clk/spear/spear3xx_clock.c | 3 ---
drivers/clk/spear/spear6xx_clock.c | 3 ---
4 files changed, 12 deletions(-)
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index bc7f37e..147e25f 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -388,9 +388,6 @@ void __init spear1310_clk_init(void)
{
struct clk *clk, *clk1;
- clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
- clk_register_clkdev(clk, "apb_pclk", NULL);
-
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
clk_register_clkdev(clk, "osc_32k_clk", NULL);
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index d4de680..82abea3 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -445,9 +445,6 @@ void __init spear1340_clk_init(void)
{
struct clk *clk, *clk1;
- clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
- clk_register_clkdev(clk, "apb_pclk", NULL);
-
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
clk_register_clkdev(clk, "osc_32k_clk", NULL);
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index ea6543e..f39b023 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -360,9 +360,6 @@ void __init spear3xx_clk_init(void)
{
struct clk *clk, *clk1;
- clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
- clk_register_clkdev(clk, "apb_pclk", NULL);
-
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
clk_register_clkdev(clk, "osc_32k_clk", NULL);
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index 8a81770..e862a33 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -119,9 +119,6 @@ void __init spear6xx_clk_init(void)
{
struct clk *clk, *clk1;
- clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
- clk_register_clkdev(clk, "apb_pclk", NULL);
-
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
clk_register_clkdev(clk, "osc_32k_clk", NULL);
--
1.7.12.rc2.18.g61b472e
^ permalink raw reply related
* [kvmarm] [PATCH v3 01/13] KVM: ARM: Introduce KVM_SET_DEVICE_ADDRESS ioctl
From: Christoffer Dall @ 2012-11-10 8:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352469079.5117.1.camel@pasglop>
On Fri, Nov 9, 2012 at 2:51 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Fri, 2012-11-09 at 14:45 +0100, Peter Maydell wrote:
>> On 22 October 2012 08:51, Christoffer Dall
>> <c.dall@virtualopensystems.com> wrote:
>> > +struct kvm_device_address {
>> > + __u32 id;
>> > + __u64 addr;
>> > +};
>>
>> Ben suggested that this should either be a 64 bit id or have explicit
>> padding. Other than that I think that our current proposed ABI for
>> ARM irqchips is in line with the discussion we just had at KVM Forum
>> for handling non-x86 in-kernel irqchips [hopefully somebody will
>> write the details of that up...]
>>
>> Ben, do I have that right?
>
> I believe it is :-)
>
good, I'll rev the id to a 64 bit field for the next series (coming shortly)
^ permalink raw reply
* [PATCH 02/10] arm: at91: move platfarm_data to include/linux/platform_data/atmel.h
From: Dmitry Torokhov @ 2012-11-10 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <509A5219.2080408@pengutronix.de>
On Wed, Nov 07, 2012 at 01:20:41PM +0100, Marc Kleine-Budde wrote:
> On 11/07/2012 12:22 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> > Cc: linux-ide at vger.kernel.org
> > Cc: linux-input at vger.kernel.org
> > Cc: linux-mmc at vger.kernel.org
> > Cc: linux-can at vger.kernel.org
> > Cc: netdev at vger.kernel.org
> > Cc: linux-pcmcia at lists.infradead.org
> > Cc: rtc-linux at googlegroups.com
> > Cc: spi-devel-general at lists.sourceforge.net
> > Cc: linux-serial at vger.kernel.org
> > Cc: linux-usb at vger.kernel.org
> > Cc: linux-fbdev at vger.kernel.org
> > ---
> > HI all,
> >
> > If it's ok with everyone this will go via at91
> > with the patch serie than clean up the include/mach
>
> Fine with me.
>
> > For preparation to switch to arm multiarch kernel
>
> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> (for the CAN related changes)
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
for input piece.
--
Dmitry
^ permalink raw reply
* [PATCH 02/10] arm: at91: move platfarm_data to include/linux/platform_data/atmel.h
From: Joachim Eastwood @ 2012-11-10 10:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352287374-25176-2-git-send-email-plagnioj@jcrosoft.com>
Hi Jean-Christophe,
On 7 November 2012 12:22, Jean-Christophe PLAGNIOL-VILLARD
<plagnioj@jcrosoft.com> wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: linux-ide at vger.kernel.org
> Cc: linux-input at vger.kernel.org
> Cc: linux-mmc at vger.kernel.org
> Cc: linux-can at vger.kernel.org
> Cc: netdev at vger.kernel.org
> Cc: linux-pcmcia at lists.infradead.org
> Cc: rtc-linux at googlegroups.com
> Cc: spi-devel-general at lists.sourceforge.net
> Cc: linux-serial at vger.kernel.org
> Cc: linux-usb at vger.kernel.org
> Cc: linux-fbdev at vger.kernel.org
> ---
> HI all,
>
> If it's ok with everyone this will go via at91
> with the patch serie than clean up the include/mach
>
> For preparation to switch to arm multiarch kernel
>
> Best Regards,
> J.
> arch/arm/mach-at91/include/mach/board.h | 55 ----------------------
> arch/avr32/mach-at32ap/include/mach/board.h | 7 ---
> drivers/ata/pata_at91.c | 2 +-
> drivers/input/touchscreen/atmel_tsadcc.c | 2 +-
> drivers/mmc/host/atmel-mci.c | 2 +-
> drivers/net/can/at91_can.c | 3 +-
> drivers/net/ethernet/cadence/at91_ether.c | 2 +-
> drivers/pcmcia/at91_cf.c | 2 +-
> drivers/rtc/rtc-at91sam9.c | 2 +-
> drivers/spi/spi-atmel.c | 2 +-
> drivers/tty/serial/atmel_serial.c | 2 +-
> drivers/usb/gadget/at91_udc.c | 2 +-
> drivers/usb/gadget/atmel_usba_udc.c | 2 +-
> drivers/usb/host/ohci-at91.c | 2 +-
> drivers/video/atmel_lcdfb.c | 2 +-
> include/linux/platform_data/atmel.h | 67 +++++++++++++++++++++++++++
> 16 files changed, 80 insertions(+), 76 deletions(-)
<snip>
> diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c
> index 4e980a7..35fc6edb 100644
> --- a/drivers/net/ethernet/cadence/at91_ether.c
> +++ b/drivers/net/ethernet/cadence/at91_ether.c
> @@ -31,6 +31,7 @@
> #include <linux/clk.h>
> #include <linux/gfp.h>
> #include <linux/phy.h>
> +#include <linux/platform_data/atmel.h>
>
> #include <asm/io.h>
> #include <asm/uaccess.h>
> @@ -38,7 +39,6 @@
>
> #include <mach/at91rm9200_emac.h>
> #include <asm/gpio.h>
> -#include <mach/board.h>
>
> #include "at91_ether.h"
The at91_ether driver in net-next does not need to be change since it
all mach includes has already been removed by other patches and it
includes linux/platform_data/macb.h directly.
What tree was these patches based on?
The at91_ether driver changes has been in linux-next for a long while now.
regards
Joachim Eastwood
^ permalink raw reply
* [PATCH v2 00/17] ARM: Patchset for CLPS711X
From: Alexander Shiyan @ 2012-11-10 10:58 UTC (permalink / raw)
To: linux-arm-kernel
Here is a next small patchset for a CLPS711X-target.
The main direction of this patchset - approaching the platform to the
possibility of using configurations with multiple platforms in a single
kernel. Added support of the majority of the necessary kernel symbol.
Also part of the driver code used only for the platform was moved to the
board code and converted to the use of standard drivers.
Alexander Shiyan (17):
ARM: clps711x: Load serial driver from boards
ARM: clps711x: Using platform_driver for ethernet device
ARM: clps711x: p720t: Using "leds-gpio" driver for LED control
ARM: clps711x: Transform clps711x-framebuffer to platform driver and
use it
ARM: clps711x: p720t: Unneeded inclusion of head-sa1100.S removed
ARM: clps711x: Always select AUTO_ZRELADDR for a platform
ARM: clps711x: cdb89712: Special driver for handling memory is
removed
ARM: clps711x: Implement usage "SPARSE_IRQ" kernel option for a
platform
ARM: clps711x: Implement usage "MULTI_IRQ_HANDLER" kernel option for
a platform
ARM: clps711x: Add FIQ interrupt handling
ARM: clps711x: Unused empty "ACK" calls for IRQ-chips removed
ARM: clps711x: autcpu12: Special driver for handling NAND memory is
removed
ARM: clps711x: Moving power management of framebuffer driver to the
board
ARM: clps711x: p720t: Special driver for handling NAND memory is
removed
ARM: clps711x: Rename board files to match functionality
ARM: clps711x: Update defconfig due latest changes and new kernel
symbols
MAINTAINERS: Add ARM CLPS711X entry
MAINTAINERS | 6 +
arch/arm/Kconfig | 3 +
arch/arm/boot/compressed/Makefile | 5 -
arch/arm/configs/clps711x_defconfig | 30 ++-
arch/arm/mach-clps711x/Kconfig | 2 -
arch/arm/mach-clps711x/Makefile | 12 +-
arch/arm/mach-clps711x/Makefile.boot | 1 -
arch/arm/mach-clps711x/autcpu12.c | 83 ------
arch/arm/mach-clps711x/board-autcpu12.c | 179 +++++++++++++
arch/arm/mach-clps711x/board-cdb89712.c | 148 +++++++++++
.../mach-clps711x/{clep7312.c => board-clep7312.c} | 9 +-
.../mach-clps711x/{edb7211.c => board-edb7211.c} | 66 ++++-
.../mach-clps711x/{fortunet.c => board-fortunet.c} | 9 +
arch/arm/mach-clps711x/{p720t.c => board-p720t.c} | 147 +++++++----
arch/arm/mach-clps711x/cdb89712.c | 63 -----
arch/arm/mach-clps711x/common.c | 86 ++++++-
arch/arm/mach-clps711x/common.h | 7 +-
arch/arm/mach-clps711x/include/mach/autcpu12.h | 13 -
arch/arm/mach-clps711x/include/mach/clps711x.h | 24 ++
arch/arm/mach-clps711x/include/mach/entry-macro.S | 51 ----
arch/arm/mach-clps711x/include/mach/hardware.h | 15 +-
arch/arm/mach-clps711x/include/mach/irqs.h | 46 ----
drivers/mtd/maps/Kconfig | 7 -
drivers/mtd/maps/Makefile | 1 -
drivers/mtd/maps/cdb89712.c | 278 --------------------
drivers/mtd/nand/Kconfig | 13 -
drivers/mtd/nand/Makefile | 2 -
drivers/mtd/nand/autcpu12.c | 237 -----------------
drivers/mtd/nand/spia.c | 176 -------------
drivers/tty/serial/clps711x.c | 16 --
drivers/video/clps711xfb.c | 65 ++---
31 files changed, 666 insertions(+), 1134 deletions(-)
delete mode 100644 arch/arm/mach-clps711x/autcpu12.c
create mode 100644 arch/arm/mach-clps711x/board-autcpu12.c
create mode 100644 arch/arm/mach-clps711x/board-cdb89712.c
rename arch/arm/mach-clps711x/{clep7312.c => board-clep7312.c} (85%)
rename arch/arm/mach-clps711x/{edb7211.c => board-edb7211.c} (57%)
rename arch/arm/mach-clps711x/{fortunet.c => board-fortunet.c} (89%)
rename arch/arm/mach-clps711x/{p720t.c => board-p720t.c} (53%)
delete mode 100644 arch/arm/mach-clps711x/cdb89712.c
delete mode 100644 arch/arm/mach-clps711x/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-clps711x/include/mach/irqs.h
delete mode 100644 drivers/mtd/maps/cdb89712.c
delete mode 100644 drivers/mtd/nand/autcpu12.c
delete mode 100644 drivers/mtd/nand/spia.c
--
1.7.8.6
^ permalink raw reply
* [PATCH v2 01/17] ARM: clps711x: Load serial driver from boards
From: Alexander Shiyan @ 2012-11-10 10:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352545136-29089-1-git-send-email-shc_work@mail.ru>
Currently serial driver for CLPS711X is autoloaded if it compiled in kernel.
Since we may have multiple platforms into single kernel we should avoid
this. This patch removes this trick and adds registration of serial driver
into board support code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-clps711x/autcpu12.c | 4 ++--
arch/arm/mach-clps711x/cdb89712.c | 7 +++++++
arch/arm/mach-clps711x/clep7312.c | 7 ++++++-
arch/arm/mach-clps711x/edb7211.c | 9 ++++++++-
arch/arm/mach-clps711x/fortunet.c | 7 +++++++
arch/arm/mach-clps711x/p720t.c | 9 ++++++++-
drivers/tty/serial/clps711x.c | 16 ----------------
7 files changed, 38 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 214547b..15c658e 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -68,16 +68,16 @@ static struct platform_device autcpu12_nvram_pdev __initdata = {
static void __init autcpu12_init(void)
{
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
platform_device_register(&autcpu12_nvram_pdev);
}
MACHINE_START(AUTCPU12, "autronix autcpu12")
/* Maintainer: Thomas Gleixner */
.atag_offset = 0x20000,
- .init_machine = autcpu12_init,
.map_io = autcpu12_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .init_machine = autcpu12_init,
.restart = clps711x_restart,
MACHINE_END
-
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index d90d25c..af10b52 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -23,6 +23,7 @@
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/io.h>
+#include <linux/platform_device.h>
#include <mach/hardware.h>
#include <asm/pgtable.h>
@@ -53,11 +54,17 @@ static void __init cdb89712_map_io(void)
iotable_init(cdb89712_io_desc, ARRAY_SIZE(cdb89712_io_desc));
}
+static void __init cdb89712_init(void)
+{
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+}
+
MACHINE_START(CDB89712, "Cirrus-CDB89712")
/* Maintainer: Ray Lehtiniemi */
.atag_offset = 0x100,
.map_io = cdb89712_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .init_machine = cdb89712_init,
.restart = clps711x_restart,
MACHINE_END
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index dbc7842..39718f8 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -18,6 +18,7 @@
#include <linux/init.h>
#include <linux/types.h>
#include <linux/string.h>
+#include <linux/platform_device.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@@ -33,6 +34,10 @@ fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi)
mi->bank[0].size = 0x01000000;
}
+static void __init clep7312_init(void)
+{
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+}
MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
/* Maintainer: Nobody */
@@ -41,6 +46,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
.map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .init_machine = clep7312_init,
.restart = clps711x_restart,
MACHINE_END
-
diff --git a/arch/arm/mach-clps711x/edb7211.c b/arch/arm/mach-clps711x/edb7211.c
index 88f4690..87073d8 100644
--- a/arch/arm/mach-clps711x/edb7211.c
+++ b/arch/arm/mach-clps711x/edb7211.c
@@ -10,6 +10,7 @@
#include <linux/init.h>
#include <linux/memblock.h>
#include <linux/types.h>
+#include <linux/platform_device.h>
#include <asm/setup.h>
#include <asm/mach/map.h>
@@ -76,13 +77,19 @@ fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
mi->nr_banks = 2;
}
+static void __init edb7211_init(void)
+{
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+}
+
MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
/* Maintainer: Jon McClintock */
.atag_offset = VIDEORAM_SIZE + 0x100,
.fixup = fixup_edb7211,
- .map_io = edb7211_map_io,
.reserve = edb7211_reserve,
+ .map_io = edb7211_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .init_machine = edb7211_init,
.restart = clps711x_restart,
MACHINE_END
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index 3a3f0b7..16db051 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -22,6 +22,7 @@
#include <linux/types.h>
#include <linux/init.h>
#include <linux/initrd.h>
+#include <linux/platform_device.h>
#include <mach/hardware.h>
#include <asm/setup.h>
@@ -72,11 +73,17 @@ fortunet_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
*mi = memmap;
}
+static void __init fortunet_init(void)
+{
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+}
+
MACHINE_START(FORTUNET, "ARM-FortuNet")
/* Maintainer: FortuNet Inc. */
.fixup = fortunet_fixup,
.map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .init_machine = fortunet_init,
.restart = clps711x_restart,
MACHINE_END
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index dd89950..2e3995a 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -25,6 +25,7 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/leds.h>
+#include <linux/platform_device.h>
#include <mach/hardware.h>
#include <asm/pgtable.h>
@@ -161,13 +162,19 @@ static int __init p720t_leds_init(void)
fs_initcall(p720t_leds_init);
#endif
+static void __init p720t_init(void)
+{
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+}
+
MACHINE_START(P720T, "ARM-Prospector720T")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.atag_offset = 0x100,
.fixup = fixup_p720t,
- .init_early = p720t_init_early,
.map_io = p720t_map_io,
+ .init_early = p720t_init_early,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .init_machine = p720t_init,
.restart = clps711x_restart,
MACHINE_END
diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
index a0a6db5..06f0e91 100644
--- a/drivers/tty/serial/clps711x.c
+++ b/drivers/tty/serial/clps711x.c
@@ -516,22 +516,6 @@ static struct platform_driver clps711x_uart_driver = {
};
module_platform_driver(clps711x_uart_driver);
-static struct platform_device clps711x_uart_device = {
- .name = UART_CLPS711X_NAME,
-};
-
-static int __init uart_clps711x_init(void)
-{
- return platform_device_register(&clps711x_uart_device);
-}
-module_init(uart_clps711x_init);
-
-static void __exit uart_clps711x_exit(void)
-{
- platform_device_unregister(&clps711x_uart_device);
-}
-module_exit(uart_clps711x_exit);
-
MODULE_AUTHOR("Deep Blue Solutions Ltd");
MODULE_DESCRIPTION("CLPS711X serial driver");
MODULE_LICENSE("GPL");
--
1.7.8.6
^ permalink raw reply related
* [PATCH v2 02/17] ARM: clps711x: Using platform_driver for ethernet device
From: Alexander Shiyan @ 2012-11-10 10:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352545136-29089-1-git-send-email-shc_work@mail.ru>
This patch removes static mappings for ethernet devices. Now we will use
platform_driver for ethernet devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-clps711x/Kconfig | 2 -
arch/arm/mach-clps711x/autcpu12.c | 25 ++++++++------------
arch/arm/mach-clps711x/cdb89712.c | 28 ++++++++---------------
arch/arm/mach-clps711x/edb7211.c | 19 +++++++++++-----
arch/arm/mach-clps711x/include/mach/autcpu12.h | 3 --
arch/arm/mach-clps711x/include/mach/hardware.h | 11 ---------
6 files changed, 33 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index 263242d..2d00165 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -10,7 +10,6 @@ config ARCH_AUTCPU12
config ARCH_CDB89712
bool "CDB89712"
- select ISA
help
This is an evaluation board from Cirrus for the CS89712 processor.
The board includes 2 serial ports, Ethernet, IRDA, and expansion
@@ -25,7 +24,6 @@ config ARCH_EDB7211
bool "EDB7211"
select ARCH_SELECT_MEMORY_MODEL
select ARCH_SPARSEMEM_ENABLE
- select ISA
help
Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
evaluation board.
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 15c658e..345fd4b 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -24,6 +24,7 @@
#include <linux/mm.h>
#include <linux/io.h>
#include <linux/ioport.h>
+#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <mach/hardware.h>
@@ -39,21 +40,13 @@
#include "common.h"
-static struct map_desc autcpu12_io_desc[] __initdata = {
- /* Memory-mapped extra io and CS8900A Ethernet chip */
- {
- .virtual = IO_ADDRESS(AUTCPU12_PHYS_CS8900A),
- .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE
- }
-};
+#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define AUTCPU12_CS8900_IRQ (IRQ_EINT3)
-void __init autcpu12_map_io(void)
-{
- clps711x_map_io();
- iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc));
-}
+static struct resource autcpu12_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ),
+};
static struct resource autcpu12_nvram_resource[] __initdata = {
DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
@@ -69,13 +62,15 @@ static struct platform_device autcpu12_nvram_pdev __initdata = {
static void __init autcpu12_init(void)
{
platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+ platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
+ ARRAY_SIZE(autcpu12_cs8900_resource));
platform_device_register(&autcpu12_nvram_pdev);
}
MACHINE_START(AUTCPU12, "autronix autcpu12")
/* Maintainer: Thomas Gleixner */
.atag_offset = 0x20000,
- .map_io = autcpu12_map_io,
+ .map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
.init_machine = autcpu12_init,
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index af10b52..0be3465 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -23,6 +23,7 @@
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/io.h>
+#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <mach/hardware.h>
@@ -35,34 +36,25 @@
#include "common.h"
-/*
- * Map the CS89712 Ethernet port. That should be moved to the
- * ethernet driver, perhaps.
- */
-static struct map_desc cdb89712_io_desc[] __initdata = {
- {
- .virtual = IO_ADDRESS(ETHER_PHYS_BASE),
- .pfn = __phys_to_pfn(ETHER_PHYS_BASE),
- .length = ETHER_SIZE,
- .type = MT_DEVICE
- }
-};
+#define CDB89712_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define CDB89712_CS8900_IRQ (IRQ_EINT3)
-static void __init cdb89712_map_io(void)
-{
- clps711x_map_io();
- iotable_init(cdb89712_io_desc, ARRAY_SIZE(cdb89712_io_desc));
-}
+static struct resource cdb89712_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(CDB89712_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(CDB89712_CS8900_IRQ),
+};
static void __init cdb89712_init(void)
{
platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+ platform_device_register_simple("cs89x0", 0, cdb89712_cs8900_resource,
+ ARRAY_SIZE(cdb89712_cs8900_resource));
}
MACHINE_START(CDB89712, "Cirrus-CDB89712")
/* Maintainer: Ray Lehtiniemi */
.atag_offset = 0x100,
- .map_io = cdb89712_map_io,
+ .map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
.init_machine = cdb89712_init,
diff --git a/arch/arm/mach-clps711x/edb7211.c b/arch/arm/mach-clps711x/edb7211.c
index 87073d8..87d848a 100644
--- a/arch/arm/mach-clps711x/edb7211.c
+++ b/arch/arm/mach-clps711x/edb7211.c
@@ -10,6 +10,7 @@
#include <linux/init.h>
#include <linux/memblock.h>
#include <linux/types.h>
+#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/setup.h>
@@ -21,7 +22,15 @@
#include "common.h"
-#define VIDEORAM_SIZE SZ_128K
+#define VIDEORAM_SIZE SZ_128K
+
+#define EDB7211_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define EDB7211_CS8900_IRQ (IRQ_EINT3)
+
+static struct resource edb7211_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(EDB7211_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(EDB7211_CS8900_IRQ),
+};
static struct map_desc edb7211_io_desc[] __initdata = {
{ /* Memory-mapped extra keyboard row */
@@ -29,11 +38,6 @@ static struct map_desc edb7211_io_desc[] __initdata = {
.pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
.length = SZ_1M,
.type = MT_DEVICE,
- }, { /* CS8900A Ethernet chip */
- .virtual = IO_ADDRESS(EP7211_PHYS_CS8900A),
- .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE,
}, { /* Flash bank 0 */
.virtual = IO_ADDRESS(EP7211_PHYS_FLASH1),
.pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
@@ -80,6 +84,9 @@ fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
static void __init edb7211_init(void)
{
platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+
+ platform_device_register_simple("cs89x0", 0, edb7211_cs8900_resource,
+ ARRAY_SIZE(edb7211_cs8900_resource));
}
MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index f95ce6f..b077abd 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -20,9 +20,6 @@
#ifndef __ASM_ARCH_AUTCPU12_H
#define __ASM_ARCH_AUTCPU12_H
-/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
-#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE
-
/*
* The flash bank is wired to chip select 0
*/
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 0a3df25..bd919e7 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -64,22 +64,11 @@
#define CS7_PHYS_BASE (0x00000000)
#endif
-#if defined (CONFIG_ARCH_CDB89712)
-
-#define ETHER_PHYS_BASE CS2_PHYS_BASE
-#define ETHER_SIZE 0x1000
-
-#endif
-
-
#if defined (CONFIG_ARCH_EDB7211)
/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE
-/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
-#define EP7211_PHYS_CS8900A CS2_PHYS_BASE
-
/* The two flash banks are wired to chip selects 0 and 1 */
#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE
#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE
--
1.7.8.6
^ permalink raw reply related
* [PATCH v2 03/17] ARM: clps711x: p720t: Using "leds-gpio" driver for LED control
From: Alexander Shiyan @ 2012-11-10 10:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352545136-29089-1-git-send-email-shc_work@mail.ru>
Instead of manually create LED class device, we will use "leds-gpio"
driver for LED control
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-clps711x/common.h | 3 +
arch/arm/mach-clps711x/p720t.c | 79 ++++++++++++--------------------------
2 files changed, 28 insertions(+), 54 deletions(-)
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index fc0f065..83cfece 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -4,6 +4,9 @@
* Common bits.
*/
+#define CLPS711X_NR_GPIO (4 * 8 + 3)
+#define CLPS711X_GPIO(port,bit) ((port) * 8 + (bit))
+
struct sys_timer;
extern void clps711x_map_io(void);
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 2e3995a..b87952a 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -39,6 +39,8 @@
#include "common.h"
+#define GPIO_USERLED CLPS711X_GPIO(3, 0)
+
/*
* Map the P720T system PLD. It occupies two address spaces:
* 0x10000000 and 0x10400000. We map both regions as one.
@@ -104,67 +106,35 @@ static void __init p720t_init_early(void)
}
}
-/*
- * LED controled by CPLD
- */
-#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
-static void p720t_led_set(struct led_classdev *cdev,
- enum led_brightness b)
-{
- u8 reg = clps_readb(PDDR);
-
- if (b != LED_OFF)
- reg |= 0x1;
- else
- reg &= ~0x1;
-
- clps_writeb(reg, PDDR);
-}
+static struct gpio_led p720t_gpio_leds[] = {
+ {
+ .name = "User LED",
+ .default_trigger = "heartbeat",
+ .gpio = GPIO_USERLED,
+ },
+};
-static enum led_brightness p720t_led_get(struct led_classdev *cdev)
-{
- u8 reg = clps_readb(PDDR);
+static struct gpio_led_platform_data p720t_gpio_led_pdata = {
+ .leds = p720t_gpio_leds,
+ .num_leds = ARRAY_SIZE(p720t_gpio_leds),
+};
- return (reg & 0x1) ? LED_FULL : LED_OFF;
-}
+static struct platform_device p720t_gpio_led_pdev = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &p720t_gpio_led_pdata,
+ },
+};
-static int __init p720t_leds_init(void)
+static void __init p720t_init(void)
{
-
- struct led_classdev *cdev;
- int ret;
-
- if (!machine_is_p720t())
- return -ENODEV;
-
- cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
- if (!cdev)
- return -ENOMEM;
-
- cdev->name = "p720t:0";
- cdev->brightness_set = p720t_led_set;
- cdev->brightness_get = p720t_led_get;
- cdev->default_trigger = "heartbeat";
-
- ret = led_classdev_register(NULL, cdev);
- if (ret < 0) {
- kfree(cdev);
- return ret;
- }
-
- return 0;
+ platform_device_register_simple("uart-clps711x", 0, NULL, 0);
}
-/*
- * Since we may have triggers on any subsystem, defer registration
- * until after subsystem_init.
- */
-fs_initcall(p720t_leds_init);
-#endif
-
-static void __init p720t_init(void)
+static void __init p720t_init_late(void)
{
- platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+ platform_device_register(&p720t_gpio_led_pdev);
}
MACHINE_START(P720T, "ARM-Prospector720T")
@@ -176,5 +146,6 @@ MACHINE_START(P720T, "ARM-Prospector720T")
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
.init_machine = p720t_init,
+ .init_late = p720t_init_late,
.restart = clps711x_restart,
MACHINE_END
--
1.7.8.6
^ permalink raw reply related
* [PATCH v2 04/17] ARM: clps711x: Transform clps711x-framebuffer to platform driver and use it
From: Alexander Shiyan @ 2012-11-10 10:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352545136-29089-1-git-send-email-shc_work@mail.ru>
clps711x-framebuffer driver needs to be updated and this is a first step
to make it better. With this patch we are convert clps711x-framebuffer to
platform device and load this driver from board code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-clps711x/autcpu12.c | 1 +
arch/arm/mach-clps711x/edb7211.c | 2 ++
arch/arm/mach-clps711x/p720t.c | 2 ++
drivers/video/clps711xfb.c | 21 +++++++++++++++------
4 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 345fd4b..46bbb1d 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -62,6 +62,7 @@ static struct platform_device autcpu12_nvram_pdev __initdata = {
static void __init autcpu12_init(void)
{
platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
ARRAY_SIZE(autcpu12_cs8900_resource));
platform_device_register(&autcpu12_nvram_pdev);
diff --git a/arch/arm/mach-clps711x/edb7211.c b/arch/arm/mach-clps711x/edb7211.c
index 87d848a..65d0668 100644
--- a/arch/arm/mach-clps711x/edb7211.c
+++ b/arch/arm/mach-clps711x/edb7211.c
@@ -85,6 +85,8 @@ static void __init edb7211_init(void)
{
platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+
platform_device_register_simple("cs89x0", 0, edb7211_cs8900_resource,
ARRAY_SIZE(edb7211_cs8900_resource));
}
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index b87952a..2f46b63 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -130,6 +130,8 @@ static struct platform_device p720t_gpio_led_pdev = {
static void __init p720t_init(void)
{
platform_device_register_simple("uart-clps711x", 0, NULL, 0);
+
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
}
static void __init p720t_init_late(void)
diff --git a/drivers/video/clps711xfb.c b/drivers/video/clps711xfb.c
index f994c8b..2ccbb9b 100644
--- a/drivers/video/clps711xfb.c
+++ b/drivers/video/clps711xfb.c
@@ -270,7 +270,7 @@ static const struct file_operations backlight_proc_fops = {
.write = backlight_proc_write,
};
-static void __init clps711x_guess_lcd_params(struct fb_info *info)
+static void __devinit clps711x_guess_lcd_params(struct fb_info *info)
{
unsigned int lcdcon, syscon, size;
unsigned long phys_base = PAGE_OFFSET;
@@ -358,7 +358,7 @@ static void __init clps711x_guess_lcd_params(struct fb_info *info)
info->fix.type = FB_TYPE_PACKED_PIXELS;
}
-int __init clps711xfb_init(void)
+static int __devinit clps711x_fb_probe(struct platform_device *pdev)
{
int err = -ENOMEM;
@@ -410,7 +410,7 @@ int __init clps711xfb_init(void)
out: return err;
}
-static void __exit clps711xfb_exit(void)
+static int __devexit clps711x_fb_remove(struct platform_device *pdev)
{
unregister_framebuffer(cfb);
kfree(cfb);
@@ -422,11 +422,20 @@ static void __exit clps711xfb_exit(void)
PLD_LCDEN = 0;
PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
}
+
+ return 0;
}
-module_init(clps711xfb_init);
-module_exit(clps711xfb_exit);
+static struct platform_driver clps711x_fb_driver = {
+ .driver = {
+ .name = "video-clps711x",
+ .owner = THIS_MODULE,
+ },
+ .probe = clps711x_fb_probe,
+ .remove = __devexit_p(clps711x_fb_remove),
+};
+module_platform_driver(clps711x_fb_driver);
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
-MODULE_DESCRIPTION("CLPS711x framebuffer driver");
+MODULE_DESCRIPTION("CLPS711X framebuffer driver");
MODULE_LICENSE("GPL");
--
1.7.8.6
^ permalink raw reply related
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