* [PATCH] irq: Add new flag to ack level-triggered interrupts before unmasking
From: Carlo Caione @ 2014-02-06 21:11 UTC (permalink / raw)
To: linux-arm-kernel
Several irqchip drivers require the level-triggered interrupt to be
acked before unmasking to avoid that a second interrupt is immediately
triggered. This small patch introduces a new irqchip flags that is used
to ack the IRQ line before it is unmasked.
Signed-off-by: Carlo Caione <carlo@caione.org>
---
include/linux/irq.h | 2 ++
kernel/irq/chip.c | 10 ++++++++++
kernel/irq/internals.h | 1 +
kernel/irq/manage.c | 2 +-
4 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 7dc1003..2cbe8d1 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -349,6 +349,7 @@ struct irq_chip {
* IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks
* when irq enabled
* IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
+ * IRQCHIP_ACK_ON_UNMASK: Ack level interrupts right before unmask
*/
enum {
IRQCHIP_SET_TYPE_MASKED = (1 << 0),
@@ -357,6 +358,7 @@ enum {
IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
IRQCHIP_SKIP_SET_WAKE = (1 << 4),
IRQCHIP_ONESHOT_SAFE = (1 << 5),
+ IRQCHIP_ACK_ON_UNMASK = (1 << 6),
};
/* This include will go away once we isolated irq_desc usage to core code */
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index dc04c16..9d2d2e2 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -265,6 +265,16 @@ static inline void mask_ack_irq(struct irq_desc *desc)
irq_state_set_masked(desc);
}
+void ack_unmask_irq(struct irq_desc *desc)
+{
+ if ((desc->irq_data.chip->flags & IRQCHIP_ACK_ON_UNMASK) &&
+ (irqd_get_trigger_type(&desc->irq_data) & IRQ_TYPE_LEVEL_MASK) &&
+ desc->irq_data.chip->irq_ack)
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
+
+ unmask_irq(desc);
+}
+
void mask_irq(struct irq_desc *desc)
{
if (desc->irq_data.chip->irq_mask) {
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index 001fa5b..06ff850 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -73,6 +73,7 @@ extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu);
extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu);
extern void mask_irq(struct irq_desc *desc);
extern void unmask_irq(struct irq_desc *desc);
+extern void ack_unmask_irq(struct irq_desc *desc);
extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 481a13c..39505d8 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -718,7 +718,7 @@ again:
if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
irqd_irq_masked(&desc->irq_data))
- unmask_irq(desc);
+ ack_unmask_irq(desc);
out_unlock:
raw_spin_unlock_irq(&desc->lock);
--
1.8.5.3
^ permalink raw reply related
* [PATCH] irq: Add new flag to ack level-triggered interrupts before unmasking
From: Thomas Gleixner @ 2014-02-06 21:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391721117-27446-1-git-send-email-carlo@caione.org>
On Thu, 6 Feb 2014, Carlo Caione wrote:
> Several irqchip drivers require the level-triggered interrupt to be
> acked before unmasking to avoid that a second interrupt is immediately
> triggered. This small patch introduces a new irqchip flags that is used
> to ack the IRQ line before it is unmasked.
And why are you not doing this in the unmask function of the affected
chip in the first place?
Thanks,
tglx
^ permalink raw reply
* [linux-sunxi] Re: [PATCH] irq: Add new flag to ack level-triggered interrupts before unmasking
From: Carlo Caione @ 2014-02-06 21:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.02.1402062213590.21991@ionos.tec.linutronix.de>
On Thu, Feb 6, 2014 at 10:14 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Thu, 6 Feb 2014, Carlo Caione wrote:
>
>> Several irqchip drivers require the level-triggered interrupt to be
>> acked before unmasking to avoid that a second interrupt is immediately
>> triggered. This small patch introduces a new irqchip flags that is used
>> to ack the IRQ line before it is unmasked.
>
> And why are you not doing this in the unmask function of the affected
> chip in the first place?
Because this is a common behavior of several irqchips (sunxi NMI
controller, exynos, etc...) so I think it should be useful to have it
in the core instead of replicating the same code structure in all the
irqchip drivers.
Thanks,
--
Carlo Caione
^ permalink raw reply
* [PATCH 0/2] Add Ether DT support for R8A7790/Lager reference board
From: Sergei Shtylyov @ 2014-02-06 21:54 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-v3.14-rc1-20140206v2' tag. Here we add the Ether device tree
support working on the R8A7790/Lager reference board. The patchset requires the
'sh_eth' driver device tree support posted earlier in order to work.
[1/2] ARM: shmobile: r8a7790: add Ether DT support
[2/2] ARM: shmobile: lager: add Ether DT support
WBR, Sergei
^ permalink raw reply
* [linux-sunxi] Re: [PATCH] irq: Add new flag to ack level-triggered interrupts before unmasking
From: Thomas Gleixner @ 2014-02-06 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOQ7t2Z0agZdDZ_OQZPtXWXoi5NMTcOOZz04q6wEVNy0rxn4AA@mail.gmail.com>
On Thu, 6 Feb 2014, Carlo Caione wrote:
> On Thu, Feb 6, 2014 at 10:14 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
> > On Thu, 6 Feb 2014, Carlo Caione wrote:
> >
> >> Several irqchip drivers require the level-triggered interrupt to be
> >> acked before unmasking to avoid that a second interrupt is immediately
> >> triggered. This small patch introduces a new irqchip flags that is used
> >> to ack the IRQ line before it is unmasked.
> >
> > And why are you not doing this in the unmask function of the affected
> > chip in the first place?
>
> Because this is a common behavior of several irqchips (sunxi NMI
> controller, exynos, etc...) so I think it should be useful to have it
> in the core instead of replicating the same code structure in all the
> irqchip drivers.
I'm all for making stuff generic, but you introduce this gem
+void ack_unmask_irq(struct irq_desc *desc)
+{
+ if ((desc->irq_data.chip->flags & IRQCHIP_ACK_ON_UNMASK) &&
+ (irqd_get_trigger_type(&desc->irq_data) & IRQ_TYPE_LEVEL_MASK) &&
+ desc->irq_data.chip->irq_ack)
This is totally backwards.
1) If level and edge are handled differently then you should provide
different chips.
2) If a chip has IRQCHIP_ACK_ON_UNMASK set, then it better provides an
irq_ack callback.
So why do you need this complex conditional?
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
+
+ unmask_irq(desc);
+}
Now the even more confusing part is a single call site in
irq_finalize_oneshot()
if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
irqd_irq_masked(&desc->irq_data))
- unmask_irq(desc);
+ ack_unmask_irq(desc);
But you completely fail to explain the rationale.
- Why is this only an issue for the threaded irq case?
- Why are other sites where interrupts are masked/unmasked not
affected?
IOW, why is the handle_level_irq() logic for a non threaded
interrupt different from the threaded case?
In the non threaded case we do:
interrupt();
mask_ack();
handle_irq();
unmask();
reti();
In the threaded case:
interrupt();
mask_ack();
wake_thread();
reti();
run_thread();
handle_irq();
unmask();
The difference between those scenarios is:
1) The timing is different
2) In the threaded case we return from the exception with the irq
line masked and reenable it later after the threaded handler has
run.
Do you have any sensible explanation for that requirement to ack
before unmask while you already acked on mask? And why this is only an
issue in the threaded case?
What's the context of the problem you are trying to solve?
Thanks,
tglx
^ permalink raw reply
* [PATCH 1/2] ARM: shmobile: r8a7790: add Ether DT support
From: Sergei Shtylyov @ 2014-02-06 21:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201402070054.39989.sergei.shtylyov@cogentembedded.com>
Define the generic R8A7790 part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm/boot/dts/r8a7790.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
Index: renesas/arch/arm/boot/dts/r8a7790.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7790.dtsi
+++ renesas/arch/arm/boot/dts/r8a7790.dtsi
@@ -1,7 +1,8 @@
/*
* Device Tree Source for the r8a7790 SoC
*
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -400,6 +401,18 @@
status = "disabled";
};
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7790";
+ reg = <0 0xee700000 0 0x400>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
sata0: sata at ee300000 {
compatible = "renesas,sata-r8a7790";
reg = <0 0xee300000 0 0x2000>;
^ permalink raw reply
* [PATCH 2/2] ARM: shmobile: lager: add Ether DT support
From: Sergei Shtylyov @ 2014-02-06 21:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201402070054.39989.sergei.shtylyov@cogentembedded.com>
Define the Lager board dependent part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm/boot/dts/r8a7790-lager.dts | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
Index: renesas/arch/arm/boot/dts/r8a7790-lager.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7790-lager.dts
+++ renesas/arch/arm/boot/dts/r8a7790-lager.dts
@@ -1,7 +1,8 @@
/*
* Device Tree Source for the Lager board
*
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -76,12 +77,40 @@
renesas,function = "scif1";
};
+ ether_pins: ether {
+ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+ renesas,function = "eth";
+ };
+
+ phy1_pins: phy1 {
+ renesas,groups = "intc_irq0";
+ renesas,function = "intc";
+ };
+
mmc1_pins: mmc1 {
renesas,groups = "mmc1_data8", "mmc1_ctrl";
renesas,function = "mmc1";
};
};
+ðer {
+ pinctrl-0 = <ðer_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&phy1>;
+ renesas,ether-link-active-low;
+ status = "ok";
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ interrupt-parent = <&irqc0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-0 = <&phy1_pins>;
+ pinctrl-names = "default";
+ };
+};
+
&mmcif1 {
pinctrl-0 = <&mmc1_pins>;
pinctrl-names = "default";
^ permalink raw reply
* [PATCH v2 1/5] drivers: of: add initialization code for reserved memory
From: Laura Abbott @ 2014-02-06 22:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391515773-6112-2-git-send-email-m.szyprowski@samsung.com>
Hi,
On 2/4/2014 4:09 AM, Marek Szyprowski wrote:
...
> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> index efd05102c405..ed9660adad77 100644
> --- a/drivers/of/Makefile
> +++ b/drivers/of/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_MDIO) += of_mdio.o
> obj-$(CONFIG_OF_PCI) += of_pci.o
> obj-$(CONFIG_OF_PCI_IRQ) += of_pci_irq.o
> obj-$(CONFIG_OF_MTD) += of_mtd.o
> +obj-$(CONFIG_OF_RESERVED_MEM) += of_reserved_mem.o
> diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c
> new file mode 100644
> index 000000000000..f17cd56e68d9
> --- /dev/null
> +++ b/drivers/of/of_reserved_mem.c
> @@ -0,0 +1,219 @@
> +/*
> + * Device tree based initialization code for reserved memory.
> + *
> + * Copyright (c) 2013, The Linux Foundation. All Rights Reserved.
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + * Author: Marek Szyprowski <m.szyprowski@samsung.com>
> + * Author: Josh Cartwright <joshc@codeaurora.org>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License or (at your optional) any later version of the license.
> + */
> +#include <linux/memblock.h>
> +#include <linux/err.h>
> +#include <linux/of.h>
> +#include <linux/of_fdt.h>
> +#include <linux/of_platform.h>
> +#include <linux/mm.h>
> +#include <linux/sizes.h>
> +#include <linux/of_reserved_mem.h>
> +
> +#define MAX_RESERVED_REGIONS 16
Make this a config option?
> +static struct reserved_mem reserved_mem[MAX_RESERVED_REGIONS];
> +static int reserved_mem_count;
> +
> +int __init of_parse_flat_dt_reg(unsigned long node, const char *uname,
> + phys_addr_t *base, phys_addr_t *size)
> +{
> + unsigned long len;
> + __be32 *prop;
> +
> + prop = of_get_flat_dt_prop(node, "reg", &len);
> + if (!prop)
> + return -EINVAL;
> +
> + if (len < (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32)) {
> + pr_err("Reserved memory: invalid reg property in '%s' node.\n",
> + uname);
> + return -EINVAL;
> + }
> +
> + *base = dt_mem_next_cell(dt_root_addr_cells, &prop);
> + *size = dt_mem_next_cell(dt_root_size_cells, &prop);
> + return 0;
> +}
> +
> +int __init of_parse_flat_dt_size(unsigned long node, const char *uname,
> + phys_addr_t *size)
> +{
> + unsigned long len;
> + __be32 *prop;
> +
> + prop = of_get_flat_dt_prop(node, "size", &len);
> + if (!prop)
> + return -EINVAL;
> +
> + if (len < dt_root_size_cells * sizeof(__be32)) {
> + pr_err("Reserved memory: invalid size property in '%s' node.\n",
> + uname);
> + return -EINVAL;
> + }
> +
> + *size = dt_mem_next_cell(dt_root_size_cells, &prop);
> + return 0;
> +}
> +
> +static int __init rmem_default_early_setup(struct reserved_mem *rmem,
> + unsigned long node,
> + const char *uname)
> +{
> + int err;
> +
> + if (of_get_flat_dt_prop(node, "compatible", NULL))
> + return -EINVAL;
> +
> + err = of_parse_flat_dt_reg(node, uname, &rmem->base, &rmem->size);
> + if (err)
> + return err;
> +
> + if (of_get_flat_dt_prop(node, "no-map", NULL))
> + err = memblock_remove(rmem->base, rmem->size);
> + else
> + err = memblock_reserve(rmem->base, rmem->size);
> +
The CMA code aligns to pageblock size, do we need to do something
similar here as well? With reserved it might not be much of an issue but
we've hit issues before with non-pageblock aligned memblock_removed
memory because the page structures are not initialized.
> + if (err == 0)
> + pr_info("Reserved memory: found '%s', memory base %pa, size %ld MiB\n",
> + uname, &rmem->base, (unsigned long)rmem->size / SZ_1M);
> +
> + return err;
> +}
> +
> +static const struct of_device_id rmem_default_id
> + __used __section(__reservedmem_of_table_end) = {
> + .data = rmem_default_early_setup,
> +};
> +
> +static int __init fdt_scan_reserved_mem(unsigned long node, const char *uname,
> + int depth, void *data)
> +{
> + struct reserved_mem *rmem = &reserved_mem[reserved_mem_count];
> + extern const struct of_device_id __reservedmem_of_table[];
> + const struct of_device_id *id;
> + const char *status;
> +
> + if (reserved_mem_count == ARRAY_SIZE(reserved_mem)) {
> + pr_err("Reserved memory: not enough space all defined regions.\n");
> + return -ENOSPC;
> + }
> +
> + status = of_get_flat_dt_prop(node, "status", NULL);
> + if (status && strcmp(status, "okay") != 0)
> + return 0;
> +
strncmp(status, "ok", 2) to handle alternate spellings
>
Thanks,
Laura
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply
* [PATCH 0/2] Add Ether DT support for R8A7791/Koelsch reference board
From: Sergei Shtylyov @ 2014-02-06 22:10 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-v3.14-rc1-20140206v2' tag. Here we add the Ether device tree
support working on the R8A7791/Koelsch reference board. The patchset requires
the 'sh_eth' driver device tree support posted earlier in order to work.
[1/2] ARM: shmobile: r8a7791: add Ether DT support
[2/2] ARM: shmobile: koelsch: add Ether DT support
WBR, Sergei
^ permalink raw reply
* [PATCH 1/2] ARM: shmobile: r8a7791: add Ether DT support
From: Sergei Shtylyov @ 2014-02-06 22:12 UTC (permalink / raw)
To: linux-arm-kernel
Define the generic R8A7791 part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm/boot/dts/r8a7791.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
Index: renesas/arch/arm/boot/dts/r8a7791.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7791.dtsi
+++ renesas/arch/arm/boot/dts/r8a7791.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for the r8a7791 SoC
*
* Copyright (C) 2013 Renesas Electronics Corporation
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -366,6 +367,18 @@
status = "disabled";
};
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7791";
+ reg = <0 0xee700000 0 0x400>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7791_CLK_ETHER>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
sata0: sata at ee300000 {
compatible = "renesas,sata-r8a7791";
reg = <0 0xee300000 0 0x2000>;
^ permalink raw reply
* [PATCH 2/2] ARM: shmobile: koelsch: add Ether DT support
From: Sergei Shtylyov @ 2014-02-06 22:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201402070110.18561.sergei.shtylyov@cogentembedded.com>
Define the Koelsch board dependent part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
Index: renesas/arch/arm/boot/dts/r8a7791-koelsch.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ renesas/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -2,7 +2,8 @@
* Device Tree Source for the Koelsch board
*
* Copyright (C) 2013 Renesas Electronics Corporation
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -122,12 +123,40 @@
renesas,function = "scif1";
};
+ ether_pins: ether {
+ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+ renesas,function = "eth";
+ };
+
+ phy1_pins: phy1 {
+ renesas,groups = "intc_irq0";
+ renesas,function = "intc";
+ };
+
qspi_pins: spi {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
};
+ðer {
+ pinctrl-0 = <ðer_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&phy1>;
+ renesas,ether-link-active-low;
+ status = "ok";
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ interrupt-parent = <&irqc0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-0 = <&phy1_pins>;
+ pinctrl-names = "default";
+ };
+};
+
&sata0 {
status = "okay";
};
^ permalink raw reply
* [PATCH] clk: samsung: Initialize clock table with error pointers
From: Sylwester Nawrocki @ 2014-02-06 22:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391711591-19416-1-git-send-email-t.figa@samsung.com>
On 02/06/2014 07:33 PM, Tomasz Figa wrote:
> Before this patch, the driver was simply zeroing the clock table, which
> is incorrect, because invalid clock numbers returned NULL instead of
> error pointers. This patch fixes this by changing the driver to
> initialize the array with PTR_ERR(-ENOENT).
>
> Signed-off-by: Tomasz Figa<t.figa@samsung.com>
> Acked-by: Kyungmin Park<kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
^ permalink raw reply
* [PATCH resend] ARM: dts: imx6qdl-wandboard: use GPIO_6 for FEC interrupt
From: Sascha Silbe @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
Apply the same work-around for i.MX 6D/Q erratum 006687 as used for
Sabre Lite for the Wandboard Dual / Quad.
Like on the Sabre Lite, GPIO6 is used as a power down output for
camera expansion boards. However, these expansion boards do not work
with mainline yet anyway.
Tested on a Wandboard Quad. Before the patch:
root at arm:~# ping -q -f -c 10000 192.168.2.1
PING 192.168.2.1 (192.168.2.1) 56(84) bytes of data.
--- 192.168.2.1 ping statistics ---
10000 packets transmitted, 10000 received, 0% packet loss, time 97363ms
rtt min/avg/max/mdev = 0.290/9.586/10.198/1.432 ms, pipe 2, ipg/ewma 9.737/9.672 ms
After the patch:
root at arm:~# ping -q -f -c 10000 192.168.2.1
PING 192.168.2.1 (192.168.2.1) 56(84) bytes of data.
--- 192.168.2.1 ping statistics ---
10000 packets transmitted, 10000 received, 0% packet loss, time 4810ms
rtt min/avg/max/mdev = 0.246/0.355/0.863/0.044 ms, ipg/ewma 0.481/0.319 ms
Signed-off-by: Sascha Silbe <x-linux@infra-silbe.de>
---
Resend after fixing up sendemail.envelopesender.
arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index d050888..4d82878 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -123,6 +123,7 @@
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+ MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
@@ -201,6 +202,8 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 29 0>;
+ interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};
--
1.8.4.3
^ permalink raw reply related
* [PATCH v3 0/5] Split mach-msm into legacy and mach-qcom (multiplatform)
From: Kumar Gala @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
This is the splits the Qualcomm MSM platform into legacy support that we will
not try and convert to multiplatform and multiplatform support.
- k
Changes from v2:
* Dropped ARCH_MSM depends from CLKSRC_QCOM, since we select it
* Fixed some grammar/typo's in commit messages
* kept smp ops code in platsmp.c to match what other mach's do
* Kept mach-qcom/Kconfig sorted alphabetically
Changes from v1:
* Added patch to remove hotplug.c
* Added patch to rename msm_ to qcom_
* Changes the Kconfig to drop CPU_V7
* used wfi() in cpu_die function
* Added git tree to MAINTAINERS file
Kumar Gala (5):
ARM: msm: kill off hotplug.c
clocksource: qcom: Move clocksource code out of mach-msm
ARM: qcom: Split Qualcomm support into legacy and multiplatform
clocksource: qcom: split building of legacy vs multiplatform support
ARM: qcom: Rename various msm prefixed functions to qcom
arch/arm/mach-msm/board-dt.c | 41 ----
arch/arm/mach-msm/hotplug.c | 51 -----
arch/arm/mach-msm/platsmp.c | 130 --------------
arch/arm/mach-msm/scm-boot.c | 39 ----
arch/arm/mach-msm/scm-boot.h | 22 --
arch/arm/mach-msm/scm.c | 299 ---------------------------------
arch/arm/mach-msm/scm.h | 25 --
arch/arm/mach-msm/timer.c | 333 -------------------------------------
b/MAINTAINERS | 8
b/arch/arm/Kconfig | 7
b/arch/arm/Kconfig.debug | 2
b/arch/arm/Makefile | 1
b/arch/arm/boot/dts/Makefile | 6
b/arch/arm/mach-msm/Kconfig | 54 ------
b/arch/arm/mach-msm/Makefile | 8
b/arch/arm/mach-msm/common.h | 1
b/arch/arm/mach-qcom/Kconfig | 33 +++
b/arch/arm/mach-qcom/Makefile | 5
b/arch/arm/mach-qcom/board.c | 40 ++++
b/arch/arm/mach-qcom/platsmp.c | 137 +++++++++++++++
b/arch/arm/mach-qcom/scm-boot.c | 39 ++++
b/arch/arm/mach-qcom/scm-boot.h | 22 ++
b/arch/arm/mach-qcom/scm.c | 299 +++++++++++++++++++++++++++++++++
b/arch/arm/mach-qcom/scm.h | 25 ++
b/drivers/clocksource/Kconfig | 3
b/drivers/clocksource/Makefile | 1
b/drivers/clocksource/qcom-timer.c | 330 ++++++++++++++++++++++++++++++++++++
27 files changed, 956 insertions(+), 1005 deletions(-)
^ permalink raw reply
* [PATCH v3 1/5] ARM: msm: kill off hotplug.c
From: Kumar Gala @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391725484-6673-1-git-send-email-galak@codeaurora.org>
Right now hotplug.c only really implements msm_cpu_die as a wfi. Just
move that implementation into platsmp.c. At the same time we use the
existing wfi() instead of inline asm.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
arch/arm/mach-msm/Makefile | 1 -
arch/arm/mach-msm/common.h | 1 -
arch/arm/mach-msm/hotplug.c | 51 ---------------------------------------------
arch/arm/mach-msm/platsmp.c | 7 +++++++
4 files changed, 7 insertions(+), 53 deletions(-)
delete mode 100644 arch/arm/mach-msm/hotplug.c
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 721f27f..8327f60 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
-obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h
index 33c7725..0a4899b 100644
--- a/arch/arm/mach-msm/common.h
+++ b/arch/arm/mach-msm/common.h
@@ -24,7 +24,6 @@ extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
unsigned int mtype, void *caller);
extern struct smp_operations msm_smp_ops;
-extern void msm_cpu_die(unsigned int cpu);
struct msm_mmc_platform_data;
diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c
deleted file mode 100644
index cea80fc..0000000
--- a/arch/arm/mach-msm/hotplug.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (C) 2002 ARM Ltd.
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/smp.h>
-
-#include <asm/smp_plat.h>
-
-#include "common.h"
-
-static inline void cpu_enter_lowpower(void)
-{
-}
-
-static inline void cpu_leave_lowpower(void)
-{
-}
-
-static inline void platform_do_lowpower(unsigned int cpu)
-{
- asm("wfi"
- :
- :
- : "memory", "cc");
-}
-
-/*
- * platform-specific code to shutdown a CPU
- *
- * Called with IRQs disabled
- */
-void __ref msm_cpu_die(unsigned int cpu)
-{
- /*
- * we're ready for shutdown now, so do it
- */
- cpu_enter_lowpower();
- platform_do_lowpower(cpu);
-
- /*
- * bring this CPU back into the world of cache
- * coherency, and then restore interrupts
- */
- cpu_leave_lowpower();
-}
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 3721b31..251a91e 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -29,6 +29,13 @@ extern void secondary_startup(void);
static DEFINE_SPINLOCK(boot_lock);
+#ifdef CONFIG_HOTPLUG_CPU
+static void __ref msm_cpu_die(unsigned int cpu)
+{
+ wfi();
+}
+#endif
+
static inline int get_core_count(void)
{
/* 1 + the PART[1:0] field of MIDR */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related
* [PATCH v3 2/5] clocksource: qcom: Move clocksource code out of mach-msm
From: Kumar Gala @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391725484-6673-1-git-send-email-galak@codeaurora.org>
We intend to share the clocksource code for MSM platforms between legacy
and multiplatform supported qcom SoCs.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
arch/arm/mach-msm/Kconfig | 13 +++++--------
arch/arm/mach-msm/Makefile | 1 -
drivers/clocksource/Kconfig | 3 +++
drivers/clocksource/Makefile | 1 +
.../mach-msm/timer.c => drivers/clocksource/qcom-timer.c | 6 +-----
5 files changed, 10 insertions(+), 14 deletions(-)
rename arch/arm/mach-msm/timer.c => drivers/clocksource/qcom-timer.c (98%)
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 9625cf3..3c4eca7 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -21,7 +21,7 @@ config ARCH_MSM8X60
select CPU_V7
select HAVE_SMP
select MSM_SCM if SMP
- select MSM_TIMER
+ select CLKSRC_QCOM
config ARCH_MSM8960
bool "Enable support for MSM8960"
@@ -29,7 +29,7 @@ config ARCH_MSM8960
select CPU_V7
select HAVE_SMP
select MSM_SCM if SMP
- select MSM_TIMER
+ select CLKSRC_QCOM
config ARCH_MSM8974
bool "Enable support for MSM8974"
@@ -54,7 +54,7 @@ config ARCH_MSM7X00A
select MACH_TROUT if !MACH_HALIBUT
select MSM_PROC_COMM
select MSM_SMD
- select MSM_TIMER
+ select CLKSRC_QCOM
select MSM_SMD_PKG3
config ARCH_MSM7X30
@@ -66,7 +66,7 @@ config ARCH_MSM7X30
select MSM_GPIOMUX
select MSM_PROC_COMM
select MSM_SMD
- select MSM_TIMER
+ select CLKSRC_QCOM
select MSM_VIC
config ARCH_QSD8X50
@@ -78,7 +78,7 @@ config ARCH_QSD8X50
select MSM_GPIOMUX
select MSM_PROC_COMM
select MSM_SMD
- select MSM_TIMER
+ select CLKSRC_QCOM
select MSM_VIC
endchoice
@@ -153,7 +153,4 @@ config MSM_GPIOMUX
config MSM_SCM
bool
-config MSM_TIMER
- bool
-
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 8327f60..04b1bee 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -1,4 +1,3 @@
-obj-$(CONFIG_MSM_TIMER) += timer.o
obj-$(CONFIG_MSM_PROC_COMM) += clock.o
obj-$(CONFIG_MSM_VIC) += irq-vic.o
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index cd6950f..6510ec4 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -140,3 +140,6 @@ config VF_PIT_TIMER
bool
help
Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
+
+config CLKSRC_QCOM
+ bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index c7ca50a..2e0c0cc 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o
obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o
obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o
obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
+obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/arch/arm/mach-msm/timer.c b/drivers/clocksource/qcom-timer.c
similarity index 98%
rename from arch/arm/mach-msm/timer.c
rename to drivers/clocksource/qcom-timer.c
index fd16449..dca829e 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/drivers/clocksource/qcom-timer.c
@@ -1,7 +1,7 @@
/*
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2012,2014, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -26,10 +26,6 @@
#include <linux/of_irq.h>
#include <linux/sched_clock.h>
-#include <asm/mach/time.h>
-
-#include "common.h"
-
#define TIMER_MATCH_VAL 0x0000
#define TIMER_COUNT_VAL 0x0004
#define TIMER_ENABLE 0x0008
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related
* [PATCH v3 3/5] ARM: qcom: Split Qualcomm support into legacy and multiplatform
From: Kumar Gala @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391725484-6673-1-git-send-email-galak@codeaurora.org>
Introduce a new mach-qcom that will support SoCs that intend to be
multiplatform compatible while keeping mach-msm to legacy SoC/board
support that will not transition over to multiplatform.
As part of this, we move support for MSM8X60, MSM8960 and MSM8974 over
to mach-qcom.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
MAINTAINERS | 8 ++++
arch/arm/Kconfig | 7 ++--
arch/arm/Kconfig.debug | 2 +-
arch/arm/Makefile | 1 +
arch/arm/boot/dts/Makefile | 6 +--
arch/arm/mach-msm/Kconfig | 45 +---------------------
arch/arm/mach-msm/Makefile | 6 ---
arch/arm/mach-qcom/Kconfig | 33 ++++++++++++++++
arch/arm/mach-qcom/Makefile | 5 +++
.../arm/{mach-msm/board-dt.c => mach-qcom/board.c} | 13 +++----
arch/arm/{mach-msm => mach-qcom}/platsmp.c | 2 +-
arch/arm/{mach-msm => mach-qcom}/scm-boot.c | 0
arch/arm/{mach-msm => mach-qcom}/scm-boot.h | 0
arch/arm/{mach-msm => mach-qcom}/scm.c | 0
arch/arm/{mach-msm => mach-qcom}/scm.h | 0
15 files changed, 64 insertions(+), 64 deletions(-)
create mode 100644 arch/arm/mach-qcom/Kconfig
create mode 100644 arch/arm/mach-qcom/Makefile
rename arch/arm/{mach-msm/board-dt.c => mach-qcom/board.c} (71%)
rename arch/arm/{mach-msm => mach-qcom}/platsmp.c (98%)
rename arch/arm/{mach-msm => mach-qcom}/scm-boot.c (100%)
rename arch/arm/{mach-msm => mach-qcom}/scm-boot.h (100%)
rename arch/arm/{mach-msm => mach-qcom}/scm.c (100%)
rename arch/arm/{mach-msm => mach-qcom}/scm.h (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index b2cf5cf..402be60 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1167,6 +1167,14 @@ L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
W: http://www.arm.linux.org.uk/
S: Maintained
+ARM/QUALCOMM SUPPORT
+M: Kumar Gala <galak@codeaurora.org>
+M: David Brown <davidb@codeaurora.org>
+L: linux-arm-msm at vger.kernel.org
+S: Maintained
+F: arch/arm/mach-qcom/
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
+
ARM/RADISYS ENP2611 MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e254198..f093f20 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -657,9 +657,8 @@ config ARCH_PXA
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
-config ARCH_MSM_NODT
- bool "Qualcomm MSM"
- select ARCH_MSM
+config ARCH_MSM
+ bool "Qualcomm MSM (non-multiplatform)"
select ARCH_REQUIRE_GPIOLIB
select COMMON_CLK
select GENERIC_CLOCKEVENTS
@@ -1005,6 +1004,8 @@ source "arch/arm/plat-pxa/Kconfig"
source "arch/arm/mach-mmp/Kconfig"
+source "arch/arm/mach-qcom/Kconfig"
+
source "arch/arm/mach-realview/Kconfig"
source "arch/arm/mach-rockchip/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 0531da8..4491c7b 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -956,7 +956,7 @@ config DEBUG_STI_UART
config DEBUG_MSM_UART
bool
- depends on ARCH_MSM
+ depends on ARCH_MSM || ARCH_QCOM
config DEBUG_LL_INCLUDE
string
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 08a9ef5..51e5bed 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_PXA) += pxa
+machine-$(CONFIG_ARCH_QCOM) += qcom
machine-$(CONFIG_ARCH_REALVIEW) += realview
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
machine-$(CONFIG_ARCH_RPC) += rpc
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b..c9eaf1f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -118,9 +118,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
kirkwood-ts219-6282.dtb
dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
-dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
- qcom-msm8960-cdp.dtb \
- qcom-apq8074-dragonboard.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-mirabox.dtb \
armada-370-netgear-rn102.dtb \
@@ -232,6 +229,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
dra7-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
+ qcom-msm8960-cdp.dtb \
+ qcom-apq8074-dragonboard.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 3c4eca7..a7f959e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1,50 +1,9 @@
-config ARCH_MSM
- bool
-
-config ARCH_MSM_DT
- bool "Qualcomm MSM DT Support" if ARCH_MULTI_V7
- select ARCH_MSM
- select ARCH_REQUIRE_GPIOLIB
- select CLKSRC_OF
- select GENERIC_CLOCKEVENTS
- help
- Support for Qualcomm's devicetree based MSM systems.
-
if ARCH_MSM
-menu "Qualcomm MSM SoC Selection"
- depends on ARCH_MSM_DT
-
-config ARCH_MSM8X60
- bool "Enable support for MSM8X60"
- select ARM_GIC
- select CPU_V7
- select HAVE_SMP
- select MSM_SCM if SMP
- select CLKSRC_QCOM
-
-config ARCH_MSM8960
- bool "Enable support for MSM8960"
- select ARM_GIC
- select CPU_V7
- select HAVE_SMP
- select MSM_SCM if SMP
- select CLKSRC_QCOM
-
-config ARCH_MSM8974
- bool "Enable support for MSM8974"
- select ARM_GIC
- select CPU_V7
- select HAVE_ARM_ARCH_TIMER
- select HAVE_SMP
- select MSM_SCM if SMP
-
-endmenu
-
choice
prompt "Qualcomm MSM SoC Type"
default ARCH_MSM7X00A
- depends on ARCH_MSM_NODT
+ depends on ARCH_MSM
config ARCH_MSM7X00A
bool "MSM7x00A / MSM7x01A"
@@ -99,7 +58,7 @@ config MSM_VIC
bool
menu "Qualcomm MSM Board Type"
- depends on ARCH_MSM_NODT
+ depends on ARCH_MSM
config MACH_HALIBUT
depends on ARCH_MSM
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 04b1bee..27c078a 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -13,17 +13,11 @@ obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o
obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
obj-$(CONFIG_MSM_SMD) += last_radio_log.o
-obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
-
-CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
-
-obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o
obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o
obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
-obj-$(CONFIG_ARCH_MSM_DT) += board-dt.o
obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig
new file mode 100644
index 0000000..a028be2
--- /dev/null
+++ b/arch/arm/mach-qcom/Kconfig
@@ -0,0 +1,33 @@
+config ARCH_QCOM
+ bool "Qualcomm Support" if ARCH_MULTI_V7
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_GIC
+ select CLKSRC_OF
+ select GENERIC_CLOCKEVENTS
+ select HAVE_SMP
+ select QCOM_SCM if SMP
+ help
+ Support for Qualcomm's devicetree based systems.
+
+if ARCH_QCOM
+
+menu "Qualcomm SoC Selection"
+
+config ARCH_MSM8X60
+ bool "Enable support for MSM8X60"
+ select CLKSRC_QCOM
+
+config ARCH_MSM8960
+ bool "Enable support for MSM8960"
+ select CLKSRC_QCOM
+
+config ARCH_MSM8974
+ bool "Enable support for MSM8974"
+ select HAVE_ARM_ARCH_TIMER
+
+endmenu
+
+config QCOM_SCM
+ bool
+
+endif
diff --git a/arch/arm/mach-qcom/Makefile b/arch/arm/mach-qcom/Makefile
new file mode 100644
index 0000000..8f756ae
--- /dev/null
+++ b/arch/arm/mach-qcom/Makefile
@@ -0,0 +1,5 @@
+obj-y := board.o
+obj-$(CONFIG_SMP) += platsmp.o
+obj-$(CONFIG_QCOM_SCM) += scm.o scm-boot.o
+
+CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-qcom/board.c
similarity index 71%
rename from arch/arm/mach-msm/board-dt.c
rename to arch/arm/mach-qcom/board.c
index 1f11d93..4529f6b 100644
--- a/arch/arm/mach-msm/board-dt.c
+++ b/arch/arm/mach-qcom/board.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2012,2013 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,10 +17,9 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include "common.h"
+extern struct smp_operations msm_smp_ops;
-static const char * const msm_dt_match[] __initconst = {
- "qcom,msm8660-fluid",
+static const char * const qcom_dt_match[] __initconst = {
"qcom,msm8660-surf",
"qcom,msm8960-cdp",
NULL
@@ -31,11 +30,11 @@ static const char * const apq8074_dt_match[] __initconst = {
NULL
};
-DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
+DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
- .dt_compat = msm_dt_match,
+ .dt_compat = qcom_dt_match,
MACHINE_END
-DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
+DT_MACHINE_START(APQ_DT, "Qualcomm (Flattened Device Tree)")
.dt_compat = apq8074_dt_match,
MACHINE_END
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-qcom/platsmp.c
similarity index 98%
rename from arch/arm/mach-msm/platsmp.c
rename to arch/arm/mach-qcom/platsmp.c
index 251a91e..67823a7 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-qcom/platsmp.c
@@ -2,6 +2,7 @@
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2014 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -19,7 +20,6 @@
#include <asm/smp_plat.h>
#include "scm-boot.h"
-#include "common.h"
#define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0
#define SCSS_CPU1CORE_RESET 0xD80
diff --git a/arch/arm/mach-msm/scm-boot.c b/arch/arm/mach-qcom/scm-boot.c
similarity index 100%
rename from arch/arm/mach-msm/scm-boot.c
rename to arch/arm/mach-qcom/scm-boot.c
diff --git a/arch/arm/mach-msm/scm-boot.h b/arch/arm/mach-qcom/scm-boot.h
similarity index 100%
rename from arch/arm/mach-msm/scm-boot.h
rename to arch/arm/mach-qcom/scm-boot.h
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-qcom/scm.c
similarity index 100%
rename from arch/arm/mach-msm/scm.c
rename to arch/arm/mach-qcom/scm.c
diff --git a/arch/arm/mach-msm/scm.h b/arch/arm/mach-qcom/scm.h
similarity index 100%
rename from arch/arm/mach-msm/scm.h
rename to arch/arm/mach-qcom/scm.h
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related
* [PATCH v3 4/5] clocksource: qcom: split building of legacy vs multiplatform support
From: Kumar Gala @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391725484-6673-1-git-send-email-galak@codeaurora.org>
The majority of the clocksource code for the Qualcomm platform is shared
between newer (multiplatform) and older platforms. However there is a bit
of code that isn't, so only build it for the appropriate config.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
drivers/clocksource/qcom-timer.c | 23 ++++++++++++-----------
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c
index dca829e..e807acf 100644
--- a/drivers/clocksource/qcom-timer.c
+++ b/drivers/clocksource/qcom-timer.c
@@ -106,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
return readl_relaxed(source_base + TIMER_COUNT_VAL);
}
-static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
-{
- /*
- * Shift timer count down by a constant due to unreliable lower bits
- * on some targets.
- */
- return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
-}
-
static struct clocksource msm_clocksource = {
.name = "dg_timer",
.rating = 300,
@@ -228,7 +219,7 @@ err:
sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
}
-#ifdef CONFIG_OF
+#ifdef CONFIG_ARCH_QCOM
static void __init msm_dt_timer_init(struct device_node *np)
{
u32 freq;
@@ -281,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np)
}
CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
-#endif
+#else
static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
u32 sts)
@@ -301,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
return 0;
}
+static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
+{
+ /*
+ * Shift timer count down by a constant due to unreliable lower bits
+ * on some targets.
+ */
+ return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
+}
+
void __init msm7x01_timer_init(void)
{
struct clocksource *cs = &msm_clocksource;
@@ -327,3 +327,4 @@ void __init qsd8x50_timer_init(void)
return;
msm_timer_init(19200000 / 4, 32, 7, false);
}
+#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related
* [PATCH v3 5/5] ARM: qcom: Rename various msm prefixed functions to qcom
From: Kumar Gala @ 2014-02-06 22:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391725484-6673-1-git-send-email-galak@codeaurora.org>
As mach-qcom will support a number of different Qualcomm SoC platforms
we replace the msm prefix on function names with qcom to be a bit more
generic.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
arch/arm/mach-qcom/board.c | 4 ++--
arch/arm/mach-qcom/platsmp.c | 22 +++++++++++-----------
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c
index 4529f6b..830f69c 100644
--- a/arch/arm/mach-qcom/board.c
+++ b/arch/arm/mach-qcom/board.c
@@ -17,7 +17,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-extern struct smp_operations msm_smp_ops;
+extern struct smp_operations qcom_smp_ops;
static const char * const qcom_dt_match[] __initconst = {
"qcom,msm8660-surf",
@@ -31,7 +31,7 @@ static const char * const apq8074_dt_match[] __initconst = {
};
DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)")
- .smp = smp_ops(msm_smp_ops),
+ .smp = smp_ops(qcom_smp_ops),
.dt_compat = qcom_dt_match,
MACHINE_END
diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c
index 67823a7..9c53ea7 100644
--- a/arch/arm/mach-qcom/platsmp.c
+++ b/arch/arm/mach-qcom/platsmp.c
@@ -30,7 +30,7 @@ extern void secondary_startup(void);
static DEFINE_SPINLOCK(boot_lock);
#ifdef CONFIG_HOTPLUG_CPU
-static void __ref msm_cpu_die(unsigned int cpu)
+static void __ref qcom_cpu_die(unsigned int cpu)
{
wfi();
}
@@ -42,7 +42,7 @@ static inline int get_core_count(void)
return ((read_cpuid_id() >> 4) & 3) + 1;
}
-static void msm_secondary_init(unsigned int cpu)
+static void qcom_secondary_init(unsigned int cpu)
{
/*
* Synchronise with the boot thread.
@@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned int cpu)
"address\n");
}
-static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
static int cold_boot_done;
@@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
* does not support the ARM SCU, so just set the possible cpu mask to
* NR_CPUS.
*/
-static void __init msm_smp_init_cpus(void)
+static void __init qcom_smp_init_cpus(void)
{
unsigned int i, ncores = get_core_count();
@@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(void)
set_cpu_possible(i, true);
}
-static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
+static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)
{
}
-struct smp_operations msm_smp_ops __initdata = {
- .smp_init_cpus = msm_smp_init_cpus,
- .smp_prepare_cpus = msm_smp_prepare_cpus,
- .smp_secondary_init = msm_secondary_init,
- .smp_boot_secondary = msm_boot_secondary,
+struct smp_operations qcom_smp_ops __initdata = {
+ .smp_init_cpus = qcom_smp_init_cpus,
+ .smp_prepare_cpus = qcom_smp_prepare_cpus,
+ .smp_secondary_init = qcom_secondary_init,
+ .smp_boot_secondary = qcom_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
- .cpu_die = msm_cpu_die,
+ .cpu_die = qcom_cpu_die,
#endif
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related
* [GIT PULL] tree-wide: clean up no longer required #include <linux/init.h>
From: Stephen Rothwell @ 2014-02-06 22:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391547118-21967-1-git-send-email-paul.gortmaker@windriver.com>
Hi Linus,
On Tue, 4 Feb 2014 15:51:58 -0500 Paul Gortmaker <paul.gortmaker@windriver.com> wrote:
>
> We've had this in linux-next for 2+ weeks (thanks Stephen!) as a
> linux-stable like queue of patches, and as can be seen here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/paulg/init.git
>
> most of the changes in the last week have been trivial adding acks
> or dropping patches that maintainers decided to take themselves.
Any thoughts on merging this? I can feel it bitrotting :-(
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
-------------- next part --------------
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^ permalink raw reply
* [PATCH 00/21] Move DT kirkwood into mach-mvebu
From: Andrew Lunn @ 2014-02-06 23:41 UTC (permalink / raw)
To: linux-arm-kernel
The process of making most kirkwood boards boot using DT is nearly
complete. We can now move these boards into mach-mvebu, freeing them
of the legacy code needed for none-DT systems. At the same time, they
can become part of ARCH_MULTI_V5.
Andrew Lunn (21):
ARM: Kirkwood: Give pm.c its own header file.
IRQ: Orion: Fix getting generic chip pointer.
ARM: Kirkwood: Convert mv88f6281gtw_ge switch setup to DT
ARM: Kirkwood: Drop printing the SoC type and revision
ARM: Kirkwood: Seperate board-dt from common and pcie code.
ARM: Kirkwood: ioremap the cpu_config register before using it.
ARM: Kirkwood: ioremap memory control register
ARM: MVEBU: Add ARCH_MULTI_V7 to SoCs
ARM: Orion: Move cache-feroceon-l2.h out of plat-orion
ARM: MM: Add DT binding for Feroceon L2 cache
ARM: Fix default CPU selection for ARCH_MULTI_V5
ARM: Fix MULTI_TLB for feroceon
ARM: MM Enable building Feroceon L2 cache controller with ARCH_MVEBU
ARM: Move kirkwood DT boards into mach-mvebu
ARM: MVEBU: Let kirkwood use the system controller for restart
drivers: Enable building of Kirkwood drivers for mach-mvebu
ARM: MVEBU: Enable mvebu-soc-id on Kirkwood
ARM: config: Add a multi_v5_defconfig
ARM: MVEBU: Simplifiy headers and make local
ARM: MVEBU: Remove unneeded headers
ARM: Kirkwood: Remove DT support
.../devicetree/bindings/arm/mrvl/forocean.txt | 19 +++
arch/arm/Kconfig | 2 +-
arch/arm/boot/dts/Makefile | 34 ++--
arch/arm/boot/dts/kirkwood.dtsi | 10 ++
arch/arm/configs/kirkwood_defconfig | 6 -
arch/arm/configs/multi_v5_defconfig | 183 ++++++++++++++++++++
arch/arm/include/asm/hardware/cache-feroceon-l2.h | 13 ++
arch/arm/mach-kirkwood/Kconfig | 25 ---
arch/arm/mach-kirkwood/Makefile | 6 +-
arch/arm/mach-kirkwood/Module.symvers | 0
arch/arm/mach-kirkwood/board-dt.c | 150 ----------------
arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c | 50 ------
arch/arm/mach-kirkwood/common.c | 3 +-
arch/arm/mach-kirkwood/common.h | 13 --
arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 2 +
arch/arm/mach-kirkwood/pm.c | 9 +-
arch/arm/mach-kirkwood/pm.h | 26 +++
arch/arm/mach-mv78xx0/common.c | 2 +-
arch/arm/mach-mvebu/Kconfig | 28 ++-
arch/arm/mach-mvebu/Makefile | 1 +
arch/arm/mach-mvebu/kirkwood-pm.c | 76 +++++++++
arch/arm/mach-mvebu/kirkwood-pm.h | 26 +++
arch/arm/mach-mvebu/kirkwood.c | 189 +++++++++++++++++++++
arch/arm/mach-mvebu/kirkwood.h | 22 +++
arch/arm/mach-mvebu/mvebu-soc-id.c | 1 +
arch/arm/mm/Kconfig | 2 +-
arch/arm/mm/cache-feroceon-l2.c | 48 +++++-
arch/arm/mm/proc-feroceon.S | 2 +-
arch/arm/mm/tlb-v4wbi.S | 3 +
.../plat-orion/include/plat/cache-feroceon-l2.h | 11 --
drivers/cpufreq/Kconfig.arm | 2 +-
drivers/cpuidle/Kconfig.arm | 2 +-
drivers/irqchip/irq-orion.c | 3 +-
drivers/leds/Kconfig | 4 +-
drivers/phy/Kconfig | 2 +-
drivers/thermal/Kconfig | 2 +-
sound/soc/kirkwood/Kconfig | 2 +-
37 files changed, 682 insertions(+), 297 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/mrvl/forocean.txt
create mode 100644 arch/arm/configs/multi_v5_defconfig
create mode 100644 arch/arm/include/asm/hardware/cache-feroceon-l2.h
create mode 100644 arch/arm/mach-kirkwood/Module.symvers
delete mode 100644 arch/arm/mach-kirkwood/board-dt.c
delete mode 100644 arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
create mode 100644 arch/arm/mach-kirkwood/pm.h
create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.c
create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.h
create mode 100644 arch/arm/mach-mvebu/kirkwood.c
create mode 100644 arch/arm/mach-mvebu/kirkwood.h
delete mode 100644 arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
--
1.8.5.3
^ permalink raw reply
* [PATCH 01/21] ARM: Kirkwood: Give pm.c its own header file.
From: Andrew Lunn @ 2014-02-06 23:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
The pm code needs to be seperated from common.h in order to split DT
and non-DT systems apart. Move the declarations into a header file of
its own and include it where needed.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/board-dt.c | 1 +
arch/arm/mach-kirkwood/common.c | 1 +
arch/arm/mach-kirkwood/common.h | 6 ------
arch/arm/mach-kirkwood/pm.h | 26 ++++++++++++++++++++++++++
4 files changed, 28 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/mach-kirkwood/pm.h
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 78188159484d..ceffdc8ffbbd 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -24,6 +24,7 @@
#include <mach/bridge-regs.h>
#include <plat/common.h>
#include "common.h"
+#include "pm.h"
#define MV643XX_ETH_MAC_ADDR_LOW 0x0414
#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3407a5db216..52aca25432a7 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -36,6 +36,7 @@
#include <plat/time.h>
#include <linux/platform_data/dma-mv_xor.h>
#include "common.h"
+#include "pm.h"
/* These can go away once Kirkwood uses the mvebu-mbus DT binding */
#define KIRKWOOD_MBUS_NAND_TARGET 0x01
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 05fd648df543..1296de94febf 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -58,12 +58,6 @@ void kirkwood_cpufreq_init(void);
void kirkwood_restart(enum reboot_mode, const char *);
void kirkwood_clk_init(void);
-#ifdef CONFIG_PM
-void kirkwood_pm_init(void);
-#else
-static inline void kirkwood_pm_init(void) {};
-#endif
-
/* board init functions for boards not fully converted to fdt */
#ifdef CONFIG_MACH_MV88F6281GTW_GE_DT
void mv88f6281gtw_ge_init(void);
diff --git a/arch/arm/mach-kirkwood/pm.h b/arch/arm/mach-kirkwood/pm.h
new file mode 100644
index 000000000000..21e7530f368b
--- /dev/null
+++ b/arch/arm/mach-kirkwood/pm.h
@@ -0,0 +1,26 @@
+/*
+ * Power Management driver for Marvell Kirkwood SoCs
+ *
+ * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com>
+ * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License,
+ * version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_KIRKWOOD_PM_H
+#define __ARCH_KIRKWOOD_PM_H
+
+#ifdef CONFIG_PM
+void kirkwood_pm_init(void);
+#else
+static inline void kirkwood_pm_init(void) {};
+#endif
+
+#endif
--
1.8.5.3
^ permalink raw reply related
* [PATCH 02/21] IRQ: Orion: Fix getting generic chip pointer.
From: Andrew Lunn @ 2014-02-06 23:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/irqchip/irq-orion.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c
index e51d40031884..7d4e189ab4ec 100644
--- a/drivers/irqchip/irq-orion.c
+++ b/drivers/irqchip/irq-orion.c
@@ -111,7 +111,8 @@ IRQCHIP_DECLARE(orion_intc, "marvell,orion-intc", orion_irq_init);
static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc)
{
struct irq_domain *d = irq_get_handler_data(irq);
- struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, irq);
+
+ struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0);
u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) &
gc->mask_cache;
--
1.8.5.3
^ permalink raw reply related
* [PATCH 03/21] ARM: Kirkwood: Convert mv88f6281gtw_ge switch setup to DT
From: Andrew Lunn @ 2014-02-06 23:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
The mv88f6281gtw_ge has a ethernet switch connected to the ethernet
port of the SoC. Convert the platform device instantiationn to a DT
instantiation.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/Kconfig | 7 ----
arch/arm/mach-kirkwood/Makefile | 1 -
arch/arm/mach-kirkwood/Module.symvers | 0
arch/arm/mach-kirkwood/board-dt.c | 3 --
arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c | 50 --------------------------
arch/arm/mach-kirkwood/common.h | 7 ----
6 files changed, 68 deletions(-)
create mode 100644 arch/arm/mach-kirkwood/Module.symvers
delete mode 100644 arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index fe8319ad3158..df4b26340ae4 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -106,13 +106,6 @@ config ARCH_KIRKWOOD_DT
Say 'Y' here if you want your kernel to support the
Marvell Kirkwood using flattened device tree.
-config MACH_MV88F6281GTW_GE_DT
- bool "Marvell 88F6281 GTW GE Board (Flattened Device Tree)"
- depends on ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Marvell 88F6281 GTW GE Board (Flattened Device Tree).
-
endmenu
endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 144b51102939..dc22bf5b21ed 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -13,4 +13,3 @@ obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
-obj-$(CONFIG_MACH_MV88F6281GTW_GE_DT) += board-mv88f6281gtw_ge.o
diff --git a/arch/arm/mach-kirkwood/Module.symvers b/arch/arm/mach-kirkwood/Module.symvers
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index ceffdc8ffbbd..e74b31aa9736 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -131,9 +131,6 @@ static void __init kirkwood_dt_init(void)
kexec_reinit = kirkwood_enable_pcie;
#endif
- if (of_machine_is_compatible("marvell,mv88f6281gtw-ge"))
- mv88f6281gtw_ge_init();
-
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
diff --git a/arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c b/arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
deleted file mode 100644
index ee5eea678c11..000000000000
--- a/arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
- *
- * Marvell 88F6281 GTW GE Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/timer.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/ethtool.h>
-#include <linux/gpio.h>
-#include <net/dsa.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include <mach/kirkwood.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_NONE,
- .speed = SPEED_1000,
- .duplex = DUPLEX_FULL,
-};
-
-static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = {
- .port_names[0] = "lan1",
- .port_names[1] = "lan2",
- .port_names[2] = "lan3",
- .port_names[3] = "lan4",
- .port_names[4] = "wan",
- .port_names[5] = "cpu",
-};
-
-static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = {
- .nr_chips = 1,
- .chip = &mv88f6281gtw_ge_switch_chip_data,
-};
-
-void __init mv88f6281gtw_ge_init(void)
-{
- kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data);
- kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ);
-}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 1296de94febf..832a4e2ab8d7 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -58,13 +58,6 @@ void kirkwood_cpufreq_init(void);
void kirkwood_restart(enum reboot_mode, const char *);
void kirkwood_clk_init(void);
-/* board init functions for boards not fully converted to fdt */
-#ifdef CONFIG_MACH_MV88F6281GTW_GE_DT
-void mv88f6281gtw_ge_init(void);
-#else
-static inline void mv88f6281gtw_ge_init(void) {};
-#endif
-
/* early init functions not converted to fdt yet */
char *kirkwood_id(void);
void kirkwood_l2_init(void);
--
1.8.5.3
^ permalink raw reply related
* [PATCH 04/21] ARM: Kirkwood: Drop printing the SoC type and revision
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
This will be added back using the mach-mvebu equivelent once the move
has been made.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/board-dt.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index e74b31aa9736..a0c0ff39788e 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -107,8 +107,6 @@ eth_fixup_skip:
static void __init kirkwood_dt_init(void)
{
- pr_info("Kirkwood: %s.\n", kirkwood_id());
-
/*
* Disable propagation of mbus errors to the CPU local bus,
* as this causes mbus errors (which can occur for example
--
1.8.5.3
^ permalink raw reply related
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