* [PATCH 08/12] ARM: shmobile: r7s72100 clock: Add RSPI clocks
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r7s72100.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index dd8ce87..ffb0fff 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -22,12 +22,14 @@
#include <mach/common.h>
#include <mach/r7s72100.h>
-/* registers */
+/* Frequency Control Registers */
#define FRQCR 0xfcfe0010
#define FRQCR2 0xfcfe0014
+/* Standby Control Registers */
#define STBCR3 0xfcfe0420
#define STBCR4 0xfcfe0424
#define STBCR9 0xfcfe0438
+#define STBCR10 0xfcfe043c
#define PLL_RATE 30
@@ -145,11 +147,19 @@ struct clk div4_clks[DIV4_NR] = {
| CLK_ENABLE_ON_INIT),
};
-enum { MSTP97, MSTP96, MSTP95, MSTP94,
+enum {
+ MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
+ MSTP97, MSTP96, MSTP95, MSTP94,
MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- MSTP33, MSTP_NR };
+ MSTP33, MSTP_NR
+};
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
+ [MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
+ [MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
+ [MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
+ [MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
@@ -176,6 +186,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
/* MSTP clocks */
+ CLKDEV_DEV_ID("rspi-rz.0", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("rspi-rz.1", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.8.5.2
^ permalink raw reply related
* [PATCH 07/12] ARM: shmobile: r8a7790: add audio clock
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current audio clock doesn't have dependency to device/driver,
but, it is not good design for DT support.
To avoid branch merge conflict issue,
it uses this load map, and this patch is 1) part.
1) add old/new style clock in platform
2) add new style clock method in driver
3) remove old tyle clock from platform
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 23 +++++++++++++++++++++++
arch/arm/mach-shmobile/clock-r8a7790.c | 20 ++++++++++++++++++++
2 files changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 71b1251..67a6d96 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -313,6 +313,29 @@
clock-output-names = "extal";
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency clocks by
+ * default. Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "audio_clk_a";
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "audio_clk_b";
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "audio_clk_c";
+ };
+
/* Special CPG clocks */
cpg_clocks: cpg_clocks at e6150000 {
compatible = "renesas,r8a7790-cpg-clocks",
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 507073e..08a2803 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -91,6 +91,15 @@ static struct clk main_clk = {
.ops = &followparent_clk_ops,
};
+static struct clk audio_clk_a = {
+};
+
+static struct clk audio_clk_b = {
+};
+
+static struct clk audio_clk_c = {
+};
+
/*
* clock ratio of these clock will be updated
* on r8a7790_clock_init()
@@ -124,6 +133,9 @@ SH_FIXED_RATIO_CLK_SET(ddr_clk, pll3_clk, 1, 8);
SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
static struct clk *main_clks[] = {
+ &audio_clk_a,
+ &audio_clk_b,
+ &audio_clk_c,
&extal_clk,
&extal_div2_clk,
&main_clk,
@@ -267,6 +279,10 @@ static struct clk mstp_clks[MSTP_NR] = {
static struct clk_lookup lookups[] = {
/* main clocks */
+ CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
+ CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
+ CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
+ CLKDEV_CON_ID("audio_clk_internal", &m2_clk),
CLKDEV_CON_ID("extal", &extal_clk),
CLKDEV_CON_ID("extal_div2", &extal_div2_clk),
CLKDEV_CON_ID("main", &main_clk),
@@ -357,6 +373,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
+ CLKDEV_ICK_ID("clk_a", "rcar_sound", &audio_clk_a),
+ CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
+ CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
+ CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk),
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
--
1.8.5.2
^ permalink raw reply related
* [PATCH 06/12] ARM: shmobile: r8a7778: add audio clock in new style
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current audio clock doesn't have dependency to device/driver,
but, it is not good design for DT support.
To avoid branch merge conflict issue,
it uses this load map, and this patch is 1) part.
1) add new style clock in platform
2) add new style clock method in driver
3) remove old tyle clock from platform
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r8a7778.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 9783945..2009a9b 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -221,6 +221,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
+ CLKDEV_ICK_ID("clk_a", "rcar_sound", &audio_clk_a),
+ CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
+ CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
+ CLKDEV_ICK_ID("clk_i", "rcar_sound", &s1_clk),
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP011]),
CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP010]),
--
1.8.5.2
^ permalink raw reply related
* [PATCH 05/12] ARM: shmobile: r8a7790 CA15-SCU enablement
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Power on CA15 SCU in case of booting from a CA7 core.
Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
[damm at opensource.se: Converted to use broken out SYSC code]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/smp-r8a7790.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index beb47ae..5910527 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -29,6 +29,11 @@
#define CA7RESCNT 0x0044
#define MERAM 0xe8080000
+static struct rcar_sysc_ch r8a7790_ca15_scu = {
+ .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
+ .isr_bit = 12, /* CA15-SCU */
+};
+
static struct rcar_sysc_ch r8a7790_ca7_scu = {
.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
.isr_bit = 21, /* CA7-SCU */
@@ -64,6 +69,7 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
/* turn on power to SCU */
r8a7790_pm_init();
+ rcar_sysc_power_up(&r8a7790_ca15_scu);
rcar_sysc_power_up(&r8a7790_ca7_scu);
}
--
1.8.5.2
^ permalink raw reply related
* [PATCH 04/12] ARM: shmobile: r8a7790 CA7-SCU enablement
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Power on CA7 SCU in case of booting from a CA15 core.
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
[damm at opensource.se: Converted to use broken out SYSC code]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/smp-r8a7790.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index 015e275..beb47ae 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -19,6 +19,8 @@
#include <linux/io.h>
#include <asm/smp_plat.h>
#include <mach/common.h>
+#include <mach/pm-rcar.h>
+#include <mach/r8a7790.h>
#define RST 0xe6160000
#define CA15BAR 0x0020
@@ -27,6 +29,11 @@
#define CA7RESCNT 0x0044
#define MERAM 0xe8080000
+static struct rcar_sysc_ch r8a7790_ca7_scu = {
+ .chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
+ .isr_bit = 21, /* CA7-SCU */
+};
+
static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
{
void __iomem *p;
@@ -54,6 +61,10 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
p + CA7RESCNT);
iounmap(p);
+
+ /* turn on power to SCU */
+ r8a7790_pm_init();
+ rcar_sysc_power_up(&r8a7790_ca7_scu);
}
struct smp_operations r8a7790_smp_ops __initdata = {
--
1.8.5.2
^ permalink raw reply related
* [PATCH 03/12] ARM: shmobile: r8a7790 SYSC setup code
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Add r8a7790 SYSC power management support.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm at opensource.se: Converted to use broken out SYSC code]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Makefile | 1 +
arch/arm/mach-shmobile/include/mach/r8a7790.h | 1 +
arch/arm/mach-shmobile/pm-r8a7790.c | 45 +++++++++++++++++++++++++++
3 files changed, 47 insertions(+)
create mode 100644 arch/arm/mach-shmobile/pm-r8a7790.c
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 7bc450c..d38a636 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o
+obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
index 2177325..0b95bab 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
@@ -32,6 +32,7 @@ void r8a7790_add_standard_devices(void);
void r8a7790_add_dt_devices(void);
void r8a7790_clock_init(void);
void r8a7790_pinmux_init(void);
+void r8a7790_pm_init(void);
void r8a7790_init_early(void);
extern struct smp_operations r8a7790_smp_ops;
diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c
new file mode 100644
index 0000000..fc82839
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-r8a7790.c
@@ -0,0 +1,45 @@
+/*
+ * r8a7790 Power management support
+ *
+ * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Copyright (C) 2011 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/kernel.h>
+#include <asm/io.h>
+#include <mach/pm-rcar.h>
+#include <mach/r8a7790.h>
+
+/* SYSC */
+#define SYSCIER 0x0c
+#define SYSCIMR 0x10
+
+#if defined(CONFIG_SMP)
+
+static void __init r8a7790_sysc_init(void)
+{
+ void __iomem *base = rcar_sysc_init(0xe6180000);
+
+ /* enable all interrupt sources, but do not use interrupt handler */
+ iowrite32(0x0131000e, base + SYSCIER);
+ iowrite32(0, base + SYSCIMR);
+}
+
+#else /* CONFIG_SMP */
+
+static inline void r8a7790_sysc_init(void) {}
+
+#endif /* CONFIG_SMP */
+
+void __init r8a7790_pm_init(void)
+{
+ static int once;
+
+ if (!once++)
+ r8a7790_sysc_init();
+}
--
1.8.5.2
^ permalink raw reply related
* [PATCH 02/12] ARM: shmobile: Break out R-Car SYSC PM code
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm@opensource.se>
Break out the R-Car SYSC power management code from
the r8a7779 SoC code. With this new shared R-Car SYSC
code base it is possible to hook in Generation 2 SoCs
as well.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Makefile | 2 +-
arch/arm/mach-shmobile/include/mach/pm-rcar.h | 15 +++
arch/arm/mach-shmobile/include/mach/r8a7779.h | 13 +--
arch/arm/mach-shmobile/pm-r8a7779.c | 131 ++----------------------
arch/arm/mach-shmobile/pm-rcar.c | 142 ++++++++++++++++++++++++++
arch/arm/mach-shmobile/smp-r8a7779.c | 17 +--
6 files changed, 177 insertions(+), 143 deletions(-)
create mode 100644 arch/arm/mach-shmobile/include/mach/pm-rcar.h
create mode 100644 arch/arm/mach-shmobile/pm-rcar.c
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index fe7d4ff..7bc450c 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -52,7 +52,7 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
-obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
+obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
diff --git a/arch/arm/mach-shmobile/include/mach/pm-rcar.h b/arch/arm/mach-shmobile/include/mach/pm-rcar.h
new file mode 100644
index 0000000..ef3a1ef
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/pm-rcar.h
@@ -0,0 +1,15 @@
+#ifndef PM_RCAR_H
+#define PM_RCAR_H
+
+struct rcar_sysc_ch {
+ unsigned long chan_offs;
+ unsigned int chan_bit;
+ unsigned int isr_bit;
+};
+
+int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch);
+int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch);
+bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch);
+void __iomem *rcar_sysc_init(phys_addr_t base);
+
+#endif /* PM_RCAR_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
index b40e136..88eecea 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -3,6 +3,7 @@
#include <linux/sh_clk.h>
#include <linux/pm_domain.h>
+#include <mach/pm-rcar.h>
/* HPB-DMA slave IDs */
enum {
@@ -11,18 +12,12 @@ enum {
HPBDMA_SLAVE_SDHI0_RX,
};
-struct r8a7779_pm_ch {
- unsigned long chan_offs;
- unsigned int chan_bit;
- unsigned int isr_bit;
-};
-
struct r8a7779_pm_domain {
struct generic_pm_domain genpd;
- struct r8a7779_pm_ch ch;
+ struct rcar_sysc_ch ch;
};
-static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d)
+static inline struct rcar_sysc_ch *to_r8a7779_ch(struct generic_pm_domain *d)
{
return &container_of(d, struct r8a7779_pm_domain, genpd)->ch;
}
@@ -41,8 +36,6 @@ extern void r8a7779_clock_init(void);
extern void r8a7779_pinmux_init(void);
extern void r8a7779_pm_init(void);
extern void r8a7779_register_twd(void);
-extern int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch);
-extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch);
#ifdef CONFIG_PM
extern void __init r8a7779_init_pm_domains(void);
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c
index d50a8e9..d6fe189 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -20,132 +20,22 @@
#include <linux/console.h>
#include <asm/io.h>
#include <mach/common.h>
+#include <mach/pm-rcar.h>
#include <mach/r8a7779.h>
-static void __iomem *r8a7779_sysc_base;
-
/* SYSC */
-#define SYSCSR 0x00
-#define SYSCISR 0x04
-#define SYSCISCR 0x08
#define SYSCIER 0x0c
#define SYSCIMR 0x10
-#define PWRSR0 0x40
-#define PWRSR1 0x80
-#define PWRSR2 0xc0
-#define PWRSR3 0x100
-#define PWRSR4 0x140
-
-#define PWRSR_OFFS 0x00
-#define PWROFFCR_OFFS 0x04
-#define PWRONCR_OFFS 0x0c
-#define PWRER_OFFS 0x14
-
-#define SYSCSR_RETRIES 100
-#define SYSCSR_DELAY_US 1
-
-#define SYSCISR_RETRIES 1000
-#define SYSCISR_DELAY_US 1
#if defined(CONFIG_PM) || defined(CONFIG_SMP)
-static DEFINE_SPINLOCK(r8a7779_sysc_lock); /* SMP CPUs + I/O devices */
-
-static int r8a7779_sysc_pwr_on_off(struct r8a7779_pm_ch *r8a7779_ch,
- int sr_bit, int reg_offs)
-{
- int k;
-
- for (k = 0; k < SYSCSR_RETRIES; k++) {
- if (ioread32(r8a7779_sysc_base + SYSCSR) & (1 << sr_bit))
- break;
- udelay(SYSCSR_DELAY_US);
- }
-
- if (k == SYSCSR_RETRIES)
- return -EAGAIN;
-
- iowrite32(1 << r8a7779_ch->chan_bit,
- r8a7779_sysc_base + r8a7779_ch->chan_offs + reg_offs);
-
- return 0;
-}
-
-static int r8a7779_sysc_pwr_off(struct r8a7779_pm_ch *r8a7779_ch)
-{
- return r8a7779_sysc_pwr_on_off(r8a7779_ch, 0, PWROFFCR_OFFS);
-}
-
-static int r8a7779_sysc_pwr_on(struct r8a7779_pm_ch *r8a7779_ch)
-{
- return r8a7779_sysc_pwr_on_off(r8a7779_ch, 1, PWRONCR_OFFS);
-}
-
-static int r8a7779_sysc_update(struct r8a7779_pm_ch *r8a7779_ch,
- int (*on_off_fn)(struct r8a7779_pm_ch *))
-{
- unsigned int isr_mask = 1 << r8a7779_ch->isr_bit;
- unsigned int chan_mask = 1 << r8a7779_ch->chan_bit;
- unsigned int status;
- unsigned long flags;
- int ret = 0;
- int k;
-
- spin_lock_irqsave(&r8a7779_sysc_lock, flags);
-
- iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR);
-
- do {
- ret = on_off_fn(r8a7779_ch);
- if (ret)
- goto out;
-
- status = ioread32(r8a7779_sysc_base +
- r8a7779_ch->chan_offs + PWRER_OFFS);
- } while (status & chan_mask);
-
- for (k = 0; k < SYSCISR_RETRIES; k++) {
- if (ioread32(r8a7779_sysc_base + SYSCISR) & isr_mask)
- break;
- udelay(SYSCISR_DELAY_US);
- }
-
- if (k == SYSCISR_RETRIES)
- ret = -EIO;
-
- iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR);
-
- out:
- spin_unlock_irqrestore(&r8a7779_sysc_lock, flags);
-
- pr_debug("r8a7779 power domain %d: %02x %02x %02x %02x %02x -> %d\n",
- r8a7779_ch->isr_bit, ioread32(r8a7779_sysc_base + PWRSR0),
- ioread32(r8a7779_sysc_base + PWRSR1),
- ioread32(r8a7779_sysc_base + PWRSR2),
- ioread32(r8a7779_sysc_base + PWRSR3),
- ioread32(r8a7779_sysc_base + PWRSR4), ret);
- return ret;
-}
-
-int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch)
-{
- return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_off);
-}
-
-int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch)
-{
- return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_on);
-}
-
static void __init r8a7779_sysc_init(void)
{
- r8a7779_sysc_base = ioremap_nocache(0xffd85000, PAGE_SIZE);
- if (!r8a7779_sysc_base)
- panic("unable to ioremap r8a7779 SYSC hardware block\n");
+ void __iomem *base = rcar_sysc_init(0xffd85000);
/* enable all interrupt sources, but do not use interrupt handler */
- iowrite32(0x0131000e, r8a7779_sysc_base + SYSCIER);
- iowrite32(0, r8a7779_sysc_base + SYSCIMR);
+ iowrite32(0x0131000e, base + SYSCIER);
+ iowrite32(0, base + SYSCIMR);
}
#else /* CONFIG_PM || CONFIG_SMP */
@@ -158,24 +48,17 @@ static inline void r8a7779_sysc_init(void) {}
static int pd_power_down(struct generic_pm_domain *genpd)
{
- return r8a7779_sysc_power_down(to_r8a7779_ch(genpd));
+ return rcar_sysc_power_down(to_r8a7779_ch(genpd));
}
static int pd_power_up(struct generic_pm_domain *genpd)
{
- return r8a7779_sysc_power_up(to_r8a7779_ch(genpd));
+ return rcar_sysc_power_up(to_r8a7779_ch(genpd));
}
static bool pd_is_off(struct generic_pm_domain *genpd)
{
- struct r8a7779_pm_ch *r8a7779_ch = to_r8a7779_ch(genpd);
- unsigned int st;
-
- st = ioread32(r8a7779_sysc_base + r8a7779_ch->chan_offs + PWRSR_OFFS);
- if (st & (1 << r8a7779_ch->chan_bit))
- return true;
-
- return false;
+ return rcar_sysc_power_is_off(to_r8a7779_ch(genpd));
}
static bool pd_active_wakeup(struct device *dev)
diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/arch/arm/mach-shmobile/pm-rcar.c
new file mode 100644
index 0000000..17225db
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-rcar.c
@@ -0,0 +1,142 @@
+/*
+ * R-Car SYSC Power management support
+ *
+ * Copyright (C) 2014 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/mm.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
+#include <mach/pm-rcar.h>
+
+static void __iomem *rcar_sysc_base;
+
+/* SYSC */
+#define SYSCSR 0x00
+#define SYSCISR 0x04
+#define SYSCISCR 0x08
+
+#define PWRSR_OFFS 0x00
+#define PWROFFCR_OFFS 0x04
+#define PWRONCR_OFFS 0x0c
+#define PWRER_OFFS 0x14
+
+#define SYSCSR_RETRIES 100
+#define SYSCSR_DELAY_US 1
+
+#define SYSCISR_RETRIES 1000
+#define SYSCISR_DELAY_US 1
+
+#if defined(CONFIG_PM) || defined(CONFIG_SMP)
+
+static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
+
+static int rcar_sysc_pwr_on_off(struct rcar_sysc_ch *sysc_ch,
+ int sr_bit, int reg_offs)
+{
+ int k;
+
+ for (k = 0; k < SYSCSR_RETRIES; k++) {
+ if (ioread32(rcar_sysc_base + SYSCSR) & (1 << sr_bit))
+ break;
+ udelay(SYSCSR_DELAY_US);
+ }
+
+ if (k == SYSCSR_RETRIES)
+ return -EAGAIN;
+
+ iowrite32(1 << sysc_ch->chan_bit,
+ rcar_sysc_base + sysc_ch->chan_offs + reg_offs);
+
+ return 0;
+}
+
+static int rcar_sysc_pwr_off(struct rcar_sysc_ch *sysc_ch)
+{
+ return rcar_sysc_pwr_on_off(sysc_ch, 0, PWROFFCR_OFFS);
+}
+
+static int rcar_sysc_pwr_on(struct rcar_sysc_ch *sysc_ch)
+{
+ return rcar_sysc_pwr_on_off(sysc_ch, 1, PWRONCR_OFFS);
+}
+
+static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch,
+ int (*on_off_fn)(struct rcar_sysc_ch *))
+{
+ unsigned int isr_mask = 1 << sysc_ch->isr_bit;
+ unsigned int chan_mask = 1 << sysc_ch->chan_bit;
+ unsigned int status;
+ unsigned long flags;
+ int ret = 0;
+ int k;
+
+ spin_lock_irqsave(&rcar_sysc_lock, flags);
+
+ iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
+
+ do {
+ ret = on_off_fn(sysc_ch);
+ if (ret)
+ goto out;
+
+ status = ioread32(rcar_sysc_base +
+ sysc_ch->chan_offs + PWRER_OFFS);
+ } while (status & chan_mask);
+
+ for (k = 0; k < SYSCISR_RETRIES; k++) {
+ if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask)
+ break;
+ udelay(SYSCISR_DELAY_US);
+ }
+
+ if (k == SYSCISR_RETRIES)
+ ret = -EIO;
+
+ iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
+
+ out:
+ spin_unlock_irqrestore(&rcar_sysc_lock, flags);
+
+ pr_debug("sysc power domain %d: %08x -> %d\n",
+ sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
+ return ret;
+}
+
+int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch)
+{
+ return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_off);
+}
+
+int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch)
+{
+ return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_on);
+}
+
+bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch)
+{
+ unsigned int st;
+
+ st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS);
+ if (st & (1 << sysc_ch->chan_bit))
+ return true;
+
+ return false;
+}
+
+void __iomem *rcar_sysc_init(phys_addr_t base)
+{
+ rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
+ if (!rcar_sysc_base)
+ panic("unable to ioremap R-Car SYSC hardware block\n");
+
+ return rcar_sysc_base;
+}
+
+#endif /* CONFIG_PM || CONFIG_SMP */
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 627c1f0..e7a3201 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -24,6 +24,7 @@
#include <linux/io.h>
#include <linux/delay.h>
#include <mach/common.h>
+#include <mach/pm-rcar.h>
#include <mach/r8a7779.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -33,25 +34,25 @@
#define AVECR IOMEM(0xfe700040)
#define R8A7779_SCU_BASE 0xf0000000
-static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
+static struct rcar_sysc_ch r8a7779_ch_cpu1 = {
.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
.chan_bit = 1, /* ARM1 */
.isr_bit = 1, /* ARM1 */
};
-static struct r8a7779_pm_ch r8a7779_ch_cpu2 = {
+static struct rcar_sysc_ch r8a7779_ch_cpu2 = {
.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
.chan_bit = 2, /* ARM2 */
.isr_bit = 2, /* ARM2 */
};
-static struct r8a7779_pm_ch r8a7779_ch_cpu3 = {
+static struct rcar_sysc_ch r8a7779_ch_cpu3 = {
.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
.chan_bit = 3, /* ARM3 */
.isr_bit = 3, /* ARM3 */
};
-static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
+static struct rcar_sysc_ch *r8a7779_ch_cpu[4] = {
[1] = &r8a7779_ch_cpu1,
[2] = &r8a7779_ch_cpu2,
[3] = &r8a7779_ch_cpu3,
@@ -67,7 +68,7 @@ void __init r8a7779_register_twd(void)
static int r8a7779_platform_cpu_kill(unsigned int cpu)
{
- struct r8a7779_pm_ch *ch = NULL;
+ struct rcar_sysc_ch *ch = NULL;
int ret = -EIO;
cpu = cpu_logical_map(cpu);
@@ -76,14 +77,14 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
ch = r8a7779_ch_cpu[cpu];
if (ch)
- ret = r8a7779_sysc_power_down(ch);
+ ret = rcar_sysc_power_down(ch);
return ret ? ret : 1;
}
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
- struct r8a7779_pm_ch *ch = NULL;
+ struct rcar_sysc_ch *ch = NULL;
unsigned int lcpu = cpu_logical_map(cpu);
int ret;
@@ -91,7 +92,7 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
ch = r8a7779_ch_cpu[lcpu];
if (ch)
- ret = r8a7779_sysc_power_up(ch);
+ ret = rcar_sysc_power_up(ch);
else
ret = -EIO;
--
1.8.5.2
^ permalink raw reply related
* [PATCH 01/12] ARM: shmobile: Use 64-bit dma_addr_t on r8a7790/r8a7791
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Magnus Damm <damm@opensource.se>
Some on-chip devices on r8a7790 and r8a7791 can do
bus mastering and access more than 32-bits of address
space. Select ARCH_DMA_ADDR_T_64BIT when LPAE is set
in case of multiplatform and legacy SoC support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 3386406..0272cd7 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -13,6 +13,7 @@ config ARCH_SHMOBILE_MULTI
select ARM_GIC
select MIGHT_HAVE_CACHE_L2X0
select MIGHT_HAVE_PCI
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select NO_IOPORT
select PINCTRL
select ARCH_REQUIRE_GPIOLIB
@@ -123,6 +124,7 @@ config ARCH_R8A7790
select MIGHT_HAVE_PCI
select SH_CLK_CPG
select RENESAS_IRQC
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
config ARCH_R8A7791
bool "R-Car M2 (R8A77910)"
@@ -132,6 +134,7 @@ config ARCH_R8A7791
select MIGHT_HAVE_PCI
select SH_CLK_CPG
select RENESAS_IRQC
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
config ARCH_EMEV2
bool "Emma Mobile EV2"
--
1.8.5.2
^ permalink raw reply related
* [PATCH] drm/i2c: tda998x: fix memory leak in case of i2c error
From: Jean-Francois Moine @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
When the creation of the second i2c client was failing, the private
buffer was not freed.
This bug was introduced by the commit 6ae668cc19e8
'drm/i2c: tda998x: check the CEC device creation'
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
---
drivers/gpu/drm/i2c/tda998x_drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
index fa18cf3..faa77f5 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -1151,8 +1151,10 @@ tda998x_encoder_init(struct i2c_client *client,
priv->current_page = 0xff;
priv->cec = i2c_new_dummy(client->adapter, 0x34);
- if (!priv->cec)
+ if (!priv->cec) {
+ kfree(priv);
return -ENODEV;
+ }
priv->dpms = DRM_MODE_DPMS_OFF;
encoder_slave->slave_priv = priv;
--
1.9.0.rc3
^ permalink raw reply related
* [PATCH v4 3/8] at91: dt: Add at91sam9261 dt SoC support
From: Nicolas Ferre @ 2014-02-13 8:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACh+v5MgYB+L6vpektjAE1yTH=dvjnyP1CjJeA7vG_yOyxFkgg@mail.gmail.com>
On 12/02/2014 20:47, Jean-Jacques Hiblot :
> Hi Alexandre,
>
> 2014-02-12 18:28 GMT+01:00 Alexandre Belloni
> <alexandre.belloni@free-electrons.com>:
>> Hi,
>>
>> On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
>>> This patch adds support for the Device Tree on a sam9261-based platform
>>>
>>> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>>> ---
>>> arch/arm/boot/dts/at91sam9261.dtsi | 740 +++++++++++++++++++++++++++++++++++++
>>> arch/arm/mach-at91/at91sam9261.c | 17 +
>>> 2 files changed, 757 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
>>
>> [...]
>>
>>> +
>>> + apb {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> +
>>> + tcb0: timer at fffa0000 {
>>> + compatible = "atmel,at91rm9200-tcb";
>>> + reg = <0xfffa0000 0x100>;
>>> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
>>> + 18 IRQ_TYPE_LEVEL_HIGH 0
>>> + 19 IRQ_TYPE_LEVEL_HIGH 0
>>> + >;
>>> + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
>>> + clock-names = "t0_clk", "t1_clk", "t2_clk";
>>> + };
>>> +
>>> + usb1: gadget at fffa4000 {
>>> + compatible = "atmel,at91rm9200-udc";
>>> + reg = <0xfffa4000 0x4000>;
>>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
>>> + clocks = <&usb>, <&udc_clk>, <&udpck>;
>>> + clock-names = "usb_clk", "udc_clk", "udpck";
>>> + status = "disabled";
>>> + };
>>> +
>>> + mmc0: mmc at fffa8000 {
>>> + compatible = "atmel,hsmci";
>>> + reg = <0xfffa8000 0x600>;
>>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clocks = <&mci0_clk>;
>>> + clock-names = "mci_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + i2c0: i2c at fffac000 {
>>> + compatible = "atmel,at91sam9261-i2c";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_i2c_twi>;
>>> + reg = <0xfffac000 0x100>;
>>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clocks = <&twi0_clk>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart0: serial at fffb0000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb0000 0x200>;
>>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart0>;
>>> + clocks = <&usart0_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart1: serial at fffb4000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb4000 0x200>;
>>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart1>;
>>> + clocks = <&usart1_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart2: serial at fffb8000{
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb8000 0x200>;
>>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart2>;
>>> + clocks = <&usart2_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc0: ssc at fffbc000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffbc000 0x4000>;
>>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc1: ssc at fffc0000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffc0000 0x4000>;
>>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi0: spi at fffc8000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffc8000 0x200>;
>>> + cs-gpios = <0>, <0>, <0>, <0>;
>>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi0>;
>>> + clocks = <&spi0_clk>;
>>> + clock-names = "spi_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi at fffcc000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffcc000 0x200>;
>>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi1>;
>>> + clocks = <&spi1_clk>;
>>> + clock-names = "spi_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + ramc: ramc at ffffea00 {
>>> + compatible = "atmel,at91sam9260-sdramc";
>>> + reg = <0xffffea00 0x200>;
>>> + };
>>> +
>>
>> You probably copied/pasted it but according to the block diagram, the
>> sdram controller is not under the apb.
> You're right I copied/pasted :o) But the addresses of the registers
> look like typical APB addresses.
> AFAIK all the registers of this SOC are accessed through the APB
> (except for OHCI and LCDC)
Yes, that is the point: if the register bank appears as an APB address,
I place it on the APB bus.
The other master interfaces (on AHB) are the ones that the IP uses, not
us from the CPU point of view...
So I think that Jean-Jacques DT is okay concerning this.
> So probably the real question here is what is the sense of the bus
> hierarchy in cases where a controller is connected to several buses
> (APB for registers, AHB/matrix for other purpose) ?
> As I don't have any idea on how to handle this, I choose to copy/paste.
>
>>
>>> + matrix: matrix at ffffee00 {
>>> + compatible = "atmel,at91sam9261-bus-matrix";
>>> + reg = <0xffffee00 0x200>;
>>> + };
>>> +
>>
>> Same here, the apb is actually under the bus matrix.
>>
>> I don't know whether it can be represented another way though.
>>
>>
>> --
>> Alexandre Belloni, Free Electrons
>> Embedded Linux, Kernel and Android engineering
>> http://free-electrons.com
>
>
--
Nicolas Ferre
^ permalink raw reply
* [PATCH] pci: Add support for creating a generic host_bridge from device tree
From: Jingoo Han @ 2014-02-13 8:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140206101814.GA4993@e106497-lin.cambridge.arm.com>
On Thursday, February 06, 2014 7:18 PM, Liviu Dudau wrote:
> On Wed, Feb 05, 2014 at 10:26:27PM +0000, Tanmay Inamdar wrote:
> > Hello Liviu,
> >
> > I did not get the first email of this particular patch on any of
> > subscribed mailing lists (don't know why), hence replying here.
>
> Strange, it shows in the MARC and GMANE archive for linux-pci, probably
> a hickup on your receiving side?
>
> >
> > +struct pci_host_bridge *
> > +pci_host_bridge_of_init(struct device *parent, int busno, struct pci_ops *ops,
> > + void *host_data, struct list_head *resources)
> > +{
> > + struct pci_bus *root_bus;
> > + struct pci_host_bridge *bridge;
> > +
> > + /* first parse the host bridge bus ranges */
> > + if (pci_host_bridge_of_get_ranges(parent->of_node, resources))
> > + return NULL;
> > +
> > + /* then create the root bus */
> > + root_bus = pci_create_root_bus(parent, busno, ops, host_data, resources);
> > + if (!root_bus)
> > + return NULL;
> > +
> > + bridge = to_pci_host_bridge(root_bus->bridge);
> > +
> > + return bridge;
> > +}
> >
> > You are keeping the domain_nr inside pci_host_bridge structure. In
> > above API, domain_nr is required in 'pci_find_bus' function called
> > from 'pci_create_root_bus'. Since the bridge is allocated after
> > creating root bus, 'pci_find_bus' always gets domain_nr as 0. This
> > will cause problem for scanning multiple domains.
>
> Good catch. I was switching between creating a pci_controller in arch/arm64 and
> adding the needed bits in pci_host_bridge. After internal review I've decided to
> add the domain_nr to pci_host_bridge, but forgot to update the code everywhere.
Hi Liviu Dudau,
One more thing,
I am reviewing and compiling your patch.
Would you consider adding 'struct pci_sys_data' and 'struct hw_pci'?
Currently, 4 PCIe Host drivers (pci-mvebu.c, pci-tegra.c,
pci-rcar-gen2.c, pcie-designware.c) are using 'struct pci_sys_data'
and 'struct hw_pci' in their drivers. Without this, it makes build
errors.
In arm32, 'struct pci_sys_data' and 'struct hw_pci' is defined
in "arch/arm/include/asm/mach/pci.h".
Tanmay Inamdar,
Your 'APM X-Gene PCIe' patch also needs 'struct pci_sys_data' and
'struct hw_pci'. With Liviu Dudau's patch, it will make build
errors. Would you check this?
Thank you.
Best regards,
Jingoo Han
>
> Thanks for reviewing this, will fix in v2.
>
> Do you find porting to the new API straight forward?
>
^ permalink raw reply
* [GIT PULL 00/12] Second Round of Renesas ARM Based SoC Updates for v3.15
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
please consider this second round of Renesas ARM Based SoC updates for v3.15.
This pull-request is based on the first round of such changes,
tagged as renesas-soc-for-v3.15, which I have previously sent a
pull-request for.
The following changes since commit 012a7069b5a10a0851584d71a1facdc40a972319:
ARM: shmobile: r8a7790: Add PCI USB host clock support (2014-02-04 10:25:03 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v3.15
for you to fetch changes up to 74b9ba5f35fbd071f313781498a9e244bcc6f03e:
ARM: shmobile: r8a7790: Correct SYS DMAC clock defines (2014-02-07 09:24:07 +0900)
----------------------------------------------------------------
Second Round of Renesas ARM Based SoC Updates for v3.15
* r7s72100 SoC (RZ/A1H)
- Add clock for SH Ethernet
- Add RSPI clocks
* r8a7791 (R-Car M2)
- Add QSPI clocks
- Use 64-bit dma_addr_t
* r8a7790 (R-Car H2)
- Correct SYS DMAC clock defines
- Add audio clock
- Add CA15-SCU, CA7-SCU
- Add SYSC setup code
- Use 64-bit dma_addr_t
----------------------------------------------------------------
Gaku Inami (1):
ARM: shmobile: r8a7790 CA7-SCU enablement
Geert Uytterhoeven (3):
ARM: shmobile: r7s72100 clock: Add RSPI clocks
ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
ARM: shmobile: r8a7791 clock: add QSPI clocks
Hisashi Nakamura (1):
ARM: shmobile: r8a7790 SYSC setup code
Keita Kobayashi (1):
ARM: shmobile: r8a7790 CA15-SCU enablement
Kuninori Morimoto (2):
ARM: shmobile: r8a7778: add audio clock in new style
ARM: shmobile: r8a7790: add audio clock
Magnus Damm (2):
ARM: shmobile: Use 64-bit dma_addr_t on r8a7790/r8a7791
ARM: shmobile: Break out R-Car SYSC PM code
Simon Horman (2):
ARM: shmobile: r7s72100: Add clock for r7s72100-ether
ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
arch/arm/boot/dts/r8a7790.dtsi | 23 +++++
arch/arm/mach-shmobile/Kconfig | 3 +
arch/arm/mach-shmobile/Makefile | 3 +-
arch/arm/mach-shmobile/clock-r7s72100.c | 30 +++++-
arch/arm/mach-shmobile/clock-r8a7778.c | 4 +
arch/arm/mach-shmobile/clock-r8a7790.c | 20 ++++
arch/arm/mach-shmobile/clock-r8a7791.c | 11 ++
arch/arm/mach-shmobile/include/mach/pm-rcar.h | 15 +++
arch/arm/mach-shmobile/include/mach/r8a7779.h | 13 +--
arch/arm/mach-shmobile/include/mach/r8a7790.h | 1 +
arch/arm/mach-shmobile/pm-r8a7779.c | 131 ++----------------------
arch/arm/mach-shmobile/pm-r8a7790.c | 45 ++++++++
arch/arm/mach-shmobile/pm-rcar.c | 142 ++++++++++++++++++++++++++
arch/arm/mach-shmobile/smp-r8a7779.c | 17 +--
arch/arm/mach-shmobile/smp-r8a7790.c | 17 +++
include/dt-bindings/clock/r8a7790-clock.h | 4 +-
16 files changed, 331 insertions(+), 148 deletions(-)
create mode 100644 arch/arm/mach-shmobile/include/mach/pm-rcar.h
create mode 100644 arch/arm/mach-shmobile/pm-r8a7790.c
create mode 100644 arch/arm/mach-shmobile/pm-rcar.c
^ permalink raw reply
* [PATCH 3/3] ARM: shmobile: koelsch dts: Add QSPI nodes
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392275963.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI devices for QSPI on Koelsch.
Add Spansion s25fl512s SPI FLASH and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 36 +++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 74f0985..d4b9bba 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -121,8 +121,44 @@
renesas,groups = "scif1_data_d";
renesas,function = "scif1";
};
+
+ qspi_pins: spi {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
};
&sata0 {
status = "okay";
};
+
+&spi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25fl512s";
+ reg = <0>;
+ spi-max-frequency = <30000000>;
+ m25p,fast-read;
+
+ partition at 0 {
+ label = "loader";
+ reg = <0x00000000 0x00080000>;
+ read-only;
+ };
+ partition at 80000 {
+ label = "bootenv";
+ reg = <0x00080000 0x00080000>;
+ read-only;
+ };
+ partition at 100000 {
+ label = "data";
+ reg = <0x00100000 0x03f00000>;
+ };
+ };
+};
--
1.8.5.2
^ permalink raw reply related
* [PATCH 2/3] ARM: shmobile: r8a7791 dtsi: Add QSPI node
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392275963.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index d5cc362..240c4ec 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -710,4 +710,16 @@
clock-output-names = "scifa3", "scifa4", "scifa5";
};
};
+
+ spi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.8.5.2
^ permalink raw reply related
* [PATCH 1/3] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392275963.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r7s72100-genmai-reference.dts | 2 +-
arch/arm/boot/dts/r7s72100.dtsi | 75 +++++++++++++++++++++++++
2 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
index da19c70..0849017 100644
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
@@ -9,7 +9,7 @@
*/
/dts-v1/;
-/include/ "r7s72100.dtsi"
+#include "r7s72100.dtsi"
/ {
model = "Genmai";
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 46b82aa..9be67a1 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -8,12 +8,22 @@
* kind, whether express or implied.
*/
+#include <dt-bindings/interrupt-controller/irq.h>
+
/ {
compatible = "renesas,r7s72100";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ spi0 = &spi0;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ spi3 = &spi3;
+ spi4 = &spi4;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -33,4 +43,69 @@
reg = <0xe8201000 0x1000>,
<0xe8202000 0x1000>;
};
+
+ spi0: spi at e800c800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800c800 0x24>;
+ interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
+ <0 239 IRQ_TYPE_LEVEL_HIGH>,
+ <0 240 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi1: spi at e800d000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d000 0x24>;
+ interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
+ <0 242 IRQ_TYPE_LEVEL_HIGH>,
+ <0 243 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi2: spi at e800d800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d800 0x24>;
+ interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
+ <0 245 IRQ_TYPE_LEVEL_HIGH>,
+ <0 246 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi3: spi at e800e000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e000 0x24>;
+ interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
+ <0 248 IRQ_TYPE_LEVEL_HIGH>,
+ <0 249 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi4: spi at e800e800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e800 0x24>;
+ interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
+ <0 251 IRQ_TYPE_LEVEL_HIGH>,
+ <0 252 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.8.5.2
^ permalink raw reply related
* [GIT PULL 0/3] Second Round of Renesas ARM Based SoC DT Updates for v3.15
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
please consider this second round of Renesas ARM based SoC DT updates for
v3.15.
This pull request is based on the first round of such updates, tagged as
renesas-dt-for-v3.15, which I have previously sent a pull-request for.
The following changes since commit 1f4c745b2c5a083c49dc11d2f0827d9a381f1ee1:
ARM: shmobile: r8a7790: Replace IRQ type numerical values with macros (2014-02-04 10:17:00 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt2-for-v3.15
for you to fetch changes up to e02ee513eed4bb780848a5cedbd4b39afb395d3e:
ARM: shmobile: koelsch dts: Add QSPI nodes (2014-02-06 20:36:12 +0900)
----------------------------------------------------------------
Second Round of Renesas ARM Based SoC DT Updates for v3.15
r8a7791 (R-Car M2) based Koelsch board
- Add QSPI nodes
r7s72100 (RZ/A1H) SoC
- Add RSPI nodes
----------------------------------------------------------------
Geert Uytterhoeven (3):
ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
ARM: shmobile: r8a7791 dtsi: Add QSPI node
ARM: shmobile: koelsch dts: Add QSPI nodes
arch/arm/boot/dts/r7s72100-genmai-reference.dts | 2 +-
arch/arm/boot/dts/r7s72100.dtsi | 75 +++++++++++++++++++++++++
arch/arm/boot/dts/r8a7791-koelsch.dts | 36 ++++++++++++
arch/arm/boot/dts/r8a7791.dtsi | 12 ++++
4 files changed, 124 insertions(+), 1 deletion(-)
^ permalink raw reply
* [PATCH 4/4] ARM: shmobile: genmai defconfig: Enable RSPI
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276997.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/configs/genmai_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
index c56a7ff..5ee6ac0 100644
--- a/arch/arm/configs/genmai_defconfig
+++ b/arch/arm/configs/genmai_defconfig
@@ -81,6 +81,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=10
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.8.5.2
^ permalink raw reply related
* [PATCH 3/4] ARM: shmobile: koelsch defconfig: Enable RSPI and MTD_M25P80
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276997.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
This enables support for the Spansion s25fl512s SPI FLASH on QSPI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
[horms+renesas at verge.net.au: resolved conflict]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/configs/koelsch_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index c3b3c9d..9561139 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -40,6 +40,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
+CONFIG_MTD=y
+CONFIG_MTD_M25P80=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
@@ -64,6 +66,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_RCAR=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.8.5.2
^ permalink raw reply related
* [PATCH 2/4] ARM: shmobile: lager: add sound support on defconfig
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276997.git.horms+renesas@verge.net.au>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/configs/lager_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
index 3e7e0ae..b17f487 100644
--- a/arch/arm/configs/lager_defconfig
+++ b/arch/arm/configs/lager_defconfig
@@ -105,6 +105,10 @@ CONFIG_VIDEO_RCAR_VIN=y
CONFIG_VIDEO_ADV7180=y
CONFIG_DRM=y
CONFIG_DRM_RCAR_DU=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_RCAR=y
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
--
1.8.5.2
^ permalink raw reply related
* [PATCH 1/4] ARM: shmobile: koelsch: Enable I2C in defconfig
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276997.git.horms+renesas@verge.net.au>
From: Valentine Barshak <valentine.barshak@cogentembedded.com>
This enables I2C support in koelsch_defconfig.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/configs/koelsch_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index 3015797..c3b3c9d 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -62,6 +62,8 @@ CONFIG_SH_ETH=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_I2C=y
+CONFIG_I2C_RCAR=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.8.5.2
^ permalink raw reply related
* [GIT PULL 0/4] Second Round of Renesas ARM Based SoC Defconfig Updates for v3.15
From: Simon Horman @ 2014-02-13 8:04 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
please consider this second round of Renesas ARM based SoC defconfig
updates for v3.15.
This pull-request is based on the first round of such updates,
tagged as renesas-defconfig-for-v3.15, which I have previously sent
a pull-request for.
The following changes since commit 0771ddff31186836f62a20c42e7958bd37f7b4ed:
ARM: shmobile: ape6evm: enable CONFIG_DEVTMPFS in defconfig (2014-02-04 10:26:04 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-defconfig2-for-v3.15
for you to fetch changes up to 8f33d31ee270f2a6bcc661815a520f76565674c3:
ARM: shmobile: genmai defconfig: Enable RSPI (2014-02-06 20:53:59 +0900)
----------------------------------------------------------------
Second Round of Renesas ARM Based SoC Defconfig Updates for v3.15
* r7s72100 SoC (RZ/A1H) based Genmai board
- Enable RSPI
* r8a7790 (R-Car H2) based Koelsch board
- Enable I2C, RSPI and MTD_M25P80
* r8a7779 (R-Car H1) based Lager board
- Enable sound
----------------------------------------------------------------
Geert Uytterhoeven (2):
ARM: shmobile: koelsch defconfig: Enable RSPI and MTD_M25P80
ARM: shmobile: genmai defconfig: Enable RSPI
Kuninori Morimoto (1):
ARM: shmobile: lager: add sound support on defconfig
Valentine Barshak (1):
ARM: shmobile: koelsch: Enable I2C in defconfig
arch/arm/configs/genmai_defconfig | 2 ++
arch/arm/configs/koelsch_defconfig | 6 ++++++
arch/arm/configs/lager_defconfig | 4 ++++
3 files changed, 12 insertions(+)
^ permalink raw reply
* [PATCH 11/11] ARM: shmobile: genmai: Enable r7s72100-ether
From: Simon Horman @ 2014-02-13 8:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276547.git.horms+renesas@verge.net.au>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/mach-shmobile/board-genmai.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index c406461..e240980 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -20,6 +20,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/sh_eth.h>
#include <linux/spi/rspi.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
@@ -28,6 +29,20 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+/* Ether */
+static const struct sh_eth_plat_data ether_pdata __initconst = {
+ .phy = 0x00, /* PD60610 */
+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ .no_ether_link = 1
+};
+
+static const struct resource ether_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe8203000, 0x800),
+ DEFINE_RES_MEM(0xe8204800, 0x200),
+ DEFINE_RES_IRQ(gic_iid(359)),
+};
+
/* RSPI */
#define RSPI_RESOURCE(idx, baseaddr, irq) \
static const struct resource rspi##idx##_resources[] __initconst = { \
@@ -67,6 +82,11 @@ static void __init genmai_add_standard_devices(void)
r7s72100_clock_init();
r7s72100_add_dt_devices();
+ platform_device_register_resndata(&platform_bus, "r7s72100-ether", -1,
+ ether_resources,
+ ARRAY_SIZE(ether_resources),
+ ðer_pdata, sizeof(ether_pdata));
+
r7s72100_register_rspi(0);
r7s72100_register_rspi(1);
r7s72100_register_rspi(2);
--
1.8.5.2
^ permalink raw reply related
* [PATCH 10/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
From: Simon Horman @ 2014-02-13 8:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276547.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/board-lager.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index e8242c5..3175748 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -310,7 +310,7 @@ static const struct spi_board_info spi_info[] __initconst = {
/* QSPI resource */
static const struct resource qspi_resources[] __initconst = {
DEFINE_RES_MEM(0xe6b10000, 0x1000),
- DEFINE_RES_IRQ(gic_spi(184)),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
};
/* VIN */
--
1.8.5.2
^ permalink raw reply related
* [PATCH 09/11] ARM: shmobile: koelsch legacy: Add QSPI support
From: Simon Horman @ 2014-02-13 8:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276547.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Enable support for the Spansion s25fl512s SPI FLASH on the Koelsch board:
- Add QSPI platform device, resources, platform data, and pinmux,
- Add FLASH data and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/board-koelsch.c | 64 ++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 2741dba..d42637d 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -26,12 +26,17 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/leds.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
#include <linux/phy.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
@@ -150,6 +155,55 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
+/* QSPI */
+static const struct resource qspi_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6b10000, 0x1000),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
+};
+
+static const struct rspi_plat_data qspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
+static struct mtd_partition spi_flash_part[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static const struct flash_platform_data spi_flash_data = {
+ .name = "m25p80",
+ .parts = spi_flash_part,
+ .nr_parts = ARRAY_SIZE(spi_flash_part),
+ .type = "s25fl512s",
+};
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
/* SATA0 */
static const struct resource sata0_resources[] __initconst = {
DEFINE_RES_MEM(0xee300000, 0x2000),
@@ -214,6 +268,11 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* QSPI */
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_ctrl", "qspi"),
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_data4", "qspi"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
"scif0_data_d", "scif0"),
@@ -248,6 +307,11 @@ static void __init koelsch_add_standard_devices(void)
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&koelsch_keys_pdata,
sizeof(koelsch_keys_pdata));
+ platform_device_register_resndata(&platform_bus, "qspi", 0,
+ qspi_resources,
+ ARRAY_SIZE(qspi_resources),
+ &qspi_pdata, sizeof(qspi_pdata));
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.8.5.2
^ permalink raw reply related
* [PATCH 08/11] ARM: shmobile: genmai legacy: Add RSPI support
From: Simon Horman @ 2014-02-13 8:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392276547.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add RSPI platform device, resources, platform data, and SPI child.
On this board, only rspi4 is in use. Its bus contains a single device
(a wm8978 audio codec).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/board-genmai.c | 44 +++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index 3e92e3c..c406461 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -20,15 +20,59 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <mach/r7s72100.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+/* RSPI */
+#define RSPI_RESOURCE(idx, baseaddr, irq) \
+static const struct resource rspi##idx##_resources[] __initconst = { \
+ DEFINE_RES_MEM(baseaddr, 0x24), \
+ DEFINE_RES_IRQ_NAMED(irq, "error"), \
+ DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
+ DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
+}
+
+RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
+RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
+RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
+RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
+RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
+
+static const struct rspi_plat_data rspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+#define r7s72100_register_rspi(idx) \
+ platform_device_register_resndata(&platform_bus, "rspi-rz", idx, \
+ rspi##idx##_resources, \
+ ARRAY_SIZE(rspi##idx##_resources), \
+ &rspi_pdata, sizeof(rspi_pdata))
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "wm8978",
+ .max_speed_hz = 5000000,
+ .bus_num = 4,
+ .chip_select = 0,
+ },
+};
+
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
r7s72100_add_dt_devices();
+
+ r7s72100_register_rspi(0);
+ r7s72100_register_rspi(1);
+ r7s72100_register_rspi(2);
+ r7s72100_register_rspi(3);
+ r7s72100_register_rspi(4);
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
}
static const char * const genmai_boards_compat_dt[] __initconst = {
--
1.8.5.2
^ permalink raw reply related
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