* [PATCH 08/12] ARM: shmobile: r7s72100 clock: Add RSPI clocks
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r7s72100.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index dd8ce87..ffb0fff 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -22,12 +22,14 @@
#include <mach/common.h>
#include <mach/r7s72100.h>
-/* registers */
+/* Frequency Control Registers */
#define FRQCR 0xfcfe0010
#define FRQCR2 0xfcfe0014
+/* Standby Control Registers */
#define STBCR3 0xfcfe0420
#define STBCR4 0xfcfe0424
#define STBCR9 0xfcfe0438
+#define STBCR10 0xfcfe043c
#define PLL_RATE 30
@@ -145,11 +147,19 @@ struct clk div4_clks[DIV4_NR] = {
| CLK_ENABLE_ON_INIT),
};
-enum { MSTP97, MSTP96, MSTP95, MSTP94,
+enum {
+ MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
+ MSTP97, MSTP96, MSTP95, MSTP94,
MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- MSTP33, MSTP_NR };
+ MSTP33, MSTP_NR
+};
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
+ [MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
+ [MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
+ [MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
+ [MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
@@ -176,6 +186,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
/* MSTP clocks */
+ CLKDEV_DEV_ID("rspi-rz.0", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("rspi-rz.1", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.8.5.2
^ permalink raw reply related
* [PATCH 09/12] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common
clock framework yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r7s72100.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index ffb0fff..71c99fe 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -191,6 +191,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
+ CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.8.5.2
^ permalink raw reply related
* [PATCH 10/12] ARM: shmobile: r8a7791 clock: add QSPI clocks
From: Simon Horman @ 2014-02-13 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
The QSPI clock divider value depends on the MD1, MD2, and MD3 mode
switches.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r8a7791.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index e4e4dfa..c8227b3 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -101,6 +101,7 @@ static struct clk main_clk = {
*/
SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
+SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1);
/* fixed ratio clock */
SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
@@ -124,6 +125,7 @@ static struct clk *main_clks[] = {
&pll3_clk,
&hp_clk,
&p_clk,
+ &qspi_clk,
&rclk_clk,
&mp_clk,
&cp_clk,
@@ -135,6 +137,7 @@ static struct clk *main_clks[] = {
/* MSTP */
enum {
MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,
+ MSTP917,
MSTP815, MSTP814,
MSTP813,
MSTP811, MSTP810, MSTP809,
@@ -154,6 +157,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
+ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
@@ -195,6 +199,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("zs", &zs_clk),
CLKDEV_CON_ID("hp", &hp_clk),
CLKDEV_CON_ID("p", &p_clk),
+ CLKDEV_CON_ID("qspi", &qspi_clk),
CLKDEV_CON_ID("rclk", &rclk_clk),
CLKDEV_CON_ID("mp", &mp_clk),
CLKDEV_CON_ID("cp", &cp_clk),
@@ -220,6 +225,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
@@ -271,6 +277,11 @@ void __init r8a7791_clock_init(void)
break;
}
+ if ((mode & (MD(3) | MD(2) | MD(1))) == MD(2))
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 16);
+ else
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 20);
+
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
--
1.8.5.2
^ permalink raw reply related
* [PATCH 11/12] ARM: shmobile: r7s72100: Add clock for r7s72100-ether
From: Simon Horman @ 2014-02-13 8:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r7s72100.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 71c99fe..f17a5db 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -28,6 +28,7 @@
/* Standby Control Registers */
#define STBCR3 0xfcfe0420
#define STBCR4 0xfcfe0424
+#define STBCR7 0xfcfe0430
#define STBCR9 0xfcfe0438
#define STBCR10 0xfcfe043c
@@ -150,6 +151,7 @@ struct clk div4_clks[DIV4_NR] = {
enum {
MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
MSTP97, MSTP96, MSTP95, MSTP94,
+ MSTP74,
MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
MSTP33, MSTP_NR
};
@@ -164,6 +166,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
[MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
+ [MSTP74] = SH_CLK_MSTP8(&peripheral1_clk, STBCR7, 4, 0), /* Ether */
[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
@@ -200,6 +203,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
+ CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
/* ICK */
--
1.8.5.2
^ permalink raw reply related
* [PATCH 12/12] ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
From: Simon Horman @ 2014-02-13 8:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1392277789.git.horms+renesas@verge.net.au>
This brings the implementation into line with the documentation.
This problem was introduced when SYS DMAC clock defines were added by
ac991dce6498b5fc ("ARM: shmobile: r8a7790: Add clock index macros for DT
sources") in v3.13-rc2. I do not believe this results in any problems as
these defines do not appear to be used anywhere yet.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
include/dt-bindings/clock/r8a7790-clock.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 859e9be..6548a5f 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -46,8 +46,8 @@
#define R8A7790_CLK_MSIOF1 8
#define R8A7790_CLK_MSIOF3 15
#define R8A7790_CLK_SCIFB2 16
-#define R8A7790_CLK_SYS_DMAC0 18
-#define R8A7790_CLK_SYS_DMAC1 19
+#define R8A7790_CLK_SYS_DMAC1 18
+#define R8A7790_CLK_SYS_DMAC0 19
/* MSTP3 */
#define R8A7790_CLK_TPU0 4
--
1.8.5.2
^ permalink raw reply related
* [PATCH 1/3] irqchip: exynos-combiner: call handle_bad_irq directly
From: Pankaj Dubey @ 2014-02-13 8:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52D01D96.8000401@samsung.com>
On 01/11/2014 01:19 AM, Tomasz Figa wrote:
> Hi Pankaj,
>
> On 10.01.2014 03:32, Pankaj Dubey wrote:
>> This patch is inspired from following commit
>> aec0095653: (irqchip: gic: Call handle_bad_irq() directly)
>>
>> Also this will help in removing unwanted inclusion
>> of header file "asm/mach/irq.h"
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> ---
>> drivers/irqchip/exynos-combiner.c | 3 +--
>> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
>
> Best regards,
> Tomasz
>
Ping.
Thanks,
Pankaj Dubey
^ permalink raw reply
* [PATCH] clocksource: exynos_mct: remove unwanted header file inclusion
From: Pankaj Dubey @ 2014-02-13 8:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389314025-2890-1-git-send-email-pankaj.dubey@samsung.com>
On 01/10/2014 09:33 AM, Pankaj Dubey wrote:
> remove unwanted header file inclusion "asm/mach/time.h" from exynos_mct.c
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
> drivers/clocksource/exynos_mct.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
> index 48f76bc..ed49b25 100644
> --- a/drivers/clocksource/exynos_mct.c
> +++ b/drivers/clocksource/exynos_mct.c
> @@ -25,8 +25,6 @@
> #include <linux/of_address.h>
> #include <linux/clocksource.h>
>
> -#include <asm/mach/time.h>
> -
> #define EXYNOS4_MCTREG(x) (x)
> #define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100)
> #define EXYNOS4_MCT_G_CNT_U EXYNOS4_MCTREG(0x104)
Ping.
Thanks,
Pankaj Dubey
^ permalink raw reply
* [PATCH] pci: Add support for creating a generic host_bridge from device tree
From: Jingoo Han @ 2014-02-13 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <000201cf2893$0f5e3710$2e1aa530$%han@samsung.com>
On
> -----Original Message-----
> From: Jingoo Han [mailto:jg1.han at samsung.com]
> Sent: Thursday, February 13, 2014 5:10 PM
> To: 'Liviu Dudau'; 'Tanmay Inamdar'
> Cc: 'Arnd Bergmann'; devicetree at vger.kernel.org; 'linaro-kernel'; 'linux-pci'; 'Will Deacon'; 'LKML';
> 'Catalin Marinas'; 'Bjorn Helgaas'; 'LAKML'; 'Jingoo Han'
> Subject: Re: [PATCH] pci: Add support for creating a generic host_bridge from device tree
>
> On Thursday, February 06, 2014 7:18 PM, Liviu Dudau wrote:
> > On Wed, Feb 05, 2014 at 10:26:27PM +0000, Tanmay Inamdar wrote:
> > > Hello Liviu,
> > >
> > > I did not get the first email of this particular patch on any of
> > > subscribed mailing lists (don't know why), hence replying here.
> >
> > Strange, it shows in the MARC and GMANE archive for linux-pci, probably
> > a hickup on your receiving side?
> >
> > >
> > > +struct pci_host_bridge *
> > > +pci_host_bridge_of_init(struct device *parent, int busno, struct pci_ops *ops,
> > > + void *host_data, struct list_head *resources)
> > > +{
> > > + struct pci_bus *root_bus;
> > > + struct pci_host_bridge *bridge;
> > > +
> > > + /* first parse the host bridge bus ranges */
> > > + if (pci_host_bridge_of_get_ranges(parent->of_node, resources))
> > > + return NULL;
> > > +
> > > + /* then create the root bus */
> > > + root_bus = pci_create_root_bus(parent, busno, ops, host_data, resources);
> > > + if (!root_bus)
> > > + return NULL;
> > > +
> > > + bridge = to_pci_host_bridge(root_bus->bridge);
> > > +
> > > + return bridge;
> > > +}
> > >
> > > You are keeping the domain_nr inside pci_host_bridge structure. In
> > > above API, domain_nr is required in 'pci_find_bus' function called
> > > from 'pci_create_root_bus'. Since the bridge is allocated after
> > > creating root bus, 'pci_find_bus' always gets domain_nr as 0. This
> > > will cause problem for scanning multiple domains.
> >
> > Good catch. I was switching between creating a pci_controller in arch/arm64 and
> > adding the needed bits in pci_host_bridge. After internal review I've decided to
> > add the domain_nr to pci_host_bridge, but forgot to update the code everywhere.
>
> Hi Liviu Dudau,
>
> One more thing,
> I am reviewing and compiling your patch.
> Would you consider adding 'struct pci_sys_data' and 'struct hw_pci'?
>
> Currently, 4 PCIe Host drivers (pci-mvebu.c, pci-tegra.c,
> pci-rcar-gen2.c, pcie-designware.c) are using 'struct pci_sys_data'
> and 'struct hw_pci' in their drivers. Without this, it makes build
> errors.
>
> In arm32, 'struct pci_sys_data' and 'struct hw_pci' is defined
> in "arch/arm/include/asm/mach/pci.h".
>
> Tanmay Inamdar,
> Your 'APM X-Gene PCIe' patch also needs 'struct pci_sys_data' and
> 'struct hw_pci'. With Liviu Dudau's patch, it will make build
> errors. Would you check this?
I mean the patch '[PATCH] arm64: Add architecture support for PCI'.
With this patch, it makes build errors in PCIe Host drivers such as
pcie-designware.c.
Best regards,
Jingoo Han
^ permalink raw reply
* [PATCH v2 0/2] i2c: sunxi: Change compatibles pattern
From: Wolfram Sang @ 2014-02-13 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391680285-16668-1-git-send-email-maxime.ripard@free-electrons.com>
> This is the second version of the i2c compatible changes.
> The only difference with the v1 being that we're now droping the old
> compatibles, instead of keeping them, since the DT maintainers said it was
> fine.
Please provide a pointer to that discussion.
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^ permalink raw reply
* [PATCH 00/03] ARM: shmobile: Clean up the EMEV2 and KZM9D code base
From: Magnus Damm @ 2014-02-13 8:25 UTC (permalink / raw)
To: linux-arm-kernel
ARM: shmobile: Clean up the EMEV2 and KZM9D code base
[PATCH 01/03] ARM: shmobile: Remove legacy EMEV2 SoC support
[PATCH 02/03] ARM: shmobile: Remove KZM9D board code
[PATCH 03/03] ARM: shmobile: Get rid of legacy KZM9D defconfig
These patches clean up the EMEV2 SoC and the KZM9D board support code.
With these patches applied:
- EMEV2 is enabled for the MULTIPLATFORM case only, making use of CCF
- KZM9D is implemented as DT code only, no C code exists
- The legacy EMEV2 code is gone, so is the legacy clock framework code
- The legacy defconfig is gone, making way for a shared multiplatform defconfig
This means that KZM9D support comes without a Kconfig entry. Also,
the load address for u-boot needs to be supplied by hand (0x40008000).
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Written against renesas.git tag renesas-devel-v3.14-rc1-20140207
arch/arm/boot/dts/Makefile | 3
arch/arm/configs/kzm9d_defconfig | 91 ---------
arch/arm/mach-shmobile/Kconfig | 15 -
arch/arm/mach-shmobile/Makefile | 2
arch/arm/mach-shmobile/board-kzm9d-reference.c | 47 ----
arch/arm/mach-shmobile/clock-emev2.c | 231 ------------------------
arch/arm/mach-shmobile/include/mach/emev2.h | 9
arch/arm/mach-shmobile/setup-emev2.c | 7
arch/arm/mach-shmobile/smp-emev2.c | 1
9 files changed, 3 insertions(+), 403 deletions(-)
^ permalink raw reply
* [PATCH 01/03] ARM: shmobile: Remove legacy EMEV2 SoC support
From: Magnus Damm @ 2014-02-13 8:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140213082558.30630.93034.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Get rid of legacy EMEV2 SoC code including the legacy clock
framework implementation. The multiplatform implementation
together with DT board support shall be used instead.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/boot/dts/Makefile | 3
arch/arm/mach-shmobile/Kconfig | 9 -
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/clock-emev2.c | 231 ---------------------------
arch/arm/mach-shmobile/include/mach/emev2.h | 1
arch/arm/mach-shmobile/setup-emev2.c | 4
6 files changed, 1 insertion(+), 248 deletions(-)
--- 0001/arch/arm/boot/dts/Makefile
+++ work/arch/arm/boot/dts/Makefile 2014-02-05 18:26:25.000000000 +0900
@@ -242,8 +242,7 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
s3c6410-smdk6410.dtb
-dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- r7s72100-genmai.dtb \
+dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
r7s72100-genmai-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
--- 0009/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2014-02-05 18:21:28.000000000 +0900
@@ -139,15 +139,6 @@ config ARCH_R8A7791
select RENESAS_IRQC
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
-config ARCH_EMEV2
- bool "Emma Mobile EV2"
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select ARM_GIC
- select CPU_V7
- select MIGHT_HAVE_PCI
- select USE_OF
- select AUTO_ZRELADDR
-
config ARCH_R7S72100
bool "RZ/A1H (R7S72100)"
select ARCH_WANT_OPTIONAL_GPIOLIB
--- 0001/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2014-02-05 18:21:28.000000000 +0900
@@ -31,7 +31,6 @@ obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7
obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
-obj-$(CONFIG_ARCH_EMEV2) += clock-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
endif
--- 0001/arch/arm/mach-shmobile/clock-emev2.c
+++ /dev/null 2013-06-03 21:41:10.638032047 +0900
@@ -1,231 +0,0 @@
-/*
- * Emma Mobile EV2 clock framework support
- *
- * Copyright (C) 2012 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-#include <mach/common.h>
-
-#define EMEV2_SMU_BASE 0xe0110000
-
-/* EMEV2 SMU registers */
-#define USIAU0_RSTCTRL 0x094
-#define USIBU1_RSTCTRL 0x0ac
-#define USIBU2_RSTCTRL 0x0b0
-#define USIBU3_RSTCTRL 0x0b4
-#define STI_RSTCTRL 0x124
-#define USIAU0GCLKCTRL 0x4a0
-#define USIBU1GCLKCTRL 0x4b8
-#define USIBU2GCLKCTRL 0x4bc
-#define USIBU3GCLKCTRL 0x04c0
-#define STIGCLKCTRL 0x528
-#define USIAU0SCLKDIV 0x61c
-#define USIB2SCLKDIV 0x65c
-#define USIB3SCLKDIV 0x660
-#define STI_CLKSEL 0x688
-
-/* not pretty, but hey */
-static void __iomem *smu_base;
-
-static void emev2_smu_write(unsigned long value, int offs)
-{
- BUG_ON(!smu_base || (offs >= PAGE_SIZE));
- iowrite32(value, smu_base + offs);
-}
-
-static struct clk_mapping smu_mapping = {
- .phys = EMEV2_SMU_BASE,
- .len = PAGE_SIZE,
-};
-
-/* Fixed 32 KHz root clock from C32K pin */
-static struct clk c32k_clk = {
- .rate = 32768,
- .mapping = &smu_mapping,
-};
-
-/* PLL3 multiplies C32K with 7000 */
-static unsigned long pll3_recalc(struct clk *clk)
-{
- return clk->parent->rate * 7000;
-}
-
-static struct sh_clk_ops pll3_clk_ops = {
- .recalc = pll3_recalc,
-};
-
-static struct clk pll3_clk = {
- .ops = &pll3_clk_ops,
- .parent = &c32k_clk,
-};
-
-static struct clk *main_clks[] = {
- &c32k_clk,
- &pll3_clk,
-};
-
-enum { SCLKDIV_USIAU0, SCLKDIV_USIBU2, SCLKDIV_USIBU1, SCLKDIV_USIBU3,
- SCLKDIV_NR };
-
-#define SCLKDIV(_reg, _shift) \
-{ \
- .parent = &pll3_clk, \
- .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
- .enable_bit = _shift, \
-}
-
-static struct clk sclkdiv_clks[SCLKDIV_NR] = {
- [SCLKDIV_USIAU0] = SCLKDIV(USIAU0SCLKDIV, 0),
- [SCLKDIV_USIBU2] = SCLKDIV(USIB2SCLKDIV, 16),
- [SCLKDIV_USIBU1] = SCLKDIV(USIB2SCLKDIV, 0),
- [SCLKDIV_USIBU3] = SCLKDIV(USIB3SCLKDIV, 0),
-};
-
-enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK,
- GCLK_STI_SCLK,
- GCLK_NR };
-
-#define GCLK_SCLK(_parent, _reg) \
-{ \
- .parent = _parent, \
- .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
- .enable_bit = 1, /* SCLK_GCC */ \
-}
-
-static struct clk gclk_clks[GCLK_NR] = {
- [GCLK_USIAU0_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIAU0],
- USIAU0GCLKCTRL),
- [GCLK_USIBU1_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU1],
- USIBU1GCLKCTRL),
- [GCLK_USIBU2_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU2],
- USIBU2GCLKCTRL),
- [GCLK_USIBU3_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU3],
- USIBU3GCLKCTRL),
- [GCLK_STI_SCLK] = GCLK_SCLK(&c32k_clk, STIGCLKCTRL),
-};
-
-static int emev2_gclk_enable(struct clk *clk)
-{
- iowrite32(ioread32(clk->mapped_reg) | (1 << clk->enable_bit),
- clk->mapped_reg);
- return 0;
-}
-
-static void emev2_gclk_disable(struct clk *clk)
-{
- iowrite32(ioread32(clk->mapped_reg) & ~(1 << clk->enable_bit),
- clk->mapped_reg);
-}
-
-static struct sh_clk_ops emev2_gclk_clk_ops = {
- .enable = emev2_gclk_enable,
- .disable = emev2_gclk_disable,
- .recalc = followparent_recalc,
-};
-
-static int __init emev2_gclk_register(struct clk *clks, int nr)
-{
- struct clk *clkp;
- int ret = 0;
- int k;
-
- for (k = 0; !ret && (k < nr); k++) {
- clkp = clks + k;
- clkp->ops = &emev2_gclk_clk_ops;
- ret |= clk_register(clkp);
- }
-
- return ret;
-}
-
-static unsigned long emev2_sclkdiv_recalc(struct clk *clk)
-{
- unsigned int sclk_div;
-
- sclk_div = (ioread32(clk->mapped_reg) >> clk->enable_bit) & 0xff;
-
- return clk->parent->rate / (sclk_div + 1);
-}
-
-static struct sh_clk_ops emev2_sclkdiv_clk_ops = {
- .recalc = emev2_sclkdiv_recalc,
-};
-
-static int __init emev2_sclkdiv_register(struct clk *clks, int nr)
-{
- struct clk *clkp;
- int ret = 0;
- int k;
-
- for (k = 0; !ret && (k < nr); k++) {
- clkp = clks + k;
- clkp->ops = &emev2_sclkdiv_clk_ops;
- ret |= clk_register(clkp);
- }
-
- return ret;
-}
-
-static struct clk_lookup lookups[] = {
- CLKDEV_DEV_ID("serial8250-em.0", &gclk_clks[GCLK_USIAU0_SCLK]),
- CLKDEV_DEV_ID("e1020000.uart", &gclk_clks[GCLK_USIAU0_SCLK]),
- CLKDEV_DEV_ID("serial8250-em.1", &gclk_clks[GCLK_USIBU1_SCLK]),
- CLKDEV_DEV_ID("e1030000.uart", &gclk_clks[GCLK_USIBU1_SCLK]),
- CLKDEV_DEV_ID("serial8250-em.2", &gclk_clks[GCLK_USIBU2_SCLK]),
- CLKDEV_DEV_ID("e1040000.uart", &gclk_clks[GCLK_USIBU2_SCLK]),
- CLKDEV_DEV_ID("serial8250-em.3", &gclk_clks[GCLK_USIBU3_SCLK]),
- CLKDEV_DEV_ID("e1050000.uart", &gclk_clks[GCLK_USIBU3_SCLK]),
- CLKDEV_DEV_ID("em_sti.0", &gclk_clks[GCLK_STI_SCLK]),
- CLKDEV_DEV_ID("e0180000.sti", &gclk_clks[GCLK_STI_SCLK]),
-};
-
-void __init emev2_clock_init(void)
-{
- int k, ret = 0;
-
- smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
- BUG_ON(!smu_base);
-
- /* setup STI timer to run on 32.768 kHz and deassert reset */
- emev2_smu_write(0, STI_CLKSEL);
- emev2_smu_write(1, STI_RSTCTRL);
-
- /* deassert reset for UART0->UART3 */
- emev2_smu_write(2, USIAU0_RSTCTRL);
- emev2_smu_write(2, USIBU1_RSTCTRL);
- emev2_smu_write(2, USIBU2_RSTCTRL);
- emev2_smu_write(2, USIBU3_RSTCTRL);
-
- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- ret = clk_register(main_clks[k]);
-
- if (!ret)
- ret = emev2_sclkdiv_register(sclkdiv_clks, SCLKDIV_NR);
-
- if (!ret)
- ret = emev2_gclk_register(gclk_clks, GCLK_NR);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- if (!ret)
- shmobile_clk_init();
- else
- panic("failed to setup emev2 clocks\n");
-}
--- 0001/arch/arm/mach-shmobile/include/mach/emev2.h
+++ work/arch/arm/mach-shmobile/include/mach/emev2.h 2014-02-05 18:21:28.000000000 +0900
@@ -3,7 +3,6 @@
extern void emev2_map_io(void);
extern void emev2_init_delay(void);
-extern void emev2_clock_init(void);
extern struct smp_operations emev2_smp_ops;
#endif /* __ASM_EMEV2_H__ */
--- 0001/arch/arm/mach-shmobile/setup-emev2.c
+++ work/arch/arm/mach-shmobile/setup-emev2.c 2014-02-05 18:21:28.000000000 +0900
@@ -50,11 +50,7 @@ void __init emev2_init_delay(void)
static void __init emev2_add_standard_devices_dt(void)
{
-#ifdef CONFIG_COMMON_CLK
of_clk_init(NULL);
-#else
- emev2_clock_init();
-#endif
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
^ permalink raw reply
* [PATCH RESEND] ARM: mcpm: Make all mcpm functions notrace
From: Jon Medhurst (Tixy) @ 2014-02-13 8:26 UTC (permalink / raw)
To: linux-arm-kernel
From: Dave Martin <dave.martin@linaro.org>
The functions in mcpm_entry.c are mostly intended for use during
scary cache and coherency disabling sequences, or do other things
which confuse trace ... like powering a CPU down and not
returning. Similarly for the backend code.
For simplicity, this patch just makes whole files notrace.
There should be more than enough traceable points on the paths to
these functions, but we can be more fine-grained later if there is
a need for it.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Also added spc.o to the list of files as it contains functions used by
MCPM code which have comments comments like: "might be used in code
paths where normal cacheable locks are not working"
Signed-off-by: Jon Medhurst <tixy@linaro.org>
---
arch/arm/common/Makefile | 1 +
arch/arm/mach-vexpress/Makefile | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 4bdc416..70b1eff 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
+CFLAGS_REMOVE_mcpm_entry.o = -pg
AFLAGS_mcpm_head.o := -march=armv7-a
AFLAGS_vlock.o := -march=armv7-a
obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile
index 0997e0b..fc649bc 100644
--- a/arch/arm/mach-vexpress/Makefile
+++ b/arch/arm/mach-vexpress/Makefile
@@ -8,8 +8,11 @@ obj-y := v2m.o
obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o
CFLAGS_dcscb.o += -march=armv7-a
+CFLAGS_REMOVE_dcscb.o = -pg
obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o
+CFLAGS_REMOVE_spc.o = -pg
obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o
CFLAGS_tc2_pm.o += -march=armv7-a
+CFLAGS_REMOVE_tc2_pm.o = -pg
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
--
1.7.10.4
^ permalink raw reply related
* [PATCH 02/03] ARM: shmobile: Remove KZM9D board code
From: Magnus Damm @ 2014-02-13 8:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140213082558.30630.93034.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Get rid of KZM9D board code written in C. This version of the
C board code was used in the case of multiplatform, but these
days DT can be used instead, so because of that simply get rid
of the C code to simplify and save space.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/mach-shmobile/Kconfig | 6 ---
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/board-kzm9d-reference.c | 47 ------------------------
arch/arm/mach-shmobile/include/mach/emev2.h | 8 ----
arch/arm/mach-shmobile/setup-emev2.c | 3 +
arch/arm/mach-shmobile/smp-emev2.c | 1
6 files changed, 2 insertions(+), 64 deletions(-)
--- 0010/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2014-02-05 18:27:53.000000000 +0900
@@ -48,12 +48,6 @@ config MACH_KOELSCH
depends on ARCH_R8A7791
select MICREL_PHY if SH_ETH
-config MACH_KZM9D
- bool "KZM9D board"
- depends on ARCH_EMEV2
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
- select SMSC_PHY if SMSC911X
-
config MACH_LAGER
bool "Lager board"
depends on ARCH_R8A7790
--- 0010/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2014-02-05 18:27:53.000000000 +0900
@@ -57,7 +57,6 @@ obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
-obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
else
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
--- 0001/arch/arm/mach-shmobile/board-kzm9d-reference.c
+++ /dev/null 2013-06-03 21:41:10.638032047 +0900
@@ -1,47 +0,0 @@
-/*
- * kzm9d board support - Reference DT implementation
- *
- * Copyright (C) 2013 Renesas Solutions Corp.
- * Copyright (C) 2013 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/init.h>
-#include <linux/of_platform.h>
-#include <linux/clk-provider.h>
-#include <mach/emev2.h>
-#include <mach/common.h>
-#include <asm/mach/arch.h>
-
-static void __init kzm9d_add_standard_devices(void)
-{
- of_clk_init(NULL);
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char *kzm9d_boards_compat_dt[] __initdata = {
- "renesas,kzm9d",
- "renesas,kzm9d-reference",
- NULL,
-};
-
-DT_MACHINE_START(KZM9D_DT, "kzm9d")
- .smp = smp_ops(emev2_smp_ops),
- .map_io = emev2_map_io,
- .init_early = emev2_init_delay,
- .init_machine = kzm9d_add_standard_devices,
- .init_late = shmobile_init_late,
- .dt_compat = kzm9d_boards_compat_dt,
-MACHINE_END
--- 0010/arch/arm/mach-shmobile/include/mach/emev2.h
+++ /dev/null 2013-06-03 21:41:10.638032047 +0900
@@ -1,8 +0,0 @@
-#ifndef __ASM_EMEV2_H__
-#define __ASM_EMEV2_H__
-
-extern void emev2_map_io(void);
-extern void emev2_init_delay(void);
-extern struct smp_operations emev2_smp_ops;
-
-#endif /* __ASM_EMEV2_H__ */
--- 0010/arch/arm/mach-shmobile/setup-emev2.c
+++ work/arch/arm/mach-shmobile/setup-emev2.c 2014-02-05 18:27:53.000000000 +0900
@@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/of_platform.h>
#include <mach/common.h>
-#include <mach/emev2.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -59,6 +58,8 @@ static const char *emev2_boards_compat_d
NULL,
};
+extern struct smp_operations emev2_smp_ops;
+
DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
--- 0001/arch/arm/mach-shmobile/smp-emev2.c
+++ work/arch/arm/mach-shmobile/smp-emev2.c 2014-02-05 18:27:53.000000000 +0900
@@ -24,7 +24,6 @@
#include <linux/io.h>
#include <linux/delay.h>
#include <mach/common.h>
-#include <mach/emev2.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
^ permalink raw reply
* [PATCH 03/03] ARM: shmobile: Get rid of legacy KZM9D defconfig
From: Magnus Damm @ 2014-02-13 8:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140213082558.30630.93034.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Get rid of the kzm9d_defconfig. The KZM9D is now supported
as DT only in case of EMEV2 is selected in the kernel
configuration.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/configs/kzm9d_defconfig | 91 --------------------------------------
1 file changed, 91 deletions(-)
--- 0001/arch/arm/configs/kzm9d_defconfig
+++ /dev/null 2013-06-03 21:41:10.638032047 +0900
@@ -1,91 +0,0 @@
-# CONFIG_ARM_PATCH_PHYS_VIRT is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE_LEGACY=y
-CONFIG_ARCH_EMEV2=y
-CONFIG_MACH_KZM9D=y
-CONFIG_MEMORY_START=0x40000000
-CONFIG_MEMORY_SIZE=0x10000000
-# CONFIG_SH_TIMER_TMU is not set
-# CONFIG_SWP_EMULATE is not set
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-CONFIG_HOTPLUG_CPU=y
-# CONFIG_LOCAL_TIMERS is not set
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-# CONFIG_CROSS_MEMORY_ATTACH is not set
-CONFIG_FORCE_MAX_ZONEORDER=13
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_BLK_DEV is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-CONFIG_SMSC911X=y
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_EM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_EM=y
-# CONFIG_HWMON is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-# CONFIG_FTRACE is not set
^ permalink raw reply
* [PATCH v2 2/2] ARM: sunxi: dt: Convert to the new i2c compatibles
From: Wolfram Sang @ 2014-02-13 8:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391680285-16668-3-git-send-email-maxime.ripard@free-electrons.com>
Why is the devicetree list not on CC? (Added now)
On Thu, Feb 06, 2014 at 10:51:25AM +0100, Maxime Ripard wrote:
> Switch the device tree to the new compatibles introduced in the i2c drivers
> to have a common pattern accross all Allwinner SoCs.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> arch/arm/boot/dts/sun4i-a10.dtsi | 6 +++---
> arch/arm/boot/dts/sun5i-a10s.dtsi | 6 +++---
> arch/arm/boot/dts/sun5i-a13.dtsi | 6 +++---
> arch/arm/boot/dts/sun7i-a20.dtsi | 10 +++++-----
> 4 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
> index 28273f9..ac65c8a 100644
> --- a/arch/arm/boot/dts/sun4i-a10.dtsi
> +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
> @@ -518,7 +518,7 @@
> };
>
> i2c0: i2c at 01c2ac00 {
> - compatible = "allwinner,sun4i-i2c";
> + compatible = "allwinner,sun4i-a10-i2c";
Can't we have:
compatible = "allwinner,sun4i-a10-i2c", "allwinner,sun4i-i2c";
? And keep the old "allwinner,sun4i-i2c" and extend it with a SoC
specific a10 compatible entry when a distinction is needed?
> diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
> index 6de40b6..537072c 100644
> --- a/arch/arm/boot/dts/sun5i-a13.dtsi
> +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
> @@ -377,7 +377,7 @@
> };
>
> i2c0: i2c at 01c2ac00 {
> - compatible = "allwinner,sun4i-i2c";
> + compatible = "allwinner,sun4i-a10-i2c";
For non-a10, That should be at least
compatible = "allwinner,sun4i-a13-i2c", "allwinner,sun4i-a10-i2c";
or
compatible = "allwinner,sun4i-a13-i2c", "allwinner,sun4i-i2c";
depending on the outcome above.
Or is my knowledge outdated already?
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^ permalink raw reply
* [PATCH] ARM: tegra: don't timeout if CPU is powergated
From: Marc Dietrich @ 2014-02-13 8:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52FBC97D.8040809@wwwdotorg.org>
Am Mittwoch, 12. Februar 2014, 12:20:29 schrieb Stephen Warren:
> On 02/10/2014 05:44 PM, Stefan Agner wrote:
> > When booting secondary CPU(s) which are not yet powergated, a wrong
> > check lead to a timeout after 100 jiffies. With this patch, we only
> > delay powergating if CPUs are still not powered yet.
>
> I've applied this to Tegra's for-3.15/soc branch.
also for 3.14 and maybe lower versioned kernels? Since this seems to fix a bug
where some core doesn't come up.
Marc
^ permalink raw reply
* [PATCH] pci: Add support for creating a generic host_bridge from device tree
From: Tanmay Inamdar @ 2014-02-13 8:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <000201cf2893$0f5e3710$2e1aa530$%han@samsung.com>
On Thu, Feb 13, 2014 at 12:10 AM, Jingoo Han <jg1.han@samsung.com> wrote:
> On Thursday, February 06, 2014 7:18 PM, Liviu Dudau wrote:
>> On Wed, Feb 05, 2014 at 10:26:27PM +0000, Tanmay Inamdar wrote:
>> > Hello Liviu,
>> >
>> > I did not get the first email of this particular patch on any of
>> > subscribed mailing lists (don't know why), hence replying here.
>>
>> Strange, it shows in the MARC and GMANE archive for linux-pci, probably
>> a hickup on your receiving side?
>>
>> >
>> > +struct pci_host_bridge *
>> > +pci_host_bridge_of_init(struct device *parent, int busno, struct pci_ops *ops,
>> > + void *host_data, struct list_head *resources)
>> > +{
>> > + struct pci_bus *root_bus;
>> > + struct pci_host_bridge *bridge;
>> > +
>> > + /* first parse the host bridge bus ranges */
>> > + if (pci_host_bridge_of_get_ranges(parent->of_node, resources))
>> > + return NULL;
>> > +
>> > + /* then create the root bus */
>> > + root_bus = pci_create_root_bus(parent, busno, ops, host_data, resources);
>> > + if (!root_bus)
>> > + return NULL;
>> > +
>> > + bridge = to_pci_host_bridge(root_bus->bridge);
>> > +
>> > + return bridge;
>> > +}
>> >
>> > You are keeping the domain_nr inside pci_host_bridge structure. In
>> > above API, domain_nr is required in 'pci_find_bus' function called
>> > from 'pci_create_root_bus'. Since the bridge is allocated after
>> > creating root bus, 'pci_find_bus' always gets domain_nr as 0. This
>> > will cause problem for scanning multiple domains.
>>
>> Good catch. I was switching between creating a pci_controller in arch/arm64 and
>> adding the needed bits in pci_host_bridge. After internal review I've decided to
>> add the domain_nr to pci_host_bridge, but forgot to update the code everywhere.
>
> Hi Liviu Dudau,
>
> One more thing,
> I am reviewing and compiling your patch.
> Would you consider adding 'struct pci_sys_data' and 'struct hw_pci'?
>
> Currently, 4 PCIe Host drivers (pci-mvebu.c, pci-tegra.c,
> pci-rcar-gen2.c, pcie-designware.c) are using 'struct pci_sys_data'
> and 'struct hw_pci' in their drivers. Without this, it makes build
> errors.
>
> In arm32, 'struct pci_sys_data' and 'struct hw_pci' is defined
> in "arch/arm/include/asm/mach/pci.h".
>
> Tanmay Inamdar,
> Your 'APM X-Gene PCIe' patch also needs 'struct pci_sys_data' and
> 'struct hw_pci'. With Liviu Dudau's patch, it will make build
> errors. Would you check this?
X-Gene PCIe host driver is dependent on arm64 PCI patch. My previous
approach was based on 32bit arm PCI support. With Liviu's approach, I
will have to make changes in host driver to get rid of hw_pci and
pci_sys_data which are no longer required.
IMO it should not cause build errors for PCI host drivers dependent on
architectures other than arm64. Can you post the error?
>
> Thank you.
>
> Best regards,
> Jingoo Han
>
>>
>> Thanks for reviewing this, will fix in v2.
>>
>> Do you find porting to the new API straight forward?
>>
>
^ permalink raw reply
* [PATCH] ARM: tegra: don't timeout if CPU is powergated
From: Thierry Reding @ 2014-02-13 8:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4050206.sG2EzXyfMN@fb07-iapwap2>
On Thu, Feb 13, 2014 at 09:28:52AM +0100, Marc Dietrich wrote:
> Am Mittwoch, 12. Februar 2014, 12:20:29 schrieb Stephen Warren:
> > On 02/10/2014 05:44 PM, Stefan Agner wrote:
> > > When booting secondary CPU(s) which are not yet powergated, a wrong
> > > check lead to a timeout after 100 jiffies. With this patch, we only
> > > delay powergating if CPUs are still not powered yet.
> >
> > I've applied this to Tegra's for-3.15/soc branch.
>
> also for 3.14 and maybe lower versioned kernels? Since this seems to fix a bug
> where some core doesn't come up.
Yeah, this bug has been there for pretty much forever it seems. Commit
86e51a2ee471 "ARM: tegra: support for secondary cores on Tegra30" added
tegra30_boot_secondary() (named tegra30_power_up_cpu() back then, which
was renamed to tegra30_boot_secondary() in commit 0d1f79b033bb "ARM:
tegra: refactor tegra{20,30}_boot_secondary". The latter was introduced
in v3.10, so I guess backporting it to stable releases all the way back
to v3.10 would be good.
Backporting to earlier versions (86e51a2ee471 went into v3.4) will be a
lot more difficult since some of the APIs were renamed since then.
Thierry
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^ permalink raw reply
* [PATCH v4 3/8] at91: dt: Add at91sam9261 dt SoC support
From: Alexandre Belloni @ 2014-02-13 8:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52FC7E0E.2010503@atmel.com>
On 13/02/2014 at 09:10:54 +0100, Nicolas Ferre wrote :
> On 12/02/2014 20:47, Jean-Jacques Hiblot :
> >>
> >> You probably copied/pasted it but according to the block diagram, the
> >> sdram controller is not under the apb.
> > You're right I copied/pasted :o) But the addresses of the registers
> > look like typical APB addresses.
> > AFAIK all the registers of this SOC are accessed through the APB
> > (except for OHCI and LCDC)
>
> Yes, that is the point: if the register bank appears as an APB address,
> I place it on the APB bus.
> The other master interfaces (on AHB) are the ones that the IP uses, not
> us from the CPU point of view...
>
> So I think that Jean-Jacques DT is okay concerning this.
>
Ok, I'm perfectly fine with that. Thanks for the answer !
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH 1/3] mmc: add support for power-on sequencing through DT
From: Ulf Hansson @ 2014-02-13 8:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201401281148.10670.arnd@arndb.de>
On 28 January 2014 11:48, Arnd Bergmann <arnd@arndb.de> wrote:
> On Tuesday 28 January 2014, Ulf Hansson wrote:
>> On 28 January 2014 01:59, Tomasz Figa <tomasz.figa@gmail.com> wrote:
>> > On 27.01.2014 11:19, Ulf Hansson wrote:
>> >> There is already a host capability that I think we could use to handle
>> >> this. MMC_CAP_NONREMOVABLE, the corresponding DT binding string is
>> >> "non-removable", and it may be set per host device.
>> >>
>> >> Using this cap means the mmc_rescan process that runs to detect new
>> >> cards, will only be executed once and during boot. So, we need to make
>> >> sure all resources and powers are provided to the card at this point.
>> >> Otherwise the card will not be detected.
>> >
>> > I don't quite like this requirement, especially if you consider
>> > multi-platform kernels where a lot of drivers is going to be provided as
>> > modules. WLAN drivers are especially good candidates. This means that even
>> > if the card is powered off at boot-up, if user (or init system) loads
>> > appropriate module, which powers the chip on, MMC core must be able to
>> > notice this.
>>
>> To be able to detect the card, the WLAN driver doesn't have to be
>> probed, only the "power controller" driver. I suppose this is were it
>> becomes a bit tricky.
>>
>> Somehow the mmc core needs to be involved in the probe process of the
>> power controller driver. Could perhaps the power controller bus be
>> located in the mmc core and thus the power controller driver needs to
>> register itself by using a new API from the mmc core? Similar how SDIO
>> func driver's register themselves.
>
> I think there is another option, which does have its own pros and cons:
> We could move all the power handling back into the sdio function driver
> if we allow a secondary detection path using DT rather than the probing
> of the SDIO bus. Essentially you'd have to list the class/vendor/device
> ID for each function that cannot be autodetected in DT, and have the
> SDIO core pretend that it found the device just by looking at the
> device nodes, and register the struct sdio_func so it can be bound to
> the driver. The driver then does all the power handling in a device
> specific way. At some point the hardware gets registered at the
> mmc host, and the sdio core connects the bus state to the already present
> sdio_func, possibly notifying the function driver that it has become
> usable.
It seems like an option we could try.
There are some tricky parts that needs to be taken care of by the
mmc/sdio core, regarding the probe/removal and the suspend/resume
sequence, but I suppose it should be possible.
A minor concern is how do we handle devices that are fully powered at
boot? Unless the sdio func driver will be loaded we can't power off
them, right? Do we need to cover this case, do you think?
>
> Obviously, this can only work for CAP_NONREMOVABLE devices, but those
> are exactly the ones we are worried about here. The advantage is that
> the power sequencing for a particular device can then be in device
> specific code and can have an arbitrarily complex in the driver without
> needing the mmc code to handle all possible corner cases.
Agree!
I think a removable SDIO card won't l need this additional power
controller mechanism.
Kind regards
Uffe
>
> Arnd
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH] pci: Add support for creating a generic host_bridge from device tree
From: Jingoo Han @ 2014-02-13 8:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACoXjc=epN8=tFQKw6kZ27hTA=a+c56q1pikX_SSMKK1rsScCw@mail.gmail.com>
> -----Original Message-----
> From: Tanmay Inamdar [mailto:tinamdar at apm.com]
> Sent: Thursday, February 13, 2014 5:37 PM
> To: Jingoo Han
> Cc: Liviu Dudau; Arnd Bergmann; devicetree at vger.kernel.org; linaro-kernel; linux-pci; Will Deacon;
> LKML; Catalin Marinas; Bjorn Helgaas; LAKML
> Subject: Re: [PATCH] pci: Add support for creating a generic host_bridge from device tree
>
> On Thu, Feb 13, 2014 at 12:10 AM, Jingoo Han <jg1.han@samsung.com> wrote:
> > On Thursday, February 06, 2014 7:18 PM, Liviu Dudau wrote:
> >> On Wed, Feb 05, 2014 at 10:26:27PM +0000, Tanmay Inamdar wrote:
> >> > Hello Liviu,
> >> >
> >> > I did not get the first email of this particular patch on any of
> >> > subscribed mailing lists (don't know why), hence replying here.
> >>
> >> Strange, it shows in the MARC and GMANE archive for linux-pci, probably
> >> a hickup on your receiving side?
> >>
> >> >
> >> > +struct pci_host_bridge *
> >> > +pci_host_bridge_of_init(struct device *parent, int busno, struct pci_ops *ops,
> >> > + void *host_data, struct list_head *resources)
> >> > +{
> >> > + struct pci_bus *root_bus;
> >> > + struct pci_host_bridge *bridge;
> >> > +
> >> > + /* first parse the host bridge bus ranges */
> >> > + if (pci_host_bridge_of_get_ranges(parent->of_node, resources))
> >> > + return NULL;
> >> > +
> >> > + /* then create the root bus */
> >> > + root_bus = pci_create_root_bus(parent, busno, ops, host_data, resources);
> >> > + if (!root_bus)
> >> > + return NULL;
> >> > +
> >> > + bridge = to_pci_host_bridge(root_bus->bridge);
> >> > +
> >> > + return bridge;
> >> > +}
> >> >
> >> > You are keeping the domain_nr inside pci_host_bridge structure. In
> >> > above API, domain_nr is required in 'pci_find_bus' function called
> >> > from 'pci_create_root_bus'. Since the bridge is allocated after
> >> > creating root bus, 'pci_find_bus' always gets domain_nr as 0. This
> >> > will cause problem for scanning multiple domains.
> >>
> >> Good catch. I was switching between creating a pci_controller in arch/arm64 and
> >> adding the needed bits in pci_host_bridge. After internal review I've decided to
> >> add the domain_nr to pci_host_bridge, but forgot to update the code everywhere.
> >
> > Hi Liviu Dudau,
> >
> > One more thing,
> > I am reviewing and compiling your patch.
> > Would you consider adding 'struct pci_sys_data' and 'struct hw_pci'?
> >
> > Currently, 4 PCIe Host drivers (pci-mvebu.c, pci-tegra.c,
> > pci-rcar-gen2.c, pcie-designware.c) are using 'struct pci_sys_data'
> > and 'struct hw_pci' in their drivers. Without this, it makes build
> > errors.
> >
> > In arm32, 'struct pci_sys_data' and 'struct hw_pci' is defined
> > in "arch/arm/include/asm/mach/pci.h".
> >
> > Tanmay Inamdar,
> > Your 'APM X-Gene PCIe' patch also needs 'struct pci_sys_data' and
> > 'struct hw_pci'. With Liviu Dudau's patch, it will make build
> > errors. Would you check this?
>
> X-Gene PCIe host driver is dependent on arm64 PCI patch. My previous
> approach was based on 32bit arm PCI support. With Liviu's approach, I
> will have to make changes in host driver to get rid of hw_pci and
> pci_sys_data which are no longer required.
I want to use 'drivers/pci/host/pcie-designware.c' for both arm32
and arm64, without any code changes. However, it looks impossible.
I made 'drivers/pci/host/pcie-designware.c' based on 32bit arm PCI
support. Then, with Liviu's patch, do I have to make new code for arm64,
even though the same HW PCIe IP is used?
- For arm32
drivers/pci/host/pcie-designware.c
- For arm64
drivers/pci/host/pcie-designware-arm64.c
>
> IMO it should not cause build errors for PCI host drivers dependent on
> architectures other than arm64. Can you post the error?
>
I post the build errors.
CC drivers/pci/host/pcie-designware.o
CHK kernel/config_data.h
drivers/pci/host/pcie-designware.c:72:52: warning: 'struct pci_sys_data' declared inside parameter list [enabled by default]
static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
^
drivers/pci/host/pcie-designware.c:72:52: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
drivers/pci/host/pcie-designware.c: In function 'sys_to_pcie'
drivers/pci/host/pcie-designware.c:74:12: error: dereferencing pointer to incomplete type
return sys->private_data;
^
drivers/pci/host/pcie-designware.c: In function 'dw_pcie_msi_map'
drivers/pci/host/pcie-designware.c:384:2: error: implicit declaration of function 'set_irq_flags' [-Werror=implicit-function-declaration]
set_irq_flags(irq, IRQF_VALID);
^
drivers/pci/host/pcie-designware.c:384:21: error: 'IRQF_VALID??undeclared (first use in this function)
set_irq_flags(irq, IRQF_VALID);
^
drivers/pci/host/pcie-designware.c:384:21: note: each undeclared identifier is reported only once for each function it appears in
drivers/pci/host/pcie-designware.c: In function 'dw_pcie_host_init'
drivers/pci/host/pcie-designware.c:492:2: error: invalid use of undefined type 'struct hw_pci'
dw_pci.nr_controllers = 1;
^
drivers/pci/host/pcie-designware.c:493:2: error: invalid use of undefined type 'struct hw_pci'
dw_pci.private_data = (void **)&pp;
^
drivers/pci/host/pcie-designware.c:495:2: error: implicit declaration of function 'pci_common_init' [-Werror=implicit-function-declaration]
pci_common_init(&dw_pci);
^
drivers/pci/host/pcie-designware.c:498:2: error: invalid use of undefined type 'struct hw_pci'
dw_pci.domain++;
^
drivers/pci/host/pcie-designware.c: At top level:
drivers/pci/host/pcie-designware.c:698:41: warning: 'struct pci_sys_data??declared inside parameter list [enabled by default]
static int dw_pcie_setup(int nr, struct pci_sys_data *sys)
^
drivers/pci/host/pcie-designware.c: In function 'dw_pcie_setup'
drivers/pci/host/pcie-designware.c:702:2: warning: passing argument 1 of 'sys_to_pcie' from incompatible pointer type [enabled by default]
pp = sys_to_pcie(sys);
^
drivers/pci/host/pcie-designware.c:72:33: note: expected 'struct pci_sys_data *' but argument is of type 'struct pci_sys_data *'
static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
^
drivers/pci/host/pcie-designware.c:708:6: error: dereferencing pointer to incomplete type
sys->io_offset = global_io_offset - pp->config.io_bus_addr;
^
drivers/pci/host/pcie-designware.c:711:31: error: dereferencing pointer to incomplete type
pci_add_resource_offset(&sys->resources, &pp->io,
^
drivers/pci/host/pcie-designware.c:712:9: error: dereferencing pointer to incomplete type
sys->io_offset);
^
drivers/pci/host/pcie-designware.c:715:5: error: dereferencing pointer to incomplete type
sys->mem_offset = pp->mem.start - pp->config.mem_bus_addr;
^
drivers/pci/host/pcie-designware.c:716:30: error: dereferencing pointer to incomplete type
pci_add_resource_offset(&sys->resources, &pp->mem, sys->mem_offset);
^
drivers/pci/host/pcie-designware.c:716:56: error: dereferencing pointer to incomplete type
pci_add_resource_offset(&sys->resources, &pp->mem, sys->mem_offset);
^
drivers/pci/host/pcie-designware.c: At top level:
drivers/pci/host/pcie-designware.c:721:56: warning: 'struct pci_sys_data' declared inside parameter list [enabled by default]
static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
^
drivers/pci/host/pcie-designware.c: In function 'dw_pcie_scan_bus'
drivers/pci/host/pcie-designware.c:724:9: warning: passing argument 1 of 'sys_to_pcie' from incompatible pointer type [enabled by default]
struct pcie_port *pp = sys_to_pcie(sys);
^
drivers/pci/host/pcie-designware.c:72:33: note: expected 'struct pci_sys_data *' but argument is of type 'sruct pci_sys_data *'
static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
^
drivers/pci/host/pcie-designware.c:727:24: error: dereferencing pointer to incomplete type
pp->root_bus_nr = sys->busnr;
^
drivers/pci/host/pcie-designware.c:728:36: error: dereferencing pointer to incomplete type
bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
^
drivers/pci/host/pcie-designware.c:729:15: error: dereferencing pointer to incomplete type
sys, &sys->resources);
^
drivers/pci/host/pcie-designware.c: At top level:
drivers/pci/host/pcie-designware.c:755:15: error: variable 'dw_pci' has initializer but incomplete type
static struct hw_pci dw_pci = {
^
drivers/pci/host/pcie-designware.c:756:2: error: unknown field 'setup' specified in initializer
.setup = dw_pcie_setup,
^
drivers/pci/host/pcie-designware.c:756:2: warning: excess elements in struct initializer [enabled by default]
drivers/pci/host/pcie-designware.c:756:2: warning: (near initialization for 'dw_pci' [enabled by default]
drivers/pci/host/pcie-designware.c:757:2: error: unknown field 'scan' specified in initializer
.scan = dw_pcie_scan_bus,
^
drivers/pci/host/pcie-designware.c:757:2: warning: excess elements in struct initializer [enabled by default]
drivers/pci/host/pcie-designware.c:757:2: warning: (near initialization for 'dw_pci' [enabled by default]
drivers/pci/host/pcie-designware.c:758:2: error: unknown field 'map_irq' specified in initializer
.map_irq = dw_pcie_map_irq,
^
drivers/pci/host/pcie-designware.c:758:2: warning: excess elements in struct initializer [enabled by default]
drivers/pci/host/pcie-designware.c:758:2: warning: (near initialization for 'dw_pci' [enabled by default]
drivers/pci/host/pcie-designware.c:759:2: error: unknown field 'add_bus' specified in initializer
.add_bus = dw_pcie_add_bus,
^
drivers/pci/host/pcie-designware.c:759:2: warning: excess elements in struct initializer [enabled by default]
drivers/pci/host/pcie-designware.c:759:2: warning: (near initialization for 'dw_pci' [enabled by default]
cc1: some warnings being treated as errors
make[3]: *** [drivers/pci/host/pcie-designware.o] Error 1
> >
> >>
> >> Thanks for reviewing this, will fix in v2.
> >>
> >> Do you find porting to the new API straight forward?
> >>
> >
^ permalink raw reply
* [PATCH 0/4] clk: dt: add support for default rate/parent
From: Tero Kristo @ 2014-02-13 9:00 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This set is a mix-match of new DT properties for generic and TI specific
clock drivers. Basically provided for commenting purposes. The patches
provide a way to configure clock parents / rates during boot through DT.
"default-rate" : sets rate of a clock during boot, supported for any DT
clock type (through generic clock driver)
"ti,default-parent" : selects a default parent for a multiplexer clock,
only supported for TI specific mux clock for now,
as generic mux clock does not support DT clocks
Patch #4 provided as a reference how to move the default rates / parents
from kernel code to DT.
Default-rate logic in patch #2 looks somewhat complicated, as the clocks
need to be sorted based on their parents to avoid cases where a child clock
would set its rate first, just to be overridden by its parent changing
rate later and resulting in incorrect rate for the child clock.
If the default-rate generic property is not going to fly, it can be moved
to TI only drivers also.
-Tero
^ permalink raw reply
* [PATCH 1/4] clk: ti: mux: add support for default-parenting
From: Tero Kristo @ 2014-02-13 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392282048-6284-1-git-send-email-t-kristo@ti.com>
ti,mux-clock now supports ti,default-parent property, which can be used
to configure the default parent of the clock during boot. This property
can be added to board specific files, or under the clock data itself.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
Documentation/devicetree/bindings/clock/ti/mux.txt | 7 ++++++
drivers/clk/ti/mux.c | 24 ++++++++++++++++++--
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/ti/mux.txt b/Documentation/devicetree/bindings/clock/ti/mux.txt
index 2d0d170..4e291eb 100644
--- a/Documentation/devicetree/bindings/clock/ti/mux.txt
+++ b/Documentation/devicetree/bindings/clock/ti/mux.txt
@@ -48,6 +48,8 @@ Optional properties:
zero
- ti,set-rate-parent : clk_set_rate is propagated to parent clock,
not supported by the composite-mux-clock subtype
+- ti,default-parent : configures mux parent during boot to be the provided
+ phandle clock
Examples:
@@ -65,6 +67,7 @@ abe_dpll_bypass_clk_mux_ck: abe_dpll_bypass_clk_mux_ck at 4a306108 {
clocks = <&sys_clkin_ck>, <&sys_32k_ck>;
ti,bit-shift = <24>;
reg = <0x0108>;
+ ti,default-parent = <&sys_32k_ck>;
};
mcbsp5_mux_fck: mcbsp5_mux_fck {
@@ -74,3 +77,7 @@ mcbsp5_mux_fck: mcbsp5_mux_fck {
ti,bit-shift = <4>;
reg = <0x02d8>;
};
+
+&mcbsp5_mux_fck {
+ ti,default-parent = <&mcbsp_clks>;
+};
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index 0197a47..557a7ce 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -108,7 +108,8 @@ static struct clk *_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg,
u8 shift, u32 mask, u8 clk_mux_flags,
- u32 *table, spinlock_t *lock)
+ u32 *table, int default_parent,
+ spinlock_t *lock)
{
struct clk_mux *mux;
struct clk *clk;
@@ -136,6 +137,9 @@ static struct clk *_register_mux(struct device *dev, const char *name,
mux->table = table;
mux->hw.init = &init;
+ if (default_parent >= 0)
+ ti_clk_mux_set_parent(&mux->hw, default_parent);
+
clk = clk_register(dev, &mux->hw);
if (IS_ERR(clk))
@@ -161,6 +165,8 @@ static void of_mux_clk_setup(struct device_node *node)
u32 mask = 0;
u32 shift = 0;
u32 flags = 0;
+ struct device_node *default_parent;
+ int default_parent_idx = -1;
num_parents = of_clk_get_parent_count(node);
if (num_parents < 2) {
@@ -174,6 +180,19 @@ static void of_mux_clk_setup(struct device_node *node)
for (i = 0; i < num_parents; i++)
parent_names[i] = of_clk_get_parent_name(node, i);
+ default_parent = of_parse_phandle(node, "ti,default-parent", 0);
+
+ if (default_parent) {
+ for (i = 0; i < num_parents; i++) {
+ struct device_node *tmp;
+ tmp = of_parse_phandle(node, "clocks", i);
+ if (tmp == default_parent) {
+ default_parent_idx = i;
+ break;
+ }
+ }
+ }
+
reg = ti_clk_get_reg_addr(node, 0);
if (!reg)
@@ -195,7 +214,8 @@ static void of_mux_clk_setup(struct device_node *node)
mask = (1 << fls(mask)) - 1;
clk = _register_mux(NULL, node->name, parent_names, num_parents, flags,
- reg, shift, mask, clk_mux_flags, NULL, NULL);
+ reg, shift, mask, clk_mux_flags, NULL,
+ default_parent_idx, NULL);
if (!IS_ERR(clk))
of_clk_add_provider(node, of_clk_src_simple_get, clk);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/4] clk: add support for default-rate
From: Tero Kristo @ 2014-02-13 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392282048-6284-1-git-send-email-t-kristo@ti.com>
default-rate property can now be used to set initial rates for clocks.
This is added by default for all clocks which get initialized through
of_clk_init().
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
.../devicetree/bindings/clock/clock-bindings.txt | 9 ++
drivers/clk/clk.c | 86 ++++++++++++++++++++
include/linux/clk-provider.h | 2 +
3 files changed, 97 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt
index 7c52c29..d676112 100644
--- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
+++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
@@ -44,6 +44,15 @@ For example:
clocks by index. The names should reflect the clock output signal
names for the device.
+default-rate: Sets the rate of the clock during boot to the provided
+ rate.
+
+For example:
+
+ clk-divider {
+ default-rate = <1000000>;
+ };
+
==Clock consumers==
Required properties:
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 5517944..cb144e4 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2526,6 +2526,89 @@ const char *of_clk_get_parent_name(struct device_node *np, int index)
}
EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
+static LIST_HEAD(clk_init_info_list);
+
+struct clk_init_info {
+ struct device_node *node;
+ struct clk *clk;
+ u32 rate;
+ struct list_head link;
+ struct list_head sort_link;
+};
+
+int __init of_clk_parse_init_rate(struct device_node *node, struct clk *clk)
+{
+ u32 rate;
+ struct clk_init_info *cinfo;
+
+ if (of_property_read_u32(node, "default-rate", &rate))
+ return 0;
+
+ cinfo = kzalloc(sizeof(*cinfo), GFP_KERNEL);
+ if (!cinfo)
+ return -ENOMEM;
+
+ cinfo->node = node;
+ cinfo->clk = clk;
+ cinfo->rate = rate;
+ list_add(&cinfo->link, &clk_init_info_list);
+ INIT_LIST_HEAD(&cinfo->sort_link);
+
+ return 0;
+}
+
+int __init of_clk_set_init_rates(void)
+{
+ struct clk_init_info *cinfo, *tmp;
+ struct of_phandle_args clkspec;
+ int ret = 0;
+ struct list_head sorted_list;
+ struct clk *clk;
+
+ INIT_LIST_HEAD(&sorted_list);
+
+ list_for_each_entry(cinfo, &clk_init_info_list, link) {
+ /* Get missing clk pointers */
+ if (!cinfo->clk) {
+ clkspec.np = cinfo->node;
+ cinfo->clk = of_clk_get_from_provider(&clkspec);
+ }
+
+ /* Check if we are the parent of any of the sorted clocks */
+ list_for_each_entry(tmp, &sorted_list, sort_link) {
+ clk = tmp->clk;
+ while (clk && clk != cinfo->clk)
+ clk = clk->parent;
+
+ if (clk == cinfo->clk) {
+ /* Add us before this node in the list */
+ list_add_tail(&cinfo->sort_link,
+ &tmp->sort_link);
+ break;
+ }
+ }
+
+ if (list_empty(&cinfo->sort_link))
+ list_add_tail(&cinfo->sort_link, &sorted_list);
+ }
+
+ /* Process sorted list and set clk rates */
+ list_for_each_entry_safe(cinfo, tmp, &sorted_list, sort_link) {
+ int r = clk_set_rate(cinfo->clk, cinfo->rate);
+ if (r) {
+ pr_err("%s: clk_set_rate for %s failed: %d\n", __func__,
+ cinfo->node->name, ret);
+ ret = r;
+ }
+
+ /* Clean up the static list */
+ list_del(&cinfo->link);
+ kfree(cinfo);
+ }
+
+ return ret;
+}
+
/**
* of_clk_init() - Scan and init clock providers from the DT
* @matches: array of compatible values and init functions for providers.
@@ -2544,6 +2627,9 @@ void __init of_clk_init(const struct of_device_id *matches)
for_each_matching_node_and_match(np, matches, &match) {
of_clk_init_cb_t clk_init_cb = match->data;
clk_init_cb(np);
+ of_clk_parse_init_rate(np, NULL);
}
+
+ of_clk_set_init_rates();
}
#endif
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 939533d..1bbd194 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -506,6 +506,8 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data);
int of_clk_get_parent_count(struct device_node *np);
const char *of_clk_get_parent_name(struct device_node *np, int index);
+int of_clk_parse_init_rate(struct device_node *node, struct clk *clk);
+int of_clk_set_init_rates(void);
void of_clk_init(const struct of_device_id *matches);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 3/4] clk: ti: add support for default-rate property from DT
From: Tero Kristo @ 2014-02-13 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392282048-6284-1-git-send-email-t-kristo@ti.com>
default-rate property can now be used to define default rates for clocks,
which get configured during boot.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
arch/arm/mach-omap2/prm_common.c | 2 ++
drivers/clk/ti/clk.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index b4c4ab9..4703545 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -528,5 +528,7 @@ int __init of_prcm_init(void)
ti_dt_clockdomains_setup();
+ of_clk_set_init_rates();
+
return 0;
}
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index b1a6f71..23998b7 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -156,6 +156,7 @@ void ti_dt_clk_init_provider(struct device_node *parent, int index)
clk_init_cb = (of_clk_init_cb_t)match->data;
pr_debug("%s: initializing: %s\n", __func__, np->name);
clk_init_cb(np);
+ of_clk_parse_init_rate(np, NULL);
}
list_for_each_entry_safe(retry, tmp, &retry_list, link) {
--
1.7.9.5
^ permalink raw reply related
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