* [PATCH] arm64: Call numa_store_cpu_info() earlier.
From: David Daney @ 2016-09-20 18:46 UTC (permalink / raw)
To: linux-arm-kernel
From: David Daney <david.daney@cavium.com>
The wq_numa_init() function makes a private CPU to node map by calling
cpu_to_node() early in the boot process, before the non-boot CPUs are
brought online. Since the default implementation of cpu_to_node()
returns zero for CPUs that have never been brought online, the
workqueue system's view is that *all* CPUs are on node zero.
When the unbound workqueue for a non-zero node is created, the
tsk_cpus_allowed() for the worker threads is the empty set because
there are, in the view of the workqueue system, no CPUs on non-zero
nodes. The code in try_to_wake_up() using this empty cpumask ends up
using the cpumask empty set value of NR_CPUS as an index into the
per-CPU area pointer array, and gets garbage as it is one past the end
of the array. This results in:
[ 0.881970] Unable to handle kernel paging request at virtual address fffffb1008b926a4
[ 1.970095] pgd = fffffc00094b0000
[ 1.973530] [fffffb1008b926a4] *pgd=0000000000000000, *pud=0000000000000000, *pmd=0000000000000000
[ 1.982610] Internal error: Oops: 96000004 [#1] SMP
[ 1.987541] Modules linked in:
[ 1.990631] CPU: 48 PID: 295 Comm: cpuhp/48 Tainted: G W 4.8.0-rc6-preempt-vol+ #9
[ 1.999435] Hardware name: Cavium ThunderX CN88XX board (DT)
[ 2.005159] task: fffffe0fe89cc300 task.stack: fffffe0fe8b8c000
[ 2.011158] PC is at try_to_wake_up+0x194/0x34c
[ 2.015737] LR is at try_to_wake_up+0x150/0x34c
[ 2.020318] pc : [<fffffc00080e7468>] lr : [<fffffc00080e7424>] pstate: 600000c5
[ 2.027803] sp : fffffe0fe8b8fb10
[ 2.031149] x29: fffffe0fe8b8fb10 x28: 0000000000000000
[ 2.036522] x27: fffffc0008c63bc8 x26: 0000000000001000
[ 2.041896] x25: fffffc0008c63c80 x24: fffffc0008bfb200
[ 2.047270] x23: 00000000000000c0 x22: 0000000000000004
[ 2.052642] x21: fffffe0fe89d25bc x20: 0000000000001000
[ 2.058014] x19: fffffe0fe89d1d00 x18: 0000000000000000
[ 2.063386] x17: 0000000000000000 x16: 0000000000000000
[ 2.068760] x15: 0000000000000018 x14: 0000000000000000
[ 2.074133] x13: 0000000000000000 x12: 0000000000000000
[ 2.079505] x11: 0000000000000000 x10: 0000000000000000
[ 2.084879] x9 : 0000000000000000 x8 : 0000000000000000
[ 2.090251] x7 : 0000000000000040 x6 : 0000000000000000
[ 2.095621] x5 : ffffffffffffffff x4 : 0000000000000000
[ 2.100991] x3 : 0000000000000000 x2 : 0000000000000000
[ 2.106364] x1 : fffffc0008be4c24 x0 : ffffff0ffffada80
[ 2.111737]
[ 2.113236] Process cpuhp/48 (pid: 295, stack limit = 0xfffffe0fe8b8c020)
[ 2.120102] Stack: (0xfffffe0fe8b8fb10 to 0xfffffe0fe8b90000)
[ 2.125914] fb00: fffffe0fe8b8fb80 fffffc00080e7648
.
.
.
[ 2.442859] Call trace:
[ 2.445327] Exception stack(0xfffffe0fe8b8f940 to 0xfffffe0fe8b8fa70)
[ 2.451843] f940: fffffe0fe89d1d00 0000040000000000 fffffe0fe8b8fb10 fffffc00080e7468
[ 2.459767] f960: fffffe0fe8b8f980 fffffc00080e4958 ffffff0ff91ab200 fffffc00080e4b64
[ 2.467690] f980: fffffe0fe8b8f9d0 fffffc00080e515c fffffe0fe8b8fa80 0000000000000000
[ 2.475614] f9a0: fffffe0fe8b8f9d0 fffffc00080e58e4 fffffe0fe8b8fa80 0000000000000000
[ 2.483540] f9c0: fffffe0fe8d10000 0000000000000040 fffffe0fe8b8fa50 fffffc00080e5ac4
[ 2.491465] f9e0: ffffff0ffffada80 fffffc0008be4c24 0000000000000000 0000000000000000
[ 2.499387] fa00: 0000000000000000 ffffffffffffffff 0000000000000000 0000000000000040
[ 2.507309] fa20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 2.515233] fa40: 0000000000000000 0000000000000000 0000000000000000 0000000000000018
[ 2.523156] fa60: 0000000000000000 0000000000000000
[ 2.528089] [<fffffc00080e7468>] try_to_wake_up+0x194/0x34c
[ 2.533723] [<fffffc00080e7648>] wake_up_process+0x28/0x34
[ 2.539275] [<fffffc00080d3764>] create_worker+0x110/0x19c
[ 2.544824] [<fffffc00080d69dc>] alloc_unbound_pwq+0x3cc/0x4b0
[ 2.550724] [<fffffc00080d6bcc>] wq_update_unbound_numa+0x10c/0x1e4
[ 2.557066] [<fffffc00080d7d78>] workqueue_online_cpu+0x220/0x28c
[ 2.563234] [<fffffc00080bd288>] cpuhp_invoke_callback+0x6c/0x168
[ 2.569398] [<fffffc00080bdf74>] cpuhp_up_callbacks+0x44/0xe4
[ 2.575210] [<fffffc00080be194>] cpuhp_thread_fun+0x13c/0x148
[ 2.581027] [<fffffc00080dfbac>] smpboot_thread_fn+0x19c/0x1a8
[ 2.586929] [<fffffc00080dbd64>] kthread+0xdc/0xf0
[ 2.591776] [<fffffc0008083380>] ret_from_fork+0x10/0x50
[ 2.597147] Code: b00057e1 91304021 91005021 b8626822 (b8606821)
[ 2.603464] ---[ end trace 58c0cd36b88802bc ]---
[ 2.608138] Kernel panic - not syncing: Fatal exception
Fix by moving call to numa_store_cpu_info() for all CPUs into
smp_prepare_cpus(), which happens before wq_numa_init(). Since
smp_store_cpu_info() now contains only a single function call,
simplify by removing the function and out-lining its contents.
Suggested-by: Robert Richter <rric@kernel.org>
fixes: 1a2db300348b ("arm64, numa: Add NUMA support for arm64 platforms.")
Cc: <stable@vger.kernel.org> # 4.7.x-
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/arm64/kernel/smp.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index d93d433..3ff173e 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -201,12 +201,6 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
return ret;
}
-static void smp_store_cpu_info(unsigned int cpuid)
-{
- store_cpu_topology(cpuid);
- numa_store_cpu_info(cpuid);
-}
-
/*
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
@@ -254,7 +248,7 @@ asmlinkage void secondary_start_kernel(void)
*/
notify_cpu_starting(cpu);
- smp_store_cpu_info(cpu);
+ store_cpu_topology(cpu);
/*
* OK, now it's safe to let the boot CPU continue. Wait for
@@ -689,10 +683,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
{
int err;
unsigned int cpu;
+ unsigned int this_cpu;
init_cpu_topology();
- smp_store_cpu_info(smp_processor_id());
+ this_cpu = smp_processor_id();
+ store_cpu_topology(this_cpu);
+ numa_store_cpu_info(this_cpu);
/*
* If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
@@ -719,6 +716,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
continue;
set_cpu_present(cpu, true);
+ numa_store_cpu_info(cpu);
}
}
--
1.8.3.1
^ permalink raw reply related
* [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case
From: Bjorn Helgaas @ 2016-09-20 19:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKv+Gu-j-gKiNMx-TvSxezJth1619FN8W1rAy7DKpkmfX9ii6A@mail.gmail.com>
On Tue, Sep 20, 2016 at 04:09:25PM +0100, Ard Biesheuvel wrote:
> On 20 September 2016 at 15:05, Bjorn Helgaas <helgaas@kernel.org> wrote:
> > Hi Ard,
> >
> > On Tue, Sep 20, 2016 at 02:40:13PM +0100, Ard Biesheuvel wrote:
> >> On 20 September 2016 at 14:33, Bjorn Helgaas <helgaas@kernel.org> wrote:
> >> > [+cc Rafael (maybe already cc'd; I didn't recognize rafael at kernel.org, Duc]
> >> >
> >> > On Tue, Sep 20, 2016 at 09:23:21AM +0200, Tomasz Nowicki wrote:
> >> >> On 19.09.2016 20:09, Bjorn Helgaas wrote:
> >> >> >On Fri, Sep 09, 2016 at 09:24:05PM +0200, Tomasz Nowicki wrote:
> >> >> >>thunder-pem driver stands for being ACPI based PCI host controller.
> >> >> >>However, there is no standard way to describe its PEM-specific register
> >> >> >>ranges in ACPI tables. Thus we add thunder_pem_init() ACPI extension
> >> >> >>to obtain hardcoded addresses from static resource array.
> >> >> >>Although it is not pretty, it prevents from creating standard mechanism to
> >> >> >>handle similar cases in future.
> >> >> >>
> >> >> >>Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
> >> >> >>---
> >> >> >> drivers/pci/host/pci-thunder-pem.c | 61 ++++++++++++++++++++++++++++++--------
> >> >> >> 1 file changed, 48 insertions(+), 13 deletions(-)
> >> >> >>
> >> >> >>diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c
> >> >> >>index 6abaf80..b048761 100644
> >> >> >>--- a/drivers/pci/host/pci-thunder-pem.c
> >> >> >>+++ b/drivers/pci/host/pci-thunder-pem.c
> >> >> >>@@ -18,6 +18,7 @@
> >> >> >> #include <linux/init.h>
> >> >> >> #include <linux/of_address.h>
> >> >> >> #include <linux/of_pci.h>
> >> >> >>+#include <linux/pci-acpi.h>
> >> >> >> #include <linux/pci-ecam.h>
> >> >> >> #include <linux/platform_device.h>
> >> >> >>
> >> >> >>@@ -284,6 +285,40 @@ static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
> >> >> >> return pci_generic_config_write(bus, devfn, where, size, val);
> >> >> >> }
> >> >> >>
> >> >> >>+#ifdef CONFIG_ACPI
> >> >> >>+static struct resource thunder_pem_reg_res[] = {
> >> >> >>+ [4] = DEFINE_RES_MEM(0x87e0c0000000UL, SZ_16M),
> >> >> >>+ [5] = DEFINE_RES_MEM(0x87e0c1000000UL, SZ_16M),
> >> >> >>+ [6] = DEFINE_RES_MEM(0x87e0c2000000UL, SZ_16M),
> >> >> >>+ [7] = DEFINE_RES_MEM(0x87e0c3000000UL, SZ_16M),
> >> >> >>+ [8] = DEFINE_RES_MEM(0x87e0c4000000UL, SZ_16M),
> >> >> >>+ [9] = DEFINE_RES_MEM(0x87e0c5000000UL, SZ_16M),
> >> >> >>+ [14] = DEFINE_RES_MEM(0x97e0c0000000UL, SZ_16M),
> >> >> >>+ [15] = DEFINE_RES_MEM(0x97e0c1000000UL, SZ_16M),
> >> >> >>+ [16] = DEFINE_RES_MEM(0x97e0c2000000UL, SZ_16M),
> >> >> >>+ [17] = DEFINE_RES_MEM(0x97e0c3000000UL, SZ_16M),
> >> >> >>+ [18] = DEFINE_RES_MEM(0x97e0c4000000UL, SZ_16M),
> >> >> >>+ [19] = DEFINE_RES_MEM(0x97e0c5000000UL, SZ_16M),
> >> >> >
> >> >> >1) The "correct" way to discover the resources consumed by an ACPI
> >> >> > device is to use the _CRS method. I know there are some issues
> >> >> > there for bridges (not the fault of ThunderX!) because there's not
> >> >> > a good way to distinguish windows from resources consumed directly
> >> >> > by the bridge.
> >> >> >
> >> >> > But we should either do this correctly, or include a comment about
> >> >> > why we're doing it wrong, so we don't give the impression that this
> >> >> > is the right way to do it.
> >> >> >
> >> >> > I seem to recall some discussion about why we're doing it this way,
> >> >> > but I don't remember the details. It'd be nice to include a
> >> >> > summary here.
> >> >>
> >> >> OK I will. The reason why we cannot use _CRS for this case is that
> >> >> CONSUMER flag was not use consistently for the bridge so far.
> >> >
> >> > Yes, I'm aware of that problem, but hard-coding resources into drivers
> >> > is just a disaster. The PCI and ACPI cores need generic ways to learn
> >> > what resources are consumed by devices. For PCI devices, that's done
> >> > with BARs. For ACPI devices, it's done with _CRS. Without generic
> >> > resource discovery, we can't manage resources reliably at the system
> >> > level [1].
> >> >
> >> > You have a PNP0A03/PNP0A08 device for the PCI host bridge. Because of
> >> > the BIOS bugs in CONSUMER flag usage, we assume everything in its _CRS
> >> > is a window and not consumed by the bridge itself. What if you added
> >> > a companion ACPI device with a _CRS that contained the bridge
> >> > resources? Then you'd have some driver ugliness to find that device,
> >> > but at least the ACPI core could tell what resources were in use.
> >> >
> >> > Maybe Rafael has a better idea?
> >>
> >> In the discussions leading up to this, we tried very hard to make this
> >> arm64/acpi quirks mechanism just as flexible as we need it to be to
> >> cover the current crop of incompatible hardware, but not more so.
> >> Going forward, we intend to require all arm64/acpi hardware to be spec
> >> compliant, and so any parametrization beyond what is required for the
> >> currently known broken hardware is only going to make it easier for
> >> others to ship with tweaked ACPI descriptions so that an existing
> >> quirk is triggered for hardware that it was not intended for. It also
> >> implies that we have to deal with the ACPI descriptions as they were
> >> shipped with the current hardware.
> >>
> >> That does not mean, of course, that we should use bare constants
> >> rather than symbolic ones, but anything beyond that exceeds the
> >> desired scope of quirks handling.
> >
> > Symbolic vs bare constants is the least of my worries. I'm pretty
> > happy with the current quirk implementation. It's pretty simple and
> > straightforward.
> >
>
> OK, good to know that we are on the right track here.
>
> > Apparently you shipped broken firmware that doesn't accurately
> > describe system resource usage. Presumably that firmware could be
> > updated, but maybe it's worthwhile to work around it in the kernel,
> > depending on where it got shipped.
> >
>
> None of these platforms can be fixed entirely in software, and given
> that we will not be adding quirks for new broken hardware, we should
> ask ourselves whether having two versions of a quirk, i.e., one for
> broken hardware + currently shipping firmware, and one for the same
> broken hardware with fixed firmware is really an improvement over what
> has been proposed here.
We're talking about two completely different types of quirks:
1) MCFG quirks to use memory-mapped config space that doesn't quite
conform to the ECAM model in the PCIe spec, and
2) Some yet-to-be-determined method to describe address space
consumed by a bridge.
The first two patches of this series are a nice implementation for 1).
The third patch (ThunderX-specific) is one possibility for 2), but I
don't like it because there's no way for generic software like the
ACPI core to discover these resources.
> > I'd like to step back and come up with some understanding of how
> > non-broken firmware *should* deal with this issue. Then, if we *do*
> > work around this particular broken firmware in the kernel, it would be
> > nice to do it in a way that fits in with that understanding.
> >
> > For example, if a companion ACPI device is the preferred solution, an
> > ACPI quirk could fabricate a device with the required resources. That
> > would address the problem closer to the source and make it more likely
> > that the rest of the system will work correctly: /proc/iomem could
> > make sense, things that look at _CRS generically would work (e.g,
> > /sys/, an admittedly hypothetical "lsacpi", etc.)
> >
> > Hard-coding stuff in drivers is a point solution that doesn't provide
> > any guidance for future platforms and makes it likely that the hack
> > will get copied into even more drivers.
> >
>
> OK, I see. But the guidance for future platforms should be 'do not
> rely on quirks', and what I am arguing here is that the more we polish
> up this code and make it clean and reusable, the more likely it is
> that will end up getting abused by new broken hardware that we set out
> to reject entirely in the first place.
>
> So of course, if the quirk involves claiming resources, let's make
> sure that this occurs in the cleanest and most compliant way possible.
> But any factoring/reuse concerns other than for the current crop of
> broken hardware should be avoided imo.
If future hardware is completely ECAM-compliant and we don't need any
more MCFG quirks, that would be great.
But we'll still need to describe that memory-mapped config space
somewhere. If that's done with PNP0C02 or similar devices (as is done
on my x86 laptop), we'd be all set.
If we need to work around firmware in the field that doesn't do that,
one possibility is a PNP quirk along the lines of
quirk_amd_mmconfig_area().
Bjorn
^ permalink raw reply
* [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms
From: Bjorn Helgaas @ 2016-09-20 19:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473449047-10499-1-git-send-email-tn@semihalf.com>
On Fri, Sep 09, 2016 at 09:24:02PM +0200, Tomasz Nowicki wrote:
> Quirk handling relies on an idea of simple static array which contains
> quirk enties. Each entry consists of identification information (IDs from
> standard header of MCFG table) along with custom pci_ecam_ops structure and
> configuration space resource structure. This way it is possible find
> corresponding quirk entries and override pci_ecam_ops and PCI configuration
> space regions.
>
> As an example, the last 3 patches present quirk handling mechanism usage for
> ThunderX.
>
> v5 -> v6
> - rebase against v4.8-rc5
> - drop patch 1 form previous series
> - keep pci_acpi_setup_ecam_mapping() in ARM64 arch directory
> - move quirk code to pci_mcfg.c
> - restrict quirk to override pci_ecam_ops and CFG resource structure
> only, no init call any more
> - split ThunderX quirks into the smaller chunks
> - add ThunderX pass1.x silicon revision support
>
> v4 -> v5
> - rebase against v4.8-rc1
> - rework to exact MCFG OEM ID, TABLE ID, rev match
> - use memcmp instead of strncmp
> - no substring match
> - fix typos and dmesg message
>
> Tomasz Nowicki (5):
> PCI/ACPI: Extend pci_mcfg_lookup() responsibilities
> PCI/ACPI: Check platform specific ECAM quirks
> PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI
> case
> PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon
> version
> PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x silicon
> version
>
> arch/arm64/kernel/pci.c | 17 ++--
> drivers/acpi/pci_mcfg.c | 168 +++++++++++++++++++++++++++++++++++-
> drivers/pci/host/pci-thunder-ecam.c | 2 +-
> drivers/pci/host/pci-thunder-pem.c | 63 +++++++++++---
> include/linux/pci-acpi.h | 4 +-
> include/linux/pci-ecam.h | 7 ++
> 6 files changed, 230 insertions(+), 31 deletions(-)
I'm not quite ready to merge these because we haven't resolved the
question of how to expose the resources used by the memory-mapped
config space. I'm fine with the first two patches (I did make a
couple trivial changes, see below), but there's no point in merging
them until we merge a user for them.
I pushed the series to pci/ecam-v6 for build testing and discussion.
The diff (the changes I made locally) from v6 as posted by Tomasz is
below.
Bjorn
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index eb14f74..bb3b8ad 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -42,86 +42,59 @@ struct mcfg_fixup {
struct resource cfgres;
};
-#define MCFG_DOM_ANY (-1)
#define MCFG_BUS_RANGE(start, end) DEFINE_RES_NAMED((start), \
((end) - (start) + 1), \
NULL, IORESOURCE_BUS)
-#define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
-#define MCFG_RES_EMPTY DEFINE_RES_NAMED(0, 0, NULL, 0)
+#define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
static struct mcfg_fixup mcfg_quirks[] = {
-/* { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
+/* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, cfgres, ops }, */
#ifdef CONFIG_PCI_HOST_THUNDER_PEM
+#define THUNDER_PEM_MCFG(rev, seg, addr) \
+ { "CAVIUM", "THUNDERX", rev, seg, MCFG_BUS_ANY, \
+ &pci_thunder_pem_ops, DEFINE_RES_MEM(addr, 0x39 * SZ_16M) }
+
/* SoC pass2.x */
- { "CAVIUM", "THUNDERX", 1, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 1, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+ THUNDER_PEM_MCFG(1, 4, 0x88001f000000UL),
+ THUNDER_PEM_MCFG(1, 5, 0x884057000000UL),
+ THUNDER_PEM_MCFG(1, 6, 0x88808f000000UL),
+ THUNDER_PEM_MCFG(1, 7, 0x89001f000000UL),
+ THUNDER_PEM_MCFG(1, 8, 0x894057000000UL),
+ THUNDER_PEM_MCFG(1, 9, 0x89808f000000UL),
+ THUNDER_PEM_MCFG(1, 14, 0x98001f000000UL),
+ THUNDER_PEM_MCFG(1, 15, 0x984057000000UL),
+ THUNDER_PEM_MCFG(1, 16, 0x98808f000000UL),
+ THUNDER_PEM_MCFG(1, 17, 0x99001f000000UL),
+ THUNDER_PEM_MCFG(1, 18, 0x994057000000UL),
+ THUNDER_PEM_MCFG(1, 19, 0x99808f000000UL),
/* SoC pass1.x */
- { "CAVIUM", "THUNDERX", 2, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
- { "CAVIUM", "THUNDERX", 2, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
- DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+ THUNDER_PEM_MCFG(2, 4, 0x88001f000000UL),
+ THUNDER_PEM_MCFG(2, 5, 0x884057000000UL),
+ THUNDER_PEM_MCFG(2, 6, 0x88808f000000UL),
+ THUNDER_PEM_MCFG(2, 7, 0x89001f000000UL),
+ THUNDER_PEM_MCFG(2, 8, 0x894057000000UL),
+ THUNDER_PEM_MCFG(2, 9, 0x89808f000000UL),
+ THUNDER_PEM_MCFG(2, 14, 0x98001f000000UL),
+ THUNDER_PEM_MCFG(2, 15, 0x984057000000UL),
+ THUNDER_PEM_MCFG(2, 16, 0x98808f000000UL),
+ THUNDER_PEM_MCFG(2, 17, 0x99001f000000UL),
+ THUNDER_PEM_MCFG(2, 18, 0x994057000000UL),
+ THUNDER_PEM_MCFG(2, 19, 0x99808f000000UL),
#endif
#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
+#define THUNDER_ECAM_MCFG(rev, seg) \
+ { "CAVIUM", "THUNDERX", rev, seg, MCFG_BUS_ANY, &pci_thunder_ecam_ops }
+
/* SoC pass1.x */
- { "CAVIUM", "THUNDERX", 2, 0, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 1, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 2, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 3, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 10, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 11, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 12, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
- { "CAVIUM", "THUNDERX", 2, 13, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
- MCFG_RES_EMPTY},
+ THUNDER_ECAM_MCFG(2, 0),
+ THUNDER_ECAM_MCFG(2, 1),
+ THUNDER_ECAM_MCFG(2, 2),
+ THUNDER_ECAM_MCFG(2, 3),
+ THUNDER_ECAM_MCFG(2, 10),
+ THUNDER_ECAM_MCFG(2, 11),
+ THUNDER_ECAM_MCFG(2, 12),
+ THUNDER_ECAM_MCFG(2, 13),
#endif
};
@@ -141,12 +114,12 @@ static void pci_mcfg_match_quirks(struct acpi_pci_root *root,
* table ID, and OEM revision from MCFG table standard header.
*/
for (i = 0, f = mcfg_quirks; i < ARRAY_SIZE(mcfg_quirks); i++, f++) {
- if (f->seg == root->segment &&
- resource_contains(&f->bus_range, &root->secondary) &&
- !memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) &&
+ if (!memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) &&
!memcmp(f->oem_table_id, mcfg_oem_table_id,
ACPI_OEM_TABLE_ID_SIZE) &&
- f->oem_revision == mcfg_oem_revision) {
+ f->oem_revision == mcfg_oem_revision &&
+ f->seg == root->segment &&
+ resource_contains(&f->bus_range, &root->secondary)) {
if (f->cfgres.start)
*cfgres = f->cfgres;
if (f->ops)
@@ -195,10 +168,10 @@ skip_lookup:
}
/*
- * Let to override default ECAM ops and CFG resource range.
- * Also, this might even retrieve CFG resource range in case MCFG
- * does not have it. Invalid CFG start address means MCFG firmware bug
- * or we need another quirk in array.
+ * Allow quirks to override default ECAM ops and CFG resource
+ * range. This may even fabricate a CFG resource range in case
+ * MCFG does not have it. Invalid CFG start address means MCFG
+ * firmware bug or we need another quirk in array.
*/
pci_mcfg_match_quirks(root, &res, &ops);
if (!res.start)
@@ -239,7 +212,7 @@ static __init int pci_mcfg_parse(struct acpi_table_header *header)
/* Save MCFG IDs and revision for quirks matching */
memcpy(mcfg_oem_id, header->oem_id, ACPI_OEM_ID_SIZE);
memcpy(mcfg_oem_table_id, header->oem_table_id, ACPI_OEM_TABLE_ID_SIZE);
- mcfg_oem_revision = header->revision;
+ mcfg_oem_revision = header->oem_revision;
pr_info("MCFG table detected, %d entries\n", n);
return 0;
^ permalink raw reply related
* [PATCH 3/4] ARM: dts: socfpga: Add new MCVEVK manufacturer compat
From: Dinh Nguyen @ 2016-09-20 19:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160919214044.9615-3-marex@denx.de>
On 09/19/2016 04:40 PM, Marek Vasut wrote:
> The board is now manufactured by Aries Embedded GmbH, update compat string.
>
Applied. But I think its too late for v4.9.
Dinh
^ permalink raw reply
* [PATCH] clk: mvebu: Add clk support for the orion5x SoC mv88f5181
From: Stephen Boyd @ 2016-09-20 19:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920162450.4046-1-gregory.clement@free-electrons.com>
On 09/20, Gregory CLEMENT wrote:
> From: Jamie Lentin <jm@lentin.co.uk>
>
> Referring to the u-boot sources for the Netgear WNR854T, add support
> for the mv88f5181.
>
> [gregory.clement at free-electrons.com: fix commit title]
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>
> Hi Stephen and Mike,
>
> do you agree to give your acked-by on this patch. It is part of a
> convertion of old orion5x Socv to the device tree. If you acked-by
> this one, then I will be able to take it in my tree and avoiding
> breaking the git bisect.
Is the problem that we're changing some dts files somewhere and
those platforms would stop booting if this change wasn't present?
Given that we're adding a new compatible it seems like we're
adding new SoC support, so having the clk patch and the dts patch
come together in -next via a merge instead of basing the dts
patch on top of the clk patch would be how things are normally
done.
If we're really changing some dts to be backwards incompatible,
then I understand the bisect problem and you can have my ack.
Acked-by: Stephen Boyd <sboyd@codeaurora.org.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 3/4] ARM: dts: socfpga: Add new MCVEVK manufacturer compat
From: Marek Vasut @ 2016-09-20 20:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <57E190B6.2060202@opensource.altera.com>
On 09/20/2016 09:40 PM, Dinh Nguyen wrote:
> On 09/19/2016 04:40 PM, Marek Vasut wrote:
>> The board is now manufactured by Aries Embedded GmbH, update compat string.
>>
>
> Applied. But I think its too late for v4.9.
>
> Dinh
>
4.10 it is then, thanks!
--
Best regards,
Marek Vasut
^ permalink raw reply
* iomux-mx3.h: possible macro precedence issue
From: Joe Perches @ 2016-09-20 20:02 UTC (permalink / raw)
To: linux-arm-kernel
Julia Lawall wrote a script
Link:?http://lkml.kernel.org/r/alpine.DEB.2.10.1609201503260.2914 at hadrien
that found a possible issue with macro argument precedence.
diff -u -p a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
--- a/arch/arm/mach-imx/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
@@ -529,7 +529,7 @@ enum iomux_pins {
#define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1)
#define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1)
#define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)
+#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE))
#define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2)
#define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2)
#define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2)
this may be intentional, but perhaps a solution
would be to use parentheses in the #define IOMUX_MODE
---
diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
index 368667b..3f9ede2 100644
--- a/arch/arm/mach-imx/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
@@ -156,7 +156,7 @@ void mxc_iomux_mode(unsigned int pin_mode);
(((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \
(padnum & IOMUX_PADNUM_MASK))
-#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT)
+#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT))
#define IOMUX_TO_GPIO(iomux_pin) \
((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT)
^ permalink raw reply related
* [PATCH v6 2/4] drivers: irqchip: Add STM32 external interrupts support
From: Thomas Gleixner @ 2016-09-20 20:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474387259-18926-3-git-send-email-alexandre.torgue@st.com>
Alexandre,
On Tue, 20 Sep 2016, Alexandre TORGUE wrote:
> The STM32 external interrupt controller consists of edge detectors that
> generate interrupts requests or wake-up events.
>
> Each line can be independently configured as interrupt or wake-up source,
> and triggers either on rising, falling or both edges. Each line can also
> be masked independently.
>
> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
That all looks very reasonable now. The only remaining question is your SOB
chain. Who is the author of these patches? You or Maxime? If it's Maxime,
then the changelog misses a From: tag. If it's you then Maximes SOB is
bogus.
Thanks,
tglx
^ permalink raw reply
* [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
From: Bjorn Helgaas @ 2016-09-20 20:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <VI1PR0401MB170958461E597D1BC7D280FF92E80@VI1PR0401MB1709.eurprd04.prod.outlook.com>
On Mon, Aug 22, 2016 at 10:09:18AM +0000, Po Liu wrote:
> Hi Bjorn,
>
> Sorry for late reply.
>
> I checked the updated kernel with Dongdong mentioned ACPI patch which was truly affected my quirk patch uploaded. So I suppose the quirk patch is not qualify to fix the bug.
I don't understand what you're saying here.
The quirk worked on your machine. It apparently didn't work on
Dongdong's machine because of_irq_parse_and_map_pci() is run after the
quirk in this path:
pci_device_probe
pcibios_alloc_irq # arm64
dev->irq = of_irq_parse_and_map_pci
and of_irq_parse_and_map_pci() returned zero, probably because
of_irq_parse_pci() failed. My guess is that the reason it works on
your machine but not Dongdong's is that your DTs are different such
that of_irq_parse_pci() works for you but not for Dongdong.
I think the idea of of_irq_parse_and_map_pci() is to set up a device's
INTx line. But that doesn't quite apply here because your device
doesn't actually *use* INTx. So I don't know why of_irq_parse_pci()
works for you. Maybe that's a symptom of a problem in your DT.
Or maybe you're saying that the quirk *didn't* work on your machine
when you tested it in a kernel that included d8ed75d59332 ("ARM64:
PCI: ACPI support for legacy IRQs parsing and consolidation with DT
code"). But that doesn't make sense either, because prior to
d8ed75d59332, we *always* set
dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
and after the patch we only do it if "acpi_disabled". I guess I just
don't understand what you're saying.
> I were keep thinking what your "explicitly checking for a root port device" meaning. Do you mean I should upload again the first version patch which fix it in the portdrv_core.c ? I would upload again if yes.
No, I did not mean you should go back to the first version of the
patch. If we *can* do this in a quirk, I think that would be much
better than doing it in the PCIe port driver. I meant that Dongdong's
suggestion of adding this:
if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
return;
to your quirk made sense to me.
> > -----Original Message-----
> > From: Bjorn Helgaas [mailto:helgaas at kernel.org]
> > Sent: Saturday, July 30, 2016 6:42 AM
> > To: Po Liu
> > Cc: linux-pci at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> > linux-kernel at vger.kernel.org; devicetree at vger.kernel.org; Roy Zang; Arnd
> > Bergmann; Marc Zyngier; Stuart Yoder; Yang-Leo Li; Minghuan Lian; Murali
> > Karicheri; Bjorn Helgaas; Shawn Guo; Mingkai Hu
> > Subject: Re: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
> >
> > On Tue, Jun 14, 2016 at 04:24:05PM +0800, Po Liu wrote:
> > > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
> > > When chip support the aer interrupt with none MSI/MSI-X/INTx mode,
> > > maybe there is interrupt line for aer pme etc. Search the interrupt
> > > number in the fdt file. Then fixup the dev->irq with it.
> > >
> > > Signed-off-by: Po Liu <po.liu@nxp.com>
> >
> > I'm not sure where we're at with this. Dongdong had some issue
> > (possibly with a version of the quirk on a different platform?), and I
> > think the suggestion of explicitly checking for a root port device was a
> > good one.
> >
> > So please update and repost this for next cycle.
> >
> > > ---
> > > changes for V3:
> > > - Move to quirk;
> > > - Only correct the irq in RC mode;
> > >
> > > drivers/pci/quirks.c | 29 +++++++++++++++++++++++++++++
> > > 1 file changed, 29 insertions(+)
> > >
> > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index
> > > ee72ebe..8b39cce 100644
> > > --- a/drivers/pci/quirks.c
> > > +++ b/drivers/pci/quirks.c
> > > @@ -25,6 +25,7 @@
> > > #include <linux/sched.h>
> > > #include <linux/ktime.h>
> > > #include <linux/mm.h>
> > > +#include <linux/of_irq.h>
> > > #include <asm/dma.h> /* isa_dma_bridge_buggy */
> > > #include "pci.h"
> > >
> > > @@ -4419,3 +4420,31 @@ static void quirk_intel_qat_vf_cap(struct
> > pci_dev *pdev)
> > > }
> > > }
> > > DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443,
> > > quirk_intel_qat_vf_cap);
> > > +
> > > +/* If root port doesn't support MSI/MSI-X/INTx in RC mode,
> > > + * but use standalone irq. Read the device tree for the aer
> > > + * interrupt number.
> > > + */
> > > +static void quirk_aer_interrupt(struct pci_dev *dev) {
> > > + int ret;
> > > + u8 header_type;
> > > + struct device_node *np = NULL;
> > > +
> > > + /* Only for the RC mode device */
> > > + pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
> > > + if ((header_type & 0x7F) != PCI_HEADER_TYPE_BRIDGE)
> > > + return;
> > > +
> > > + if (dev->bus->dev.of_node)
> > > + np = dev->bus->dev.of_node;
> > > +
> > > + if (IS_ENABLED(CONFIG_OF_IRQ) && np) {
> > > + ret = of_irq_get_byname(np, "aer");
> > > + if (ret > 0) {
> > > + dev->no_msi = 1;
> > > + dev->irq = ret;
> > > + }
> > > + }
> > > +}
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID,
> > > +quirk_aer_interrupt);
> > > --
> > > 2.1.0.27.g96db324
> > >
> > >
> > > _______________________________________________
> > > linux-arm-kernel mailing list
> > > linux-arm-kernel at lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v3 0/5] AT91: sckc improvements
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This patch set improves the slow clock controller driver.
The first patch simply moves some code around to avoid having extern
functions declared.
The second patch adds support for the SCKC found on sama5d4 and later.
It is notably missing the OSC32EN bit.
The third patch is an optimization. Trying to find wether the slow
oscillator is already stable to avoid waiting 1.2s twice in the boot
process.
Like discussed on IRC, the clk patches can probably go in v4.9 through the clk
tree. I'll take both dtsi patches through the at91 tree for v4.10.
Changes in v3:
- rebased on clk-next to get the clk_hw rework
- use a fixed clock for the rc oscillator on sama5d4
- reordered patches
Changes in v2:
- Fixed a typo pointed by Boris
Alexandre Belloni (5):
clk: at91: move slow clock controller clocks to sckc.c
clk: at91: Add sama5d4 sckc support
clk: at91: sckc: optimize boot time
ARM: dts: at91: sama5d4: use proper sckc compatible
ARM: dts: at91: sama5d2: use correct sckc compatible
.../devicetree/bindings/clock/at91-clock.txt | 3 +-
arch/arm/boot/dts/sama5d2.dtsi | 26 +-
arch/arm/boot/dts/sama5d4.dtsi | 27 +-
drivers/clk/at91/clk-slow.c | 365 ----------------
drivers/clk/at91/sckc.c | 464 ++++++++++++++++++++-
drivers/clk/at91/sckc.h | 22 -
6 files changed, 473 insertions(+), 434 deletions(-)
delete mode 100644 drivers/clk/at91/sckc.h
--
2.9.3
^ permalink raw reply
* [PATCH v3 1/5] clk: at91: move slow clock controller clocks to sckc.c
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Move all clocks related to the slow clock controller to sckc.c. This avoids
extern definitions and allows to remove sckc.h
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
drivers/clk/at91/clk-slow.c | 365 --------------------------------------------
drivers/clk/at91/sckc.c | 364 ++++++++++++++++++++++++++++++++++++++++++-
drivers/clk/at91/sckc.h | 22 ---
3 files changed, 363 insertions(+), 388 deletions(-)
delete mode 100644 drivers/clk/at91/sckc.h
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
index cd831e19ba72..560a8b9abf93 100644
--- a/drivers/clk/at91/clk-slow.c
+++ b/drivers/clk/at91/clk-slow.c
@@ -13,42 +13,11 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/at91_pmc.h>
-#include <linux/delay.h>
#include <linux/of.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include "pmc.h"
-#include "sckc.h"
-
-#define SLOW_CLOCK_FREQ 32768
-#define SLOWCK_SW_CYCLES 5
-#define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
- SLOW_CLOCK_FREQ)
-
-#define AT91_SCKC_CR 0x00
-#define AT91_SCKC_RCEN (1 << 0)
-#define AT91_SCKC_OSC32EN (1 << 1)
-#define AT91_SCKC_OSC32BYP (1 << 2)
-#define AT91_SCKC_OSCSEL (1 << 3)
-
-struct clk_slow_osc {
- struct clk_hw hw;
- void __iomem *sckcr;
- unsigned long startup_usec;
-};
-
-#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
-
-struct clk_slow_rc_osc {
- struct clk_hw hw;
- void __iomem *sckcr;
- unsigned long frequency;
- unsigned long accuracy;
- unsigned long startup_usec;
-};
-
-#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
struct clk_sam9260_slow {
struct clk_hw hw;
@@ -57,340 +26,6 @@ struct clk_sam9260_slow {
#define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw)
-struct clk_sam9x5_slow {
- struct clk_hw hw;
- void __iomem *sckcr;
- u8 parent;
-};
-
-#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
-
-static int clk_slow_osc_prepare(struct clk_hw *hw)
-{
- struct clk_slow_osc *osc = to_clk_slow_osc(hw);
- void __iomem *sckcr = osc->sckcr;
- u32 tmp = readl(sckcr);
-
- if (tmp & AT91_SCKC_OSC32BYP)
- return 0;
-
- writel(tmp | AT91_SCKC_OSC32EN, sckcr);
-
- usleep_range(osc->startup_usec, osc->startup_usec + 1);
-
- return 0;
-}
-
-static void clk_slow_osc_unprepare(struct clk_hw *hw)
-{
- struct clk_slow_osc *osc = to_clk_slow_osc(hw);
- void __iomem *sckcr = osc->sckcr;
- u32 tmp = readl(sckcr);
-
- if (tmp & AT91_SCKC_OSC32BYP)
- return;
-
- writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
-}
-
-static int clk_slow_osc_is_prepared(struct clk_hw *hw)
-{
- struct clk_slow_osc *osc = to_clk_slow_osc(hw);
- void __iomem *sckcr = osc->sckcr;
- u32 tmp = readl(sckcr);
-
- if (tmp & AT91_SCKC_OSC32BYP)
- return 1;
-
- return !!(tmp & AT91_SCKC_OSC32EN);
-}
-
-static const struct clk_ops slow_osc_ops = {
- .prepare = clk_slow_osc_prepare,
- .unprepare = clk_slow_osc_unprepare,
- .is_prepared = clk_slow_osc_is_prepared,
-};
-
-static struct clk_hw * __init
-at91_clk_register_slow_osc(void __iomem *sckcr,
- const char *name,
- const char *parent_name,
- unsigned long startup,
- bool bypass)
-{
- struct clk_slow_osc *osc;
- struct clk_hw *hw;
- struct clk_init_data init;
- int ret;
-
- if (!sckcr || !name || !parent_name)
- return ERR_PTR(-EINVAL);
-
- osc = kzalloc(sizeof(*osc), GFP_KERNEL);
- if (!osc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &slow_osc_ops;
- init.parent_names = &parent_name;
- init.num_parents = 1;
- init.flags = CLK_IGNORE_UNUSED;
-
- osc->hw.init = &init;
- osc->sckcr = sckcr;
- osc->startup_usec = startup;
-
- if (bypass)
- writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
- sckcr);
-
- hw = &osc->hw;
- ret = clk_hw_register(NULL, &osc->hw);
- if (ret) {
- kfree(osc);
- hw = ERR_PTR(ret);
- }
-
- return hw;
-}
-
-void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
- void __iomem *sckcr)
-{
- struct clk_hw *hw;
- const char *parent_name;
- const char *name = np->name;
- u32 startup;
- bool bypass;
-
- parent_name = of_clk_get_parent_name(np, 0);
- of_property_read_string(np, "clock-output-names", &name);
- of_property_read_u32(np, "atmel,startup-time-usec", &startup);
- bypass = of_property_read_bool(np, "atmel,osc-bypass");
-
- hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
- bypass);
- if (IS_ERR(hw))
- return;
-
- of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
-}
-
-static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
-
- return osc->frequency;
-}
-
-static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
- unsigned long parent_acc)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
-
- return osc->accuracy;
-}
-
-static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
- void __iomem *sckcr = osc->sckcr;
-
- writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
-
- usleep_range(osc->startup_usec, osc->startup_usec + 1);
-
- return 0;
-}
-
-static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
- void __iomem *sckcr = osc->sckcr;
-
- writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
-}
-
-static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
-
- return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
-}
-
-static const struct clk_ops slow_rc_osc_ops = {
- .prepare = clk_slow_rc_osc_prepare,
- .unprepare = clk_slow_rc_osc_unprepare,
- .is_prepared = clk_slow_rc_osc_is_prepared,
- .recalc_rate = clk_slow_rc_osc_recalc_rate,
- .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
-};
-
-static struct clk_hw * __init
-at91_clk_register_slow_rc_osc(void __iomem *sckcr,
- const char *name,
- unsigned long frequency,
- unsigned long accuracy,
- unsigned long startup)
-{
- struct clk_slow_rc_osc *osc;
- struct clk_hw *hw;
- struct clk_init_data init;
- int ret;
-
- if (!sckcr || !name)
- return ERR_PTR(-EINVAL);
-
- osc = kzalloc(sizeof(*osc), GFP_KERNEL);
- if (!osc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &slow_rc_osc_ops;
- init.parent_names = NULL;
- init.num_parents = 0;
- init.flags = CLK_IGNORE_UNUSED;
-
- osc->hw.init = &init;
- osc->sckcr = sckcr;
- osc->frequency = frequency;
- osc->accuracy = accuracy;
- osc->startup_usec = startup;
-
- hw = &osc->hw;
- ret = clk_hw_register(NULL, &osc->hw);
- if (ret) {
- kfree(osc);
- hw = ERR_PTR(ret);
- }
-
- return hw;
-}
-
-void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
- void __iomem *sckcr)
-{
- struct clk_hw *hw;
- u32 frequency = 0;
- u32 accuracy = 0;
- u32 startup = 0;
- const char *name = np->name;
-
- of_property_read_string(np, "clock-output-names", &name);
- of_property_read_u32(np, "clock-frequency", &frequency);
- of_property_read_u32(np, "clock-accuracy", &accuracy);
- of_property_read_u32(np, "atmel,startup-time-usec", &startup);
-
- hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
- startup);
- if (IS_ERR(hw))
- return;
-
- of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
-}
-
-static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
-{
- struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
- void __iomem *sckcr = slowck->sckcr;
- u32 tmp;
-
- if (index > 1)
- return -EINVAL;
-
- tmp = readl(sckcr);
-
- if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
- (index && (tmp & AT91_SCKC_OSCSEL)))
- return 0;
-
- if (index)
- tmp |= AT91_SCKC_OSCSEL;
- else
- tmp &= ~AT91_SCKC_OSCSEL;
-
- writel(tmp, sckcr);
-
- usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
-
- return 0;
-}
-
-static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
-{
- struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
-
- return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
-}
-
-static const struct clk_ops sam9x5_slow_ops = {
- .set_parent = clk_sam9x5_slow_set_parent,
- .get_parent = clk_sam9x5_slow_get_parent,
-};
-
-static struct clk_hw * __init
-at91_clk_register_sam9x5_slow(void __iomem *sckcr,
- const char *name,
- const char **parent_names,
- int num_parents)
-{
- struct clk_sam9x5_slow *slowck;
- struct clk_hw *hw;
- struct clk_init_data init;
- int ret;
-
- if (!sckcr || !name || !parent_names || !num_parents)
- return ERR_PTR(-EINVAL);
-
- slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
- if (!slowck)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &sam9x5_slow_ops;
- init.parent_names = parent_names;
- init.num_parents = num_parents;
- init.flags = 0;
-
- slowck->hw.init = &init;
- slowck->sckcr = sckcr;
- slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
-
- hw = &slowck->hw;
- ret = clk_hw_register(NULL, &slowck->hw);
- if (ret) {
- kfree(slowck);
- hw = ERR_PTR(ret);
- }
-
- return hw;
-}
-
-void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
- void __iomem *sckcr)
-{
- struct clk_hw *hw;
- const char *parent_names[2];
- unsigned int num_parents;
- const char *name = np->name;
-
- num_parents = of_clk_get_parent_count(np);
- if (num_parents == 0 || num_parents > 2)
- return;
-
- of_clk_parent_fill(np, parent_names, num_parents);
-
- of_property_read_string(np, "clock-output-names", &name);
-
- hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
- num_parents);
- if (IS_ERR(hw))
- return;
-
- of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
-}
-
static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
{
struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw);
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 1184d76a7ab7..f6ed711af738 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -12,11 +12,373 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
+#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/io.h>
-#include "sckc.h"
+#define SLOW_CLOCK_FREQ 32768
+#define SLOWCK_SW_CYCLES 5
+#define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
+ SLOW_CLOCK_FREQ)
+
+#define AT91_SCKC_CR 0x00
+#define AT91_SCKC_RCEN (1 << 0)
+#define AT91_SCKC_OSC32EN (1 << 1)
+#define AT91_SCKC_OSC32BYP (1 << 2)
+#define AT91_SCKC_OSCSEL (1 << 3)
+
+struct clk_slow_osc {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ unsigned long startup_usec;
+};
+
+#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
+
+struct clk_slow_rc_osc {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ unsigned long frequency;
+ unsigned long accuracy;
+ unsigned long startup_usec;
+};
+
+#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
+
+struct clk_sam9x5_slow {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ u8 parent;
+};
+
+#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
+
+static int clk_slow_osc_prepare(struct clk_hw *hw)
+{
+ struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+ u32 tmp = readl(sckcr);
+
+ if (tmp & AT91_SCKC_OSC32BYP)
+ return 0;
+
+ writel(tmp | AT91_SCKC_OSC32EN, sckcr);
+
+ usleep_range(osc->startup_usec, osc->startup_usec + 1);
+
+ return 0;
+}
+
+static void clk_slow_osc_unprepare(struct clk_hw *hw)
+{
+ struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+ u32 tmp = readl(sckcr);
+
+ if (tmp & AT91_SCKC_OSC32BYP)
+ return;
+
+ writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
+}
+
+static int clk_slow_osc_is_prepared(struct clk_hw *hw)
+{
+ struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+ u32 tmp = readl(sckcr);
+
+ if (tmp & AT91_SCKC_OSC32BYP)
+ return 1;
+
+ return !!(tmp & AT91_SCKC_OSC32EN);
+}
+
+static const struct clk_ops slow_osc_ops = {
+ .prepare = clk_slow_osc_prepare,
+ .unprepare = clk_slow_osc_unprepare,
+ .is_prepared = clk_slow_osc_is_prepared,
+};
+
+static struct clk_hw * __init
+at91_clk_register_slow_osc(void __iomem *sckcr,
+ const char *name,
+ const char *parent_name,
+ unsigned long startup,
+ bool bypass)
+{
+ struct clk_slow_osc *osc;
+ struct clk_hw *hw;
+ struct clk_init_data init;
+ int ret;
+
+ if (!sckcr || !name || !parent_name)
+ return ERR_PTR(-EINVAL);
+
+ osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+ if (!osc)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &slow_osc_ops;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+ init.flags = CLK_IGNORE_UNUSED;
+
+ osc->hw.init = &init;
+ osc->sckcr = sckcr;
+ osc->startup_usec = startup;
+
+ if (bypass)
+ writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
+ sckcr);
+
+ hw = &osc->hw;
+ ret = clk_hw_register(NULL, &osc->hw);
+ if (ret) {
+ kfree(osc);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
+
+void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
+ void __iomem *sckcr)
+{
+ struct clk_hw *hw;
+ const char *parent_name;
+ const char *name = np->name;
+ u32 startup;
+ bool bypass;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ of_property_read_string(np, "clock-output-names", &name);
+ of_property_read_u32(np, "atmel,startup-time-usec", &startup);
+ bypass = of_property_read_bool(np, "atmel,osc-bypass");
+
+ hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
+ bypass);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
+
+static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+ return osc->frequency;
+}
+
+static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
+ unsigned long parent_acc)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+ return osc->accuracy;
+}
+
+static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+
+ writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
+
+ usleep_range(osc->startup_usec, osc->startup_usec + 1);
+
+ return 0;
+}
+
+static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+
+ writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
+}
+
+static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+ return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
+}
+
+static const struct clk_ops slow_rc_osc_ops = {
+ .prepare = clk_slow_rc_osc_prepare,
+ .unprepare = clk_slow_rc_osc_unprepare,
+ .is_prepared = clk_slow_rc_osc_is_prepared,
+ .recalc_rate = clk_slow_rc_osc_recalc_rate,
+ .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
+};
+
+static struct clk_hw * __init
+at91_clk_register_slow_rc_osc(void __iomem *sckcr,
+ const char *name,
+ unsigned long frequency,
+ unsigned long accuracy,
+ unsigned long startup)
+{
+ struct clk_slow_rc_osc *osc;
+ struct clk_hw *hw;
+ struct clk_init_data init;
+ int ret;
+
+ if (!sckcr || !name)
+ return ERR_PTR(-EINVAL);
+
+ osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+ if (!osc)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &slow_rc_osc_ops;
+ init.parent_names = NULL;
+ init.num_parents = 0;
+ init.flags = CLK_IGNORE_UNUSED;
+
+ osc->hw.init = &init;
+ osc->sckcr = sckcr;
+ osc->frequency = frequency;
+ osc->accuracy = accuracy;
+ osc->startup_usec = startup;
+
+ hw = &osc->hw;
+ ret = clk_hw_register(NULL, &osc->hw);
+ if (ret) {
+ kfree(osc);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
+
+void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
+ void __iomem *sckcr)
+{
+ struct clk_hw *hw;
+ u32 frequency = 0;
+ u32 accuracy = 0;
+ u32 startup = 0;
+ const char *name = np->name;
+
+ of_property_read_string(np, "clock-output-names", &name);
+ of_property_read_u32(np, "clock-frequency", &frequency);
+ of_property_read_u32(np, "clock-accuracy", &accuracy);
+ of_property_read_u32(np, "atmel,startup-time-usec", &startup);
+
+ hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
+ startup);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
+
+static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
+ void __iomem *sckcr = slowck->sckcr;
+ u32 tmp;
+
+ if (index > 1)
+ return -EINVAL;
+
+ tmp = readl(sckcr);
+
+ if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
+ (index && (tmp & AT91_SCKC_OSCSEL)))
+ return 0;
+
+ if (index)
+ tmp |= AT91_SCKC_OSCSEL;
+ else
+ tmp &= ~AT91_SCKC_OSCSEL;
+
+ writel(tmp, sckcr);
+
+ usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
+
+ return 0;
+}
+
+static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
+{
+ struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
+
+ return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
+}
+
+static const struct clk_ops sam9x5_slow_ops = {
+ .set_parent = clk_sam9x5_slow_set_parent,
+ .get_parent = clk_sam9x5_slow_get_parent,
+};
+
+static struct clk_hw * __init
+at91_clk_register_sam9x5_slow(void __iomem *sckcr,
+ const char *name,
+ const char **parent_names,
+ int num_parents)
+{
+ struct clk_sam9x5_slow *slowck;
+ struct clk_hw *hw;
+ struct clk_init_data init;
+ int ret;
+
+ if (!sckcr || !name || !parent_names || !num_parents)
+ return ERR_PTR(-EINVAL);
+
+ slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
+ if (!slowck)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &sam9x5_slow_ops;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+ init.flags = 0;
+
+ slowck->hw.init = &init;
+ slowck->sckcr = sckcr;
+ slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
+
+ hw = &slowck->hw;
+ ret = clk_hw_register(NULL, &slowck->hw);
+ if (ret) {
+ kfree(slowck);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
+
+void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
+ void __iomem *sckcr)
+{
+ struct clk_hw *hw;
+ const char *parent_names[2];
+ unsigned int num_parents;
+ const char *name = np->name;
+
+ num_parents = of_clk_get_parent_count(np);
+ if (num_parents == 0 || num_parents > 2)
+ return;
+
+ of_clk_parent_fill(np, parent_names, num_parents);
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
+ num_parents);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
static const struct of_device_id sckc_clk_ids[] __initconst = {
/* Slow clock */
diff --git a/drivers/clk/at91/sckc.h b/drivers/clk/at91/sckc.h
deleted file mode 100644
index 836fcf59820f..000000000000
--- a/drivers/clk/at91/sckc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * drivers/clk/at91/sckc.h
- *
- * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __AT91_SCKC_H_
-#define __AT91_SCKC_H_
-
-extern void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
- void __iomem *sckcr);
-extern void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
- void __iomem *sckcr);
-extern void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
- void __iomem *sckcr);
-
-#endif /* __AT91_SCKC_H_ */
--
2.9.3
^ permalink raw reply related
* [PATCH v3 2/5] clk: at91: Add sama5d4 sckc support
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Starting with sama5d4, the crystal oscillator is always enabled at startup
and the SCKC doesn't have an OSC32EN bit anymore.
Add support for that new controller.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
.../devicetree/bindings/clock/at91-clock.txt | 3 +-
drivers/clk/at91/sckc.c | 100 +++++++++++++++++++++
2 files changed, 102 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
index 181bc8ac4e3a..5f3ad65daf69 100644
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -6,7 +6,8 @@ This binding uses the common clock binding[1].
Required properties:
- compatible : shall be one of the following:
- "atmel,at91sam9x5-sckc":
+ "atmel,at91sam9x5-sckc" or
+ "atmel,sama5d4-sckc":
at91 SCKC (Slow Clock Controller)
This node contains the slow clock definitions.
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index f6ed711af738..60d8225715a2 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -36,6 +36,15 @@ struct clk_slow_osc {
#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
+struct clk_sama5d4_slow_osc {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ unsigned long startup_usec;
+ bool prepared;
+};
+
+#define to_clk_sama5d4_slow_osc(hw) container_of(hw, struct clk_sama5d4_slow_osc, hw)
+
struct clk_slow_rc_osc {
struct clk_hw hw;
void __iomem *sckcr;
@@ -417,3 +426,94 @@ static void __init of_at91sam9x5_sckc_setup(struct device_node *np)
}
CLK_OF_DECLARE(at91sam9x5_clk_sckc, "atmel,at91sam9x5-sckc",
of_at91sam9x5_sckc_setup);
+
+static int clk_sama5d4_slow_osc_prepare(struct clk_hw *hw)
+{
+ struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw);
+
+ if (osc->prepared)
+ return 0;
+
+ /*
+ * Assume that if it has already been selected (for example by the
+ * bootloader), enough time has aready passed.
+ */
+ if ((readl(osc->sckcr) & AT91_SCKC_OSCSEL)) {
+ osc->prepared = true;
+ return 0;
+ }
+
+ usleep_range(osc->startup_usec, osc->startup_usec + 1);
+ osc->prepared = true;
+
+ return 0;
+}
+
+static int clk_sama5d4_slow_osc_is_prepared(struct clk_hw *hw)
+{
+ struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw);
+
+ return osc->prepared;
+}
+
+static const struct clk_ops sama5d4_slow_osc_ops = {
+ .prepare = clk_sama5d4_slow_osc_prepare,
+ .is_prepared = clk_sama5d4_slow_osc_is_prepared,
+};
+
+static void __init of_sama5d4_sckc_setup(struct device_node *np)
+{
+ void __iomem *regbase = of_iomap(np, 0);
+ struct clk_hw *hw;
+ struct clk_sama5d4_slow_osc *osc;
+ struct clk_init_data init;
+ const char *xtal_name;
+ const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
+ bool bypass;
+ int ret;
+
+ if (!regbase)
+ return;
+
+ hw = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0],
+ NULL, 0, 32768,
+ 250000000);
+ if (IS_ERR(hw))
+ return;
+
+ xtal_name = of_clk_get_parent_name(np, 0);
+
+ bypass = of_property_read_bool(np, "atmel,osc-bypass");
+
+ osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+ if (!osc)
+ return;
+
+ init.name = parent_names[1];
+ init.ops = &sama5d4_slow_osc_ops;
+ init.parent_names = &xtal_name;
+ init.num_parents = 1;
+ init.flags = CLK_IGNORE_UNUSED;
+
+ osc->hw.init = &init;
+ osc->sckcr = regbase;
+ osc->startup_usec = 1200000;
+
+ if (bypass)
+ writel((readl(regbase) | AT91_SCKC_OSC32BYP), regbase);
+
+ hw = &osc->hw;
+ ret = clk_hw_register(NULL, &osc->hw);
+ if (ret) {
+ kfree(osc);
+ return;
+ }
+
+ hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
+CLK_OF_DECLARE(sama5d4_clk_sckc, "atmel,sama5d4-sckc",
+ of_sama5d4_sckc_setup);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 3/5] clk: at91: sckc: optimize boot time
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Assume that if the oscillator is enabled (OSC32EN bit is present), the
delay has already elapsed as the bootloader probably waited for the
oscillator to settle. This could waste up to 1.2s.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
drivers/clk/at91/sckc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 60d8225715a2..b1265f2cdae7 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -69,7 +69,7 @@ static int clk_slow_osc_prepare(struct clk_hw *hw)
void __iomem *sckcr = osc->sckcr;
u32 tmp = readl(sckcr);
- if (tmp & AT91_SCKC_OSC32BYP)
+ if (tmp & (AT91_SCKC_OSC32BYP | AT91_SCKC_OSC32EN))
return 0;
writel(tmp | AT91_SCKC_OSC32EN, sckcr);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 4/5] ARM: dts: at91: sama5d4: use proper sckc compatible
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Now that there is support for the sama5d4 slow clock controller, use its
driver.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/sama5d4.dtsi | 27 ++++-----------------------
1 file changed, 4 insertions(+), 23 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 65e725fb5679..fe094263595c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1314,30 +1314,11 @@
status = "disabled";
};
- sckc at fc068650 {
- compatible = "atmel,at91sam9x5-sckc";
+ clk32k: sckc at fc068650 {
+ compatible = "atmel,sama5d4-sckc";
reg = <0xfc068650 0x4>;
-
- slow_rc_osc: slow_rc_osc {
- compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-accuracy = <250000000>;
- atmel,startup-time-usec = <75>;
- };
-
- slow_osc: slow_osc {
- compatible = "atmel,at91sam9x5-clk-slow-osc";
- #clock-cells = <0>;
- clocks = <&slow_xtal>;
- atmel,startup-time-usec = <1200000>;
- };
-
- clk32k: slowck {
- compatible = "atmel,at91sam9x5-clk-slow";
- #clock-cells = <0>;
- clocks = <&slow_rc_osc &slow_osc>;
- };
+ #clock-cells = <0>;
+ clocks = <&slow_xtal>;
};
rtc at fc0686b0 {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 5/5] ARM: dts: at91: sama5d2: use correct sckc compatible
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
the sama5d2 sckc is actually sama5d4 compatible
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 26 ++++----------------------
1 file changed, 4 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 353d0e5ec83b..2e49f10f93fa 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1059,30 +1059,12 @@
status = "disabled";
};
- sckc at f8048050 {
- compatible = "atmel,at91sam9x5-sckc";
+ clk32k: sckc at f8048050 {
+ compatible = "atmel,sama5d4-sckc";
reg = <0xf8048050 0x4>;
- slow_rc_osc: slow_rc_osc {
- compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-accuracy = <250000000>;
- atmel,startup-time-usec = <75>;
- };
-
- slow_osc: slow_osc {
- compatible = "atmel,at91sam9x5-clk-slow-osc";
- #clock-cells = <0>;
- clocks = <&slow_xtal>;
- atmel,startup-time-usec = <1200000>;
- };
-
- clk32k: slowck {
- compatible = "atmel,at91sam9x5-clk-slow";
- #clock-cells = <0>;
- clocks = <&slow_rc_osc &slow_osc>;
- };
+ clocks = <&slow_xtal>;
+ #clock-cells = <0>;
};
rtc at f80480b0 {
--
2.9.3
^ permalink raw reply related
* linux-next: manual merge of the amlogic tree with the arm-soc tree
From: Kevin Hilman @ 2016-09-20 21:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920101938.5d46a0ab@canb.auug.org.au>
Stephen Rothwell <sfr@canb.auug.org.au> writes:
> Hi all,
>
> Today's linux-next merge of the amlogic tree got a conflict in:
>
> arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
>
> between commit:
>
> 8735053d7968 ("ARM64: dts: meson-gxbb-p20x: Enable USB Nodes")
>
> from the arm-soc tree and commit:
>
> d82801a385a1 ("ARM64: dts: meson-gxbb-p20x: Enable USB Nodes")
>
> from the amlogic tree.
>
> This patch was modified before being merged into the arm-soc tree.
> Please clean up the amlogic tree.
Cleaned up.
I forgot to push the updated amlogic/for-next after sending pull
requests to arm-soc.
Kevin
^ permalink raw reply
* PROBLEM: DWC3 USB 3.0 not working on Odroid-XU4 with Exynos 5422
From: Michael Niewöhner @ 2016-09-20 21:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANAwSgQMsK8YPxR==UXtR49kiJzYhkzvSCNwn8mDJfj-3wpa2w@mail.gmail.com>
Hi guys,
On Di, 2016-08-30 at 10:32 +0530, Anand Moon wrote:
> Hi All
>
> Adding Vivek Gautam.
>
> On 29 August 2016 at 16:35, Michael Niew?hner <linux@mniewoehner.de>
> wrote:
> >
> > Hi Mathias,
> > On Mo, 2016-08-29 at 13:59 +0300, Mathias Nyman wrote:
> > >
> > > On 29.08.2016 10:28, Felipe Balbi wrote:
> > > >
> > > >
> > > >
> > > > Hi,
> > > >
> > > > Michael Niew?hner <linux@mniewoehner.de> writes:
> > > > >
> > > > >
> > > > > [1.] One line summary of the problem:
> > > > > DWC3 USB 3.0 not working on Odroid-XU4 with Exynos 5422
> > > > >
> > > > > [2.] Full description of the problem/report:
> > > > > No usb 3.0 devices are being detected when attached while USB
> > > > > 2.0
> > > > > devices work on the same port.
> > > > > USB 3.0 works after applying patches [9.1] and [9.2], but
> > > > > seems
> > > > > to be
> > > > > buggy. The usb hub is redetected every time an usb device is
> > > > > attached.
> > > >
> > > > dwc3 is host, which means it's actually XHCI :-)
> > > >
> > > > Adding Mathias
> > > >
> > > > >
> > > > >
> > > > > dmesg:
> > > > > [??192.287080] usb 3-1.2: USB disconnect, device number 7
> > > > > [??210.370699] hub 3-1:1.0: hub_ext_port_status failed (err =
> > > > > -71)
> > >
> > > Looks like the hub GetPortStatus request fails with protocol
> > > error.
> > >
> > > Reading xhci root hub port status is mostly just register reads
> > > and
> > > writes. It
> > > shouldn't include any actual transfers that could return -EPROTO
> > >
> > > So this is not the root hub? but a external or integrated on your
> > > board, right?
> > >
> > > The protocol error -71 is returned at transfer errors or if
> > > device
> > > stalled.
> > >
> > > Adding more xhci debugging options could show something:
> > > echo -n 'module xhci_hcd =p' >
> > > /sys/kernel/debug/dynamic_debug/control
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > [9.] Other notes, patches, fixes, workarounds:
> > > > > [9.1] https://lkml.org/lkml/2014/4/28/234
> > > > > [9.2] https://lkml.org/lkml/2015/2/2/259
> > >
> > > The additional patches that makes things somehow work involve
> > > tuning
> > > the PHY,
> > > this is an area I'm not familiar with
> > >
> > > -Mathias
> > >
> >
> >
> > I'm sorry, I should have said that this is the dmesg output with
> > the
> > patches applied. Without them there is no output at all when I
> > attach
> > an usb 3.0 device.
> >
> > Michael
>
> There are two dwc3 ports in the SoC : one for Gbit Ethernet another
> one for on-board GL3521 USB 3.0 hub controller.
>
> 3.10.x kernel
> odroid at odroid:~$ lsusb -t
> /:??Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> ????|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
> Driver=r8152, 5000M
> /:??Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> /:??Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
> /:??Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
> /:??Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
> /:??Bus 01.Port 1: Dev 1, Class=root_hub, Driver=s5p-ehci/3p, 480M
>
> 4.x kernel
> odroid at odroid:~$ lsusb -t
> /:??Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> /:??Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> ????|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
> Driver=r8152, 480M
> /:??Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
> ????????|__ Port 1: Dev 3, If 0, Class=Mass Storage, Driver=usb-
> storage, 5000M
> ????????|__ Port 2: Dev 4, If 0, Class=Mass Storage, Driver=usb-
> storage, 5000M
> /:??Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
> /:??Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
> /:??Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
>
> I fell that Ethernet driver r8152 is not getting registered to
> xhci-hcd to bus port 06
> which lead to other ports to miss configure, some time the Ethernet
> port get register to bus port 04
>
> Their is also a possibility that all the port are not getting proper
> power from the S2MPS11 PMIC
> and possible some reset of the phy is needed to reconfigure the
> exynos
> USB HSIC controller.
>
> Best Regards
> -Anand Moon
> --
> To unsubscribe from this list: send the line "unsubscribe linux-
> samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at??http://vger.kernel.org/majordomo-info.html
Today I've tested v4.8-rc7 (without the patches above). The USB 3.0
ports have stopped working completely for me. Neither USB 2.0 nor USB
3.0 are being detected. The Ethernet port does not work, too. The USB-
2.0-only Port works.
There also a new problem: my XU4 does not reboot or poweroff anymore.
When I force-remove the dwc3 module reboot / poweroff works again.
There are some failures in the dmesg log, see below.
Best regards,
Michael
dmesg | grep -iE "usb|dwc|hci":
-------------------------------
[????0.326371] usbcore: registered new interface driver usbfs
[????0.326456] usbcore: registered new interface driver hub
[????0.326638] usbcore: registered new device driver usb
[????1.620326] usbcore: registered new interface driver usb-storage
[????1.790692] sdhci: Secure Digital Host Controller Interface driver
[????1.795382] sdhci: Copyright(c) Pierre Ossman
[????1.994062] sdhci-pltfm: SDHCI platform and OF driver helper
[????2.011265] usbcore: registered new interface driver usbhid
[????2.016419] usbhid: USB HID core driver
[???15.113203] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[???15.115802] ehci-exynos: EHCI EXYNOS driver
[???15.117544] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[???15.121099] ohci-exynos: OHCI EXYNOS driver
[???15.173098] exynos-ohci 12120000.usb: USB Host Controller
[???15.187949] exynos-ohci 12120000.usb: new USB bus registered, assigned bus number 1
[???15.195296] exynos-ohci 12120000.usb: irq 89, io mem 0x12120000
[???15.274045] usb usb1: New USB device found, idVendor=1d6b, idProduct=0001
[???15.279360] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.279366] usb usb1: Product: USB Host Controller
[???15.279371] usb usb1: Manufacturer: Linux 4.8.0-rc7+ ohci_hcd
[???15.279375] usb usb1: SerialNumber: 12120000.usb
[???15.280187] hub 1-0:1.0: USB hub found
[???15.281215] exynos-ehci 12110000.usb: EHCI Host Controller
[???15.281509] exynos-ehci 12110000.usb: new USB bus registered, assigned bus number 2
[???15.281656] exynos-ehci 12110000.usb: irq 89, io mem 0x12110000
[???15.309929] exynos-ehci 12110000.usb: USB 2.0 started, EHCI 1.00
[???15.310297] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
[???15.310302] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.310307] usb usb2: Product: EHCI Host Controller
[???15.310312] usb usb2: Manufacturer: Linux 4.8.0-rc7+ ehci_hcd
[???15.310317] usb usb2: SerialNumber: 12110000.usb
[???15.310928] hub 2-0:1.0: USB hub found
[???15.312172] exynos-dwc3 soc:usb3-0: no suspend clk specified
[???15.313613] usb_phy_generic.0.auto supply vcc not found, using dummy regulator
[???15.314033] usb_phy_generic.1.auto supply vcc not found, using dummy regulator
[???15.315395] exynos-dwc3 soc:usb3-1: no suspend clk specified
[???15.317108] usb_phy_generic.2.auto supply vcc not found, using dummy regulator
[???15.317436] usb_phy_generic.3.auto supply vcc not found, using dummy regulator
[???15.335605] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.335844] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 3
[???15.336099] xhci-hcd xhci-hcd.4.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.336149] xhci-hcd xhci-hcd.4.auto: irq 135, io mem 0x12000000
[???15.336489] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
[???15.336496] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.336501] usb usb3: Product: xHCI Host Controller
[???15.336506] usb usb3: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.336511] usb usb3: SerialNumber: xhci-hcd.4.auto
[???15.337095] hub 3-0:1.0: USB hub found
[???15.337596] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.337789] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 4
[???15.337927] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.338159] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003
[???15.338165] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.338169] usb usb4: Product: xHCI Host Controller
[???15.338174] usb usb4: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.338179] usb usb4: SerialNumber: xhci-hcd.4.auto
[???15.338847] hub 4-0:1.0: USB hub found
[???15.339419] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.339649] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 5
[???15.339990] xhci-hcd xhci-hcd.5.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.340036] xhci-hcd xhci-hcd.5.auto: irq 136, io mem 0x12400000
[???15.340329] usb usb5: New USB device found, idVendor=1d6b, idProduct=0002
[???15.340335] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.340340] usb usb5: Product: xHCI Host Controller
[???15.340344] usb usb5: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.340349] usb usb5: SerialNumber: xhci-hcd.5.auto
[???15.340918] hub 5-0:1.0: USB hub found
[???15.341387] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.341618] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 6
[???15.341758] usb usb6: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.341993] usb usb6: New USB device found, idVendor=1d6b, idProduct=0003
[???15.341998] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.342003] usb usb6: Product: xHCI Host Controller
[???15.342008] usb usb6: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.342012] usb usb6: SerialNumber: xhci-hcd.5.auto
[???15.342662] hub 6-0:1.0: USB hub found
[???19.642578] usb usb5-port1: connect-debounce failed
#######################################################################
full dmesg:
-----------
[????0.000000] Booting Linux on physical CPU 0x100
[????0.000000] Linux version 4.8.0-rc7+ (c0d3 at z3r0) (gcc version 5.3.1 20160412 (Linaro GCC 5.3-2016.05) ) #1 SMP Tue Sep 20 22:24:41 CEST 2016
[????0.000000] CPU: ARMv7 Processor [410fc073] revision 3 (ARMv7), cr=10c5387d
[????0.000000] CPU: div instructions available: patching division code
[????0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[????0.000000] OF: fdt:Machine model: Hardkernel Odroid XU4
[????0.000000] Reserved memory: created DMA memory pool at 0xbe200000, size 8 MiB
[????0.000000] OF: reserved mem: initialized node region_mfc_right, compatible id shared-dma-pool
[????0.000000] Reserved memory: created DMA memory pool at 0xbd200000, size 16 MiB
[????0.000000] OF: reserved mem: initialized node region_mfc_left, compatible id shared-dma-pool
[????0.000000] Memory policy: Data cache writealloc
[????0.000000] Samsung CPU ID: 0xe5422001
[????0.000000] On node 0 totalpages: 512512
[????0.000000] free_area_init_node: node 0, pgdat c0c81dc0, node_mem_map eee52000
[????0.000000]???Normal zone: 1728 pages used for memmap
[????0.000000]???Normal zone: 0 pages reserved
[????0.000000]???Normal zone: 196608 pages, LIFO batch:31
[????0.000000]???HighMem zone: 315904 pages, LIFO batch:31
[????0.000000] Running under secure firmware.
[????0.000000] percpu: Embedded 15 pages/cpu @eeda1000 s30272 r8192 d22976 u61440
[????0.000000] pcpu-alloc: s30272 r8192 d22976 u61440 alloc=15*4096
[????0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7?
[????0.000000] Built 1 zonelists in Zone order, mobility grouping on.??Total pages: 510784
[????0.000000] Kernel command line: console=ttySAC2,115200n8 root=/dev/mmcblk1p2 rootfstype=ext4 rootwait earlyprintk debug
[????0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[????0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[????0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[????0.000000] Memory: 2018124K/2050048K available (7168K kernel code, 617K rwdata, 2052K rodata, 1024K init, 375K bss, 31924K reserved, 0K cma-reserved, 1263616K highmem)
[????0.000000] Virtual kernel memory layout:
????vector??: 0xffff0000 - 0xffff1000???(???4 kB)
????fixmap??: 0xffc00000 - 0xfff00000???(3072 kB)
????vmalloc : 0xf0800000 - 0xff800000???( 240 MB)
????lowmem??: 0xc0000000 - 0xf0000000???( 768 MB)
????pkmap???: 0xbfe00000 - 0xc0000000???(???2 MB)
????modules : 0xbf000000 - 0xbfe00000???(??14 MB)
??????.text : 0xc0008000 - 0xc0800000???(8160 kB)
??????.init : 0xc0b00000 - 0xc0c00000???(1024 kB)
??????.data : 0xc0c00000 - 0xc0c9a7cc???( 618 kB)
???????.bss : 0xc0c9c000 - 0xc0cf9d04???( 376 kB)
[????0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
[????0.000000] Hierarchical RCU implementation.
[????0.000000]??Build-time adjustment of leaf fanout to 32.
[????0.000000]??RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=8.
[????0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=8
[????0.000000] NR_IRQS:16 nr_irqs:16 16
[????0.000000] genirq: Setting trigger mode 0 for irq 17 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 18 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 19 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 20 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 21 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 22 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 23 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 24 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 25 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 26 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 27 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 28 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 29 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 30 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 31 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 32 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 33 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 34 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 35 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 36 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 37 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 38 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 39 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 40 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 41 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 42 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 43 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 44 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 45 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 46 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 47 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 48 failed (gic_set_type+0x0/0x64)
[????0.000000] Switching to timer-based delay loop, resolution 41ns
[????0.000000] clocksource: mct-frc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[????0.000007] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[????0.001699] Console: colour dummy device 80x30
[????0.001743] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=240000)
[????0.001762] pid_max: default: 32768 minimum: 301
[????0.002015] Security Framework initialized
[????0.002031] Yama: becoming mindful.
[????0.002063] AppArmor: AppArmor disabled by boot time parameter
[????0.002154] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[????0.002171] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[????0.003263] CPU: Testing write buffer coherency: ok
[????0.003312] ftrace: allocating 25419 entries in 75 pages
[????0.071511] CPU0: update cpu_capacity 448
[????0.071533] CPU0: thread -1, cpu 0, socket 1, mpidr 80000100
[????0.071713] Setting up static identity map for 0x40100000 - 0x40100058
[????0.072357] ARM CCI driver probed
[????0.072569] Exynos MCPM support installed
[????0.076960] CPU1: update cpu_capacity 448
[????0.076969] CPU1: thread -1, cpu 1, socket 1, mpidr 80000101
[????0.078015] CPU2: update cpu_capacity 448
[????0.078023] CPU2: thread -1, cpu 2, socket 1, mpidr 80000102
[????0.079093] CPU3: update cpu_capacity 448
[????0.079100] CPU3: thread -1, cpu 3, socket 1, mpidr 80000103
[????0.080042] CPU4: update cpu_capacity 1535
[????0.080050] CPU4: thread -1, cpu 0, socket 0, mpidr 80000000
[????0.081116] CPU5: update cpu_capacity 1535
[????0.081123] CPU5: thread -1, cpu 1, socket 0, mpidr 80000001
[????0.082117] CPU6: update cpu_capacity 1535
[????0.082124] CPU6: thread -1, cpu 2, socket 0, mpidr 80000002
[????0.083109] CPU7: update cpu_capacity 1535
[????0.083116] CPU7: thread -1, cpu 3, socket 0, mpidr 80000003
[????0.083257] Brought up 8 CPUs
[????0.083322] SMP: Total of 8 processors activated (384.00 BogoMIPS).
[????0.083333] CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x1a)
[????0.083341] CPU: This may indicate a broken bootloader or firmware.
[????0.085519] devtmpfs: initialized
[????0.111049] VFP support v0.3: implementor 41 architecture 2 part 30 variant 7 rev 3
[????0.111544] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[????0.111848] pinctrl core: initialized pinctrl subsystem
[????0.114692] NET: Registered protocol family 16
[????0.115485] DMA: preallocated 256 KiB pool for atomic coherent allocations
[????0.159992] cpuidle: using governor ladder
[????0.199983] cpuidle: using governor menu
[????0.208731] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers.
[????0.208746] hw-breakpoint: maximum watchpoint size is 8 bytes.
[????0.209125] Serial: AMBA PL011 UART driver
[????0.218768] iommu: Adding device 11000000.codec to group 0
[????0.224583] genirq: Setting trigger mode 0 for irq 110 failed (gic_set_type+0x0/0x64)
[????0.257244] iommu: Adding device 14450000.mixer to group 1
[????0.257794] iommu: Adding device 11c00000.rotator to group 2
[????0.267216] iommu: Adding device 13e00000.video-scaler to group 3
[????0.267742] iommu: Adding device 13e10000.video-scaler to group 4
[????0.268256] iommu: Adding device 11f50000.jpeg to group 5
[????0.268752] iommu: Adding device 11f60000.jpeg to group 6
[????0.269137] EXYNOS5420 PMU initialized
[????0.325992] SCSI subsystem initialized
[????0.326371] usbcore: registered new interface driver usbfs
[????0.326456] usbcore: registered new interface driver hub
[????0.326638] usbcore: registered new device driver usb
[????0.327614] media: Linux media interface: v0.10
[????0.327679] Linux video capture interface: v2.00
[????0.327775] pps_core: LinuxPPS API ver. 1 registered
[????0.327786] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[????0.327815] PTP clock support registered
[????0.329864] clocksource: Switched to clocksource mct-frc
[????0.400809] VFS: Disk quotas dquot_6.6.0
[????0.400890] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[????0.420200] NET: Registered protocol family 2
[????0.420933] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[????0.421015] TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
[????0.421174] TCP: Hash tables configured (established 8192 bind 8192)
[????0.421242] UDP hash table entries: 512 (order: 2, 16384 bytes)
[????0.421283] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[????0.421520] NET: Registered protocol family 1
[????0.427016] futex hash table entries: 2048 (order: 5, 131072 bytes)
[????0.427156] audit: initializing netlink subsys (disabled)
[????0.427216] audit: type=2000 audit(0.370:1): initialized
[????0.428268] workingset: timestamp_bits=14 max_order=19 bucket_order=5
[????0.439142] zbud: loaded
[????0.444748] bounce: pool size: 64 pages
[????0.445009] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[????0.445239] io scheduler noop registered
[????0.445253] io scheduler deadline registered (default)
[????0.445515] io scheduler cfq registered
[????0.455579] dma-pl330 121a0000.pdma: Loaded driver for PL330 DMAC-241330
[????0.455598] dma-pl330 121a0000.pdma:?????????DBUFF-32x4bytes Num_Chans-8 Num_Peri-32 Num_Events-32
[????0.460175] dma-pl330 121b0000.pdma: Loaded driver for PL330 DMAC-241330
[????0.460193] dma-pl330 121b0000.pdma:?????????DBUFF-32x4bytes Num_Chans-8 Num_Peri-32 Num_Events-32
[????0.461439] dma-pl330 10800000.mdma: Loaded driver for PL330 DMAC-241330
[????0.461456] dma-pl330 10800000.mdma:?????????DBUFF-64x8bytes Num_Chans-8 Num_Peri-1 Num_Events-32
[????0.462613] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[????0.465554] Serial: AMBA driver
[????0.465938] 12c00000.serial: ttySAC0 at MMIO 0x12c00000 (irq = 76, base_baud = 0) is a S3C6400/10
[????0.466473] 12c10000.serial: ttySAC1 at MMIO 0x12c10000 (irq = 77, base_baud = 0) is a S3C6400/10
[????0.467023] 12c20000.serial: ttySAC2 at MMIO 0x12c20000 (irq = 78, base_baud = 0) is a S3C6400/10
[????0.599414] random: fast init done
[????1.542942] console [ttySAC2] enabled
[????1.547070] 12c30000.serial: ttySAC3 at MMIO 0x12c30000 (irq = 79, base_baud = 0) is a S3C6400/10
[????1.556647] [drm] Initialized drm 1.1.0 20060810
[????1.562246] exynos-hdmi 14530000.hdmi: Failed to get supply 'vdd': -517
[????1.569034] exynos-rot 11c00000.rotator: The exynos rotator is probed successfully
[????1.575796] exynos-drm-gsc 13e00000.video-scaler: failed to get system register.
[????1.582802] exynos-drm-gsc 13e00000.video-scaler: drm gsc registered successfully.
[????1.590163] exynos-drm-gsc 13e10000.video-scaler: failed to get system register.
[????1.597624] exynos-drm-gsc 13e10000.video-scaler: drm gsc registered successfully.
[????1.605612] exynos-drm-ipp exynos-drm-ipp: drm ipp registered successfully.
[????1.617202] libphy: Fixed MDIO Bus: probed
[????1.620326] usbcore: registered new interface driver usb-storage
[????1.626314] mousedev: PS/2 mouse device common for all mice
[????1.649678] vdd_ldo9: Bringing 3300000uV into 3000000-3000000uV
[????1.662830] vddq_mmc2: Bringing 3300000uV into 2800000-2800000uV
[????1.672436] vdd_ldo15: Bringing 3300000uV into 3100000-3100000uV
[????1.685733] vdd_sd: Bringing 3300000uV into 2800000-2800000uV
[????1.745880] s5m-rtc s2mps14-rtc: rtc core: registered s5m-rtc as rtc0
[????1.758869] exynos-tmu 10060000.tmu: More trip points than supported by this TMU.
[????1.764911] exynos-tmu 10060000.tmu: 2 trip points should be configured in polling mode.
[????1.790692] sdhci: Secure Digital Host Controller Interface driver
[????1.795382] sdhci: Copyright(c) Pierre Ossman
[????1.799956] Synopsys Designware Multimedia Card Interface Driver
[????1.806290] dwmmc_exynos 12200000.mmc: IDMAC supports 32-bit address mode.
[????1.812577] dwmmc_exynos 12200000.mmc: Using internal DMA controller.
[????1.818958] dwmmc_exynos 12200000.mmc: Version ID is 250a
[????1.824373] dwmmc_exynos 12200000.mmc: DW MMC controller at irq 91,64 bit host data width,64 deep fifo
[????1.833763] dwmmc_exynos 12200000.mmc: Got CD GPIO
[????1.838412] dwmmc_exynos 12200000.mmc: allocated mmc-pwrseq
[????1.870520] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[????1.900048] dwmmc_exynos 12200000.mmc: 1 slots initialized
[????1.904270] dwmmc_exynos 12220000.mmc: IDMAC supports 32-bit address mode.
[????1.910928] dwmmc_exynos 12220000.mmc: Using internal DMA controller.
[????1.917310] dwmmc_exynos 12220000.mmc: Version ID is 250a
[????1.922727] dwmmc_exynos 12220000.mmc: DW MMC controller at irq 92,64 bit host data width,64 deep fifo
[????1.960331] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[????1.989895] dwmmc_exynos 12220000.mmc: 1 slots initialized
[????1.994062] sdhci-pltfm: SDHCI platform and OF driver helper
[????2.000612] ledtrig-cpu: registered to indicate activity on CPUs
[????2.005907] hidraw: raw HID events driver (C) Jiri Kosina
[????2.011265] usbcore: registered new interface driver usbhid
[????2.016419] usbhid: USB HID core driver
[????2.032699] exynos-nocp: new NoC Probe device registered: 10ca1000.nocp
[????2.038006] exynos-nocp: new NoC Probe device registered: 10ca1400.nocp
[????2.044648] exynos-nocp: new NoC Probe device registered: 10ca1800.nocp
[????2.051203] exynos-nocp: new NoC Probe device registered: 10ca1c00.nocp
[????2.060844] NET: Registered protocol family 10
[????2.064785] mip6: Mobile IPv6
[????2.066752] NET: Registered protocol family 17
[????2.071230] mpls_gso: MPLS GSO support
[????2.075529] ThumbEE CPU extension supported.
[????2.079164] Registering SWP/SWPB emulation handler
[????2.084499] registered taskstats version 1
[????2.088033] zswap: loaded using pool lzo/zbud
[????2.092445] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[????2.105579] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[????2.112148] s3c-rtc 101e0000.rtc: rtc disabled, re-enabling
[????2.116601] s3c-rtc 101e0000.rtc: warning: invalid RTC value so initializing it
[????2.123908] rtc rtc1: invalid alarm value: 1900-1-2 0:0:0
[????2.129400] s3c-rtc 101e0000.rtc: rtc core: registered s3c as rtc1
[????2.136750] exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz)
[????2.144186] exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz)
[????2.152075] exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz)
[????2.160433] exynos-bus: new bus device registered: soc:bus_fsys (100000 KHz ~ 200000 KHz)
[????2.168742] exynos-bus: new bus device registered: soc:bus_fsys2 ( 75000 KHz ~ 150000 KHz)
[????2.177136] exynos-bus: new bus device registered: soc:bus_mfc ( 96000 KHz ~ 333000 KHz)
[????2.185125] exynos-bus: new bus device registered: soc:bus_gen ( 89000 KHz ~ 267000 KHz)
[????2.193013] exynos-bus: new bus device registered: soc:bus_peri ( 67000 KHz ~??67000 KHz)
[????2.195081] devfreq soc:bus_wcore: Couldn't update frequency transition information.
[????2.209087] exynos-bus: new bus device registered: soc:bus_g2d ( 84000 KHz ~ 333000 KHz)
[????2.217105] exynos-bus: new bus device registered: soc:bus_g2d_acp ( 67000 KHz ~ 267000 KHz)
[????2.225507] exynos-bus: new bus device registered: soc:bus_jpeg ( 75000 KHz ~ 300000 KHz)
[????2.233659] exynos-bus: new bus device registered: soc:bus_jpeg_apb ( 84000 KHz ~ 167000 KHz)
[????2.242025] exynos-bus: new bus device registered: soc:bus_disp1_fimd (120000 KHz ~ 200000 KHz)
[????2.250759] exynos-bus: new bus device registered: soc:bus_disp1 (120000 KHz ~ 300000 KHz)
[????2.258960] exynos-bus: new bus device registered: soc:bus_gscl_scaler (150000 KHz ~ 300000 KHz)
[????2.267872] exynos-bus: new bus device registered: soc:bus_mscl ( 84000 KHz ~ 400000 KHz)
[????2.275693] mmc_host mmc1: Bus speed (slot 0) = 200000000Hz (slot req 200000000Hz, actual 200000000HZ div = 0)
[????2.277158] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[????2.279370] Power domain power-domain at 10044120 disable failed
[????2.285341] s5m-rtc s2mps14-rtc: setting system clock to 2000-01-01 00:00:04 UTC (946684804)
[????2.308572] PM: Hibernation image not present or could not be loaded.
[????2.316247] Waiting for root device /dev/mmcblk1p2...
[????2.410857] mmc1: new ultra high speed SDR104 SDHC card at address 59b4
[????2.416596] mmcblk1: mmc1:59b4 USDU1 14.7 GiB?
[????2.421238]??mmcblk1: p1 p2
[????2.425615] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[????2.554682] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[????2.561343] VFS: Mounted root (ext4 filesystem) readonly on device 179:2.
[????2.568683] Freeing unused kernel memory: 1024K (c0b00000 - c0c00000)
[????2.702417] systemd[1]: Mounting cgroup to /sys/fs/cgroup/cpuset of type cgroup with options cpuset.
[????2.781274] systemd[1]: Mounting cgroup to /sys/fs/cgroup/cpu,cpuacct of type cgroup with options cpu,cpuacct.
[????2.790379] systemd[1]: Mounting cgroup to /sys/fs/cgroup/blkio of type cgroup with options blkio.
[????2.800162] systemd[1]: Mounting cgroup to /sys/fs/cgroup/memory of type cgroup with options memory.
[????2.814356] systemd[1]: Mounting cgroup to /sys/fs/cgroup/devices of type cgroup with options devices.
[????2.822694] systemd[1]: Mounting cgroup to /sys/fs/cgroup/freezer of type cgroup with options freezer.
[????2.831941] systemd[1]: Mounting cgroup to /sys/fs/cgroup/net_cls,net_prio of type cgroup with options net_cls,net_prio.
[????2.842823] systemd[1]: Mounting cgroup to /sys/fs/cgroup/perf_event of type cgroup with options perf_event.
[????2.852911] systemd[1]: systemd 215 running in system mode. (+PAM +AUDIT +SELINUX +IMA +SYSVINIT +LIBCRYPTSETUP +GCRYPT +ACL +XZ -SECCOMP -APPARMOR)
[????2.865511] systemd[1]: Detected architecture 'arm'.
[????2.955738] systemd-getty-generator[114]: Automatically adding serial getty for /dev/ttySAC2.
[????2.957079] systemd-fstab-generator[115]: Parsing /etc/fstab
[????2.963653] systemd-fstab-generator[115]: Found entry what=/dev/mmcblk1p2 where=/ type=ext4
[????2.966633] systemd-default-display-manager-generator[117]: No /etc/X11/default-display-manager file, nothing to generate
[????2.968300] systemd-rc-local-generator[123]: Automatically adding rc-local.service.
[????3.016153] systemd-gpt-auto-generator[120]: Root device /dev/mmcblk1.
[????3.016220] systemd-sysv-generator[119]: Looking for unit files in (higher priority first):
[????3.016228] systemd-sysv-generator[119]:?????/etc/systemd/system
[????3.016235] systemd-sysv-generator[119]:?????/run/systemd/system
[????3.016243] systemd-sysv-generator[119]:?????/usr/local/lib/systemd/system
[????3.016250] systemd-sysv-generator[119]:?????/lib/systemd/system
[????3.016259] systemd-sysv-generator[119]:?????/usr/lib/systemd/system
[????3.016285] systemd-sysv-generator[119]: Looking for SysV init scripts in:
[????3.016292] systemd-sysv-generator[119]:?????/etc/init.d
[????3.016302] systemd-sysv-generator[119]: Looking for SysV rcN.d links in:
[????3.016309] systemd-sysv-generator[119]:?????/etc
[????3.017000] systemd-fstab-generator[115]: Found entry what=/dev/mmcblk1p1 where=/boot type=vfat
[????3.019097] systemd-fstab-generator[115]: Checking was requested for /dev/mmcblk1p1, but fsck.vfat does not exist: No such file or directory
[????3.070298] systemd-sysv-ge: 77 output lines suppressed due to ratelimiting
[????3.144075] systemd-gpt-auto-generator[120]: Not a GPT partition table, ignoring.
[????5.381648] random: crng init done
[???13.969940] systemd-cgroups-agent[134]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???13.969961] systemd-cgroups-agent[138]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???13.969966] systemd-cgroups-agent[139]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???13.969970] systemd-cgroups-agent[140]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???14.099908] systemd[1]: Got disconnect on private connection.
[???14.119885] systemd[1]: Got disconnect on private connection.
[???14.139889] systemd[1]: Got disconnect on private connection.
[???14.159884] systemd[1]: Got disconnect on private connection.
[???14.632312] systemd-journald[146]: Fixed max_use=98.5M max_size=12.3M min_size=4.0M keep_free=147.8M
[???14.646230] systemd-journald[146]: Reserving 22435 entries in hash table.
[???14.649928] systemd[1]: Got notification message for unit systemd-journald.service
[???14.661340] systemd-journald[146]: Vacuuming...
[???14.664447] systemd-journald[146]: Vacuuming done, freed 0 bytes
[???14.669913] systemd[1]: systemd-journald.service: Got notification message from PID 146 (WATCHDOG=1...)
[???14.680525] systemd-journald[146]: Flushing /dev/kmsg...
[???14.689922] systemd[1]: systemd-journald.service: got WATCHDOG=1
[???14.695361] systemd-journald[146]: Compressed data object 537 -> 288
[???14.709901] systemd[1]: Got notification message for unit systemd-journald.service
[???14.729910] systemd[1]: systemd-journald.service: Got notification message from PID 146 (WATCHDOG=1...)
[???14.740561] systemd-journald[146]: systemd-journald running as pid 146
[???14.969604] systemd-udevd[151]: starting version 215
[???15.091498] s5p-secss 10830000.sss: s5p-sss driver registered
[???15.096251] 12100000.phy supply vbus not found, using dummy regulator
[???15.098979] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.109611] 12100000.phy supply vbus-boost not found, using dummy regulator
[???15.113203] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[???15.115802] ehci-exynos: EHCI EXYNOS driver
[???15.117544] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[???15.121099] ohci-exynos: OHCI EXYNOS driver
[???15.138248] 12130000.phy supply vbus not found, using dummy regulator
[???15.140298] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.152585] 12500000.phy supply vbus not found, using dummy regulator
[???15.154586] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.164901] 12500000.phy supply vbus-boost not found, using dummy regulator
[???15.173098] exynos-ohci 12120000.usb: USB Host Controller
[???15.174726] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.187949] exynos-ohci 12120000.usb: new USB bus registered, assigned bus number 1
[???15.195296] exynos-ohci 12120000.usb: irq 89, io mem 0x12120000
[???15.274045] usb usb1: New USB device found, idVendor=1d6b, idProduct=0001
[???15.279360] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.279366] usb usb1: Product: USB Host Controller
[???15.279371] usb usb1: Manufacturer: Linux 4.8.0-rc7+ ohci_hcd
[???15.279375] usb usb1: SerialNumber: 12120000.usb
[???15.280187] hub 1-0:1.0: USB hub found
[???15.280246] hub 1-0:1.0: 3 ports detected
[???15.281215] exynos-ehci 12110000.usb: EHCI Host Controller
[???15.281509] exynos-ehci 12110000.usb: new USB bus registered, assigned bus number 2
[???15.281656] exynos-ehci 12110000.usb: irq 89, io mem 0x12110000
[???15.283280] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.309929] exynos-ehci 12110000.usb: USB 2.0 started, EHCI 1.00
[???15.310297] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
[???15.310302] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.310307] usb usb2: Product: EHCI Host Controller
[???15.310312] usb usb2: Manufacturer: Linux 4.8.0-rc7+ ehci_hcd
[???15.310317] usb usb2: SerialNumber: 12110000.usb
[???15.310928] hub 2-0:1.0: USB hub found
[???15.310980] hub 2-0:1.0: 3 ports detected
[???15.312172] exynos-dwc3 soc:usb3-0: no suspend clk specified
[???15.313613] usb_phy_generic.0.auto supply vcc not found, using dummy regulator
[???15.314033] usb_phy_generic.1.auto supply vcc not found, using dummy regulator
[???15.315099] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.315395] exynos-dwc3 soc:usb3-1: no suspend clk specified
[???15.317108] usb_phy_generic.2.auto supply vcc not found, using dummy regulator
[???15.317436] usb_phy_generic.3.auto supply vcc not found, using dummy regulator
[???15.318895] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.322074] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.327912] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.330946] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.335605] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.335844] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 3
[???15.336099] xhci-hcd xhci-hcd.4.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.336149] xhci-hcd xhci-hcd.4.auto: irq 135, io mem 0x12000000
[???15.336489] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
[???15.336496] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.336501] usb usb3: Product: xHCI Host Controller
[???15.336506] usb usb3: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.336511] usb usb3: SerialNumber: xhci-hcd.4.auto
[???15.337095] hub 3-0:1.0: USB hub found
[???15.337142] hub 3-0:1.0: 1 port detected
[???15.337596] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.337789] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 4
[???15.337927] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.338159] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003
[???15.338165] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.338169] usb usb4: Product: xHCI Host Controller
[???15.338174] usb usb4: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.338179] usb usb4: SerialNumber: xhci-hcd.4.auto
[???15.338847] hub 4-0:1.0: USB hub found
[???15.338896] hub 4-0:1.0: 1 port detected
[???15.339419] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.339649] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 5
[???15.339990] xhci-hcd xhci-hcd.5.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.340036] xhci-hcd xhci-hcd.5.auto: irq 136, io mem 0x12400000
[???15.340103] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.340329] usb usb5: New USB device found, idVendor=1d6b, idProduct=0002
[???15.340335] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.340340] usb usb5: Product: xHCI Host Controller
[???15.340344] usb usb5: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.340349] usb usb5: SerialNumber: xhci-hcd.5.auto
[???15.340918] hub 5-0:1.0: USB hub found
[???15.340964] hub 5-0:1.0: 1 port detected
[???15.341387] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.341618] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 6
[???15.341758] usb usb6: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.341993] usb usb6: New USB device found, idVendor=1d6b, idProduct=0003
[???15.341998] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.342003] usb usb6: Product: xHCI Host Controller
[???15.342008] usb usb6: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.342012] usb usb6: SerialNumber: xhci-hcd.5.auto
[???15.342662] hub 6-0:1.0: USB hub found
[???15.342711] hub 6-0:1.0: 1 port detected
[???15.343005] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.346251] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???16.007600] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
[???16.139262] FAT-fs (mmcblk1p1): utf8 is not a recommended IO charset for FAT filesystems, filesystem will be case sensitive!
[???16.162644] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[???16.626154] systemd-journald[146]: Received request to flush runtime journal from PID 1
[???16.633782] systemd-journald[146]: Vacuuming...
[???16.637242] systemd-journald[146]: Vacuuming done, freed 0 bytes
[???17.640723] RPC: Registered named UNIX socket transport module.
[???17.645166] RPC: Registered udp transport module.
[???17.651236] RPC: Registered tcp transport module.
[???17.654524] RPC: Registered tcp NFSv4.1 backchannel transport module.
[???17.672346] FS-Cache: Loaded
[???17.693518] FS-Cache: Netfs 'nfs' registered for caching
[???17.725088] Installing knfsd (copyright (C) 1996 okir at monad.swb.de).
[???19.642578] usb usb5-port1: connect-debounce failed
^ permalink raw reply
* [GIT PULL] Qualcomm EBI2 bindings and bus driver
From: Linus Walleij @ 2016-09-20 21:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4360974.U0qvolVKdi@wuerfel>
On Tue, Sep 20, 2016 at 12:12 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Thursday, September 8, 2016 3:34:42 PM CEST Linus Walleij wrote:
>> please pull this new EBI2 bus driver and its bindings into an
>> apropriate branch in the ARM SoC tree. The binding now has
>> Rob Herrings ACK and we have hopefully finally figured out how
>> this should be done.
>>
>
> I just noticed that you sent the pull request directly to arm at kernel.org
> rather than the Qualcomm maintainers (which are only on Cc).
>
> Usually, I'd expect to see this forwarded from Andy, is there a
> reason to do it differently here? If so, can I have an Ack
> from him?
Sorry I sent it like this beacuse in an earlier revision of the patch
I asked how it was to be handled and got no answers, so I just assumed
new drivers was a plain separate thing. (I understand Andy has to merge
the DTS changes.)
I saw Andy gave his ACK though, any comments should be addressed
in this version as well.
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] Qualcomm EBI2 bindings and bus driver
From: Linus Walleij @ 2016-09-20 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160919223616.GD5431@hector.attlocal.net>
On Tue, Sep 20, 2016 at 12:36 AM, Andy Gross <andy.gross@linaro.org> wrote:
> On Tue, Sep 20, 2016 at 12:12:33AM +0200, Arnd Bergmann wrote:
>> On Thursday, September 8, 2016 3:34:42 PM CEST Linus Walleij wrote:
>> > please pull this new EBI2 bus driver and its bindings into an
>> > apropriate branch in the ARM SoC tree. The binding now has
>> > Rob Herrings ACK and we have hopefully finally figured out how
>> > this should be done.
>> >
>>
>> I just noticed that you sent the pull request directly to arm at kernel.org
>> rather than the Qualcomm maintainers (which are only on Cc).
>>
>> Usually, I'd expect to see this forwarded from Andy, is there a
>> reason to do it differently here? If so, can I have an Ack
>> from him?
>
> When I looked at this last, I thought there were comments. Sorry I missed it.
> If you want to pick it up Arnd, please do, otherwise I can send it along in the
> next pull request.
>
> Acked-by: Andy Gross <andy.gross@linaro.org>
Thanks, I hope Arnd can pull this as-is.
Will you apply the DTS changes Andy?
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] ARM: mvebu: drivers for v4.9 (#1)
From: Linus Walleij @ 2016-09-20 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4134529.ol6KhRYAQp@wuerfel>
On Tue, Sep 20, 2016 at 12:16 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday, September 14, 2016 5:35:10 PM CEST Gregory CLEMENT wrote:
>> mvebu drivers for 4.9 (part 1)
>>
>> - Add pinctrl and clk support for the Orion5x SoC mv88f5181 variant
>>
>> ----------------------------------------------------------------
>> Jamie Lentin (2):
>> clk: mvebu: Add clk support for the orion5x SoC mv88f5181
>> pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
>>
>> .../devicetree/bindings/clock/mvebu-core-clock.txt | 1 +
>> .../bindings/pinctrl/marvell,orion-pinctrl.txt | 4 +-
>> drivers/clk/mvebu/orion.c | 70 ++++++++++++++++++++++
>> drivers/pinctrl/mvebu/pinctrl-orion.c | 23 +++----
>> 4 files changed, 86 insertions(+), 12 deletions(-)
>
> I see this touches pinctrl and clk drivers, but none of the maintainers are
> on Cc for this pull request, nor have they provided an Ack for the patches
> according to your git log.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH] pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
From: Linus Walleij @ 2016-09-20 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920162635.4195-1-gregory.clement@free-electrons.com>
On Tue, Sep 20, 2016 at 6:26 PM, Gregory CLEMENT
<gregory.clement@free-electrons.com> wrote:
> From: Jamie Lentin <jm@lentin.co.uk>
>
> As far as I'm aware the mv88f5181-b1 and mv88f5181l are the same at the
> pinctrl level, so re-use the definitions for both.
>
> [gregory.clement at free-electrons.com: fix commit title]
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Is this the patch from your pull request?
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Or do you prefer that I take it into the pinctrl tree?
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] Qualcomm EBI2 bindings and bus driver
From: Andy Gross @ 2016-09-20 22:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdZdoK4+YRrZC=Kd8TFzJXOQxh=Gi0BWLp4PzV6H5_wEtg@mail.gmail.com>
On Tue, Sep 20, 2016 at 11:50:14PM +0200, Linus Walleij wrote:
> On Tue, Sep 20, 2016 at 12:36 AM, Andy Gross <andy.gross@linaro.org> wrote:
> > On Tue, Sep 20, 2016 at 12:12:33AM +0200, Arnd Bergmann wrote:
> >> On Thursday, September 8, 2016 3:34:42 PM CEST Linus Walleij wrote:
> >> > please pull this new EBI2 bus driver and its bindings into an
> >> > apropriate branch in the ARM SoC tree. The binding now has
> >> > Rob Herrings ACK and we have hopefully finally figured out how
> >> > this should be done.
> >> >
> >>
> >> I just noticed that you sent the pull request directly to arm at kernel.org
> >> rather than the Qualcomm maintainers (which are only on Cc).
> >>
> >> Usually, I'd expect to see this forwarded from Andy, is there a
> >> reason to do it differently here? If so, can I have an Ack
> >> from him?
> >
> > When I looked at this last, I thought there were comments. Sorry I missed it.
> > If you want to pick it up Arnd, please do, otherwise I can send it along in the
> > next pull request.
> >
> > Acked-by: Andy Gross <andy.gross@linaro.org>
>
> Thanks, I hope Arnd can pull this as-is.
>
> Will you apply the DTS changes Andy?
Sure I'll put it in a supplemental pull.
Andy
^ permalink raw reply
* [PATCH v2 1/1] clk: imx53: Add clocks configuration
From: Stephen Boyd @ 2016-09-20 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474281002-18868-1-git-send-email-fabien.lahoudere@collabora.co.uk>
On 09/19, Fabien Lahoudere wrote:
> From: Kalle Kankare <kalle.kankare@vincit.fi>
>
> Add clocks configuration for CSI, FIRI and IEEE1588.
>
> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 1/2] clk: imx6: fix i.MX6DL clock tree to reflect reality
From: Stephen Boyd @ 2016-09-20 23:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474017371-28966-1-git-send-email-l.stach@pengutronix.de>
On 09/16, Lucas Stach wrote:
> The current clock tree only implements the minimal set of differences
> between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
> reality.
>
> Apply the following fixes to match the RM:
> - DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
> GPU3D_CORE
> - GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
> - GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 2/2] clk: imx6: initialize GPU clocks
From: Stephen Boyd @ 2016-09-20 23:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474017371-28966-2-git-send-email-l.stach@pengutronix.de>
On 09/16, Lucas Stach wrote:
> Initialize the GPU clock muxes to sane inputs. Until now they have
> not been changed from their default values, which means that both
> GPU3D shader and GPU2D core were fed by clock inputs whose rates
> exceed the maximium allowed frequency of the cores by as much as
> 200MHz.
>
> This fixes a severe GPU stability issue on i.MX6DL.
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox