* [PATCH] clk: mediatek: clk-mt8173: Unmap region obtained by of_iomap
From: James Liao @ 2016-09-21 3:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474360242-15126-1-git-send-email-arvind.yadav.cs@gmail.com>
On Tue, 2016-09-20 at 14:00 +0530, Arvind Yadav wrote:
> From: Arvind Yadav <arvind.yadav.cs@gmail.com>
>
> Free memory mapping, if init is not successful.
>
> Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Reviewed-by: James Liao <jamesjj.liao@mediatek.com>
> ---
> drivers/clk/mediatek/clk-mt8173.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
> index 10c9860..0ac3aee 100644
> --- a/drivers/clk/mediatek/clk-mt8173.c
> +++ b/drivers/clk/mediatek/clk-mt8173.c
> @@ -1074,8 +1074,10 @@ static void __init mtk_apmixedsys_init(struct device_node *node)
> }
>
> mt8173_pll_clk_data = clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
> - if (!clk_data)
> + if (!clk_data) {
> + iounmap(base);
> return;
> + }
>
> mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
>
^ permalink raw reply
* s3c2416 use two usb host?
From: jiangyanpin77 @ 2016-09-21 2:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
I am working on samsung s3c2416 ARM based Soc on
linux 3.1.18 kernel. By default, the Soc has one
USB host and one USB device/host. My USB host is
working fine. Since I need to use two USB host on my system,
I need to enable the USB device/host as a USB host.
I am using ARM9 based s3c2416 processor. The SoC has one USB host
controller and one USB host/device controller. What are the
register settings that should be done to enable both USB
interfaces as USB host controller. ? There is a register PHYCTRL
with address 0x4C00_0080. Its bit[0] says something on USB host
mode and USB device mode. Is it this register which I should
work on or any more register configurations are required ?
The following are the changes I have made for the same:
Register Address value
-----------------------------
PHYPWR 0x4C00_0084 0x0
PWRCFG 0x4C00_0060 (1<<4)
URSTCON 0x4C00_0088 (0<<2)|(1<<1)|(1<<0)
URSTCON 0x4C00_0088 (0<<2)|(0<<1)|(0<<0)
PHYCTRL 0x4C00_0080 (0<<3)|(0<<2)|(1<<1)|(1<<0)
UCLKCON 0x4C00_008C 0<<31)|(0<<2)|(1<<1)|(1<<0)
Once I try to plug in a USB mass storage device (whose driver is present in
kernel), I get the following error:
usb 1-2: new full speed USB device using s3c2410-ohci and address 10
usb 1-2: device descriptor read/64, error -62
usb 1-2: device descriptor read/64, error -62
usb 1-2: new full speed USB device using s3c2410-ohci and address 11
usb 1-2: device descriptor read/64, error -62
usb 1-2: device descriptor read/64, error -62
usb 1-2: new full speed USB device using s3c2410-ohci and address 12
usb 1-2: device not accepting address 12, error -62
usb 1-2: new full speed USB device using s3c2410-ohci and address 13
usb 1-2: device not accepting address 13, error -62
Why is it throwing this error ? Is there any driver for USB hub missing in
2.6.21 kernel, or do I need to modify more on register settings.
Please help.
Thank You
YanpinJiang
^ permalink raw reply
* [PATCH] ARM: *: mm: Implement get_user_pages_fast()
From: Yuriy Romanenko @ 2016-09-21 2:00 UTC (permalink / raw)
To: linux-arm-kernel
>From 6be781314e78ad43d797915189145a0aae41f639 Mon Sep 17 00:00:00 2001
From: Yuriy Romanenko <yromanenko@carrietech.com>
Date: Tue, 20 Sep 2016 18:50:16 -0700
Subject: [PATCH] ARM: *: mm: Implement get_user_pages_fast()
Will do an unlocked walk of the page table, if that provides everything
necessary, it will succeed and return, otherwise it will call the old
slow path on the remainder
Signed-off-by: Yuriy Romanenko <yromanenko@carrietech.com>
---
arch/arm/mm/Makefile | 2 +-
arch/arm/mm/gup.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 91 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mm/gup.c
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 7f76d96..096cfcb 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -6,7 +6,7 @@ obj-y := dma-mapping.o extable.o fault.o init.o \
iomap.o
obj-$(CONFIG_MMU) += fault-armv.o flush.o idmap.o ioremap.o \
- mmap.o pgd.o mmu.o pageattr.o
+ mmap.o pgd.o mmu.o pageattr.o gup.o
ifneq ($(CONFIG_MMU),y)
obj-y += nommu.o
diff --git a/arch/arm/mm/gup.c b/arch/arm/mm/gup.c
new file mode 100644
index 0000000..6e57bc9
--- /dev/null
+++ b/arch/arm/mm/gup.c
@@ -0,0 +1,90 @@
+/*
+ * Lockless get_user_pages_fast for ARM
+ *
+ * Copyright (C) 2014 Lytro, Inc.
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/vmstat.h>
+#include <linux/highmem.h>
+#include <linux/swap.h>
+
+#include <asm/pgtable.h>
+
+struct gup_private_data {
+ int nr;
+ struct page **pages;
+ int write;
+};
+
+static int gup_pte_entry(pte_t *ptep, unsigned long start,
+ unsigned long end, struct mm_walk *walk)
+{
+ struct gup_private_data *private_data =
+ (struct gup_private_data *)walk->private;
+ struct page * page;
+ pte_t pte = *ptep;
+ if (!pte_present(pte) ||
+ pte_special(pte) ||
+ (private_data->write && !pte_write(pte)))
+ {
+ return private_data->nr;
+ }
+ page = pte_page(pte);
+ get_page(page);
+ private_data->pages[private_data->nr++] = page;
+ return 0;
+}
+
+static int gup_pte_hole_entry(unsigned long start, unsigned long end,
+ struct mm_walk *walk)
+{
+ struct gup_private_data *private_data =
+ (struct gup_private_data *)walk->private;
+ return private_data->nr;
+}
+
+
+int get_user_pages_fast(unsigned long start, int nr_pages, int write,
+ struct page **pages)
+{
+ struct mm_struct *mm = current->mm;
+ int ret;
+ unsigned long page_addr = (start & PAGE_MASK);
+ int nr = 0;
+
+ struct gup_private_data private_data = {
+ .nr = 0,
+ .pages = pages,
+ .write = write
+ };
+
+ struct mm_walk gup_walk = {
+ .pte_entry = gup_pte_entry,
+ .pte_hole = gup_pte_hole_entry,
+ .mm = mm,
+ .private = (void *)&private_data
+ };
+
+ ret = walk_page_range(page_addr,
+ page_addr + nr_pages * PAGE_SIZE,
+ &gup_walk);
+ nr = ret ? ret : nr_pages;
+
+ if (nr == nr_pages)
+ {
+ return nr;
+ }
+ else
+ {
+ page_addr += (nr << PAGE_SHIFT);
+ }
+
+ down_read(&mm->mmap_sem);
+ ret = get_user_pages(current, mm, page_addr,
+ nr_pages - nr, write, 0, pages + nr, NULL);
+ up_read(&mm->mmap_sem);
+
+ return (ret < 0) ? nr : (ret + nr);
+}
\ No newline@end of file
--
2.7.4
^ permalink raw reply related
* [RFC PATCH 0/8] arm64: move thread_info off of the task stack
From: Laura Abbott @ 2016-09-21 1:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473947349-14521-1-git-send-email-mark.rutland@arm.com>
On 09/15/2016 06:49 AM, Mark Rutland wrote:
> Building atop of Andy's work on x86 and generic code, these patches move
> arm64's thread_info off of the stack and into task_struct. This protects
> thread_info from corruption in the face of stack overflow, and serves as
> a step towards fully robust stack overflow handling will be addressed by
> subsequent patches.
>
> In contrast to x86, we can't place some critical data such as
> preempt_count in percpu variables, and we must store these in some
> per-task location. This, compounded with the way headers are organised
> conspires to require us to still define our own thread_info. I
> understand that the longer term plan is to kill off thread_info
> entirely, hence I'm sending this as an RFC so we can figure out if/how
> we can achieve that.
>
> These patches are based on Andy's x86/vmap_stack branch [1,2], and I've
> pushed a copy to me arm64/ti-stack-split branch [3,4]. The result of
> these patches boots happily on platforms within reach of my desk, but
> has not seen much stressing so far.
>
FWIW, I used your ti-stack-split branch while running some kernel builds
and it seems to work well enough. You can take that as a Tested-by or I
can re-test with a non-RFC version.
> Thanks,
> Mark.
>
> [1] git://git.kernel.org/pub/scm/linux/kernel/git/luto/linux.git x86/vmap_stack
> [2] https://git.kernel.org/cgit/linux/kernel/git/luto/linux.git/log/?h=x86/vmap_stack
> [3] git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arm64/ti-stack-split
> [4] https://git.kernel.org/cgit/linux/kernel/git/mark/linux.git/log/?h=arm64/ti-stack-split
>
> Mark Rutland (8):
> thread_info: include <current.h> for THREAD_INFO_IN_TASK
> thread_info: allow custom in-task thread_info
> arm64: thread_info remove stale items
> arm64: asm-offsets: remove unused definitions
> arm64: assembler: introduce ldr_this_cpu
> arm64: traps: use task_struct instead of thread_info
> arm64: move sp_el0 and tpidr_el1 into cpu_suspend_ctx
> arm64: split thread_info from task stack
>
> arch/arm64/Kconfig | 2 ++
> arch/arm64/include/asm/Kbuild | 1 -
> arch/arm64/include/asm/assembler.h | 19 +++++++++++++++----
> arch/arm64/include/asm/current.h | 22 ++++++++++++++++++++++
> arch/arm64/include/asm/smp.h | 1 +
> arch/arm64/include/asm/suspend.h | 2 +-
> arch/arm64/include/asm/thread_info.h | 21 ---------------------
> arch/arm64/kernel/asm-offsets.c | 3 +--
> arch/arm64/kernel/entry.S | 6 +++---
> arch/arm64/kernel/head.S | 11 +++++------
> arch/arm64/kernel/process.c | 31 ++++++++++++++++++++++++++-----
> arch/arm64/kernel/sleep.S | 3 ---
> arch/arm64/kernel/smp.c | 2 ++
> arch/arm64/kernel/stacktrace.c | 5 +++++
> arch/arm64/kernel/suspend.c | 6 ------
> arch/arm64/kernel/traps.c | 12 ++++++------
> arch/arm64/mm/proc.S | 6 ++++++
> include/linux/thread_info.h | 4 +++-
> init/Kconfig | 3 +++
> 19 files changed, 101 insertions(+), 59 deletions(-)
> create mode 100644 arch/arm64/include/asm/current.h
>
^ permalink raw reply
* [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms
From: cov at codeaurora.org @ 2016-09-21 1:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920192636.GB4941@localhost>
Hi Bjorn, Thomasz,
On 2016-09-20 15:26, Bjorn Helgaas wrote:
> On Fri, Sep 09, 2016 at 09:24:02PM +0200, Tomasz Nowicki wrote:
>> Quirk handling relies on an idea of simple static array which contains
>> quirk enties. Each entry consists of identification information (IDs
>> from
>> standard header of MCFG table) along with custom pci_ecam_ops
>> structure and
>> configuration space resource structure. This way it is possible find
>> corresponding quirk entries and override pci_ecam_ops and PCI
>> configuration
>> space regions.
>>
>> As an example, the last 3 patches present quirk handling mechanism
>> usage for
>> ThunderX.
>>
>> v5 -> v6
>> - rebase against v4.8-rc5
>> - drop patch 1 form previous series
>> - keep pci_acpi_setup_ecam_mapping() in ARM64 arch directory
>> - move quirk code to pci_mcfg.c
>> - restrict quirk to override pci_ecam_ops and CFG resource structure
>> only, no init call any more
>> - split ThunderX quirks into the smaller chunks
>> - add ThunderX pass1.x silicon revision support
>>
>> v4 -> v5
>> - rebase against v4.8-rc1
>> - rework to exact MCFG OEM ID, TABLE ID, rev match
>> - use memcmp instead of strncmp
>> - no substring match
>> - fix typos and dmesg message
>>
>> Tomasz Nowicki (5):
>> PCI/ACPI: Extend pci_mcfg_lookup() responsibilities
>> PCI/ACPI: Check platform specific ECAM quirks
>> PCI: thunder-pem: Allow to probe PEM-specific register range for
>> ACPI
>> case
>> PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x
>> silicon
>> version
>> PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x
>> silicon
>> version
>>
>> arch/arm64/kernel/pci.c | 17 ++--
>> drivers/acpi/pci_mcfg.c | 168
>> +++++++++++++++++++++++++++++++++++-
>> drivers/pci/host/pci-thunder-ecam.c | 2 +-
>> drivers/pci/host/pci-thunder-pem.c | 63 +++++++++++---
>> include/linux/pci-acpi.h | 4 +-
>> include/linux/pci-ecam.h | 7 ++
>> 6 files changed, 230 insertions(+), 31 deletions(-)
>
> I'm not quite ready to merge these because we haven't resolved the
> question of how to expose the resources used by the memory-mapped
> config space. I'm fine with the first two patches (I did make a
> couple trivial changes, see below), but there's no point in merging
> them until we merge a user for them.
>
> I pushed the series to pci/ecam-v6 for build testing and discussion.
> The diff (the changes I made locally) from v6 as posted by Tomasz is
> below.
Rebasing the following simple quirks framework user onto this branch,
I have some questions.
https://source.codeaurora.org/quic/server/kernel/commit/?h=cov/4.8-rc2-testing&id=83b766cafef11c107b10177d0626db311f382299
> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> index eb14f74..bb3b8ad 100644
> --- a/drivers/acpi/pci_mcfg.c
> +++ b/drivers/acpi/pci_mcfg.c
> @@ -42,86 +42,59 @@ struct mcfg_fixup {
> struct resource cfgres;
> };
>
> -#define MCFG_DOM_ANY (-1)
Did you delete this because there were no current users, because you'd
prefer users just use "-1", or for some other reason?
> #define MCFG_BUS_RANGE(start, end) DEFINE_RES_NAMED((start), \
> ((end) - (start) + 1), \
> NULL, IORESOURCE_BUS)
> -#define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
> -#define MCFG_RES_EMPTY DEFINE_RES_NAMED(0, 0, NULL, 0)
> +#define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
>
> static struct mcfg_fixup mcfg_quirks[] = {
> -/* { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
> +/* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, cfgres, ops }, */
This comment appears to have the order of cfgres and ops reversed.
Am I correct in reading that if a user of the framework does not wish to
override cfgres they must place a struct resource with .start = 0 at the
end of their mcfg_quirks entry? If so, I guess I have the same questions
about removing MCFG_RES_EMPTY as I do about removing MCFG_DOM_ANY.
Thanks,
Cov
^ permalink raw reply
* [RFC 3/4] arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support
From: Andy Gross @ 2016-09-21 1:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1467938467-21607-4-git-send-email-jmcnicol@redhat.com>
On Thu, Jul 07, 2016 at 05:41:06PM -0700, Jeremy McNicoll wrote:
> From: Bastian K?cher <mail@kchr.de>
>
> Initial device tree support for Qualcomm MSM8994 SoC and
> Huawei Angler / Google Nexus 6P support.
>
> The device tree and the angler_defconfig are based on the
> device tree from the Google 3.10 kernel tree.
>
> The device can be booted into the initrd with only one CPU running.
>
> Signed-off-by: Bastian K?cher <mail@kchr.de>
> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
> ---
> arch/arm64/Kconfig.platforms | 13 +
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/huawei/Makefile | 5 +
> .../boot/dts/huawei/msm8994-angler-rev-101.dts | 41 ++
There is nothing to warrant having huawei have their own directory unless they
are making their own SOC.
> arch/arm64/boot/dts/qcom/msm8994-pins.dtsi | 38 ++
> arch/arm64/boot/dts/qcom/msm8994-v2.0.dtsi | 31 +
> arch/arm64/boot/dts/qcom/msm8994.dtsi | 237 ++++++++
> arch/arm64/configs/angler_defconfig | 666 +++++++++++++++++++++
We don't need to add defconfigs. We just need to turn on the options in the
main defconfig.
Also, when you do have defconfigs, please separate those changes into a separate
patch.
> 8 files changed, 1032 insertions(+)
> create mode 100644 arch/arm64/boot/dts/huawei/Makefile
> create mode 100644 arch/arm64/boot/dts/huawei/msm8994-angler-rev-101.dts
> create mode 100644 arch/arm64/boot/dts/qcom/msm8994-pins.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/msm8994-v2.0.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/msm8994.dtsi
> create mode 100644 arch/arm64/configs/angler_defconfig
>
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
> index 515e669..f253f60d 100644
> --- a/arch/arm64/Kconfig.platforms
> +++ b/arch/arm64/Kconfig.platforms
> @@ -98,6 +98,19 @@ config MACH_LGE
> help
> This enables support for the LGE Nexus 5X - BullHead MSM8992.
>
> +config ARCH_MSM8994
> + bool "Qualcomm MSM8994"
> + depends on ARCH_QCOM
> + select ARCH_REQUIRE_GPIOLIB
> + help
> + This enables support for the Qualcomm MSM8994
> +
> +config MACH_HUAWEI
> + bool "Huawei Angler (MSM8994)"
> + depends on ARCH_QCOM
> + help
> + This enables support for the Huawei Nexus 6P - Angler MSM8994.
Remove both of these. We aren't adding more ARCHs or machs.
> +
> config ARCH_ROCKCHIP
> bool "Rockchip Platforms"
> select ARCH_HAS_RESET_CONTROLLER
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index bde90fb..d199f8b 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -9,6 +9,7 @@ dts-dirs += cavium
> dts-dirs += exynos
> dts-dirs += freescale
> dts-dirs += hisilicon
> +dts-dirs += huawei
> dts-dirs += marvell
> dts-dirs += mediatek
> dts-dirs += nvidia
> diff --git a/arch/arm64/boot/dts/huawei/Makefile b/arch/arm64/boot/dts/huawei/Makefile
> new file mode 100644
> index 0000000..4b31ff4
> --- /dev/null
> +++ b/arch/arm64/boot/dts/huawei/Makefile
> @@ -0,0 +1,5 @@
> +dtb-$(CONFIG_MACH_HUAWEI) += msm8994-angler-rev-101.dtb
> +
> +always := $(dtb-y)
> +subdir-y := $(dts-dirs)
> +clean-files := *.dtb
> diff --git a/arch/arm64/boot/dts/huawei/msm8994-angler-rev-101.dts b/arch/arm64/boot/dts/huawei/msm8994-angler-rev-101.dts
> new file mode 100644
> index 0000000..07a71d6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/huawei/msm8994-angler-rev-101.dts
> @@ -0,0 +1,41 @@
> +/* Copyright (c) 2015, Huawei Inc. All rights reserved.
> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +/dts-v1/;
> +
> +#include "../qcom/msm8994-v2.0.dtsi"
> +
> +/ {
> + model = "HUAWEI MSM8994 ANGLER rev-1.01";
> + compatible = "qcom,msm8994";
> + qcom,board-id= <8026 0>;
> +};
> +
> +/ {
> + aliases {
> + serial0 = &blsp1_uart2;
> + };
> +
> + chosen {
> + stdout-path = "serial0";
> + };
> +
> + soc {
> + serial at f991e000 {
> + status = "okay";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&blsp1_uart2_default>;
> + pinctrl-1 = <&blsp1_uart2_sleep>;
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi
> new file mode 100644
> index 0000000..0e4eea0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi
> @@ -0,0 +1,38 @@
> +/*
> + * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +&msmgpio {
> + blsp1_uart2_default: blsp1_uart2_default {
> + pinmux {
> + function = "blsp_uart2";
> + pins = "gpio4", "gpio5";
> + };
> + pinconf {
> + pins = "gpio4", "gpio5";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart2_sleep: blsp1_uart2_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio4", "gpio5";
> + };
> + pinconf {
> + pins = "gpio4", "gpio5";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/msm8994-v2.0.dtsi b/arch/arm64/boot/dts/qcom/msm8994-v2.0.dtsi
> new file mode 100644
> index 0000000..8fc4c41f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8994-v2.0.dtsi
> @@ -0,0 +1,31 @@
> +/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +/*
> + * As a general rule, only version-specific property overrides should be placed
> + * inside this file. Device definitions should be placed inside the msm8994.dtsi
> + * file.
> + */
> +
> +#include "msm8994.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. MSM 8994v2.0";
> + compatible = "qcom,msm8994";
> + qcom,msm-id = <207 0x20000>;
Drop the msm-id
> +
> +};
> +
> +/* Clock driver overrides */
> +&clock_gcc {
> + compatible = "qcom,gcc-8994v2";
> +};
> diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> new file mode 100644
> index 0000000..c95cb73
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> @@ -0,0 +1,237 @@
> +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +/memreserve/ 0x00000000 0x00001000;
> +/memreserve/ 0xac1c0000 0x00001000;
So the 0x00000000 is totally bogus. And the 0xac1c0000 needs to move to a
reserved area lower in the dts.
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. MSM 8994";
> + compatible = "qcom,msm8994";
> + qcom,msm-id = <207 0x0>;
> + qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
kill the ids
> + interrupt-parent = <&intc>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + chosen { };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&CPU0>;
> + };
> + };
> + };
> +
> + CPU0: cpu at 0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53", "arm,armv8";
> + reg = <0x0>;
> + next-level-cache = <&L2_0>;
> + // The currents(uA) correspond to the frequencies in the
> + // frequency table.
> + current = < 24140 //384000 kHZ
> + 27200 //460800 kHZ
> + 32300 //600000 kHZ
> + 36940 //672000 kHz
> + 41570 //768000 kHZ
> + 49870 //864000 kHZ
> + 57840 //960000 kHZ
> + 79800 //1248000 kHZ
> + 88810 //1344000 kHZ
> + 102400 //1478400 kHZ
> + 110900>; //1555200 kHZ
> + L2_0: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + };
> + };
> + };
> +
> + soc: soc { };
> +
> + memory {
> + device_type = "memory";
> + /* We expect the bootloader to fill in the reg */
> + reg = <0 0 0 0>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
Move that reserve down here and make it no-map.
> +
> + smem_mem: smem_region at 0x6a00000 {
> + reg = <0x0 0x6a00000 0x0 0x200000>;
> + no-map;
> + };
> + };
> +};
> +
> +&soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0 0xffffffff>;
> + compatible = "simple-bus";
> +
> + intc: interrupt-controller at f9000000 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0xf9000000 0x1000>,
> + <0xf9002000 0x1000>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <1 2 0xff08>,
> + <1 3 0xff08>,
> + <1 4 0xff08>,
> + <1 1 0xff08>;
> + clock-frequency = <19200000>;
> + };
> +
> + timer at f9020000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "arm,armv7-timer-mem";
> + reg = <0xf9020000 0x1000>;
> + clock-frequency = <19200000>;
> +
> + frame at f9021000 {
> + frame-number = <0>;
> + interrupts = <0 9 0x4>,
> + <0 8 0x4>;
> + reg = <0xf9021000 0x1000>,
> + <0xf9022000 0x1000>;
> + };
> +
> + frame at f9023000 {
> + frame-number = <1>;
> + interrupts = <0 10 0x4>;
> + reg = <0xf9023000 0x1000>;
> + status = "disabled";
> + };
> +
> + frame at f9024000 {
> + frame-number = <2>;
> + interrupts = <0 11 0x4>;
> + reg = <0xf9024000 0x1000>;
> + status = "disabled";
> + };
> +
> + frame at f9025000 {
> + frame-number = <3>;
> + interrupts = <0 12 0x4>;
> + reg = <0xf9025000 0x1000>;
> + status = "disabled";
> + };
> +
> + frame at f9026000 {
> + frame-number = <4>;
> + interrupts = <0 13 0x4>;
> + reg = <0xf9026000 0x1000>;
> + status = "disabled";
> + };
> +
> + frame at f9027000 {
> + frame-number = <5>;
> + interrupts = <0 14 0x4>;
> + reg = <0xf9027000 0x1000>;
> + status = "disabled";
> + };
> +
> + frame at f9028000 {
> + frame-number = <6>;
> + interrupts = <0 15 0x4>;
> + reg = <0xf9028000 0x1000>;
> + status = "disabled";
> + };
> + };
> +
> + restart at fc4ab000 {
> + compatible = "qcom,pshold";
> + reg = <0xfc4ab000 0x4>;
> + };
> +
> + msmgpio: pinctrl at fd510000 {
> + compatible = "qcom,msm8994-pinctrl", "qcom,msm8974-pinctrl";
> + reg = <0xfd510000 0x4000>;
> + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + blsp1_uart2: serial at f991e000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0xf991e000 0x1000>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + clock-names = "core", "iface";
> + clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
> + <&clock_gcc GCC_BLSP1_AHB_CLK>;
> + };
> +
> + clocks {
> + xo_board: xo_board {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <19200000>;
> + };
> +
> + sleep_clk: sleep_clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + };
> + };
> +
> + tcsr_mutex_regs: syscon at fd484000 {
> + compatible = "syscon";
> + reg = <0xfd484000 0x2000>;
> + };
> +
> + tcsr_mutex: hwlock {
> + compatible = "qcom,tcsr-mutex";
> + syscon = <&tcsr_mutex_regs 0 0x80>;
> + #hwlock-cells = <1>;
> + };
> +
> + qcom,smem at 6a00000 {
> + compatible = "qcom,smem";
> +
> + memory-region = <&smem_mem>;
> +
> + hwlocks = <&tcsr_mutex 3>;
> + };
> +
> + clock_gcc: qcom,gcc at fc400000 {
> + compatible = "qcom,gcc-8994";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + reg = <0xfc400000 0x2000>;
> + };
> +
> +};
> +
> +#include "msm8994-pins.dtsi"
> diff --git a/arch/arm64/configs/angler_defconfig b/arch/arm64/configs/angler_defconfig
> new file mode 100644
> index 0000000..00cf192
> --- /dev/null
> +++ b/arch/arm64/configs/angler_defconfig
> @@ -0,0 +1,666 @@
> +CONFIG_AUDIT=y
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_IRQ_TIME_ACCOUNTING=y
> +CONFIG_RCU_FAST_NO_HZ=y
> +CONFIG_LOG_BUF_SHIFT=20
> +CONFIG_CGROUPS=y
> +CONFIG_CGROUP_DEBUG=y
> +CONFIG_CGROUP_FREEZER=y
> +CONFIG_CPUSETS=y
> +CONFIG_CGROUP_CPUACCT=y
> +CONFIG_RESOURCE_COUNTERS=y
> +CONFIG_CGROUP_SCHED=y
> +CONFIG_CFS_BANDWIDTH=y
> +CONFIG_RT_GROUP_SCHED=y
> +CONFIG_SCHED_HMP=y
> +CONFIG_NAMESPACES=y
> +# CONFIG_UTS_NS is not set
> +# CONFIG_PID_NS is not set
> +CONFIG_BLK_DEV_INITRD=y
> +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
> +CONFIG_PANIC_TIMEOUT=5
> +CONFIG_KALLSYMS_ALL=y
> +# CONFIG_PCI_QUIRKS is not set
> +CONFIG_EMBEDDED=y
> +# CONFIG_SLUB_DEBUG is not set
> +CONFIG_PROFILING=y
> +CONFIG_PARTITION_ADVANCED=y
> +CONFIG_ARCH_MSM=y
> +CONFIG_ARCH_MSM8994=y
> +CONFIG_ARCH_MSM8994_V1_TLBI_WA=y
> +CONFIG_PCI_MSM=y
> +CONFIG_ARM64_A57_ERRATA_832075=y
> +CONFIG_SMP=y
> +CONFIG_SCHED_MC=y
> +CONFIG_ARCH_WANTS_CTXSW_LOGGING=y
> +CONFIG_PREEMPT=y
> +CONFIG_ARMV7_COMPAT=y
> +CONFIG_BALANCE_ANON_FILE_RECLAIM=y
> +CONFIG_ZSMALLOC=y
> +CONFIG_SECCOMP=y
> +CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y
> +# CONFIG_COREDUMP is not set
> +CONFIG_COMPAT=y
> +CONFIG_PM_AUTOSLEEP=y
> +CONFIG_PM_WAKELOCKS=y
> +CONFIG_PM_WAKELOCKS_LIMIT=0
> +CONFIG_PM_RUNTIME=y
> +CONFIG_SUSPEND_TIME=y
> +CONFIG_CPU_FREQ=y
> +CONFIG_CPU_FREQ_GOV_POWERSAVE=y
> +CONFIG_CPU_FREQ_GOV_USERSPACE=y
> +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
> +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
> +CONFIG_CPU_BOOST=y
> +CONFIG_CPU_IDLE=y
> +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
> +# CONFIG_CPU_IDLE_GOV_LADDER is not set
> +# CONFIG_CPU_IDLE_GOV_MENU is not set
> +CONFIG_NET=y
> +CONFIG_PACKET=y
> +CONFIG_UNIX=y
> +CONFIG_XFRM_USER=y
> +CONFIG_XFRM_STATISTICS=y
> +CONFIG_NET_KEY=y
> +CONFIG_INET=y
> +CONFIG_IP_ADVANCED_ROUTER=y
> +CONFIG_IP_MULTIPLE_TABLES=y
> +CONFIG_IP_ROUTE_VERBOSE=y
> +CONFIG_IP_PNP=y
> +CONFIG_IP_PNP_DHCP=y
> +CONFIG_INET_AH=y
> +CONFIG_INET_ESP=y
> +CONFIG_INET_IPCOMP=y
> +# CONFIG_INET_XFRM_MODE_BEET is not set
> +# CONFIG_INET_LRO is not set
> +CONFIG_IPV6_PRIVACY=y
> +CONFIG_IPV6_ROUTER_PREF=y
> +CONFIG_IPV6_ROUTE_INFO=y
> +CONFIG_IPV6_OPTIMISTIC_DAD=y
> +CONFIG_INET6_AH=y
> +CONFIG_INET6_ESP=y
> +CONFIG_INET6_IPCOMP=y
> +CONFIG_IPV6_MIP6=y
> +CONFIG_IPV6_MULTIPLE_TABLES=y
> +CONFIG_IPV6_SUBTREES=y
> +CONFIG_NETFILTER=y
> +CONFIG_NF_CONNTRACK=y
> +CONFIG_NF_CONNTRACK_EVENTS=y
> +CONFIG_NF_CT_PROTO_DCCP=y
> +CONFIG_NF_CT_PROTO_SCTP=y
> +CONFIG_NF_CT_PROTO_UDPLITE=y
> +CONFIG_NF_CONNTRACK_AMANDA=y
> +CONFIG_NF_CONNTRACK_FTP=y
> +CONFIG_NF_CONNTRACK_H323=y
> +CONFIG_NF_CONNTRACK_IRC=y
> +CONFIG_NF_CONNTRACK_NETBIOS_NS=y
> +CONFIG_NF_CONNTRACK_PPTP=y
> +CONFIG_NF_CONNTRACK_SANE=y
> +CONFIG_NF_CONNTRACK_SIP=y
> +CONFIG_NF_CONNTRACK_TFTP=y
> +CONFIG_NF_CT_NETLINK=y
> +CONFIG_NETFILTER_TPROXY=y
> +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
> +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
> +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
> +CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y
> +CONFIG_NETFILTER_XT_TARGET_LOG=y
> +CONFIG_NETFILTER_XT_TARGET_MARK=y
> +CONFIG_NETFILTER_XT_TARGET_NFLOG=y
> +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
> +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
> +CONFIG_NETFILTER_XT_TARGET_TEE=y
> +CONFIG_NETFILTER_XT_TARGET_TPROXY=y
> +CONFIG_NETFILTER_XT_TARGET_TRACE=y
> +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
> +CONFIG_NETFILTER_XT_MATCH_COMMENT=y
> +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
> +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
> +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
> +CONFIG_NETFILTER_XT_MATCH_DSCP=y
> +CONFIG_NETFILTER_XT_MATCH_ESP=y
> +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
> +CONFIG_NETFILTER_XT_MATCH_HELPER=y
> +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
> +CONFIG_NETFILTER_XT_MATCH_LENGTH=y
> +CONFIG_NETFILTER_XT_MATCH_LIMIT=y
> +CONFIG_NETFILTER_XT_MATCH_MAC=y
> +CONFIG_NETFILTER_XT_MATCH_MARK=y
> +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
> +CONFIG_NETFILTER_XT_MATCH_POLICY=y
> +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
> +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
> +CONFIG_NETFILTER_XT_MATCH_QUOTA=y
> +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
> +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
> +CONFIG_NETFILTER_XT_MATCH_SOCKET=y
> +CONFIG_NETFILTER_XT_MATCH_STATE=y
> +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
> +CONFIG_NETFILTER_XT_MATCH_STRING=y
> +CONFIG_NETFILTER_XT_MATCH_TIME=y
> +CONFIG_NETFILTER_XT_MATCH_U32=y
> +CONFIG_NF_CONNTRACK_IPV4=y
> +CONFIG_IP_NF_IPTABLES=y
> +CONFIG_IP_NF_MATCH_AH=y
> +CONFIG_IP_NF_MATCH_ECN=y
> +CONFIG_IP_NF_MATCH_TTL=y
> +CONFIG_IP_NF_FILTER=y
> +CONFIG_IP_NF_TARGET_REJECT=y
> +CONFIG_IP_NF_TARGET_REJECT_SKERR=y
> +CONFIG_NF_NAT_IPV4=y
> +CONFIG_IP_NF_TARGET_MASQUERADE=y
> +CONFIG_IP_NF_TARGET_NETMAP=y
> +CONFIG_IP_NF_TARGET_REDIRECT=y
> +CONFIG_IP_NF_MANGLE=y
> +CONFIG_IP_NF_RAW=y
> +CONFIG_IP_NF_SECURITY=y
> +CONFIG_IP_NF_ARPTABLES=y
> +CONFIG_IP_NF_ARPFILTER=y
> +CONFIG_IP_NF_ARP_MANGLE=y
> +CONFIG_NF_CONNTRACK_IPV6=y
> +CONFIG_IP6_NF_IPTABLES=y
> +CONFIG_IP6_NF_FILTER=y
> +CONFIG_IP6_NF_TARGET_REJECT=y
> +CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
> +CONFIG_IP6_NF_MANGLE=y
> +CONFIG_IP6_NF_RAW=y
> +CONFIG_BRIDGE_NF_EBTABLES=y
> +CONFIG_BRIDGE_EBT_BROUTE=y
> +CONFIG_L2TP=y
> +CONFIG_L2TP_DEBUGFS=y
> +CONFIG_L2TP_V3=y
> +CONFIG_L2TP_IP=y
> +CONFIG_L2TP_ETH=y
> +CONFIG_BRIDGE=y
> +CONFIG_NET_SCHED=y
> +CONFIG_NET_SCH_HTB=y
> +CONFIG_NET_SCH_PRIO=y
> +CONFIG_NET_CLS_FW=y
> +CONFIG_NET_CLS_U32=y
> +CONFIG_CLS_U32_MARK=y
> +CONFIG_NET_CLS_FLOW=y
> +CONFIG_NET_EMATCH=y
> +CONFIG_NET_EMATCH_CMP=y
> +CONFIG_NET_EMATCH_NBYTE=y
> +CONFIG_NET_EMATCH_U32=y
> +CONFIG_NET_EMATCH_META=y
> +CONFIG_NET_EMATCH_TEXT=y
> +CONFIG_NET_CLS_ACT=y
> +CONFIG_RMNET_DATA=y
> +CONFIG_RMNET_DATA_FC=y
> +CONFIG_RMNET_DATA_DEBUG_PKT=y
> +CONFIG_SOCKEV_NLMCAST=y
> +CONFIG_BT=y
> +CONFIG_BT_RFCOMM=y
> +CONFIG_BT_RFCOMM_TTY=y
> +CONFIG_BT_BNEP=y
> +CONFIG_BT_BNEP_MC_FILTER=y
> +CONFIG_BT_BNEP_PROTO_FILTER=y
> +CONFIG_BT_HIDP=y
> +CONFIG_MSM_BT_BLUESLEEP=y
> +CONFIG_CFG80211=y
> +CONFIG_CFG80211_INTERNAL_REGDB=y
> +CONFIG_RFKILL=y
> +CONFIG_NFC=y
> +CONFIG_NFC_PN548=y
> +CONFIG_IPC_ROUTER=y
> +CONFIG_IPC_ROUTER_SECURITY=y
> +CONFIG_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=32
> +CONFIG_ARM_CCI=y
> +CONFIG_ZRAM=y
> +CONFIG_ZRAM_LZ4_COMPRESS=y
> +CONFIG_BLK_DEV_LOOP=y
> +CONFIG_BLK_DEV_RAM=y
> +CONFIG_UID_STAT=y
> +CONFIG_QSEECOM=y
> +CONFIG_TI_DRV2667=y
> +CONFIG_UID_CPUTIME=y
> +CONFIG_WIFI_SAR=y
> +CONFIG_SCSI=y
> +CONFIG_SCSI_TGT=y
> +CONFIG_BLK_DEV_SD=y
> +CONFIG_CHR_DEV_SG=y
> +CONFIG_SCSI_MULTI_LUN=y
> +CONFIG_SCSI_CONSTANTS=y
> +CONFIG_SCSI_LOGGING=y
> +CONFIG_SCSI_SCAN_ASYNC=y
> +# CONFIG_SCSI_LOWLEVEL is not set
> +CONFIG_MD=y
> +CONFIG_BLK_DEV_DM=y
> +CONFIG_DM_CRYPT=y
> +CONFIG_DM_REQ_CRYPT=y
> +CONFIG_DM_VERITY=y
> +CONFIG_NETDEVICES=y
> +CONFIG_DUMMY=y
> +CONFIG_TUN=y
> +# CONFIG_ETHERNET is not set
> +CONFIG_PPP=y
> +CONFIG_PPP_BSDCOMP=y
> +CONFIG_PPP_DEFLATE=y
> +CONFIG_PPP_FILTER=y
> +CONFIG_PPP_MPPE=y
> +CONFIG_PPP_MULTILINK=y
> +CONFIG_PPPOE=y
> +CONFIG_PPPOL2TP=y
> +CONFIG_PPPOLAC=y
> +CONFIG_PPPOPNS=y
> +CONFIG_PPP_ASYNC=y
> +CONFIG_PPP_SYNC_TTY=y
> +CONFIG_USB_KAWETH=y
> +CONFIG_USB_PEGASUS=y
> +CONFIG_USB_RTL8150=y
> +CONFIG_USB_RTL8152=y
> +CONFIG_USB_USBNET=y
> +# CONFIG_USB_NET_CDC_NCM is not set
> +# CONFIG_USB_NET_NET1080 is not set
> +# CONFIG_USB_NET_CDC_SUBSET is not set
> +# CONFIG_USB_NET_ZAURUS is not set
> +CONFIG_CLD_LL_CORE=y
> +CONFIG_BCMDHD=y
> +CONFIG_BCMDHD_PCIE=y
> +CONFIG_BCM4358=y
> +CONFIG_BCMDHD_FW_PATH="/vendor/firmware/fw_bcmdhd.bin"
> +CONFIG_DHD_USE_STATIC_BUF=y
> +CONFIG_DHD_USE_SCHED_SCAN=y
> +CONFIG_DHD_OF_SUPPORT=y
> +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
> +CONFIG_INPUT_EVDEV=y
> +# CONFIG_KEYBOARD_ATKBD is not set
> +CONFIG_KEYBOARD_GPIO=y
> +# CONFIG_INPUT_MOUSE is not set
> +CONFIG_INPUT_JOYSTICK=y
> +CONFIG_JOYSTICK_XPAD=y
> +CONFIG_JOYSTICK_XPAD_FF=y
> +CONFIG_JOYSTICK_XPAD_LEDS=y
> +CONFIG_INPUT_TABLET=y
> +CONFIG_TABLET_USB_ACECAD=y
> +CONFIG_TABLET_USB_AIPTEK=y
> +CONFIG_TABLET_USB_GTCO=y
> +CONFIG_TABLET_USB_HANWANG=y
> +CONFIG_TABLET_USB_KBTAB=y
> +CONFIG_TABLET_USB_WACOM=y
> +CONFIG_INPUT_TOUCHSCREEN=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_DEVICETREE_SUPPORT=y
> +# CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_PROXIMITY is not set
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_BINARY_FW_UPGRADE=y
> +CONFIG_TOUCHSCREEN_HUAWEI_CYTTSP4_RECOVERY_FW_UPDATE=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_MANUAL_TTCONFIG_UPGRADE=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_USE_FW_BIN_FILE=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_DEVICE_ACCESS=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_LOADER=y
> +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP4_DEBUG_MODULE=y
> +CONFIG_TOUCHSCREEN_GEN_VKEYS=y
> +CONFIG_SECURE_TOUCH=y
> +CONFIG_TOUCHSCREEN_HUAWEI_SYNAPTICS_DSX_v25=y
> +CONFIG_TOUCHSCREEN_SYNAPTICS_DSX25=y
> +CONFIG_TOUCHSCREEN_SYNAPTICS_DSX25_CORE=y
> +CONFIG_TOUCHSCREEN_SYNAPTICS_DSX25_RMI_DEV=y
> +CONFIG_TOUCHSCREEN_SYNAPTICS_DSX25_FW_UPDATE=y
> +CONFIG_INPUT_MISC=y
> +CONFIG_INPUT_KEYCHORD=y
> +CONFIG_INPUT_UINPUT=y
> +CONFIG_INPUT_GPIO=y
> +CONFIG_LASER_STMVL6180=y
> +CONFIG_RF_DETECT=y
> +# CONFIG_SERIO is not set
> +CONFIG_FINGERPRINT_FPC=y
> +# CONFIG_VT is not set
> +# CONFIG_LEGACY_PTYS is not set
> +# CONFIG_DEVMEM is not set
> +# CONFIG_DEVKMEM is not set
> +CONFIG_SERIAL_MSM_HS=y
> +CONFIG_SERIAL_MSM_HSL=y
> +CONFIG_SERIAL_MSM_HSL_CONSOLE=y
> +CONFIG_SERIAL_MSM_SMD=y
> +CONFIG_HW_RANDOM_MSM=y
> +CONFIG_MSM_SMD_PKT=y
> +CONFIG_MSM_ADSPRPC=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MSM_V2=y
> +CONFIG_SLIMBUS_MSM_NGD=y
> +CONFIG_SPI=y
> +CONFIG_SPI_CONTEXTHUB=y
> +CONFIG_SPI_QUP=y
> +CONFIG_SPMI=y
> +CONFIG_SPMI_MSM_PMIC_ARB=y
> +CONFIG_MSM_QPNP_INT=y
> +CONFIG_USE_PINCTRL_IRQ=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_QPNP_PIN=y
> +CONFIG_SMB349_DUAL_CHARGER=y
> +CONFIG_SMB1351_USB_CHARGER=y
> +CONFIG_QPNP_SMBCHARGER=y
> +CONFIG_QPNP_FG=y
> +CONFIG_BATTERY_BCL=y
> +CONFIG_MSM_BCL_CTL=y
> +CONFIG_MSM_BCL_PERIPHERAL_CTL=y
> +CONFIG_POWER_RESET_MSM=y
> +CONFIG_MSM_DLOAD_MODE=y
> +CONFIG_MSM_PM=y
> +CONFIG_APSS_CORE_EA=y
> +CONFIG_SENSORS_EPM_ADC=y
> +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
> +CONFIG_THERMAL=y
> +CONFIG_THERMAL_TSENS8974=y
> +CONFIG_LIMITS_MONITOR=y
> +CONFIG_LIMITS_LITE_HW=y
> +CONFIG_THERMAL_MONITOR=y
> +CONFIG_THERMAL_QPNP=y
> +CONFIG_THERMAL_QPNP_ADC_TM=y
> +CONFIG_WCD9330_CODEC=y
> +CONFIG_REGULATOR=y
> +CONFIG_REGULATOR_FIXED_VOLTAGE=y
> +CONFIG_REGULATOR_PROXY_CONSUMER=y
> +CONFIG_REGULATOR_MEM_ACC=y
> +CONFIG_REGULATOR_TPS65132=y
> +CONFIG_REGULATOR_STUB=y
> +CONFIG_REGULATOR_RPM_SMD=y
> +CONFIG_REGULATOR_QPNP=y
> +CONFIG_REGULATOR_QPNP_LABIBB=y
> +CONFIG_REGULATOR_SPM=y
> +CONFIG_REGULATOR_CPR=y
> +CONFIG_MEDIA_SUPPORT=y
> +CONFIG_MEDIA_CAMERA_SUPPORT=y
> +CONFIG_MEDIA_RADIO_SUPPORT=y
> +CONFIG_MEDIA_CONTROLLER=y
> +CONFIG_VIDEO_V4L2_SUBDEV_API=y
> +CONFIG_VIDEOBUF2_MSM_MEM=y
> +CONFIG_MEDIA_USB_SUPPORT=y
> +CONFIG_USB_VIDEO_CLASS=y
> +# CONFIG_USB_GSPCA is not set
> +CONFIG_V4L_PLATFORM_DRIVERS=y
> +CONFIG_MSMB_CAMERA=y
> +CONFIG_MSM_CAMERA_SENSOR=y
> +CONFIG_MSM_CPP=y
> +CONFIG_MSM_CCI=y
> +CONFIG_MSM_CSI30_HEADER=y
> +CONFIG_MSM_CSIPHY=y
> +CONFIG_MSM_CSID=y
> +CONFIG_MSM_EEPROM=y
> +CONFIG_MSM_ISPIF=y
> +CONFIG_HI256=y
> +CONFIG_MT9M114=y
> +CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE=y
> +CONFIG_MSMB_JPEG=y
> +CONFIG_MSM_FD=y
> +CONFIG_MSM_VIDC_V4L2=y
> +CONFIG_TSPP=y
> +# CONFIG_RADIO_ADAPTERS is not set
> +# CONFIG_VGA_ARB is not set
> +CONFIG_MSM_KGSL=y
> +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y
> +CONFIG_FB=y
> +CONFIG_FB_MSM=y
> +CONFIG_FB_MSM_MDSS=y
> +CONFIG_FB_MSM_MDSS_WRITEBACK=y
> +CONFIG_SOUND=y
> +CONFIG_SND=y
> +CONFIG_SND_MPU401=y
> +# CONFIG_SND_PCI is not set
> +# CONFIG_SND_SPI is not set
> +CONFIG_SND_USB_AUDIO=y
> +CONFIG_SND_SOC=y
> +CONFIG_SND_SOC_MSM8994=y
> +CONFIG_SND_SOC_MAX98925=y
> +CONFIG_HID_BATTERY_STRENGTH=y
> +CONFIG_HIDRAW=y
> +CONFIG_UHID=y
> +CONFIG_HID_A4TECH=y
> +CONFIG_HID_APPLE=y
> +CONFIG_HID_BELKIN=y
> +CONFIG_HID_CHERRY=y
> +CONFIG_HID_CHICONY=y
> +CONFIG_HID_PRODIKEYS=y
> +CONFIG_HID_CYPRESS=y
> +CONFIG_HID_ELECOM=y
> +CONFIG_HID_EZKEY=y
> +CONFIG_HID_HOLTEK=y
> +CONFIG_HOLTEK_FF=y
> +CONFIG_HID_KEYTOUCH=y
> +CONFIG_HID_KYE=y
> +CONFIG_HID_UCLOGIC=y
> +CONFIG_HID_WALTOP=y
> +CONFIG_HID_GYRATION=y
> +CONFIG_HID_ICADE=y
> +CONFIG_HID_KENSINGTON=y
> +CONFIG_HID_LCPOWER=y
> +CONFIG_HID_LENOVO_TPKBD=y
> +CONFIG_HID_LOGITECH=y
> +CONFIG_HID_LOGITECH_DJ=y
> +CONFIG_LOGITECH_FF=y
> +CONFIG_LOGIRUMBLEPAD2_FF=y
> +CONFIG_LOGIG940_FF=y
> +CONFIG_HID_MAGICMOUSE=y
> +CONFIG_HID_MICROSOFT=y
> +CONFIG_HID_MONTEREY=y
> +CONFIG_HID_MULTITOUCH=y
> +CONFIG_HID_NTRIG=y
> +CONFIG_HID_ORTEK=y
> +CONFIG_HID_PANTHERLORD=y
> +CONFIG_PANTHERLORD_FF=y
> +CONFIG_HID_PRIMAX=y
> +CONFIG_HID_PS3REMOTE=y
> +CONFIG_HID_ROCCAT=y
> +CONFIG_HID_SAITEK=y
> +CONFIG_HID_SAMSUNG=y
> +CONFIG_HID_SONY=y
> +CONFIG_HID_SPEEDLINK=y
> +CONFIG_HID_STEELSERIES=y
> +CONFIG_HID_SUNPLUS=y
> +CONFIG_HID_SMARTJOYPLUS=y
> +CONFIG_SMARTJOYPLUS_FF=y
> +CONFIG_HID_TOPSEED=y
> +CONFIG_HID_THINGM=y
> +CONFIG_HID_THRUSTMASTER=y
> +CONFIG_THRUSTMASTER_FF=y
> +CONFIG_HID_WACOM=y
> +CONFIG_HID_WIIMOTE=y
> +CONFIG_HID_ZEROPLUS=y
> +CONFIG_ZEROPLUS_FF=y
> +CONFIG_HID_SENSOR_HUB=y
> +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_EHSET=y
> +CONFIG_USB_EHCI_MSM=y
> +CONFIG_USB_ACM=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_SERIAL=y
> +CONFIG_USB_SERIAL_GENERIC=y
> +CONFIG_USB_SERIAL_FTDI_SIO=y
> +CONFIG_USB_SERIAL_PL2303=y
> +CONFIG_USB_EMI62=y
> +CONFIG_USB_EMI26=y
> +CONFIG_USB_EHSET_TEST_FIXTURE=y
> +CONFIG_USB_PHY=y
> +CONFIG_USB_MSM_SSPHY_QMP=y
> +CONFIG_MSM_QUSB_PHY=y
> +CONFIG_DUAL_ROLE_USB_INTF=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_DEBUG_FILES=y
> +CONFIG_USB_GADGET_DEBUG_FS=y
> +CONFIG_USB_CI13XXX_MSM=y
> +CONFIG_USB_DWC3_MSM=y
> +CONFIG_USB_G_ANDROID=y
> +CONFIG_TYPEC=y
> +CONFIG_TUSB320_TYPEC=y
> +CONFIG_MMC=y
> +CONFIG_MMC_PERF_PROFILING=y
> +CONFIG_MMC_UNSAFE_RESUME=y
> +CONFIG_MMC_CLKGATE=y
> +CONFIG_MMC_PARANOID_SD_INIT=y
> +CONFIG_MMC_BLOCK_MINORS=32
> +CONFIG_MMC_TEST=y
> +CONFIG_MMC_BLOCK_TEST=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_PLTFM=y
> +CONFIG_MMC_SDHCI_MSM=y
> +CONFIG_LEDS_QPNP=y
> +CONFIG_LEDS_QPNP_FLASH=y
> +CONFIG_LEDS_QPNP_WLED=y
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_BACKLIGHT=y
> +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
> +CONFIG_SWITCH=y
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_QPNP=y
> +CONFIG_DMADEVICES=y
> +CONFIG_QCOM_SPS_DMA=y
> +CONFIG_UIO=y
> +CONFIG_UIO_MSM_SHAREDMEM=y
> +CONFIG_STAGING=y
> +CONFIG_ANDROID=y
> +CONFIG_ANDROID_BINDER_IPC=y
> +CONFIG_ASHMEM=y
> +CONFIG_ANDROID_LOGGER=y
> +CONFIG_ANDROID_LOW_MEMORY_KILLER=y
> +CONFIG_ANDROID_INTF_ALARM_DEV=y
> +CONFIG_ONESHOT_SYNC=y
> +CONFIG_ION=y
> +CONFIG_ION_MSM=y
> +CONFIG_ALLOC_BUFFERS_IN_4K_CHUNKS=y
> +# CONFIG_NET_VENDOR_SILICOM is not set
> +CONFIG_SPS=y
> +CONFIG_USB_BAM=y
> +CONFIG_SPS_SUPPORT_NDP_BAM=y
> +CONFIG_QPNP_POWER_ON=y
> +CONFIG_QPNP_REVID=y
> +CONFIG_QPNP_COINCELL=y
> +CONFIG_QPNP_USB_DETECT=y
> +CONFIG_IPA=y
> +CONFIG_RMNET_IPA=y
> +CONFIG_MSM_AVTIMER=y
> +CONFIG_PFT=y
> +CONFIG_MSM_BUS_SCALING=y
> +CONFIG_MSM_BUSPM_DEV=y
> +CONFIG_BUS_TOPOLOGY_ADHOC=y
> +CONFIG_DEBUG_BUS_VOTER=y
> +CONFIG_QPNP_HAPTIC=y
> +CONFIG_MSM_MDSS_PLL=y
> +CONFIG_REMOTE_SPINLOCK_MSM=y
> +CONFIG_MSM_IOMMU_V1=y
> +CONFIG_MSM_IOMMU_VBIF_CHECK=y
> +CONFIG_IOMMU_FORCE_4K_MAPPINGS=y
> +CONFIG_DEVFREQ_SPDM=y
> +CONFIG_PWM=y
> +CONFIG_PWM_QPNP=y
> +CONFIG_SENSORS_SSC=y
> +CONFIG_GENERIC_PHY=y
> +CONFIG_CP_ACCESS64=y
> +CONFIG_MSM_EVENT_TIMER=y
> +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
> +CONFIG_MSM_QMI_INTERFACE=y
> +CONFIG_MSM_SMD_DEBUG=y
> +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y
> +CONFIG_MSM_RPM_LOG=y
> +CONFIG_MSM_RPM_STATS_LOG=y
> +CONFIG_MSM_RUN_QUEUE_STATS=y
> +CONFIG_MSM_SMEM_LOGGING=y
> +CONFIG_MSM_SMP2P=y
> +CONFIG_MSM_SMP2P_TEST=y
> +CONFIG_MSM_SPM=y
> +CONFIG_MSM_L2_SPM=y
> +CONFIG_MSM_ADSP_LOADER=y
> +CONFIG_MSM_MEMORY_DUMP_V2=y
> +CONFIG_MSM_DEBUG_LAR_UNLOCK=y
> +CONFIG_MSM_DDR_HEALTH=y
> +CONFIG_MSM_COMMON_LOG=y
> +CONFIG_MSM_WATCHDOG_V2=y
> +CONFIG_MSM_FORCE_WDOG_BITE_ON_PANIC=y
> +CONFIG_MSM_HVC=y
> +CONFIG_MSM_SUBSYSTEM_RESTART=y
> +CONFIG_MSM_SYSMON_COMM=y
> +CONFIG_MSM_PIL=y
> +CONFIG_MSM_PIL_SSR_GENERIC=y
> +CONFIG_MSM_PIL_MSS_QDSP6V5=y
> +CONFIG_MSM_OCMEM=y
> +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y
> +CONFIG_MSM_OCMEM_DEBUG=y
> +CONFIG_MSM_BOOT_STATS=y
> +CONFIG_MSM_SCM=y
> +CONFIG_MSM_XPU_ERR_FATAL=y
> +CONFIG_MSM_CPUSS_DUMP=y
> +CONFIG_MSM_SHARED_HEAP_ACCESS=y
> +CONFIG_MSM_SYSTEM_HEALTH_MONITOR=y
> +CONFIG_QCOM_EARLY_RANDOM=y
> +CONFIG_MSM_PERFORMANCE=y
> +CONFIG_QCOM_NPA_DUMP=y
> +CONFIG_MSM_TZ_LOG=y
> +CONFIG_EXT4_FS=y
> +CONFIG_EXT4_FS_SECURITY=y
> +CONFIG_EXT4_FS_ENCRYPTION=y
> +CONFIG_FUSE_FS=y
> +CONFIG_VFAT_FS=y
> +CONFIG_TMPFS=y
> +CONFIG_TMPFS_POSIX_ACL=y
> +CONFIG_PSTORE=y
> +CONFIG_PSTORE_CONSOLE=y
> +CONFIG_PSTORE_PMSG=y
> +CONFIG_PSTORE_RAM=y
> +# CONFIG_NETWORK_FILESYSTEMS is not set
> +CONFIG_NLS_CODEPAGE_437=y
> +CONFIG_NLS_ASCII=y
> +CONFIG_NLS_ISO8859_1=y
> +CONFIG_NLS_UTF8=y
> +CONFIG_PRINTK_TIME=y
> +CONFIG_MAGIC_SYSRQ=y
> +CONFIG_PAGE_OWNER=y
> +# CONFIG_SYSRQ_SCHED_DEBUG is not set
> +CONFIG_SCHEDSTATS=y
> +CONFIG_TIMER_STATS=y
> +CONFIG_DEBUG_INFO=y
> +CONFIG_RCU_CPU_STALL_INFO=y
> +CONFIG_RCU_TRACE=y
> +CONFIG_IPC_LOGGING=y
> +CONFIG_BLK_DEV_IO_TRACE=y
> +CONFIG_DYNAMIC_DEBUG=y
> +CONFIG_OOPS_LOG_BUFFER=y
> +CONFIG_LOG_BUF_MAGIC=y
> +CONFIG_OOPS_LOG_BUF_SHIFT=17
> +CONFIG_PANIC_ON_DATA_CORRUPTION=y
> +CONFIG_ARM64_PTDUMP=y
> +CONFIG_PID_IN_CONTEXTIDR=y
> +CONFIG_SECURITY=y
> +CONFIG_SECURITY_NETWORK=y
> +CONFIG_LSM_MMAP_MIN_ADDR=4096
> +CONFIG_SECURITY_SELINUX=y
> +CONFIG_CRYPTO_NULL=y
> +CONFIG_CRYPTO_XCBC=y
> +CONFIG_CRYPTO_MD4=y
> +CONFIG_CRYPTO_TWOFISH=y
> +CONFIG_CRYPTO_DEV_QCRYPTO=y
> +CONFIG_CRYPTO_DEV_QCE=y
> +CONFIG_CRYPTO_DEV_QCEDEV=y
> +CONFIG_CRYPTO_DEV_QCOM_ICE=y
> +CONFIG_ASYMMETRIC_KEY_TYPE=y
> +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
> +CONFIG_PUBLIC_KEY_ALGO_RSA=y
> +CONFIG_X509_CERTIFICATE_PARSER=y
> +CONFIG_ARM64_CRYPTO=y
> +CONFIG_CRYPTO_SHA1_ARM64_CE=y
> +CONFIG_CRYPTO_SHA2_ARM64_CE=y
> +CONFIG_CRYPTO_GHASH_ARM64_CE=y
> +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
> +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
> +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
> +CONFIG_QMI_ENCDEC=y
> +CONFIG_STRICT_MEMORY_RWX=y
> +CONFIG_ARM_APPENDED_DTB=y
> +CONFIG_ARM_ATAG_DTB_COMPAT=y
> +CONFIG_ARCH_QCOM=y
> +CONFIG_QCOM_SMD_RPM=y
> +CONFIG_QCOM_SMEM=y
> +CONFIG_QCOM_SMD=y
> +CONFIG_HWSPINLOCK_QCOM=y
> +CONFIG_QCOM_PM=y
> +CONFIG_SERIAL_MSM=y
> +CONFIG_SERIAL_MSM_CONSOLE=y
> +CONFIG_PINCTRL_MSM8X74=y
> +CONFIG_COMMON_CLK_QCOM=y
> +CONFIG_MSM_GCC_8994=y
> +CONFIG_MACH_HUAWEI=y
> +CONFIG_DEVTMPFS=y
> +CONFIG_DMA_CMA=y
> --
> 2.6.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [RFC 1/4] arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support
From: Jeremy McNicoll @ 2016-09-21 0:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160708174125.GC7896@hector.attlocal.net>
On 2016-07-08 10:41 AM, Andy Gross wrote:
> On Thu, Jul 07, 2016 at 05:41:04PM -0700, Jeremy McNicoll wrote:
>> Initial device tree support for Qualcomm MSM8992 SoC and
>> LG Bullhead / Google Nexus 5X support.
>>
Hopefully that was enough time for people to enjoy their summer
vacations and welcome new additions to the family.
>> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
>> ---
>> arch/arm64/Kconfig.platforms | 12 +
>> arch/arm64/boot/dts/Makefile | 1 +
>> arch/arm64/boot/dts/lge/Makefile | 5 +
>> .../boot/dts/lge/msm8992-bullhead-rev-101.dts | 41 +++
>> arch/arm64/boot/dts/qcom/msm8992-pins.dtsi | 38 +++
>> arch/arm64/boot/dts/qcom/msm8992.dtsi | 221 ++++++++++++
>> arch/arm64/configs/bullhead_defconfig | 377 +++++++++++++++++++++
>> arch/arm64/configs/msm8992_defconfig | 5 +
>> 8 files changed, 700 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/lge/Makefile
>> create mode 100644 arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>> create mode 100644 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
>> create mode 100644 arch/arm64/boot/dts/qcom/msm8992.dtsi
>> create mode 100644 arch/arm64/configs/bullhead_defconfig
>> create mode 100644 arch/arm64/configs/msm8992_defconfig
>>
>> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
>> index 7ef1d05..515e669 100644
>> --- a/arch/arm64/Kconfig.platforms
>> +++ b/arch/arm64/Kconfig.platforms
>> @@ -86,6 +86,18 @@ config ARCH_QCOM
>> help
>> This enables support for the ARMv8 based Qualcomm chipsets.
>>
>> +config ARCH_MSM8992
>> + bool "Qualcomm MSM8992"
>> + depends on ARCH_QCOM
>> + help
>> + This enables support for the Qualcomm MSM8992 SoC.
>> +
>> +config MACH_LGE
>> + bool "LGE BullHead (MSM8992)"
>> + depends on ARCH_QCOM
>> + help
>> + This enables support for the LGE Nexus 5X - BullHead MSM8992.
>
> We don't add config options for End users. Only for Soc Companies or people
> actually producing the silicon.
>
removed.
>> +
>> config ARCH_ROCKCHIP
>> bool "Rockchip Platforms"
>> select ARCH_HAS_RESET_CONTROLLER
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 6e199c9..bde90fb 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -13,6 +13,7 @@ dts-dirs += marvell
>> dts-dirs += mediatek
>> dts-dirs += nvidia
>> dts-dirs += qcom
>> +dts-dirs += lge
>
> No, please add the files to the qcom directory.
>
ok, done
>> dts-dirs += renesas
>> dts-dirs += rockchip
>> dts-dirs += socionext
>> diff --git a/arch/arm64/boot/dts/lge/Makefile b/arch/arm64/boot/dts/lge/Makefile
>> new file mode 100644
>> index 0000000..f4e7860
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/lge/Makefile
>> @@ -0,0 +1,5 @@
>> +dtb-$(CONFIG_MACH_LGE) += msm8992-bullhead-rev-101.dtb
>> +
>> +always := $(dtb-y)
>> +subdir-y := $(dts-dirs)
>> +clean-files := *.dtb
>> diff --git a/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>> new file mode 100644
>> index 0000000..860cded
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>> @@ -0,0 +1,41 @@
>> +/* Copyright (c) 2015, LGE Inc. All rights reserved.
>> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "../qcom/msm8992.dtsi"
>> +
>> +/ {
>> + model = "LGE MSM8992 BULLHEAD rev-1.01";
>> + compatible = "qcom,msm8992";
>> + qcom,board-id = <0xb64 0>;
>
> Please work with sboyd to add the board-id to the dtbTool. We don't put
> board-ids in the dts file. We post-process the dtb file and add them then.
>
sboyd has all the info he needs for this, I believe its just with legal
now. Will remove for V2.
It would be nice if we could get this dtbTool to automagically run as
part of the build system.
>
>> +};
>> +
>> +/ {
>> + aliases {
>> + serial0 = &blsp1_uart2;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0";
>> + };
>> +
>> + soc {
>> + serial at f991e000 {
>> + status = "okay";
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&blsp1_uart2_default>;
>> + pinctrl-1 = <&blsp1_uart2_sleep>;
>> + };
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
>
> <snip>
>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
>> new file mode 100644
>> index 0000000..fa92a1a
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
>> @@ -0,0 +1,221 @@
>> +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +/memreserve/ 0x00000000 0x00001000;
>
> Please use reserved-memory{}. And why are they setting aside 4k at the
> beginning? Trying to cover up corruption issues?
>
I only have the existing kernel (3.10) and no insight as to why this is
needed. Something very interesting and/or unexpected was that I needed
memreserve when using earlycon combined with
CONFIG_DEBUG_DRIVER && CONFIG_DEBUG_DEVRES
in order for the target / phone to boot. It have very well booted its
just I cant tell given the serial debug is the way I currently have to
gain visibility into the status of the phone.
But when I turned off the a fore mentioned config options and continued
to use earlycon it booted fine.
Removing memreserve.
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
>> +
>> +/ {
>> + model = "Qualcomm Technologies, Inc. MSM 8992";
>> + compatible = "qcom,msm8992";
>> + qcom,msm-id = <251 0>, <252 0>;
This is needed or else the LK provides the following error
[5380] qcom,msm-id entry not found
and refuses to boot.
>> + qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
>
> See above comment on ids.
removal of this (pmic-id) seems to be ok.
>
>> + interrupt-parent = <&intc>;
>> +
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + chosen { };
>> +
>
> <snip>
>
>> +#include "msm8992-pins.dtsi"
>> diff --git a/arch/arm64/configs/bullhead_defconfig b/arch/arm64/configs/bullhead_defconfig
>
> Please add whatever config options you have to the default defconfig. we don't
> define board specific configs for ARM64 platforms. Or I should say, they won't
> be accepted into the kernel.
>
> Also, please separate defconfig changes into separate patches.
>
Will keep the changes to the absolute minimum.
Looks like I am going to need these 3
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=y
+CONFIG_BLK_DEV_RAM_SIZE=16384
as this unit doent have all the bits'N pieces working currently and is
_ONLY_ able to boot a ramdisk.
-jeremy
> <snip>
>
>> diff --git a/arch/arm64/configs/msm8992_defconfig b/arch/arm64/configs/msm8992_defconfig
>> new file mode 100644
>> index 0000000..f673a27
>> --- /dev/null
>> +++ b/arch/arm64/configs/msm8992_defconfig
>
> See above comment.
>> @@ -0,0 +1,5 @@
>> +CONFIG_NO_HZ=y
>> +CONFIG_HIGH_RES_TIMERS=y
>> +CONFIG_SCHED_HMP=y
>> +CONFIG_NAMESPACES=y
>> +# CONFIG_CORESIGHT is not set
>> --
>> 2.6.1
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v3 3/5] clk: at91: sckc: optimize boot time
From: Stephen Boyd @ 2016-09-21 0:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-4-alexandre.belloni@free-electrons.com>
On 09/20, Alexandre Belloni wrote:
> Assume that if the oscillator is enabled (OSC32EN bit is present), the
> delay has already elapsed as the bootloader probably waited for the
> oscillator to settle. This could waste up to 1.2s.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v3 2/5] clk: at91: Add sama5d4 sckc support
From: Stephen Boyd @ 2016-09-21 0:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-3-alexandre.belloni@free-electrons.com>
On 09/20, Alexandre Belloni wrote:
> Starting with sama5d4, the crystal oscillator is always enabled at startup
> and the SCKC doesn't have an OSC32EN bit anymore.
>
> Add support for that new controller.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v3 1/5] clk: at91: move slow clock controller clocks to sckc.c
From: Stephen Boyd @ 2016-09-21 0:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-2-alexandre.belloni@free-electrons.com>
On 09/20, Alexandre Belloni wrote:
> Move all clocks related to the slow clock controller to sckc.c. This avoids
> extern definitions and allows to remove sckc.h
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
Applied to clk-next
drivers/clk/at91/sckc.c:146:13:
warning: symbol 'of_at91sam9x5_clk_slow_osc_setup' was not
declared. Should it be static?
drivers/clk/at91/sckc.c:260:13:
warning: symbol 'of_at91sam9x5_clk_slow_rc_osc_setup' was not
declared. Should it be static?
drivers/clk/at91/sckc.c:359:13:
warning: symbol 'of_at91sam9x5_clk_slow_setup' was not declared.
Should it be static?
----8<----
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index f6ed711af738..311956abf4aa 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -143,8 +143,8 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
return hw;
}
-void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
- void __iomem *sckcr)
+static void __init
+of_at91sam9x5_clk_slow_osc_setup(struct device_node *np, void __iomem *sckcr)
{
struct clk_hw *hw;
const char *parent_name;
@@ -257,8 +257,8 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
return hw;
}
-void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
- void __iomem *sckcr)
+static void __init
+of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np, void __iomem *sckcr)
{
struct clk_hw *hw;
u32 frequency = 0;
@@ -356,8 +356,8 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
return hw;
}
-void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
- void __iomem *sckcr)
+static void __init
+of_at91sam9x5_clk_slow_setup(struct device_node *np, void __iomem *sckcr)
{
struct clk_hw *hw;
const char *parent_names[2];
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related
* [PATCH 2/2] clk: imx6: initialize GPU clocks
From: Stephen Boyd @ 2016-09-20 23:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474017371-28966-2-git-send-email-l.stach@pengutronix.de>
On 09/16, Lucas Stach wrote:
> Initialize the GPU clock muxes to sane inputs. Until now they have
> not been changed from their default values, which means that both
> GPU3D shader and GPU2D core were fed by clock inputs whose rates
> exceed the maximium allowed frequency of the cores by as much as
> 200MHz.
>
> This fixes a severe GPU stability issue on i.MX6DL.
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 1/2] clk: imx6: fix i.MX6DL clock tree to reflect reality
From: Stephen Boyd @ 2016-09-20 23:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474017371-28966-1-git-send-email-l.stach@pengutronix.de>
On 09/16, Lucas Stach wrote:
> The current clock tree only implements the minimal set of differences
> between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
> reality.
>
> Apply the following fixes to match the RM:
> - DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
> GPU3D_CORE
> - GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
> - GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2 1/1] clk: imx53: Add clocks configuration
From: Stephen Boyd @ 2016-09-20 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474281002-18868-1-git-send-email-fabien.lahoudere@collabora.co.uk>
On 09/19, Fabien Lahoudere wrote:
> From: Kalle Kankare <kalle.kankare@vincit.fi>
>
> Add clocks configuration for CSI, FIRI and IEEE1588.
>
> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [GIT PULL] Qualcomm EBI2 bindings and bus driver
From: Andy Gross @ 2016-09-20 22:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdZdoK4+YRrZC=Kd8TFzJXOQxh=Gi0BWLp4PzV6H5_wEtg@mail.gmail.com>
On Tue, Sep 20, 2016 at 11:50:14PM +0200, Linus Walleij wrote:
> On Tue, Sep 20, 2016 at 12:36 AM, Andy Gross <andy.gross@linaro.org> wrote:
> > On Tue, Sep 20, 2016 at 12:12:33AM +0200, Arnd Bergmann wrote:
> >> On Thursday, September 8, 2016 3:34:42 PM CEST Linus Walleij wrote:
> >> > please pull this new EBI2 bus driver and its bindings into an
> >> > apropriate branch in the ARM SoC tree. The binding now has
> >> > Rob Herrings ACK and we have hopefully finally figured out how
> >> > this should be done.
> >> >
> >>
> >> I just noticed that you sent the pull request directly to arm at kernel.org
> >> rather than the Qualcomm maintainers (which are only on Cc).
> >>
> >> Usually, I'd expect to see this forwarded from Andy, is there a
> >> reason to do it differently here? If so, can I have an Ack
> >> from him?
> >
> > When I looked at this last, I thought there were comments. Sorry I missed it.
> > If you want to pick it up Arnd, please do, otherwise I can send it along in the
> > next pull request.
> >
> > Acked-by: Andy Gross <andy.gross@linaro.org>
>
> Thanks, I hope Arnd can pull this as-is.
>
> Will you apply the DTS changes Andy?
Sure I'll put it in a supplemental pull.
Andy
^ permalink raw reply
* [PATCH] pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
From: Linus Walleij @ 2016-09-20 21:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920162635.4195-1-gregory.clement@free-electrons.com>
On Tue, Sep 20, 2016 at 6:26 PM, Gregory CLEMENT
<gregory.clement@free-electrons.com> wrote:
> From: Jamie Lentin <jm@lentin.co.uk>
>
> As far as I'm aware the mv88f5181-b1 and mv88f5181l are the same at the
> pinctrl level, so re-use the definitions for both.
>
> [gregory.clement at free-electrons.com: fix commit title]
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Is this the patch from your pull request?
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Or do you prefer that I take it into the pinctrl tree?
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] ARM: mvebu: drivers for v4.9 (#1)
From: Linus Walleij @ 2016-09-20 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4134529.ol6KhRYAQp@wuerfel>
On Tue, Sep 20, 2016 at 12:16 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday, September 14, 2016 5:35:10 PM CEST Gregory CLEMENT wrote:
>> mvebu drivers for 4.9 (part 1)
>>
>> - Add pinctrl and clk support for the Orion5x SoC mv88f5181 variant
>>
>> ----------------------------------------------------------------
>> Jamie Lentin (2):
>> clk: mvebu: Add clk support for the orion5x SoC mv88f5181
>> pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
>>
>> .../devicetree/bindings/clock/mvebu-core-clock.txt | 1 +
>> .../bindings/pinctrl/marvell,orion-pinctrl.txt | 4 +-
>> drivers/clk/mvebu/orion.c | 70 ++++++++++++++++++++++
>> drivers/pinctrl/mvebu/pinctrl-orion.c | 23 +++----
>> 4 files changed, 86 insertions(+), 12 deletions(-)
>
> I see this touches pinctrl and clk drivers, but none of the maintainers are
> on Cc for this pull request, nor have they provided an Ack for the patches
> according to your git log.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] Qualcomm EBI2 bindings and bus driver
From: Linus Walleij @ 2016-09-20 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160919223616.GD5431@hector.attlocal.net>
On Tue, Sep 20, 2016 at 12:36 AM, Andy Gross <andy.gross@linaro.org> wrote:
> On Tue, Sep 20, 2016 at 12:12:33AM +0200, Arnd Bergmann wrote:
>> On Thursday, September 8, 2016 3:34:42 PM CEST Linus Walleij wrote:
>> > please pull this new EBI2 bus driver and its bindings into an
>> > apropriate branch in the ARM SoC tree. The binding now has
>> > Rob Herrings ACK and we have hopefully finally figured out how
>> > this should be done.
>> >
>>
>> I just noticed that you sent the pull request directly to arm at kernel.org
>> rather than the Qualcomm maintainers (which are only on Cc).
>>
>> Usually, I'd expect to see this forwarded from Andy, is there a
>> reason to do it differently here? If so, can I have an Ack
>> from him?
>
> When I looked at this last, I thought there were comments. Sorry I missed it.
> If you want to pick it up Arnd, please do, otherwise I can send it along in the
> next pull request.
>
> Acked-by: Andy Gross <andy.gross@linaro.org>
Thanks, I hope Arnd can pull this as-is.
Will you apply the DTS changes Andy?
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] Qualcomm EBI2 bindings and bus driver
From: Linus Walleij @ 2016-09-20 21:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4360974.U0qvolVKdi@wuerfel>
On Tue, Sep 20, 2016 at 12:12 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Thursday, September 8, 2016 3:34:42 PM CEST Linus Walleij wrote:
>> please pull this new EBI2 bus driver and its bindings into an
>> apropriate branch in the ARM SoC tree. The binding now has
>> Rob Herrings ACK and we have hopefully finally figured out how
>> this should be done.
>>
>
> I just noticed that you sent the pull request directly to arm at kernel.org
> rather than the Qualcomm maintainers (which are only on Cc).
>
> Usually, I'd expect to see this forwarded from Andy, is there a
> reason to do it differently here? If so, can I have an Ack
> from him?
Sorry I sent it like this beacuse in an earlier revision of the patch
I asked how it was to be handled and got no answers, so I just assumed
new drivers was a plain separate thing. (I understand Andy has to merge
the DTS changes.)
I saw Andy gave his ACK though, any comments should be addressed
in this version as well.
Yours,
Linus Walleij
^ permalink raw reply
* PROBLEM: DWC3 USB 3.0 not working on Odroid-XU4 with Exynos 5422
From: Michael Niewöhner @ 2016-09-20 21:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANAwSgQMsK8YPxR==UXtR49kiJzYhkzvSCNwn8mDJfj-3wpa2w@mail.gmail.com>
Hi guys,
On Di, 2016-08-30 at 10:32 +0530, Anand Moon wrote:
> Hi All
>
> Adding Vivek Gautam.
>
> On 29 August 2016 at 16:35, Michael Niew?hner <linux@mniewoehner.de>
> wrote:
> >
> > Hi Mathias,
> > On Mo, 2016-08-29 at 13:59 +0300, Mathias Nyman wrote:
> > >
> > > On 29.08.2016 10:28, Felipe Balbi wrote:
> > > >
> > > >
> > > >
> > > > Hi,
> > > >
> > > > Michael Niew?hner <linux@mniewoehner.de> writes:
> > > > >
> > > > >
> > > > > [1.] One line summary of the problem:
> > > > > DWC3 USB 3.0 not working on Odroid-XU4 with Exynos 5422
> > > > >
> > > > > [2.] Full description of the problem/report:
> > > > > No usb 3.0 devices are being detected when attached while USB
> > > > > 2.0
> > > > > devices work on the same port.
> > > > > USB 3.0 works after applying patches [9.1] and [9.2], but
> > > > > seems
> > > > > to be
> > > > > buggy. The usb hub is redetected every time an usb device is
> > > > > attached.
> > > >
> > > > dwc3 is host, which means it's actually XHCI :-)
> > > >
> > > > Adding Mathias
> > > >
> > > > >
> > > > >
> > > > > dmesg:
> > > > > [??192.287080] usb 3-1.2: USB disconnect, device number 7
> > > > > [??210.370699] hub 3-1:1.0: hub_ext_port_status failed (err =
> > > > > -71)
> > >
> > > Looks like the hub GetPortStatus request fails with protocol
> > > error.
> > >
> > > Reading xhci root hub port status is mostly just register reads
> > > and
> > > writes. It
> > > shouldn't include any actual transfers that could return -EPROTO
> > >
> > > So this is not the root hub? but a external or integrated on your
> > > board, right?
> > >
> > > The protocol error -71 is returned at transfer errors or if
> > > device
> > > stalled.
> > >
> > > Adding more xhci debugging options could show something:
> > > echo -n 'module xhci_hcd =p' >
> > > /sys/kernel/debug/dynamic_debug/control
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > [9.] Other notes, patches, fixes, workarounds:
> > > > > [9.1] https://lkml.org/lkml/2014/4/28/234
> > > > > [9.2] https://lkml.org/lkml/2015/2/2/259
> > >
> > > The additional patches that makes things somehow work involve
> > > tuning
> > > the PHY,
> > > this is an area I'm not familiar with
> > >
> > > -Mathias
> > >
> >
> >
> > I'm sorry, I should have said that this is the dmesg output with
> > the
> > patches applied. Without them there is no output at all when I
> > attach
> > an usb 3.0 device.
> >
> > Michael
>
> There are two dwc3 ports in the SoC : one for Gbit Ethernet another
> one for on-board GL3521 USB 3.0 hub controller.
>
> 3.10.x kernel
> odroid at odroid:~$ lsusb -t
> /:??Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> ????|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
> Driver=r8152, 5000M
> /:??Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> /:??Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
> /:??Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
> /:??Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
> /:??Bus 01.Port 1: Dev 1, Class=root_hub, Driver=s5p-ehci/3p, 480M
>
> 4.x kernel
> odroid at odroid:~$ lsusb -t
> /:??Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> /:??Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> ????|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
> Driver=r8152, 480M
> /:??Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
> ????????|__ Port 1: Dev 3, If 0, Class=Mass Storage, Driver=usb-
> storage, 5000M
> ????????|__ Port 2: Dev 4, If 0, Class=Mass Storage, Driver=usb-
> storage, 5000M
> /:??Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
> ????|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
> /:??Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
> /:??Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
>
> I fell that Ethernet driver r8152 is not getting registered to
> xhci-hcd to bus port 06
> which lead to other ports to miss configure, some time the Ethernet
> port get register to bus port 04
>
> Their is also a possibility that all the port are not getting proper
> power from the S2MPS11 PMIC
> and possible some reset of the phy is needed to reconfigure the
> exynos
> USB HSIC controller.
>
> Best Regards
> -Anand Moon
> --
> To unsubscribe from this list: send the line "unsubscribe linux-
> samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at??http://vger.kernel.org/majordomo-info.html
Today I've tested v4.8-rc7 (without the patches above). The USB 3.0
ports have stopped working completely for me. Neither USB 2.0 nor USB
3.0 are being detected. The Ethernet port does not work, too. The USB-
2.0-only Port works.
There also a new problem: my XU4 does not reboot or poweroff anymore.
When I force-remove the dwc3 module reboot / poweroff works again.
There are some failures in the dmesg log, see below.
Best regards,
Michael
dmesg | grep -iE "usb|dwc|hci":
-------------------------------
[????0.326371] usbcore: registered new interface driver usbfs
[????0.326456] usbcore: registered new interface driver hub
[????0.326638] usbcore: registered new device driver usb
[????1.620326] usbcore: registered new interface driver usb-storage
[????1.790692] sdhci: Secure Digital Host Controller Interface driver
[????1.795382] sdhci: Copyright(c) Pierre Ossman
[????1.994062] sdhci-pltfm: SDHCI platform and OF driver helper
[????2.011265] usbcore: registered new interface driver usbhid
[????2.016419] usbhid: USB HID core driver
[???15.113203] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[???15.115802] ehci-exynos: EHCI EXYNOS driver
[???15.117544] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[???15.121099] ohci-exynos: OHCI EXYNOS driver
[???15.173098] exynos-ohci 12120000.usb: USB Host Controller
[???15.187949] exynos-ohci 12120000.usb: new USB bus registered, assigned bus number 1
[???15.195296] exynos-ohci 12120000.usb: irq 89, io mem 0x12120000
[???15.274045] usb usb1: New USB device found, idVendor=1d6b, idProduct=0001
[???15.279360] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.279366] usb usb1: Product: USB Host Controller
[???15.279371] usb usb1: Manufacturer: Linux 4.8.0-rc7+ ohci_hcd
[???15.279375] usb usb1: SerialNumber: 12120000.usb
[???15.280187] hub 1-0:1.0: USB hub found
[???15.281215] exynos-ehci 12110000.usb: EHCI Host Controller
[???15.281509] exynos-ehci 12110000.usb: new USB bus registered, assigned bus number 2
[???15.281656] exynos-ehci 12110000.usb: irq 89, io mem 0x12110000
[???15.309929] exynos-ehci 12110000.usb: USB 2.0 started, EHCI 1.00
[???15.310297] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
[???15.310302] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.310307] usb usb2: Product: EHCI Host Controller
[???15.310312] usb usb2: Manufacturer: Linux 4.8.0-rc7+ ehci_hcd
[???15.310317] usb usb2: SerialNumber: 12110000.usb
[???15.310928] hub 2-0:1.0: USB hub found
[???15.312172] exynos-dwc3 soc:usb3-0: no suspend clk specified
[???15.313613] usb_phy_generic.0.auto supply vcc not found, using dummy regulator
[???15.314033] usb_phy_generic.1.auto supply vcc not found, using dummy regulator
[???15.315395] exynos-dwc3 soc:usb3-1: no suspend clk specified
[???15.317108] usb_phy_generic.2.auto supply vcc not found, using dummy regulator
[???15.317436] usb_phy_generic.3.auto supply vcc not found, using dummy regulator
[???15.335605] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.335844] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 3
[???15.336099] xhci-hcd xhci-hcd.4.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.336149] xhci-hcd xhci-hcd.4.auto: irq 135, io mem 0x12000000
[???15.336489] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
[???15.336496] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.336501] usb usb3: Product: xHCI Host Controller
[???15.336506] usb usb3: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.336511] usb usb3: SerialNumber: xhci-hcd.4.auto
[???15.337095] hub 3-0:1.0: USB hub found
[???15.337596] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.337789] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 4
[???15.337927] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.338159] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003
[???15.338165] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.338169] usb usb4: Product: xHCI Host Controller
[???15.338174] usb usb4: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.338179] usb usb4: SerialNumber: xhci-hcd.4.auto
[???15.338847] hub 4-0:1.0: USB hub found
[???15.339419] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.339649] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 5
[???15.339990] xhci-hcd xhci-hcd.5.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.340036] xhci-hcd xhci-hcd.5.auto: irq 136, io mem 0x12400000
[???15.340329] usb usb5: New USB device found, idVendor=1d6b, idProduct=0002
[???15.340335] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.340340] usb usb5: Product: xHCI Host Controller
[???15.340344] usb usb5: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.340349] usb usb5: SerialNumber: xhci-hcd.5.auto
[???15.340918] hub 5-0:1.0: USB hub found
[???15.341387] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.341618] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 6
[???15.341758] usb usb6: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.341993] usb usb6: New USB device found, idVendor=1d6b, idProduct=0003
[???15.341998] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.342003] usb usb6: Product: xHCI Host Controller
[???15.342008] usb usb6: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.342012] usb usb6: SerialNumber: xhci-hcd.5.auto
[???15.342662] hub 6-0:1.0: USB hub found
[???19.642578] usb usb5-port1: connect-debounce failed
#######################################################################
full dmesg:
-----------
[????0.000000] Booting Linux on physical CPU 0x100
[????0.000000] Linux version 4.8.0-rc7+ (c0d3 at z3r0) (gcc version 5.3.1 20160412 (Linaro GCC 5.3-2016.05) ) #1 SMP Tue Sep 20 22:24:41 CEST 2016
[????0.000000] CPU: ARMv7 Processor [410fc073] revision 3 (ARMv7), cr=10c5387d
[????0.000000] CPU: div instructions available: patching division code
[????0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[????0.000000] OF: fdt:Machine model: Hardkernel Odroid XU4
[????0.000000] Reserved memory: created DMA memory pool at 0xbe200000, size 8 MiB
[????0.000000] OF: reserved mem: initialized node region_mfc_right, compatible id shared-dma-pool
[????0.000000] Reserved memory: created DMA memory pool at 0xbd200000, size 16 MiB
[????0.000000] OF: reserved mem: initialized node region_mfc_left, compatible id shared-dma-pool
[????0.000000] Memory policy: Data cache writealloc
[????0.000000] Samsung CPU ID: 0xe5422001
[????0.000000] On node 0 totalpages: 512512
[????0.000000] free_area_init_node: node 0, pgdat c0c81dc0, node_mem_map eee52000
[????0.000000]???Normal zone: 1728 pages used for memmap
[????0.000000]???Normal zone: 0 pages reserved
[????0.000000]???Normal zone: 196608 pages, LIFO batch:31
[????0.000000]???HighMem zone: 315904 pages, LIFO batch:31
[????0.000000] Running under secure firmware.
[????0.000000] percpu: Embedded 15 pages/cpu @eeda1000 s30272 r8192 d22976 u61440
[????0.000000] pcpu-alloc: s30272 r8192 d22976 u61440 alloc=15*4096
[????0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7?
[????0.000000] Built 1 zonelists in Zone order, mobility grouping on.??Total pages: 510784
[????0.000000] Kernel command line: console=ttySAC2,115200n8 root=/dev/mmcblk1p2 rootfstype=ext4 rootwait earlyprintk debug
[????0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[????0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[????0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[????0.000000] Memory: 2018124K/2050048K available (7168K kernel code, 617K rwdata, 2052K rodata, 1024K init, 375K bss, 31924K reserved, 0K cma-reserved, 1263616K highmem)
[????0.000000] Virtual kernel memory layout:
????vector??: 0xffff0000 - 0xffff1000???(???4 kB)
????fixmap??: 0xffc00000 - 0xfff00000???(3072 kB)
????vmalloc : 0xf0800000 - 0xff800000???( 240 MB)
????lowmem??: 0xc0000000 - 0xf0000000???( 768 MB)
????pkmap???: 0xbfe00000 - 0xc0000000???(???2 MB)
????modules : 0xbf000000 - 0xbfe00000???(??14 MB)
??????.text : 0xc0008000 - 0xc0800000???(8160 kB)
??????.init : 0xc0b00000 - 0xc0c00000???(1024 kB)
??????.data : 0xc0c00000 - 0xc0c9a7cc???( 618 kB)
???????.bss : 0xc0c9c000 - 0xc0cf9d04???( 376 kB)
[????0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
[????0.000000] Hierarchical RCU implementation.
[????0.000000]??Build-time adjustment of leaf fanout to 32.
[????0.000000]??RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=8.
[????0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=8
[????0.000000] NR_IRQS:16 nr_irqs:16 16
[????0.000000] genirq: Setting trigger mode 0 for irq 17 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 18 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 19 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 20 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 21 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 22 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 23 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 24 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 25 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 26 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 27 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 28 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 29 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 30 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 31 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 32 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 33 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 34 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 35 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 36 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 37 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 38 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 39 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 40 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 41 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 42 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 43 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 44 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 45 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 46 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 47 failed (gic_set_type+0x0/0x64)
[????0.000000] genirq: Setting trigger mode 0 for irq 48 failed (gic_set_type+0x0/0x64)
[????0.000000] Switching to timer-based delay loop, resolution 41ns
[????0.000000] clocksource: mct-frc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[????0.000007] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[????0.001699] Console: colour dummy device 80x30
[????0.001743] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=240000)
[????0.001762] pid_max: default: 32768 minimum: 301
[????0.002015] Security Framework initialized
[????0.002031] Yama: becoming mindful.
[????0.002063] AppArmor: AppArmor disabled by boot time parameter
[????0.002154] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[????0.002171] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[????0.003263] CPU: Testing write buffer coherency: ok
[????0.003312] ftrace: allocating 25419 entries in 75 pages
[????0.071511] CPU0: update cpu_capacity 448
[????0.071533] CPU0: thread -1, cpu 0, socket 1, mpidr 80000100
[????0.071713] Setting up static identity map for 0x40100000 - 0x40100058
[????0.072357] ARM CCI driver probed
[????0.072569] Exynos MCPM support installed
[????0.076960] CPU1: update cpu_capacity 448
[????0.076969] CPU1: thread -1, cpu 1, socket 1, mpidr 80000101
[????0.078015] CPU2: update cpu_capacity 448
[????0.078023] CPU2: thread -1, cpu 2, socket 1, mpidr 80000102
[????0.079093] CPU3: update cpu_capacity 448
[????0.079100] CPU3: thread -1, cpu 3, socket 1, mpidr 80000103
[????0.080042] CPU4: update cpu_capacity 1535
[????0.080050] CPU4: thread -1, cpu 0, socket 0, mpidr 80000000
[????0.081116] CPU5: update cpu_capacity 1535
[????0.081123] CPU5: thread -1, cpu 1, socket 0, mpidr 80000001
[????0.082117] CPU6: update cpu_capacity 1535
[????0.082124] CPU6: thread -1, cpu 2, socket 0, mpidr 80000002
[????0.083109] CPU7: update cpu_capacity 1535
[????0.083116] CPU7: thread -1, cpu 3, socket 0, mpidr 80000003
[????0.083257] Brought up 8 CPUs
[????0.083322] SMP: Total of 8 processors activated (384.00 BogoMIPS).
[????0.083333] CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x1a)
[????0.083341] CPU: This may indicate a broken bootloader or firmware.
[????0.085519] devtmpfs: initialized
[????0.111049] VFP support v0.3: implementor 41 architecture 2 part 30 variant 7 rev 3
[????0.111544] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[????0.111848] pinctrl core: initialized pinctrl subsystem
[????0.114692] NET: Registered protocol family 16
[????0.115485] DMA: preallocated 256 KiB pool for atomic coherent allocations
[????0.159992] cpuidle: using governor ladder
[????0.199983] cpuidle: using governor menu
[????0.208731] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers.
[????0.208746] hw-breakpoint: maximum watchpoint size is 8 bytes.
[????0.209125] Serial: AMBA PL011 UART driver
[????0.218768] iommu: Adding device 11000000.codec to group 0
[????0.224583] genirq: Setting trigger mode 0 for irq 110 failed (gic_set_type+0x0/0x64)
[????0.257244] iommu: Adding device 14450000.mixer to group 1
[????0.257794] iommu: Adding device 11c00000.rotator to group 2
[????0.267216] iommu: Adding device 13e00000.video-scaler to group 3
[????0.267742] iommu: Adding device 13e10000.video-scaler to group 4
[????0.268256] iommu: Adding device 11f50000.jpeg to group 5
[????0.268752] iommu: Adding device 11f60000.jpeg to group 6
[????0.269137] EXYNOS5420 PMU initialized
[????0.325992] SCSI subsystem initialized
[????0.326371] usbcore: registered new interface driver usbfs
[????0.326456] usbcore: registered new interface driver hub
[????0.326638] usbcore: registered new device driver usb
[????0.327614] media: Linux media interface: v0.10
[????0.327679] Linux video capture interface: v2.00
[????0.327775] pps_core: LinuxPPS API ver. 1 registered
[????0.327786] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[????0.327815] PTP clock support registered
[????0.329864] clocksource: Switched to clocksource mct-frc
[????0.400809] VFS: Disk quotas dquot_6.6.0
[????0.400890] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[????0.420200] NET: Registered protocol family 2
[????0.420933] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[????0.421015] TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
[????0.421174] TCP: Hash tables configured (established 8192 bind 8192)
[????0.421242] UDP hash table entries: 512 (order: 2, 16384 bytes)
[????0.421283] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[????0.421520] NET: Registered protocol family 1
[????0.427016] futex hash table entries: 2048 (order: 5, 131072 bytes)
[????0.427156] audit: initializing netlink subsys (disabled)
[????0.427216] audit: type=2000 audit(0.370:1): initialized
[????0.428268] workingset: timestamp_bits=14 max_order=19 bucket_order=5
[????0.439142] zbud: loaded
[????0.444748] bounce: pool size: 64 pages
[????0.445009] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[????0.445239] io scheduler noop registered
[????0.445253] io scheduler deadline registered (default)
[????0.445515] io scheduler cfq registered
[????0.455579] dma-pl330 121a0000.pdma: Loaded driver for PL330 DMAC-241330
[????0.455598] dma-pl330 121a0000.pdma:?????????DBUFF-32x4bytes Num_Chans-8 Num_Peri-32 Num_Events-32
[????0.460175] dma-pl330 121b0000.pdma: Loaded driver for PL330 DMAC-241330
[????0.460193] dma-pl330 121b0000.pdma:?????????DBUFF-32x4bytes Num_Chans-8 Num_Peri-32 Num_Events-32
[????0.461439] dma-pl330 10800000.mdma: Loaded driver for PL330 DMAC-241330
[????0.461456] dma-pl330 10800000.mdma:?????????DBUFF-64x8bytes Num_Chans-8 Num_Peri-1 Num_Events-32
[????0.462613] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[????0.465554] Serial: AMBA driver
[????0.465938] 12c00000.serial: ttySAC0 at MMIO 0x12c00000 (irq = 76, base_baud = 0) is a S3C6400/10
[????0.466473] 12c10000.serial: ttySAC1 at MMIO 0x12c10000 (irq = 77, base_baud = 0) is a S3C6400/10
[????0.467023] 12c20000.serial: ttySAC2 at MMIO 0x12c20000 (irq = 78, base_baud = 0) is a S3C6400/10
[????0.599414] random: fast init done
[????1.542942] console [ttySAC2] enabled
[????1.547070] 12c30000.serial: ttySAC3 at MMIO 0x12c30000 (irq = 79, base_baud = 0) is a S3C6400/10
[????1.556647] [drm] Initialized drm 1.1.0 20060810
[????1.562246] exynos-hdmi 14530000.hdmi: Failed to get supply 'vdd': -517
[????1.569034] exynos-rot 11c00000.rotator: The exynos rotator is probed successfully
[????1.575796] exynos-drm-gsc 13e00000.video-scaler: failed to get system register.
[????1.582802] exynos-drm-gsc 13e00000.video-scaler: drm gsc registered successfully.
[????1.590163] exynos-drm-gsc 13e10000.video-scaler: failed to get system register.
[????1.597624] exynos-drm-gsc 13e10000.video-scaler: drm gsc registered successfully.
[????1.605612] exynos-drm-ipp exynos-drm-ipp: drm ipp registered successfully.
[????1.617202] libphy: Fixed MDIO Bus: probed
[????1.620326] usbcore: registered new interface driver usb-storage
[????1.626314] mousedev: PS/2 mouse device common for all mice
[????1.649678] vdd_ldo9: Bringing 3300000uV into 3000000-3000000uV
[????1.662830] vddq_mmc2: Bringing 3300000uV into 2800000-2800000uV
[????1.672436] vdd_ldo15: Bringing 3300000uV into 3100000-3100000uV
[????1.685733] vdd_sd: Bringing 3300000uV into 2800000-2800000uV
[????1.745880] s5m-rtc s2mps14-rtc: rtc core: registered s5m-rtc as rtc0
[????1.758869] exynos-tmu 10060000.tmu: More trip points than supported by this TMU.
[????1.764911] exynos-tmu 10060000.tmu: 2 trip points should be configured in polling mode.
[????1.790692] sdhci: Secure Digital Host Controller Interface driver
[????1.795382] sdhci: Copyright(c) Pierre Ossman
[????1.799956] Synopsys Designware Multimedia Card Interface Driver
[????1.806290] dwmmc_exynos 12200000.mmc: IDMAC supports 32-bit address mode.
[????1.812577] dwmmc_exynos 12200000.mmc: Using internal DMA controller.
[????1.818958] dwmmc_exynos 12200000.mmc: Version ID is 250a
[????1.824373] dwmmc_exynos 12200000.mmc: DW MMC controller at irq 91,64 bit host data width,64 deep fifo
[????1.833763] dwmmc_exynos 12200000.mmc: Got CD GPIO
[????1.838412] dwmmc_exynos 12200000.mmc: allocated mmc-pwrseq
[????1.870520] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[????1.900048] dwmmc_exynos 12200000.mmc: 1 slots initialized
[????1.904270] dwmmc_exynos 12220000.mmc: IDMAC supports 32-bit address mode.
[????1.910928] dwmmc_exynos 12220000.mmc: Using internal DMA controller.
[????1.917310] dwmmc_exynos 12220000.mmc: Version ID is 250a
[????1.922727] dwmmc_exynos 12220000.mmc: DW MMC controller at irq 92,64 bit host data width,64 deep fifo
[????1.960331] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[????1.989895] dwmmc_exynos 12220000.mmc: 1 slots initialized
[????1.994062] sdhci-pltfm: SDHCI platform and OF driver helper
[????2.000612] ledtrig-cpu: registered to indicate activity on CPUs
[????2.005907] hidraw: raw HID events driver (C) Jiri Kosina
[????2.011265] usbcore: registered new interface driver usbhid
[????2.016419] usbhid: USB HID core driver
[????2.032699] exynos-nocp: new NoC Probe device registered: 10ca1000.nocp
[????2.038006] exynos-nocp: new NoC Probe device registered: 10ca1400.nocp
[????2.044648] exynos-nocp: new NoC Probe device registered: 10ca1800.nocp
[????2.051203] exynos-nocp: new NoC Probe device registered: 10ca1c00.nocp
[????2.060844] NET: Registered protocol family 10
[????2.064785] mip6: Mobile IPv6
[????2.066752] NET: Registered protocol family 17
[????2.071230] mpls_gso: MPLS GSO support
[????2.075529] ThumbEE CPU extension supported.
[????2.079164] Registering SWP/SWPB emulation handler
[????2.084499] registered taskstats version 1
[????2.088033] zswap: loaded using pool lzo/zbud
[????2.092445] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[????2.105579] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[????2.112148] s3c-rtc 101e0000.rtc: rtc disabled, re-enabling
[????2.116601] s3c-rtc 101e0000.rtc: warning: invalid RTC value so initializing it
[????2.123908] rtc rtc1: invalid alarm value: 1900-1-2 0:0:0
[????2.129400] s3c-rtc 101e0000.rtc: rtc core: registered s3c as rtc1
[????2.136750] exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz)
[????2.144186] exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz)
[????2.152075] exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz)
[????2.160433] exynos-bus: new bus device registered: soc:bus_fsys (100000 KHz ~ 200000 KHz)
[????2.168742] exynos-bus: new bus device registered: soc:bus_fsys2 ( 75000 KHz ~ 150000 KHz)
[????2.177136] exynos-bus: new bus device registered: soc:bus_mfc ( 96000 KHz ~ 333000 KHz)
[????2.185125] exynos-bus: new bus device registered: soc:bus_gen ( 89000 KHz ~ 267000 KHz)
[????2.193013] exynos-bus: new bus device registered: soc:bus_peri ( 67000 KHz ~??67000 KHz)
[????2.195081] devfreq soc:bus_wcore: Couldn't update frequency transition information.
[????2.209087] exynos-bus: new bus device registered: soc:bus_g2d ( 84000 KHz ~ 333000 KHz)
[????2.217105] exynos-bus: new bus device registered: soc:bus_g2d_acp ( 67000 KHz ~ 267000 KHz)
[????2.225507] exynos-bus: new bus device registered: soc:bus_jpeg ( 75000 KHz ~ 300000 KHz)
[????2.233659] exynos-bus: new bus device registered: soc:bus_jpeg_apb ( 84000 KHz ~ 167000 KHz)
[????2.242025] exynos-bus: new bus device registered: soc:bus_disp1_fimd (120000 KHz ~ 200000 KHz)
[????2.250759] exynos-bus: new bus device registered: soc:bus_disp1 (120000 KHz ~ 300000 KHz)
[????2.258960] exynos-bus: new bus device registered: soc:bus_gscl_scaler (150000 KHz ~ 300000 KHz)
[????2.267872] exynos-bus: new bus device registered: soc:bus_mscl ( 84000 KHz ~ 400000 KHz)
[????2.275693] mmc_host mmc1: Bus speed (slot 0) = 200000000Hz (slot req 200000000Hz, actual 200000000HZ div = 0)
[????2.277158] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[????2.279370] Power domain power-domain at 10044120 disable failed
[????2.285341] s5m-rtc s2mps14-rtc: setting system clock to 2000-01-01 00:00:04 UTC (946684804)
[????2.308572] PM: Hibernation image not present or could not be loaded.
[????2.316247] Waiting for root device /dev/mmcblk1p2...
[????2.410857] mmc1: new ultra high speed SDR104 SDHC card at address 59b4
[????2.416596] mmcblk1: mmc1:59b4 USDU1 14.7 GiB?
[????2.421238]??mmcblk1: p1 p2
[????2.425615] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[????2.554682] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[????2.561343] VFS: Mounted root (ext4 filesystem) readonly on device 179:2.
[????2.568683] Freeing unused kernel memory: 1024K (c0b00000 - c0c00000)
[????2.702417] systemd[1]: Mounting cgroup to /sys/fs/cgroup/cpuset of type cgroup with options cpuset.
[????2.781274] systemd[1]: Mounting cgroup to /sys/fs/cgroup/cpu,cpuacct of type cgroup with options cpu,cpuacct.
[????2.790379] systemd[1]: Mounting cgroup to /sys/fs/cgroup/blkio of type cgroup with options blkio.
[????2.800162] systemd[1]: Mounting cgroup to /sys/fs/cgroup/memory of type cgroup with options memory.
[????2.814356] systemd[1]: Mounting cgroup to /sys/fs/cgroup/devices of type cgroup with options devices.
[????2.822694] systemd[1]: Mounting cgroup to /sys/fs/cgroup/freezer of type cgroup with options freezer.
[????2.831941] systemd[1]: Mounting cgroup to /sys/fs/cgroup/net_cls,net_prio of type cgroup with options net_cls,net_prio.
[????2.842823] systemd[1]: Mounting cgroup to /sys/fs/cgroup/perf_event of type cgroup with options perf_event.
[????2.852911] systemd[1]: systemd 215 running in system mode. (+PAM +AUDIT +SELINUX +IMA +SYSVINIT +LIBCRYPTSETUP +GCRYPT +ACL +XZ -SECCOMP -APPARMOR)
[????2.865511] systemd[1]: Detected architecture 'arm'.
[????2.955738] systemd-getty-generator[114]: Automatically adding serial getty for /dev/ttySAC2.
[????2.957079] systemd-fstab-generator[115]: Parsing /etc/fstab
[????2.963653] systemd-fstab-generator[115]: Found entry what=/dev/mmcblk1p2 where=/ type=ext4
[????2.966633] systemd-default-display-manager-generator[117]: No /etc/X11/default-display-manager file, nothing to generate
[????2.968300] systemd-rc-local-generator[123]: Automatically adding rc-local.service.
[????3.016153] systemd-gpt-auto-generator[120]: Root device /dev/mmcblk1.
[????3.016220] systemd-sysv-generator[119]: Looking for unit files in (higher priority first):
[????3.016228] systemd-sysv-generator[119]:?????/etc/systemd/system
[????3.016235] systemd-sysv-generator[119]:?????/run/systemd/system
[????3.016243] systemd-sysv-generator[119]:?????/usr/local/lib/systemd/system
[????3.016250] systemd-sysv-generator[119]:?????/lib/systemd/system
[????3.016259] systemd-sysv-generator[119]:?????/usr/lib/systemd/system
[????3.016285] systemd-sysv-generator[119]: Looking for SysV init scripts in:
[????3.016292] systemd-sysv-generator[119]:?????/etc/init.d
[????3.016302] systemd-sysv-generator[119]: Looking for SysV rcN.d links in:
[????3.016309] systemd-sysv-generator[119]:?????/etc
[????3.017000] systemd-fstab-generator[115]: Found entry what=/dev/mmcblk1p1 where=/boot type=vfat
[????3.019097] systemd-fstab-generator[115]: Checking was requested for /dev/mmcblk1p1, but fsck.vfat does not exist: No such file or directory
[????3.070298] systemd-sysv-ge: 77 output lines suppressed due to ratelimiting
[????3.144075] systemd-gpt-auto-generator[120]: Not a GPT partition table, ignoring.
[????5.381648] random: crng init done
[???13.969940] systemd-cgroups-agent[134]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???13.969961] systemd-cgroups-agent[138]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???13.969966] systemd-cgroups-agent[139]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???13.969970] systemd-cgroups-agent[140]: Sent message type=signal sender=n/a destination=n/a object=/org/freedesktop/systemd1/agent interface=org.freedesktop.systemd1.Agent member=Releasea
[???14.099908] systemd[1]: Got disconnect on private connection.
[???14.119885] systemd[1]: Got disconnect on private connection.
[???14.139889] systemd[1]: Got disconnect on private connection.
[???14.159884] systemd[1]: Got disconnect on private connection.
[???14.632312] systemd-journald[146]: Fixed max_use=98.5M max_size=12.3M min_size=4.0M keep_free=147.8M
[???14.646230] systemd-journald[146]: Reserving 22435 entries in hash table.
[???14.649928] systemd[1]: Got notification message for unit systemd-journald.service
[???14.661340] systemd-journald[146]: Vacuuming...
[???14.664447] systemd-journald[146]: Vacuuming done, freed 0 bytes
[???14.669913] systemd[1]: systemd-journald.service: Got notification message from PID 146 (WATCHDOG=1...)
[???14.680525] systemd-journald[146]: Flushing /dev/kmsg...
[???14.689922] systemd[1]: systemd-journald.service: got WATCHDOG=1
[???14.695361] systemd-journald[146]: Compressed data object 537 -> 288
[???14.709901] systemd[1]: Got notification message for unit systemd-journald.service
[???14.729910] systemd[1]: systemd-journald.service: Got notification message from PID 146 (WATCHDOG=1...)
[???14.740561] systemd-journald[146]: systemd-journald running as pid 146
[???14.969604] systemd-udevd[151]: starting version 215
[???15.091498] s5p-secss 10830000.sss: s5p-sss driver registered
[???15.096251] 12100000.phy supply vbus not found, using dummy regulator
[???15.098979] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.109611] 12100000.phy supply vbus-boost not found, using dummy regulator
[???15.113203] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[???15.115802] ehci-exynos: EHCI EXYNOS driver
[???15.117544] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[???15.121099] ohci-exynos: OHCI EXYNOS driver
[???15.138248] 12130000.phy supply vbus not found, using dummy regulator
[???15.140298] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.152585] 12500000.phy supply vbus not found, using dummy regulator
[???15.154586] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.164901] 12500000.phy supply vbus-boost not found, using dummy regulator
[???15.173098] exynos-ohci 12120000.usb: USB Host Controller
[???15.174726] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.187949] exynos-ohci 12120000.usb: new USB bus registered, assigned bus number 1
[???15.195296] exynos-ohci 12120000.usb: irq 89, io mem 0x12120000
[???15.274045] usb usb1: New USB device found, idVendor=1d6b, idProduct=0001
[???15.279360] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.279366] usb usb1: Product: USB Host Controller
[???15.279371] usb usb1: Manufacturer: Linux 4.8.0-rc7+ ohci_hcd
[???15.279375] usb usb1: SerialNumber: 12120000.usb
[???15.280187] hub 1-0:1.0: USB hub found
[???15.280246] hub 1-0:1.0: 3 ports detected
[???15.281215] exynos-ehci 12110000.usb: EHCI Host Controller
[???15.281509] exynos-ehci 12110000.usb: new USB bus registered, assigned bus number 2
[???15.281656] exynos-ehci 12110000.usb: irq 89, io mem 0x12110000
[???15.283280] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.309929] exynos-ehci 12110000.usb: USB 2.0 started, EHCI 1.00
[???15.310297] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
[???15.310302] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.310307] usb usb2: Product: EHCI Host Controller
[???15.310312] usb usb2: Manufacturer: Linux 4.8.0-rc7+ ehci_hcd
[???15.310317] usb usb2: SerialNumber: 12110000.usb
[???15.310928] hub 2-0:1.0: USB hub found
[???15.310980] hub 2-0:1.0: 3 ports detected
[???15.312172] exynos-dwc3 soc:usb3-0: no suspend clk specified
[???15.313613] usb_phy_generic.0.auto supply vcc not found, using dummy regulator
[???15.314033] usb_phy_generic.1.auto supply vcc not found, using dummy regulator
[???15.315099] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.315395] exynos-dwc3 soc:usb3-1: no suspend clk specified
[???15.317108] usb_phy_generic.2.auto supply vcc not found, using dummy regulator
[???15.317436] usb_phy_generic.3.auto supply vcc not found, using dummy regulator
[???15.318895] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.322074] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.327912] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.330946] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.335605] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.335844] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 3
[???15.336099] xhci-hcd xhci-hcd.4.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.336149] xhci-hcd xhci-hcd.4.auto: irq 135, io mem 0x12000000
[???15.336489] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
[???15.336496] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.336501] usb usb3: Product: xHCI Host Controller
[???15.336506] usb usb3: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.336511] usb usb3: SerialNumber: xhci-hcd.4.auto
[???15.337095] hub 3-0:1.0: USB hub found
[???15.337142] hub 3-0:1.0: 1 port detected
[???15.337596] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
[???15.337789] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 4
[???15.337927] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.338159] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003
[???15.338165] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.338169] usb usb4: Product: xHCI Host Controller
[???15.338174] usb usb4: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.338179] usb usb4: SerialNumber: xhci-hcd.4.auto
[???15.338847] hub 4-0:1.0: USB hub found
[???15.338896] hub 4-0:1.0: 1 port detected
[???15.339419] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.339649] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 5
[???15.339990] xhci-hcd xhci-hcd.5.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00010010
[???15.340036] xhci-hcd xhci-hcd.5.auto: irq 136, io mem 0x12400000
[???15.340103] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.340329] usb usb5: New USB device found, idVendor=1d6b, idProduct=0002
[???15.340335] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.340340] usb usb5: Product: xHCI Host Controller
[???15.340344] usb usb5: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.340349] usb usb5: SerialNumber: xhci-hcd.5.auto
[???15.340918] hub 5-0:1.0: USB hub found
[???15.340964] hub 5-0:1.0: 1 port detected
[???15.341387] xhci-hcd xhci-hcd.5.auto: xHCI Host Controller
[???15.341618] xhci-hcd xhci-hcd.5.auto: new USB bus registered, assigned bus number 6
[???15.341758] usb usb6: We don't know the algorithms for LPM for this host, disabling LPM.
[???15.341993] usb usb6: New USB device found, idVendor=1d6b, idProduct=0003
[???15.341998] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[???15.342003] usb usb6: Product: xHCI Host Controller
[???15.342008] usb usb6: Manufacturer: Linux 4.8.0-rc7+ xhci-hcd
[???15.342012] usb usb6: SerialNumber: xhci-hcd.5.auto
[???15.342662] hub 6-0:1.0: USB hub found
[???15.342711] hub 6-0:1.0: 1 port detected
[???15.343005] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???15.346251] [drm:hdmi_probe] *ERROR* Failed to get ddc i2c adapter by node
[???16.007600] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
[???16.139262] FAT-fs (mmcblk1p1): utf8 is not a recommended IO charset for FAT filesystems, filesystem will be case sensitive!
[???16.162644] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[???16.626154] systemd-journald[146]: Received request to flush runtime journal from PID 1
[???16.633782] systemd-journald[146]: Vacuuming...
[???16.637242] systemd-journald[146]: Vacuuming done, freed 0 bytes
[???17.640723] RPC: Registered named UNIX socket transport module.
[???17.645166] RPC: Registered udp transport module.
[???17.651236] RPC: Registered tcp transport module.
[???17.654524] RPC: Registered tcp NFSv4.1 backchannel transport module.
[???17.672346] FS-Cache: Loaded
[???17.693518] FS-Cache: Netfs 'nfs' registered for caching
[???17.725088] Installing knfsd (copyright (C) 1996 okir at monad.swb.de).
[???19.642578] usb usb5-port1: connect-debounce failed
^ permalink raw reply
* linux-next: manual merge of the amlogic tree with the arm-soc tree
From: Kevin Hilman @ 2016-09-20 21:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920101938.5d46a0ab@canb.auug.org.au>
Stephen Rothwell <sfr@canb.auug.org.au> writes:
> Hi all,
>
> Today's linux-next merge of the amlogic tree got a conflict in:
>
> arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
>
> between commit:
>
> 8735053d7968 ("ARM64: dts: meson-gxbb-p20x: Enable USB Nodes")
>
> from the arm-soc tree and commit:
>
> d82801a385a1 ("ARM64: dts: meson-gxbb-p20x: Enable USB Nodes")
>
> from the amlogic tree.
>
> This patch was modified before being merged into the arm-soc tree.
> Please clean up the amlogic tree.
Cleaned up.
I forgot to push the updated amlogic/for-next after sending pull
requests to arm-soc.
Kevin
^ permalink raw reply
* [PATCH v3 5/5] ARM: dts: at91: sama5d2: use correct sckc compatible
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
the sama5d2 sckc is actually sama5d4 compatible
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 26 ++++----------------------
1 file changed, 4 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 353d0e5ec83b..2e49f10f93fa 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1059,30 +1059,12 @@
status = "disabled";
};
- sckc at f8048050 {
- compatible = "atmel,at91sam9x5-sckc";
+ clk32k: sckc at f8048050 {
+ compatible = "atmel,sama5d4-sckc";
reg = <0xf8048050 0x4>;
- slow_rc_osc: slow_rc_osc {
- compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-accuracy = <250000000>;
- atmel,startup-time-usec = <75>;
- };
-
- slow_osc: slow_osc {
- compatible = "atmel,at91sam9x5-clk-slow-osc";
- #clock-cells = <0>;
- clocks = <&slow_xtal>;
- atmel,startup-time-usec = <1200000>;
- };
-
- clk32k: slowck {
- compatible = "atmel,at91sam9x5-clk-slow";
- #clock-cells = <0>;
- clocks = <&slow_rc_osc &slow_osc>;
- };
+ clocks = <&slow_xtal>;
+ #clock-cells = <0>;
};
rtc at f80480b0 {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 4/5] ARM: dts: at91: sama5d4: use proper sckc compatible
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Now that there is support for the sama5d4 slow clock controller, use its
driver.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/sama5d4.dtsi | 27 ++++-----------------------
1 file changed, 4 insertions(+), 23 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 65e725fb5679..fe094263595c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1314,30 +1314,11 @@
status = "disabled";
};
- sckc at fc068650 {
- compatible = "atmel,at91sam9x5-sckc";
+ clk32k: sckc at fc068650 {
+ compatible = "atmel,sama5d4-sckc";
reg = <0xfc068650 0x4>;
-
- slow_rc_osc: slow_rc_osc {
- compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-accuracy = <250000000>;
- atmel,startup-time-usec = <75>;
- };
-
- slow_osc: slow_osc {
- compatible = "atmel,at91sam9x5-clk-slow-osc";
- #clock-cells = <0>;
- clocks = <&slow_xtal>;
- atmel,startup-time-usec = <1200000>;
- };
-
- clk32k: slowck {
- compatible = "atmel,at91sam9x5-clk-slow";
- #clock-cells = <0>;
- clocks = <&slow_rc_osc &slow_osc>;
- };
+ #clock-cells = <0>;
+ clocks = <&slow_xtal>;
};
rtc at fc0686b0 {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 3/5] clk: at91: sckc: optimize boot time
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Assume that if the oscillator is enabled (OSC32EN bit is present), the
delay has already elapsed as the bootloader probably waited for the
oscillator to settle. This could waste up to 1.2s.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
drivers/clk/at91/sckc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 60d8225715a2..b1265f2cdae7 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -69,7 +69,7 @@ static int clk_slow_osc_prepare(struct clk_hw *hw)
void __iomem *sckcr = osc->sckcr;
u32 tmp = readl(sckcr);
- if (tmp & AT91_SCKC_OSC32BYP)
+ if (tmp & (AT91_SCKC_OSC32BYP | AT91_SCKC_OSC32EN))
return 0;
writel(tmp | AT91_SCKC_OSC32EN, sckcr);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 2/5] clk: at91: Add sama5d4 sckc support
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Starting with sama5d4, the crystal oscillator is always enabled at startup
and the SCKC doesn't have an OSC32EN bit anymore.
Add support for that new controller.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
.../devicetree/bindings/clock/at91-clock.txt | 3 +-
drivers/clk/at91/sckc.c | 100 +++++++++++++++++++++
2 files changed, 102 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
index 181bc8ac4e3a..5f3ad65daf69 100644
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -6,7 +6,8 @@ This binding uses the common clock binding[1].
Required properties:
- compatible : shall be one of the following:
- "atmel,at91sam9x5-sckc":
+ "atmel,at91sam9x5-sckc" or
+ "atmel,sama5d4-sckc":
at91 SCKC (Slow Clock Controller)
This node contains the slow clock definitions.
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index f6ed711af738..60d8225715a2 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -36,6 +36,15 @@ struct clk_slow_osc {
#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
+struct clk_sama5d4_slow_osc {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ unsigned long startup_usec;
+ bool prepared;
+};
+
+#define to_clk_sama5d4_slow_osc(hw) container_of(hw, struct clk_sama5d4_slow_osc, hw)
+
struct clk_slow_rc_osc {
struct clk_hw hw;
void __iomem *sckcr;
@@ -417,3 +426,94 @@ static void __init of_at91sam9x5_sckc_setup(struct device_node *np)
}
CLK_OF_DECLARE(at91sam9x5_clk_sckc, "atmel,at91sam9x5-sckc",
of_at91sam9x5_sckc_setup);
+
+static int clk_sama5d4_slow_osc_prepare(struct clk_hw *hw)
+{
+ struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw);
+
+ if (osc->prepared)
+ return 0;
+
+ /*
+ * Assume that if it has already been selected (for example by the
+ * bootloader), enough time has aready passed.
+ */
+ if ((readl(osc->sckcr) & AT91_SCKC_OSCSEL)) {
+ osc->prepared = true;
+ return 0;
+ }
+
+ usleep_range(osc->startup_usec, osc->startup_usec + 1);
+ osc->prepared = true;
+
+ return 0;
+}
+
+static int clk_sama5d4_slow_osc_is_prepared(struct clk_hw *hw)
+{
+ struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw);
+
+ return osc->prepared;
+}
+
+static const struct clk_ops sama5d4_slow_osc_ops = {
+ .prepare = clk_sama5d4_slow_osc_prepare,
+ .is_prepared = clk_sama5d4_slow_osc_is_prepared,
+};
+
+static void __init of_sama5d4_sckc_setup(struct device_node *np)
+{
+ void __iomem *regbase = of_iomap(np, 0);
+ struct clk_hw *hw;
+ struct clk_sama5d4_slow_osc *osc;
+ struct clk_init_data init;
+ const char *xtal_name;
+ const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
+ bool bypass;
+ int ret;
+
+ if (!regbase)
+ return;
+
+ hw = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0],
+ NULL, 0, 32768,
+ 250000000);
+ if (IS_ERR(hw))
+ return;
+
+ xtal_name = of_clk_get_parent_name(np, 0);
+
+ bypass = of_property_read_bool(np, "atmel,osc-bypass");
+
+ osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+ if (!osc)
+ return;
+
+ init.name = parent_names[1];
+ init.ops = &sama5d4_slow_osc_ops;
+ init.parent_names = &xtal_name;
+ init.num_parents = 1;
+ init.flags = CLK_IGNORE_UNUSED;
+
+ osc->hw.init = &init;
+ osc->sckcr = regbase;
+ osc->startup_usec = 1200000;
+
+ if (bypass)
+ writel((readl(regbase) | AT91_SCKC_OSC32BYP), regbase);
+
+ hw = &osc->hw;
+ ret = clk_hw_register(NULL, &osc->hw);
+ if (ret) {
+ kfree(osc);
+ return;
+ }
+
+ hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
+CLK_OF_DECLARE(sama5d4_clk_sckc, "atmel,sama5d4-sckc",
+ of_sama5d4_sckc_setup);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 1/5] clk: at91: move slow clock controller clocks to sckc.c
From: Alexandre Belloni @ 2016-09-20 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160920205833.19638-1-alexandre.belloni@free-electrons.com>
Move all clocks related to the slow clock controller to sckc.c. This avoids
extern definitions and allows to remove sckc.h
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
drivers/clk/at91/clk-slow.c | 365 --------------------------------------------
drivers/clk/at91/sckc.c | 364 ++++++++++++++++++++++++++++++++++++++++++-
drivers/clk/at91/sckc.h | 22 ---
3 files changed, 363 insertions(+), 388 deletions(-)
delete mode 100644 drivers/clk/at91/sckc.h
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
index cd831e19ba72..560a8b9abf93 100644
--- a/drivers/clk/at91/clk-slow.c
+++ b/drivers/clk/at91/clk-slow.c
@@ -13,42 +13,11 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/at91_pmc.h>
-#include <linux/delay.h>
#include <linux/of.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include "pmc.h"
-#include "sckc.h"
-
-#define SLOW_CLOCK_FREQ 32768
-#define SLOWCK_SW_CYCLES 5
-#define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
- SLOW_CLOCK_FREQ)
-
-#define AT91_SCKC_CR 0x00
-#define AT91_SCKC_RCEN (1 << 0)
-#define AT91_SCKC_OSC32EN (1 << 1)
-#define AT91_SCKC_OSC32BYP (1 << 2)
-#define AT91_SCKC_OSCSEL (1 << 3)
-
-struct clk_slow_osc {
- struct clk_hw hw;
- void __iomem *sckcr;
- unsigned long startup_usec;
-};
-
-#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
-
-struct clk_slow_rc_osc {
- struct clk_hw hw;
- void __iomem *sckcr;
- unsigned long frequency;
- unsigned long accuracy;
- unsigned long startup_usec;
-};
-
-#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
struct clk_sam9260_slow {
struct clk_hw hw;
@@ -57,340 +26,6 @@ struct clk_sam9260_slow {
#define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw)
-struct clk_sam9x5_slow {
- struct clk_hw hw;
- void __iomem *sckcr;
- u8 parent;
-};
-
-#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
-
-static int clk_slow_osc_prepare(struct clk_hw *hw)
-{
- struct clk_slow_osc *osc = to_clk_slow_osc(hw);
- void __iomem *sckcr = osc->sckcr;
- u32 tmp = readl(sckcr);
-
- if (tmp & AT91_SCKC_OSC32BYP)
- return 0;
-
- writel(tmp | AT91_SCKC_OSC32EN, sckcr);
-
- usleep_range(osc->startup_usec, osc->startup_usec + 1);
-
- return 0;
-}
-
-static void clk_slow_osc_unprepare(struct clk_hw *hw)
-{
- struct clk_slow_osc *osc = to_clk_slow_osc(hw);
- void __iomem *sckcr = osc->sckcr;
- u32 tmp = readl(sckcr);
-
- if (tmp & AT91_SCKC_OSC32BYP)
- return;
-
- writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
-}
-
-static int clk_slow_osc_is_prepared(struct clk_hw *hw)
-{
- struct clk_slow_osc *osc = to_clk_slow_osc(hw);
- void __iomem *sckcr = osc->sckcr;
- u32 tmp = readl(sckcr);
-
- if (tmp & AT91_SCKC_OSC32BYP)
- return 1;
-
- return !!(tmp & AT91_SCKC_OSC32EN);
-}
-
-static const struct clk_ops slow_osc_ops = {
- .prepare = clk_slow_osc_prepare,
- .unprepare = clk_slow_osc_unprepare,
- .is_prepared = clk_slow_osc_is_prepared,
-};
-
-static struct clk_hw * __init
-at91_clk_register_slow_osc(void __iomem *sckcr,
- const char *name,
- const char *parent_name,
- unsigned long startup,
- bool bypass)
-{
- struct clk_slow_osc *osc;
- struct clk_hw *hw;
- struct clk_init_data init;
- int ret;
-
- if (!sckcr || !name || !parent_name)
- return ERR_PTR(-EINVAL);
-
- osc = kzalloc(sizeof(*osc), GFP_KERNEL);
- if (!osc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &slow_osc_ops;
- init.parent_names = &parent_name;
- init.num_parents = 1;
- init.flags = CLK_IGNORE_UNUSED;
-
- osc->hw.init = &init;
- osc->sckcr = sckcr;
- osc->startup_usec = startup;
-
- if (bypass)
- writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
- sckcr);
-
- hw = &osc->hw;
- ret = clk_hw_register(NULL, &osc->hw);
- if (ret) {
- kfree(osc);
- hw = ERR_PTR(ret);
- }
-
- return hw;
-}
-
-void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
- void __iomem *sckcr)
-{
- struct clk_hw *hw;
- const char *parent_name;
- const char *name = np->name;
- u32 startup;
- bool bypass;
-
- parent_name = of_clk_get_parent_name(np, 0);
- of_property_read_string(np, "clock-output-names", &name);
- of_property_read_u32(np, "atmel,startup-time-usec", &startup);
- bypass = of_property_read_bool(np, "atmel,osc-bypass");
-
- hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
- bypass);
- if (IS_ERR(hw))
- return;
-
- of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
-}
-
-static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
-
- return osc->frequency;
-}
-
-static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
- unsigned long parent_acc)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
-
- return osc->accuracy;
-}
-
-static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
- void __iomem *sckcr = osc->sckcr;
-
- writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
-
- usleep_range(osc->startup_usec, osc->startup_usec + 1);
-
- return 0;
-}
-
-static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
- void __iomem *sckcr = osc->sckcr;
-
- writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
-}
-
-static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
-{
- struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
-
- return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
-}
-
-static const struct clk_ops slow_rc_osc_ops = {
- .prepare = clk_slow_rc_osc_prepare,
- .unprepare = clk_slow_rc_osc_unprepare,
- .is_prepared = clk_slow_rc_osc_is_prepared,
- .recalc_rate = clk_slow_rc_osc_recalc_rate,
- .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
-};
-
-static struct clk_hw * __init
-at91_clk_register_slow_rc_osc(void __iomem *sckcr,
- const char *name,
- unsigned long frequency,
- unsigned long accuracy,
- unsigned long startup)
-{
- struct clk_slow_rc_osc *osc;
- struct clk_hw *hw;
- struct clk_init_data init;
- int ret;
-
- if (!sckcr || !name)
- return ERR_PTR(-EINVAL);
-
- osc = kzalloc(sizeof(*osc), GFP_KERNEL);
- if (!osc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &slow_rc_osc_ops;
- init.parent_names = NULL;
- init.num_parents = 0;
- init.flags = CLK_IGNORE_UNUSED;
-
- osc->hw.init = &init;
- osc->sckcr = sckcr;
- osc->frequency = frequency;
- osc->accuracy = accuracy;
- osc->startup_usec = startup;
-
- hw = &osc->hw;
- ret = clk_hw_register(NULL, &osc->hw);
- if (ret) {
- kfree(osc);
- hw = ERR_PTR(ret);
- }
-
- return hw;
-}
-
-void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
- void __iomem *sckcr)
-{
- struct clk_hw *hw;
- u32 frequency = 0;
- u32 accuracy = 0;
- u32 startup = 0;
- const char *name = np->name;
-
- of_property_read_string(np, "clock-output-names", &name);
- of_property_read_u32(np, "clock-frequency", &frequency);
- of_property_read_u32(np, "clock-accuracy", &accuracy);
- of_property_read_u32(np, "atmel,startup-time-usec", &startup);
-
- hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
- startup);
- if (IS_ERR(hw))
- return;
-
- of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
-}
-
-static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
-{
- struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
- void __iomem *sckcr = slowck->sckcr;
- u32 tmp;
-
- if (index > 1)
- return -EINVAL;
-
- tmp = readl(sckcr);
-
- if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
- (index && (tmp & AT91_SCKC_OSCSEL)))
- return 0;
-
- if (index)
- tmp |= AT91_SCKC_OSCSEL;
- else
- tmp &= ~AT91_SCKC_OSCSEL;
-
- writel(tmp, sckcr);
-
- usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
-
- return 0;
-}
-
-static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
-{
- struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
-
- return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
-}
-
-static const struct clk_ops sam9x5_slow_ops = {
- .set_parent = clk_sam9x5_slow_set_parent,
- .get_parent = clk_sam9x5_slow_get_parent,
-};
-
-static struct clk_hw * __init
-at91_clk_register_sam9x5_slow(void __iomem *sckcr,
- const char *name,
- const char **parent_names,
- int num_parents)
-{
- struct clk_sam9x5_slow *slowck;
- struct clk_hw *hw;
- struct clk_init_data init;
- int ret;
-
- if (!sckcr || !name || !parent_names || !num_parents)
- return ERR_PTR(-EINVAL);
-
- slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
- if (!slowck)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &sam9x5_slow_ops;
- init.parent_names = parent_names;
- init.num_parents = num_parents;
- init.flags = 0;
-
- slowck->hw.init = &init;
- slowck->sckcr = sckcr;
- slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
-
- hw = &slowck->hw;
- ret = clk_hw_register(NULL, &slowck->hw);
- if (ret) {
- kfree(slowck);
- hw = ERR_PTR(ret);
- }
-
- return hw;
-}
-
-void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
- void __iomem *sckcr)
-{
- struct clk_hw *hw;
- const char *parent_names[2];
- unsigned int num_parents;
- const char *name = np->name;
-
- num_parents = of_clk_get_parent_count(np);
- if (num_parents == 0 || num_parents > 2)
- return;
-
- of_clk_parent_fill(np, parent_names, num_parents);
-
- of_property_read_string(np, "clock-output-names", &name);
-
- hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
- num_parents);
- if (IS_ERR(hw))
- return;
-
- of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
-}
-
static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
{
struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw);
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 1184d76a7ab7..f6ed711af738 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -12,11 +12,373 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
+#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/io.h>
-#include "sckc.h"
+#define SLOW_CLOCK_FREQ 32768
+#define SLOWCK_SW_CYCLES 5
+#define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
+ SLOW_CLOCK_FREQ)
+
+#define AT91_SCKC_CR 0x00
+#define AT91_SCKC_RCEN (1 << 0)
+#define AT91_SCKC_OSC32EN (1 << 1)
+#define AT91_SCKC_OSC32BYP (1 << 2)
+#define AT91_SCKC_OSCSEL (1 << 3)
+
+struct clk_slow_osc {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ unsigned long startup_usec;
+};
+
+#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
+
+struct clk_slow_rc_osc {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ unsigned long frequency;
+ unsigned long accuracy;
+ unsigned long startup_usec;
+};
+
+#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
+
+struct clk_sam9x5_slow {
+ struct clk_hw hw;
+ void __iomem *sckcr;
+ u8 parent;
+};
+
+#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
+
+static int clk_slow_osc_prepare(struct clk_hw *hw)
+{
+ struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+ u32 tmp = readl(sckcr);
+
+ if (tmp & AT91_SCKC_OSC32BYP)
+ return 0;
+
+ writel(tmp | AT91_SCKC_OSC32EN, sckcr);
+
+ usleep_range(osc->startup_usec, osc->startup_usec + 1);
+
+ return 0;
+}
+
+static void clk_slow_osc_unprepare(struct clk_hw *hw)
+{
+ struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+ u32 tmp = readl(sckcr);
+
+ if (tmp & AT91_SCKC_OSC32BYP)
+ return;
+
+ writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
+}
+
+static int clk_slow_osc_is_prepared(struct clk_hw *hw)
+{
+ struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+ u32 tmp = readl(sckcr);
+
+ if (tmp & AT91_SCKC_OSC32BYP)
+ return 1;
+
+ return !!(tmp & AT91_SCKC_OSC32EN);
+}
+
+static const struct clk_ops slow_osc_ops = {
+ .prepare = clk_slow_osc_prepare,
+ .unprepare = clk_slow_osc_unprepare,
+ .is_prepared = clk_slow_osc_is_prepared,
+};
+
+static struct clk_hw * __init
+at91_clk_register_slow_osc(void __iomem *sckcr,
+ const char *name,
+ const char *parent_name,
+ unsigned long startup,
+ bool bypass)
+{
+ struct clk_slow_osc *osc;
+ struct clk_hw *hw;
+ struct clk_init_data init;
+ int ret;
+
+ if (!sckcr || !name || !parent_name)
+ return ERR_PTR(-EINVAL);
+
+ osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+ if (!osc)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &slow_osc_ops;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+ init.flags = CLK_IGNORE_UNUSED;
+
+ osc->hw.init = &init;
+ osc->sckcr = sckcr;
+ osc->startup_usec = startup;
+
+ if (bypass)
+ writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
+ sckcr);
+
+ hw = &osc->hw;
+ ret = clk_hw_register(NULL, &osc->hw);
+ if (ret) {
+ kfree(osc);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
+
+void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
+ void __iomem *sckcr)
+{
+ struct clk_hw *hw;
+ const char *parent_name;
+ const char *name = np->name;
+ u32 startup;
+ bool bypass;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ of_property_read_string(np, "clock-output-names", &name);
+ of_property_read_u32(np, "atmel,startup-time-usec", &startup);
+ bypass = of_property_read_bool(np, "atmel,osc-bypass");
+
+ hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
+ bypass);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
+
+static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+ return osc->frequency;
+}
+
+static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
+ unsigned long parent_acc)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+ return osc->accuracy;
+}
+
+static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+
+ writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
+
+ usleep_range(osc->startup_usec, osc->startup_usec + 1);
+
+ return 0;
+}
+
+static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+ void __iomem *sckcr = osc->sckcr;
+
+ writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
+}
+
+static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
+{
+ struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+ return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
+}
+
+static const struct clk_ops slow_rc_osc_ops = {
+ .prepare = clk_slow_rc_osc_prepare,
+ .unprepare = clk_slow_rc_osc_unprepare,
+ .is_prepared = clk_slow_rc_osc_is_prepared,
+ .recalc_rate = clk_slow_rc_osc_recalc_rate,
+ .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
+};
+
+static struct clk_hw * __init
+at91_clk_register_slow_rc_osc(void __iomem *sckcr,
+ const char *name,
+ unsigned long frequency,
+ unsigned long accuracy,
+ unsigned long startup)
+{
+ struct clk_slow_rc_osc *osc;
+ struct clk_hw *hw;
+ struct clk_init_data init;
+ int ret;
+
+ if (!sckcr || !name)
+ return ERR_PTR(-EINVAL);
+
+ osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+ if (!osc)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &slow_rc_osc_ops;
+ init.parent_names = NULL;
+ init.num_parents = 0;
+ init.flags = CLK_IGNORE_UNUSED;
+
+ osc->hw.init = &init;
+ osc->sckcr = sckcr;
+ osc->frequency = frequency;
+ osc->accuracy = accuracy;
+ osc->startup_usec = startup;
+
+ hw = &osc->hw;
+ ret = clk_hw_register(NULL, &osc->hw);
+ if (ret) {
+ kfree(osc);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
+
+void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
+ void __iomem *sckcr)
+{
+ struct clk_hw *hw;
+ u32 frequency = 0;
+ u32 accuracy = 0;
+ u32 startup = 0;
+ const char *name = np->name;
+
+ of_property_read_string(np, "clock-output-names", &name);
+ of_property_read_u32(np, "clock-frequency", &frequency);
+ of_property_read_u32(np, "clock-accuracy", &accuracy);
+ of_property_read_u32(np, "atmel,startup-time-usec", &startup);
+
+ hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
+ startup);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
+
+static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
+ void __iomem *sckcr = slowck->sckcr;
+ u32 tmp;
+
+ if (index > 1)
+ return -EINVAL;
+
+ tmp = readl(sckcr);
+
+ if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
+ (index && (tmp & AT91_SCKC_OSCSEL)))
+ return 0;
+
+ if (index)
+ tmp |= AT91_SCKC_OSCSEL;
+ else
+ tmp &= ~AT91_SCKC_OSCSEL;
+
+ writel(tmp, sckcr);
+
+ usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
+
+ return 0;
+}
+
+static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
+{
+ struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
+
+ return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
+}
+
+static const struct clk_ops sam9x5_slow_ops = {
+ .set_parent = clk_sam9x5_slow_set_parent,
+ .get_parent = clk_sam9x5_slow_get_parent,
+};
+
+static struct clk_hw * __init
+at91_clk_register_sam9x5_slow(void __iomem *sckcr,
+ const char *name,
+ const char **parent_names,
+ int num_parents)
+{
+ struct clk_sam9x5_slow *slowck;
+ struct clk_hw *hw;
+ struct clk_init_data init;
+ int ret;
+
+ if (!sckcr || !name || !parent_names || !num_parents)
+ return ERR_PTR(-EINVAL);
+
+ slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
+ if (!slowck)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &sam9x5_slow_ops;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+ init.flags = 0;
+
+ slowck->hw.init = &init;
+ slowck->sckcr = sckcr;
+ slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
+
+ hw = &slowck->hw;
+ ret = clk_hw_register(NULL, &slowck->hw);
+ if (ret) {
+ kfree(slowck);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
+
+void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
+ void __iomem *sckcr)
+{
+ struct clk_hw *hw;
+ const char *parent_names[2];
+ unsigned int num_parents;
+ const char *name = np->name;
+
+ num_parents = of_clk_get_parent_count(np);
+ if (num_parents == 0 || num_parents > 2)
+ return;
+
+ of_clk_parent_fill(np, parent_names, num_parents);
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
+ num_parents);
+ if (IS_ERR(hw))
+ return;
+
+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
+}
static const struct of_device_id sckc_clk_ids[] __initconst = {
/* Slow clock */
diff --git a/drivers/clk/at91/sckc.h b/drivers/clk/at91/sckc.h
deleted file mode 100644
index 836fcf59820f..000000000000
--- a/drivers/clk/at91/sckc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * drivers/clk/at91/sckc.h
- *
- * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __AT91_SCKC_H_
-#define __AT91_SCKC_H_
-
-extern void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
- void __iomem *sckcr);
-extern void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
- void __iomem *sckcr);
-extern void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
- void __iomem *sckcr);
-
-#endif /* __AT91_SCKC_H_ */
--
2.9.3
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