* [PATCH V2 3/5] PCI: save and restore bus on parent bus reset
From: Bjorn Helgaas @ 2016-09-29 21:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474056395-21843-4-git-send-email-okaya@codeaurora.org>
Hi Sinan,
On Fri, Sep 16, 2016 at 04:06:32PM -0400, Sinan Kaya wrote:
> Device states on the bus are saved and restored for all bus resets except
> the one initiated through pci_dev_reset. Filling the hole.
>
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
> ---
> drivers/pci/pci.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index aab9d51..8aecab1 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -51,6 +51,10 @@ static void pci_pme_list_scan(struct work_struct *work);
> static LIST_HEAD(pci_pme_list);
> static DEFINE_MUTEX(pci_pme_list_mutex);
> static DECLARE_DELAYED_WORK(pci_pme_work, pci_pme_list_scan);
> +static void pci_dev_lock(struct pci_dev *dev);
> +static void pci_dev_unlock(struct pci_dev *dev);
> +static void pci_bus_save_and_disable(struct pci_bus *bus);
> +static void pci_bus_restore(struct pci_bus *bus);
>
> struct pci_pme_device {
> struct list_head list;
> @@ -3888,8 +3892,18 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
> if (probe)
> return 0;
>
> + if (!probe) {
> + pci_dev_unlock(dev);
> + pci_bus_save_and_disable(dev->bus);
> + }
> +
> pci_reset_bridge_secondary_bus(dev->bus->self);
>
> + if (!probe) {
> + pci_bus_restore(dev->bus);
> + pci_dev_lock(dev);
> + }
This pattern of "unlock, do something, relock" needs some
justification. In general it's unsafe because the lock is protecting
*something*, and you have to assume that something can change as soon
as you unlock. Maybe you know it's safe in this situation, and if so,
the explanation of why it's safe is what I'm looking for.
Also, you're now calling pci_reset_bridge_secondary_bus() with the dev
unlocked, where we called it with the dev locked before. Some (but
worryingly, not all) of the other pci_reset_bridge_secondary_bus()
callers also have the dev locked. I didn't look long enough to figure
out if there is a strategy there or if these inconsistencies are
latent bugs.
> +
> return 0;
> }
>
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v19 12/12] fpga-manager: Add Socfpga Arria10 support
From: atull @ 2016-09-29 21:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAAtXAHe927JSxaCs0LK8bm57mPRKvZ7ZaAvus_XDnzcQMmdAWw@mail.gmail.com>
On Thu, 29 Sep 2016, Moritz Fischer wrote:
> Hi Alan,
>
> On Wed, Sep 28, 2016 at 11:22 AM, Alan Tull <atull@opensource.altera.com> wrote:
>
> > +static void socfpga_a10_fpga_generate_dclks(struct a10_fpga_priv *priv,
> > + u32 count)
> > +{
> > + u32 val;
> > + unsigned int i;
> > +
> > + /* Clear any existing DONE status. */
> > + regmap_write(priv->regmap, A10_FPGAMGR_DCLKSTAT_OFST,
> > + A10_FPGAMGR_DCLKSTAT_DCLKDONE);
> > +
> > + /* Issue the DCLK regmap. */
> > + regmap_write(priv->regmap, A10_FPGAMGR_DCLKCNT_OFST, count);
> > +
> > + /* wait till the dclkcnt done */
> > + for (i = 0; i < 100; i++) {
> > + regmap_read(priv->regmap, A10_FPGAMGR_DCLKSTAT_OFST, &val);
> > + if (val)
> > + break;
> > + udelay(1);
> > + }
>
> It's quite new, but regmap_read_poll_timeout() might be a good fit here?
Yes
>
> > +static int socfpga_a10_fpga_encrypted(struct fpga_manager *mgr,
> > + u32 *buf32, size_t buf32_size)
> > +{
> > + int encrypt;
> > +
> > + if (buf32_size < 70)
> > + return -EINVAL;
> > +
> > + encrypt = ((buf32[69] >> 2) & 3) != 0;
> > +
> > + dev_dbg(&mgr->dev, "header word %d = %08x encrypt=%d\n",
> > + 69, buf32[69], encrypt);
> Maybe a named constants for magic 69 / 70 value :)
Sure
>
> > +static int socfpga_a10_fpga_compressed(struct fpga_manager *mgr,
> > + u32 *buf32, size_t buf32_size)
> > +{
> > + int compress;
> > +
> > + if (buf32_size < 230)
> > + return -EINVAL;
> > +
> > + compress = !((buf32[229] >> 1) & 1);
> > +
> > + dev_dbg(&mgr->dev, "header word %d = %08x compress=%d\n",
> > + 229, buf32[229], compress);
> > +
> > + return compress;
> > +}
> Same here, a comment on 229/230 would work too I guess.
>
> > +/* Start the FPGA programming by initialize the FPGA Manager */
> > +static int socfpga_a10_fpga_write_init(struct fpga_manager *mgr,
> > + struct fpga_image_info *info,
> > + const char *buf, size_t count)
> > +{
> > + struct a10_fpga_priv *priv = mgr->priv;
> > + unsigned int cfg_width;
> > + u32 msel, stat, mask;
> > + int ret;
> > +
> > + if (info->flags & FPGA_MGR_PARTIAL_RECONFIG)
> > + cfg_width = CFGWDTH_16;
> > + else
> > + return -EINVAL;
>
> So we can *only* do partial reconfig? Am I missing something here?
Correct, only PR for now.
>
> > + /* Do some dclks, wait for pr_ready */
> > + socfpga_a10_fpga_generate_dclks(priv, 0x7ff);
>
> Maybe a named constant?
OK. Thanks for the review!
Alan
>
> Cheers,
> Moritz
>
^ permalink raw reply
* [PATCH 3/3] arm64: dump: Add checking for writable and exectuable pages
From: Laura Abbott @ 2016-09-29 21:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929213257.30505-1-labbott@redhat.com>
Page mappings with full RWX permissions are a security risk. x86
has an option to walk the page tables and dump any bad pages.
(See e1a58320a38d ("x86/mm: Warn on W^X mappings")). Add a similar
implementation for arm64.
Signed-off-by: Laura Abbott <labbott@redhat.com>
---
arch/arm64/Kconfig.debug | 28 ++++++++++++++++++++++++++++
arch/arm64/include/asm/ptdump.h | 10 ++++++++++
arch/arm64/mm/dump.c | 36 ++++++++++++++++++++++++++++++++++++
arch/arm64/mm/mmu.c | 2 ++
4 files changed, 76 insertions(+)
diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug
index 9015f02..037dba4 100644
--- a/arch/arm64/Kconfig.debug
+++ b/arch/arm64/Kconfig.debug
@@ -42,6 +42,34 @@ config ARM64_RANDOMIZE_TEXT_OFFSET
of TEXT_OFFSET and platforms must not require a specific
value.
+config DEBUG_WX
+ bool "Warn on W+X mappings at boot"
+ select ARM64_PTDUMP_CORE
+ ---help---
+ Generate a warning if any W+X mappings are found at boot.
+
+ This is useful for discovering cases where the kernel is leaving
+ W+X mappings after applying NX, as such mappings are a security risk.
+
+ Look for a message in dmesg output like this:
+
+ arm64/mm: Checked W+X mappings: passed, no W+X pages found.
+
+ or like this, if the check failed:
+
+ arm64/mm: Checked W+X mappings: FAILED, <N> W+X pages found.
+
+ Note that even if the check fails, your kernel is possibly
+ still fine, as W+X mappings are not a security hole in
+ themselves, what they do is that they make the exploitation
+ of other unfixed kernel bugs easier.
+
+ There is no runtime or memory usage effect of this option
+ once the kernel has booted up - it's a one time check.
+
+ If in doubt, say "Y".
+
+
config DEBUG_SET_MODULE_RONX
bool "Set loadable kernel module data as NX and text as RO"
depends on MODULES
diff --git a/arch/arm64/include/asm/ptdump.h b/arch/arm64/include/asm/ptdump.h
index b18a62c..e3c6bc0 100644
--- a/arch/arm64/include/asm/ptdump.h
+++ b/arch/arm64/include/asm/ptdump.h
@@ -20,6 +20,7 @@
#include <linux/seq_file.h>
#include <linux/mm_types.h>
+#include <linux/list.h>
struct addr_marker {
unsigned long start_address;
@@ -31,6 +32,8 @@ struct ptdump_info {
const struct addr_marker *markers;
unsigned long base_addr;
unsigned long max_addr;
+ /* Internal, do not touch */
+ struct list_head node;
};
int ptdump_register(struct ptdump_info *info, const char *name);
@@ -44,6 +47,13 @@ static inline int ptdump_debugfs_create(struct ptdump_info *info,
return 0;
}
#endif
+void ptdump_check_wx(void);
+
+#ifdef CONFIG_DEBUG_WX
+#define debug_checkwx() ptdump_check_wx()
+#else
+#define debug_checkwx() do { } while (0)
+#endif
#else
static inline int ptdump_register(struct ptdump_info *info, const char *name)
diff --git a/arch/arm64/mm/dump.c b/arch/arm64/mm/dump.c
index e318f3d..b0b1dd6 100644
--- a/arch/arm64/mm/dump.c
+++ b/arch/arm64/mm/dump.c
@@ -29,6 +29,8 @@
#include <asm/pgtable-hwdef.h>
#include <asm/ptdump.h>
+static LIST_HEAD(dump_info);
+
static const struct addr_marker address_markers[] = {
#ifdef CONFIG_KASAN
{ KASAN_SHADOW_START, "Kasan shadow start" },
@@ -74,6 +76,8 @@ struct pg_state {
unsigned long start_address;
unsigned level;
u64 current_prot;
+ bool check_wx;
+ unsigned long wx_pages;
};
struct prot_bits {
@@ -219,6 +223,15 @@ static void note_page(struct pg_state *st, unsigned long addr, unsigned level,
unsigned long delta;
if (st->current_prot) {
+ if (st->check_wx &&
+ ((st->current_prot & PTE_RDONLY) != PTE_RDONLY) &&
+ ((st->current_prot & PTE_PXN) != PTE_PXN)) {
+ WARN_ONCE(1, "arm64/mm: Found insecure W+X mapping at address %p/%pS\n",
+ (void *)st->start_address,
+ (void *)st->start_address);
+ st->wx_pages += (addr - st->start_address) / PAGE_SIZE;
+ }
+
pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ",
st->start_address, addr);
@@ -341,6 +354,7 @@ static void ptdump_initialize(struct ptdump_info *info)
int ptdump_register(struct ptdump_info *info, const char *name)
{
ptdump_initialize(info);
+ list_add(&info->node, &dump_info);
return ptdump_debugfs_create(info, name);
}
@@ -350,6 +364,28 @@ static struct ptdump_info kernel_ptdump_info = {
.base_addr = VA_START,
};
+void ptdump_check_wx(void)
+{
+ struct ptdump_info *info;
+
+ list_for_each_entry(info, &dump_info, node) {
+ struct pg_state st = {
+ .seq = NULL,
+ .marker = info->markers,
+ .check_wx = true,
+ };
+
+ __walk_pgd(&st, info->mm, info->base_addr);
+ note_page(&st, 0, 0, 0);
+ if (st.wx_pages)
+ pr_info("Checked W+X mappings (%p): FAILED, %lu W+X pages found\n",
+ info->mm,
+ st.wx_pages);
+ else
+ pr_info("Checked W+X mappings (%p): passed, no W+X pages found\n", info->mm);
+ }
+}
+
static int ptdump_init(void)
{
return ptdump_register(&kernel_ptdump_info, "kernel_page_tables");
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 4989948..1f036d2 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -41,6 +41,7 @@
#include <asm/tlb.h>
#include <asm/memblock.h>
#include <asm/mmu_context.h>
+#include <asm/ptdump.h>
#include "mm.h"
@@ -397,6 +398,7 @@ void mark_rodata_ro(void)
section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
create_mapping_late(__pa(__start_rodata), (unsigned long)__start_rodata,
section_size, PAGE_KERNEL_RO);
+ debug_checkwx();
}
void fixup_init(void)
--
2.10.0
^ permalink raw reply related
* [PATCH 2/3] arm64: dump: Make the page table dumping seq_file optional
From: Laura Abbott @ 2016-09-29 21:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929213257.30505-1-labbott@redhat.com>
The page table dumping code always assumes it will be dumping to a
seq_file to userspace. The dumping code is useful in other situations.
Let the seq_file be optional.
Signed-off-by: Laura Abbott <labbott@redhat.com>
---
arch/arm64/mm/dump.c | 26 +++++++++++++++++++-------
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/mm/dump.c b/arch/arm64/mm/dump.c
index 29e0838..e318f3d 100644
--- a/arch/arm64/mm/dump.c
+++ b/arch/arm64/mm/dump.c
@@ -50,6 +50,18 @@ static const struct addr_marker address_markers[] = {
{ -1, NULL },
};
+#define pt_dump_seq_printf(m, fmt, args...) \
+({ \
+ if (m) \
+ seq_printf(m, fmt, ##args); \
+})
+
+#define pt_dump_seq_puts(m, fmt) \
+({ \
+ if (m) \
+ seq_printf(m, fmt); \
+})
+
/*
* The page dumper groups page table entries of the same type into a single
* description. It uses pg_state to track the range information while
@@ -186,7 +198,7 @@ static void dump_prot(struct pg_state *st, const struct prot_bits *bits,
s = bits->clear;
if (s)
- seq_printf(st->seq, " %s", s);
+ pt_dump_seq_printf(st->seq, " %s", s);
}
}
@@ -200,14 +212,14 @@ static void note_page(struct pg_state *st, unsigned long addr, unsigned level,
st->level = level;
st->current_prot = prot;
st->start_address = addr;
- seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
+ pt_dump_seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
} else if (prot != st->current_prot || level != st->level ||
addr >= st->marker[1].start_address) {
const char *unit = units;
unsigned long delta;
if (st->current_prot) {
- seq_printf(st->seq, "0x%016lx-0x%016lx ",
+ pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ",
st->start_address, addr);
delta = (addr - st->start_address) >> 10;
@@ -215,17 +227,17 @@ static void note_page(struct pg_state *st, unsigned long addr, unsigned level,
delta >>= 10;
unit++;
}
- seq_printf(st->seq, "%9lu%c %s", delta, *unit,
+ pt_dump_seq_printf(st->seq, "%9lu%c %s", delta, *unit,
pg_level[st->level].name);
if (pg_level[st->level].bits)
dump_prot(st, pg_level[st->level].bits,
pg_level[st->level].num);
- seq_puts(st->seq, "\n");
+ pt_dump_seq_puts(st->seq, "\n");
}
if (addr >= st->marker[1].start_address) {
st->marker++;
- seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
+ pt_dump_seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
}
st->start_address = addr;
@@ -235,7 +247,7 @@ static void note_page(struct pg_state *st, unsigned long addr, unsigned level,
if (addr >= st->marker[1].start_address) {
st->marker++;
- seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
+ pt_dump_seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
}
}
--
2.10.0
^ permalink raw reply related
* [PATCH 1/3] arm64: dump: Make ptdump debugfs a separate option
From: Laura Abbott @ 2016-09-29 21:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929213257.30505-1-labbott@redhat.com>
ptdump_register currently initializes a set of page table information and
registers debugfs. There are uses for the ptdump option without wanting the
debugfs options. Split this out to make it a separate option.
Signed-off-by: Laura Abbott <labbott@redhat.com>
---
arch/arm64/Kconfig.debug | 6 +++++-
arch/arm64/include/asm/ptdump.h | 15 +++++++++++++--
arch/arm64/mm/Makefile | 3 ++-
arch/arm64/mm/dump.c | 30 +++++++++---------------------
arch/arm64/mm/ptdump_debugfs.c | 33 +++++++++++++++++++++++++++++++++
5 files changed, 62 insertions(+), 25 deletions(-)
create mode 100644 arch/arm64/mm/ptdump_debugfs.c
diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug
index 0cc758c..9015f02 100644
--- a/arch/arm64/Kconfig.debug
+++ b/arch/arm64/Kconfig.debug
@@ -2,9 +2,13 @@ menu "Kernel hacking"
source "lib/Kconfig.debug"
-config ARM64_PTDUMP
+config ARM64_PTDUMP_CORE
+ def_bool n
+
+config ARM64_PTDUMP_DEBUGFS
bool "Export kernel pagetable layout to userspace via debugfs"
depends on DEBUG_KERNEL
+ select ARM64_PTDUMP_CORE
select DEBUG_FS
help
Say Y here if you want to show the kernel pagetable layout in a
diff --git a/arch/arm64/include/asm/ptdump.h b/arch/arm64/include/asm/ptdump.h
index 07b8ed0..b18a62c 100644
--- a/arch/arm64/include/asm/ptdump.h
+++ b/arch/arm64/include/asm/ptdump.h
@@ -16,8 +16,9 @@
#ifndef __ASM_PTDUMP_H
#define __ASM_PTDUMP_H
-#ifdef CONFIG_ARM64_PTDUMP
+#ifdef CONFIG_ARM64_PTDUMP_CORE
+#include <linux/seq_file.h>
#include <linux/mm_types.h>
struct addr_marker {
@@ -33,12 +34,22 @@ struct ptdump_info {
};
int ptdump_register(struct ptdump_info *info, const char *name);
+void ptdump_walk_pgd(struct seq_file *s, struct ptdump_info *info);
+#ifdef CONFIG_ARM64_PTDUMP_DEBUGFS
+int ptdump_debugfs_create(struct ptdump_info *info, const char *name);
+#else
+static inline int ptdump_debugfs_create(struct ptdump_info *info,
+ const char *name)
+{
+ return 0;
+}
+#endif
#else
static inline int ptdump_register(struct ptdump_info *info, const char *name)
{
return 0;
}
-#endif /* CONFIG_ARM64_PTDUMP */
+#endif /* CONFIG_ARM64_PTDUMP_CORE */
#endif /* __ASM_PTDUMP_H */
diff --git a/arch/arm64/mm/Makefile b/arch/arm64/mm/Makefile
index 54bb209..e703fb9 100644
--- a/arch/arm64/mm/Makefile
+++ b/arch/arm64/mm/Makefile
@@ -3,7 +3,8 @@ obj-y := dma-mapping.o extable.o fault.o init.o \
ioremap.o mmap.o pgd.o mmu.o \
context.o proc.o pageattr.o
obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
-obj-$(CONFIG_ARM64_PTDUMP) += dump.o
+obj-$(CONFIG_ARM64_PTDUMP_CORE) += dump.o
+obj-$(CONFIG_ARM64_PTDUMP_DEBUGFS) += ptdump_debugfs.o
obj-$(CONFIG_NUMA) += numa.o
obj-$(CONFIG_KASAN) += kasan_init.o
diff --git a/arch/arm64/mm/dump.c b/arch/arm64/mm/dump.c
index 9c3e75d..29e0838 100644
--- a/arch/arm64/mm/dump.c
+++ b/arch/arm64/mm/dump.c
@@ -286,7 +286,7 @@ static void walk_pud(struct pg_state *st, pgd_t *pgd, unsigned long start)
}
}
-static void walk_pgd(struct pg_state *st, struct mm_struct *mm,
+static void __walk_pgd(struct pg_state *st, struct mm_struct *mm,
unsigned long start)
{
pgd_t *pgd = pgd_offset(mm, 0UL);
@@ -304,44 +304,32 @@ static void walk_pgd(struct pg_state *st, struct mm_struct *mm,
}
}
-static int ptdump_show(struct seq_file *m, void *v)
+void ptdump_walk_pgd(struct seq_file *m, struct ptdump_info *info)
{
- struct ptdump_info *info = m->private;
struct pg_state st = {
.seq = m,
.marker = info->markers,
};
- walk_pgd(&st, info->mm, info->base_addr);
+ __walk_pgd(&st, info->mm, info->base_addr);
note_page(&st, 0, 0, 0);
- return 0;
}
-static int ptdump_open(struct inode *inode, struct file *file)
+static void ptdump_initialize(struct ptdump_info *info)
{
- return single_open(file, ptdump_show, inode->i_private);
-}
-
-static const struct file_operations ptdump_fops = {
- .open = ptdump_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-int ptdump_register(struct ptdump_info *info, const char *name)
-{
- struct dentry *pe;
unsigned i, j;
for (i = 0; i < ARRAY_SIZE(pg_level); i++)
if (pg_level[i].bits)
for (j = 0; j < pg_level[i].num; j++)
pg_level[i].mask |= pg_level[i].bits[j].mask;
+}
- pe = debugfs_create_file(name, 0400, NULL, info, &ptdump_fops);
- return pe ? 0 : -ENOMEM;
+int ptdump_register(struct ptdump_info *info, const char *name)
+{
+ ptdump_initialize(info);
+ return ptdump_debugfs_create(info, name);
}
static struct ptdump_info kernel_ptdump_info = {
diff --git a/arch/arm64/mm/ptdump_debugfs.c b/arch/arm64/mm/ptdump_debugfs.c
new file mode 100644
index 0000000..03e161f
--- /dev/null
+++ b/arch/arm64/mm/ptdump_debugfs.c
@@ -0,0 +1,33 @@
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+#include <asm/ptdump.h>
+
+static int ptdump_show(struct seq_file *m, void *v)
+{
+ struct ptdump_info *info = m->private;
+ ptdump_walk_pgd(m, info);
+ return 0;
+}
+
+static int ptdump_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, ptdump_show, inode->i_private);
+}
+
+static const struct file_operations ptdump_fops = {
+ .open = ptdump_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+int ptdump_debugfs_create(struct ptdump_info *info, const char *name)
+{
+ struct dentry *pe;
+ pe = debugfs_create_file(name, 0400, NULL, info, &ptdump_fops);
+ return pe ? 0 : -ENOMEM;
+
+}
+
+
--
2.10.0
^ permalink raw reply related
* [PATCH 0/3] WX Checking for arm64
From: Laura Abbott @ 2016-09-29 21:32 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This is an implementation to check for writable and executable pages on arm64.
This is heavily based on the x86 version which uses the existing page table
dumping code to do the checking. Some notes:
- The W^X checking is important so this option should become defaut eventually.
To make this feasible, the debugfs functionality has been split out as a
separate option. I didn't see a good way to make it modular like x86 but
an option should be good enough.
- This checks all page tables registered with ptdump_register. I don't see this
being called elsewhere right now though.
- Once this is merged, I'd like to see about moving DEBUG_WX to the top level
instead of having each arch call it in mark_rodata.
Laura Abbott (3):
arm64: dump: Make ptdump debugfs a separate option
arm64: dump: Make the page table dumping seq_file optional
arm64: dump: Add checking for writable and exectuable pages
arch/arm64/Kconfig.debug | 34 ++++++++++++++-
arch/arm64/include/asm/ptdump.h | 25 ++++++++++-
arch/arm64/mm/Makefile | 3 +-
arch/arm64/mm/dump.c | 92 ++++++++++++++++++++++++++++-------------
arch/arm64/mm/mmu.c | 2 +
arch/arm64/mm/ptdump_debugfs.c | 33 +++++++++++++++
6 files changed, 157 insertions(+), 32 deletions(-)
create mode 100644 arch/arm64/mm/ptdump_debugfs.c
--
2.10.0
^ permalink raw reply
* [PATCH v5 01/14] drivers: iommu: add FWNODE_IOMMU fwnode type
From: Rafael J. Wysocki @ 2016-09-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929141520.GA29244@red-moon>
On Thursday, September 29, 2016 03:15:20 PM Lorenzo Pieralisi wrote:
> Hi Rafael,
>
> On Fri, Sep 09, 2016 at 03:23:30PM +0100, Lorenzo Pieralisi wrote:
> > On systems booting with a device tree, every struct device is
> > associated with a struct device_node, that represents its DT
> > representation. The device node can be used in generic kernel
> > contexts (eg IRQ translation, IOMMU streamid mapping), to
> > retrieve the properties associated with the device and carry
> > out kernel operation accordingly. Owing to the 1:1 relationship
> > between the device and its device_node, the device_node can also
> > be used as a look-up token for the device (eg looking up a device
> > through its device_node), to retrieve the device in kernel paths
> > where the device_node is available.
> >
> > On systems booting with ACPI, the same abstraction provided by
> > the device_node is required to provide look-up functionality.
> >
> > Therefore, mirroring the approach implemented in the IRQ domain
> > kernel layer, this patch adds an additional fwnode type FWNODE_IOMMU.
> >
> > This patch also implements a glue kernel layer that allows to
> > allocate/free FWNODE_IOMMU fwnode_handle structures and associate
> > them with IOMMU devices.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
> > Cc: Joerg Roedel <joro@8bytes.org>
> > Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> > ---
> > include/linux/fwnode.h | 1 +
> > include/linux/iommu.h | 25 +++++++++++++++++++++++++
> > 2 files changed, 26 insertions(+)
> >
> > diff --git a/include/linux/fwnode.h b/include/linux/fwnode.h
> > index 8516717..6e10050 100644
> > --- a/include/linux/fwnode.h
> > +++ b/include/linux/fwnode.h
> > @@ -19,6 +19,7 @@ enum fwnode_type {
> > FWNODE_ACPI_DATA,
> > FWNODE_PDATA,
> > FWNODE_IRQCHIP,
> > + FWNODE_IOMMU,
>
> This patch provides groundwork for this series and it is key for
> the rest of it, basically the point here is that we need a fwnode
> to differentiate platform devices created out of static ACPI tables
> entries (ie IORT), that represent IOMMU components.
>
> The corresponding device is not an ACPI device (I could fabricate one as
> it is done for other static tables entries eg FADT power button, but I
> do not necessarily see the reason for doing that given that all we need
> the fwnode for is a token identifier), so FWNODE_ACPI does not apply
> here.
>
> Please let me know if it is reasonable how I sorted this out (it
> is basically identical to IRQCHIP, just another enum entry), the
> remainder of the code depends on this.
I'm not familiar with the use case, so I don't see anything unreasonable
in it.
If you're asking about whether or not I mind adding more fwnode types in
principle, then no, I don't. :-)
Thanks,
Rafael
^ permalink raw reply
* [PATCH] arm64: KVM: Take S1 walks into account when determining S2 write faults
From: Christoffer Dall @ 2016-09-29 19:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475149021-13288-1-git-send-email-will.deacon@arm.com>
On Thu, Sep 29, 2016 at 12:37:01PM +0100, Will Deacon wrote:
> The WnR bit in the HSR/ESR_EL2 indicates whether a data abort was
> generated by a read or a write instruction. For stage 2 data aborts
> generated by a stage 1 translation table walk (i.e. the actual page
> table access faults at EL2), the WnR bit therefore reports whether the
> instruction generating the walk was a load or a store, *not* whether the
> page table walker was reading or writing the entry.
>
> For page tables marked as read-only at stage 2 (e.g. due to KSM merging
> them with the tables from another guest), this could result in livelock,
> where a page table walk generated by a load instruction attempts to
> set the access flag in the stage 1 descriptor, but fails to trigger
> CoW in the host since only a read fault is reported.
>
> This patch modifies the arm64 kvm_vcpu_dabt_iswrite function to
> take into account stage 2 faults in stage 1 walks. Since DBM cannot be
> disabled at EL2 for CPUs that implement it, we assume that these faults
> are always causes by writes, avoiding the livelock situation at the
> expense of occasional, spurious CoWs.
>
> We could, in theory, do a bit better by checking the guest TCR
> configuration and inspecting the page table to see why the PTE faulted.
> However, I doubt this is measurable in practice, and the threat of
> livelock is real.
>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Christoffer Dall <christoffer.dall@linaro.org>
> Cc: Julien Grall <julien.grall@arm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Applied,
-Christoffer
^ permalink raw reply
* next-20160929 build: 2 failures 4 warnings (next-20160929)
From: Vishwanath Pai @ 2016-09-29 19:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929184737.ragquwy2tmhxo5bn@sirena.org.uk>
On 09/29/2016 02:47 PM, Mark Brown wrote:
> On Thu, Sep 29, 2016 at 12:40:35PM +0100, Build bot for Mark Brown wrote:
>
> For the past couple of days -next has been failing to build an ARM
> allmodconfig due to:
>
>> arm-allmodconfig
>> ERROR: "__aeabi_uldivmod" [net/netfilter/xt_hashlimit.ko] undefined!
>
> which appears to be triggered by 11d5f15723c9 (netfilter: xt_hashlimit:
> Create revision 2 to support higher pps rates) introducing a division of
> a 64 bit number which should be done using do_div().
>
I have sent a patch for this a couple of days ago to netdev, it hasn't
made it to net-next yet. Here's the latest one:
[PATCH net-next v3] netfilter: xt_hashlimit: Fix link error in 32bit
arch because of 64bit division
This should fix the link error.
-Vishwanath
^ permalink raw reply
* [PATCH 6/6] ARM: da850: adjust memory settings for tilcdc
From: Karl Beldan @ 2016-09-29 19:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475166715-7857-7-git-send-email-bgolaszewski@baylibre.com>
Hi,
On Thu, Sep 29, 2016 at 06:31:55PM +0200, Bartosz Golaszewski wrote:
> Default memory settings of da850 do not meet the throughput/latency
> requirements of tilcdc. This results in the image displayed being
> incorrect and the following warning being displayed by the LCDC
> drm driver:
>
> tilcdc da8xx_lcdc.0: tilcdc_crtc_irq(0x00000020): FIFO underfow
>
> Reconfigure the LCDC priority to the highest. This is a workaround
> for the da850-lcdk board which has the LCD controller enabled in
> the device tree, but a long-term, system-wide fix is needed for
> all davinci boards.
>
> This patch has been modified for mainline linux. It comes from a
> downstream TI release for da850[1].
>
> Original author: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
>
> [1] http://arago-project.org/git/projects/linux-davinci.git?p=projects/linux-davinci.git;a=commitdiff;h=b9bd39a34cc02c3ba2fc15539a2f0bc2b68d25da;hp=6f6c795faa6366a4ebc1037a0235edba6018a991
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
FWIW, the quirks could be applied conditionnally depending on the lcdc
node presence in the DT, a bit like:
https://github.com/kbeldan/linux/commit/cf15572ffef8e8a0d8110b3f6b29bd401d0538be
https://github.com/kbeldan/linux/commit/07e4fff9958bc1625a96791dce284c163fbe9c43
Regards,
Karl
> arch/arm/mach-davinci/da8xx-dt.c | 43 ++++++++++++++++++++++++++++++
> arch/arm/mach-davinci/include/mach/da8xx.h | 4 +++
> 2 files changed, 47 insertions(+)
>
> diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
> index f8ecc02..9d29670 100644
> --- a/arch/arm/mach-davinci/da8xx-dt.c
> +++ b/arch/arm/mach-davinci/da8xx-dt.c
> @@ -44,9 +44,52 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
>
> #ifdef CONFIG_ARCH_DAVINCI_DA850
>
> +/*
> + * Adjust the default memory settings to cope with the LCDC
> + *
> + * REVISIT: This issue occurs on other davinci boards as well. Find
> + * a proper system-wide fix.
> + */
> +static void da850_lcdc_adjust_memory_bandwidth(void)
> +{
> + void __iomem *cfg_mstpri1_base;
> + void __iomem *cfg_mstpri2_base;
> + void __iomem *emifb;
> + u32 val;
> +
> + /*
> + * Default master priorities in reg 0 are all lower by default than LCD
> + * which is set below to 0. Hence don't need to change here.
> + */
> +
> + /* set EDMA30TC0 and TC1 to lower than LCDC (4 < 0) */
> + cfg_mstpri1_base = DA8XX_SYSCFG0_VIRT(DA8XX_MSTPRI1_REG);
> + val = __raw_readl(cfg_mstpri1_base);
> + val &= 0xFFFF00FF;
> + val |= 4 << 8; /* 0-high, 7-low priority*/
> + val |= 4 << 12; /* 0-high, 7-low priority*/
> + __raw_writel(val, cfg_mstpri1_base);
> +
> + /*
> + * Reconfigure the LCDC priority to the highest to ensure that
> + * the throughput/latency requirements for the LCDC are met.
> + */
> + cfg_mstpri2_base = DA8XX_SYSCFG0_VIRT(DA8XX_MSTPRI2_REG);
> +
> + val = __raw_readl(cfg_mstpri2_base);
> + val &= 0x0fffffff;
> + __raw_writel(val, cfg_mstpri2_base);
> +
> + /* set BPRIO */
> + emifb = ioremap(DA8XX_DDR_CTL_BASE, SZ_4K);
> + __raw_writel(0x20, emifb + DA8XX_PBBPR_REG);
> + iounmap(emifb);
> +}
> +
> static void __init da850_init_machine(void)
> {
> of_platform_default_populate(NULL, da850_auxdata_lookup, NULL);
> + da850_lcdc_adjust_memory_bandwidth();
> }
>
> static const char *const da850_boards_compat[] __initconst = {
> diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
> index f9f9713..5549eff 100644
> --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
> @@ -56,6 +56,8 @@ extern unsigned int da850_max_speed;
> #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
> #define DA8XX_JTAG_ID_REG 0x18
> #define DA8XX_HOST1CFG_REG 0x44
> +#define DA8XX_MSTPRI1_REG 0x114
> +#define DA8XX_MSTPRI2_REG 0x118
> #define DA8XX_CHIPSIG_REG 0x174
> #define DA8XX_CFGCHIP0_REG 0x17c
> #define DA8XX_CFGCHIP1_REG 0x180
> @@ -79,6 +81,8 @@ extern unsigned int da850_max_speed;
> #define DA8XX_AEMIF_CTL_BASE 0x68000000
> #define DA8XX_SHARED_RAM_BASE 0x80000000
> #define DA8XX_ARM_RAM_BASE 0xffff0000
> +#define DA8XX_DDR_CTL_BASE 0xB0000000
> +#define DA8XX_PBBPR_REG 0x00000020
>
> void da830_init(void);
> void da850_init(void);
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH] ARM: dts: armada-xp-rn2120: add pinmuxing for ethernet
From: Uwe Kleine-König @ 2016-09-29 19:00 UTC (permalink / raw)
To: linux-arm-kernel
Up to now working ethernet depended on the bootloader to configure the
pinmuxing. Make it explicit.
As a side effect this change makes ethernet work in barebox.
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
index 3e930fdbaabc..b6bf5344fbbe 100644
--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -164,12 +164,18 @@
};
ethernet at 70000 {
+ pinctrl-0 = <&ge0_rgmii_pins>;
+ pinctrl-names = "default";
+
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet at 74000 {
+ pinctrl-0 = <&ge1_rgmii_pins>;
+ pinctrl-names = "default";
+
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
--
2.9.3
^ permalink raw reply related
* [PATCH 4/6] ARM: dts: da850-lcdk: add support for 1024x768 resolution
From: Karl Beldan @ 2016-09-29 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475166715-7857-5-git-send-email-bgolaszewski@baylibre.com>
Hi,
On Thu, Sep 29, 2016 at 06:31:53PM +0200, Bartosz Golaszewski wrote:
> Add svga timings for 1024x768 resolution to the da850-lcdk
> device tree.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/boot/dts/da850-lcdk.dts | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
> index 6ca5d48..6e4288c 100644
> --- a/arch/arm/boot/dts/da850-lcdk.dts
> +++ b/arch/arm/boot/dts/da850-lcdk.dts
> @@ -70,8 +70,8 @@
> };
>
> display-timings {
> - native-mode = <&svga_timings>;
> - svga_timings: 800x600 {
> + native-mode = <&svga_timing0>;
> + svga_timing0: 800x600 {
> clock-frequency = <37500000>;
> hactive = <800>;
> hback-porch = <140>;
> @@ -82,6 +82,17 @@
> vfront-porch = <1>;
> vsync-len = <4>;
> };
> + svga_timing1: 1024x768 {
> + clock-frequency = <72000000>;
> + hactive = <1024>;
> + hback-porch = <140>;
> + hfront-porch = <40>;
> + hsync-len = <128>;
> + vactive = <768>;
> + vback-porch = <23>;
> + vfront-porch = <1>;
> + vsync-len = <4>;
> + };
Why do you also call 1024x768 svga ?
I don't think the LCDK can cope with this resolution at this frequency
(in terms of mem bandwidth), at least that's what I observed back in
August. If confirmed I think it is worth mentioning in the log at least,
but then I doubt adding this config would be useful.
Regards,
Karl
> };
> };
> };
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH] ARM: dts: armada-xp-rn2120: drop wrong compatible for i2c0
From: Uwe Kleine-König @ 2016-09-29 18:52 UTC (permalink / raw)
To: linux-arm-kernel
The compatible is supposed to be "marvell,mv78230-i2c", "marvell,mv64xxx-i2c",
as provided by armada-xp.dtsi.
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
index d19f44c70925..3e930fdbaabc 100644
--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -97,7 +97,6 @@
};
i2c at 11000 {
- compatible = "marvell,mv64xxx-i2c";
clock-frequency = <400000>;
status = "okay";
--
2.9.3
^ permalink raw reply related
* next-20160929 build: 2 failures 4 warnings (next-20160929)
From: Mark Brown @ 2016-09-29 18:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1bpZhb-0002Oz-OQ@optimist>
On Thu, Sep 29, 2016 at 12:40:35PM +0100, Build bot for Mark Brown wrote:
For the past couple of days -next has been failing to build an ARM
allmodconfig due to:
> arm-allmodconfig
> ERROR: "__aeabi_uldivmod" [net/netfilter/xt_hashlimit.ko] undefined!
which appears to be triggered by 11d5f15723c9 (netfilter: xt_hashlimit:
Create revision 2 to support higher pps rates) introducing a division of
a 64 bit number which should be done using do_div().
-------------- next part --------------
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^ permalink raw reply
* [PATCH 3/6] ARM: dts: da850-lcdk: enable the LCD controller
From: Karl Beldan @ 2016-09-29 18:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475166715-7857-4-git-send-email-bgolaszewski@baylibre.com>
Hi,
On Thu, Sep 29, 2016 at 06:31:52PM +0200, Bartosz Golaszewski wrote:
> From: Karl Beldan <kbeldan@baylibre.com>
>
> This adds the pins used by the LCD controller, and uses 'tilcdc,panel'
> with some default timings for 800x600.
>
> Tested on an LCDK connected on the VGA port (the LCDC is connected to
> this port via a THS8135).
>
> Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
> [Bartosz:
> - fixed whitespace errors
> - tweaked the description
The description tweak you mention is the removal of an erratum which is
in the mentioned commit I put on github @
(https://github.com/kbeldan/linux/commit/b7720bc983c00a083dece119f68ea9d2f522c6c4)
it included an erratum wrt FIFO threshold I think is worth keeping:
{
There is an erratum (fifo-th) "LCDC: Underflow During Initialization":
[...]
"This problem may occur if the LCDC FIFO threshold size (
LCDDMA_CTRL[TH_FIFO_READY]) is left at its default value after reset.
Increasing the FIFO threshold size will reduce or eliminate underflows.
Setting the threshold size to 256 double words or larger is
recommended."
}
> - fixed the incorrect hback-porch value
It can't be a fix, this value depends on the monitor connected.
> - other minor tweaks]
I didn't see any other change while diffing.
Regards,
Karl Beldan
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/boot/dts/da850-lcdk.dts | 60 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 60 insertions(+)
>
> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
> index 7b8ab21..6ca5d48 100644
> --- a/arch/arm/boot/dts/da850-lcdk.dts
> +++ b/arch/arm/boot/dts/da850-lcdk.dts
> @@ -50,6 +50,40 @@
> system-clock-frequency = <24576000>;
> };
> };
> +
> + panel {
> + compatible = "ti,tilcdc,panel";
> + pinctrl-names = "default";
> + pinctrl-0 = <&lcd_pins>;
> + status = "okay";
> +
> + panel-info {
> + ac-bias = <0>;
> + ac-bias-intrpt = <0>;
> + dma-burst-sz = <16>;
> + bpp = <16>;
> + fdd = <255>;
> + sync-edge = <0>;
> + sync-ctrl = <0>;
> + raster-order = <0>;
> + fifo-th = <5>;
> + };
> +
> + display-timings {
> + native-mode = <&svga_timings>;
> + svga_timings: 800x600 {
> + clock-frequency = <37500000>;
> + hactive = <800>;
> + hback-porch = <140>;
> + hfront-porch = <40>;
> + hsync-len = <128>;
> + vactive = <600>;
> + vback-porch = <23>;
> + vfront-porch = <1>;
> + vsync-len = <4>;
> + };
> + };
> + };
> };
>
> &pmx_core {
> @@ -84,6 +118,28 @@
> 0x30 0x01100000 0x0ff00000
> >;
> };
> +
> + lcd_pins: pinmux_lcd_pins {
> + pinctrl-single,bits = <
> + /*
> + * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
> + * LCD_D[6], LCD_D[7]
> + */
> + 0x40 0x22222200 0xffffff00
> + /*
> + * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
> + * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
> + */
> + 0x44 0x22222222 0xffffffff
> + /* LCD_D[8], LCD_D[9] */
> + 0x48 0x00000022 0x000000ff
> +
> + /* LCD_PCLK */
> + 0x48 0x02000000 0x0f000000
> + /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
> + 0x4c 0x02000022 0x0f0000ff
> + >;
> + };
> };
>
> &serial2 {
> @@ -219,3 +275,7 @@
> };
> };
> };
> +
> +&lcdc {
> + status = "okay";
> +};
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 2/2] ARM: dts: armada-370-rn104: drop specification of compatible for i2c0
From: Uwe Kleine-König @ 2016-09-29 18:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475173326-24673-1-git-send-email-uwe@kleine-koenig.org>
The compatible string is already provided by armada-370.dtsi.
Signed-off-by: Uwe Kleine-K?nig <uwe@kleine-koenig.org>
---
arch/arm/boot/dts/armada-370-netgear-rn104.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index d44a850d879c..14c379699350 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -126,7 +126,6 @@
};
i2c at 11000 {
- compatible = "marvell,mv64xxx-i2c";
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>;
--
2.8.1
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: armada-370-rn104: add pinmuxing for i2c0
From: Uwe Kleine-König @ 2016-09-29 18:22 UTC (permalink / raw)
To: linux-arm-kernel
Up to now a working i2c bus depended on the bootloader to configure the
pinmuxing. Make it explicit.
As a side effect this change makes i2c work in barebox.
Signed-off-by: Uwe Kleine-K?nig <uwe@kleine-koenig.org>
---
arch/arm/boot/dts/armada-370-netgear-rn104.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index 11565752b9f6..d44a850d879c 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -128,6 +128,10 @@
i2c at 11000 {
compatible = "marvell,mv64xxx-i2c";
clock-frequency = <100000>;
+
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
isl12057: isl12057 at 68 {
--
2.8.1
^ permalink raw reply related
* [PATCH][V2] dmaengine: coh901318: fix integer overflow when shifting more than 32 places
From: Colin King @ 2016-09-29 18:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Colin Ian King <colin.king@canonical.com>
Currently U300_DMA_CHANNELS is set to 40, meaning that the shift of 1 can
be more than 32 places, which leads to a 32 bit integer overflow. Fix this
by using 1ULL instead of 1 before shifting it. Also add braces on the
for-loop to keep with coding style conventions.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
drivers/dma/coh901318.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 2835f3e..74794c9 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -1352,9 +1352,10 @@ static ssize_t coh901318_debugfs_read(struct file *file, char __user *buf,
tmp += sprintf(tmp, "DMA -- enabled dma channels\n");
- for (i = 0; i < U300_DMA_CHANNELS; i++)
- if (started_channels & (1 << i))
+ for (i = 0; i < U300_DMA_CHANNELS; i++) {
+ if (started_channels & (1ULL << i))
tmp += sprintf(tmp, "channel %d\n", i);
+ }
tmp += sprintf(tmp, "Pool alloc nbr %d\n", pool_count);
--
2.9.3
^ permalink raw reply related
* [PATCH] dmaengine: coh901318: fix integer overflow when shifting more than 32 places
From: Joe Perches @ 2016-09-29 18:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929175725.14157-1-colin.king@canonical.com>
On Thu, 2016-09-29 at 18:57 +0100, Colin King wrote:
> Currently U300_DMA_CHANNELS is set to 40, meaning that the shift of 1 can
> be more than 32 places, which leads to a 32 bit integer overflow. Fix this
> by casting 1 to a u64 (the same type as started_channels) before shifting
> it.
trivia:
> diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
[]
> @@ -1353,7 +1353,7 @@ static ssize_t coh901318_debugfs_read(struct file *file, char __user *buf,
> ? tmp += sprintf(tmp, "DMA -- enabled dma channels\n");
> ?
> ? for (i = 0; i < U300_DMA_CHANNELS; i++)
> - if (started_channels & (1 << i))
> + if (started_channels & ((u64)1 << i))
Using
if (started_channels & (1ULL << i))
would be more common.
It's also how started_channel bits are set and cleared later in the file.
And maybe the for loop should use braces.
^ permalink raw reply
* [PATCH] dmaengine: coh901318: fix integer overflow when shifting more than 32 places
From: Colin King @ 2016-09-29 17:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Colin Ian King <colin.king@canonical.com>
Currently U300_DMA_CHANNELS is set to 40, meaning that the shift of 1 can
be more than 32 places, which leads to a 32 bit integer overflow. Fix this
by casting 1 to a u64 (the same type as started_channels) before shifting
it.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
drivers/dma/coh901318.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 2835f3e..98611e3 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -1353,7 +1353,7 @@ static ssize_t coh901318_debugfs_read(struct file *file, char __user *buf,
tmp += sprintf(tmp, "DMA -- enabled dma channels\n");
for (i = 0; i < U300_DMA_CHANNELS; i++)
- if (started_channels & (1 << i))
+ if (started_channels & ((u64)1 << i))
tmp += sprintf(tmp, "channel %d\n", i);
tmp += sprintf(tmp, "Pool alloc nbr %d\n", pool_count);
--
2.9.3
^ permalink raw reply related
* [PATCH 1/1] crypto: atmel-aes: add support to the XTS mode
From: Stephan Mueller @ 2016-09-29 17:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4bf386be2805a97c59defcd24ee9fb56f190b901.1475167690.git.cyrille.pitchen@atmel.com>
Am Donnerstag, 29. September 2016, 18:49:07 CEST schrieb Cyrille Pitchen:
Hi Cyrille,
> This patch adds the xts(aes) algorithm, which is supported from
> hardware version 0x500 and above (sama5d2x).
>
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
> ---
> drivers/crypto/atmel-aes-regs.h | 4 +
> drivers/crypto/atmel-aes.c | 186
> ++++++++++++++++++++++++++++++++++++++-- 2 files changed, 184
> insertions(+), 6 deletions(-)
>
> diff --git a/drivers/crypto/atmel-aes-regs.h
> b/drivers/crypto/atmel-aes-regs.h index 6c2951bb70b1..0ec04407b533 100644
> --- a/drivers/crypto/atmel-aes-regs.h
> +++ b/drivers/crypto/atmel-aes-regs.h
> @@ -28,6 +28,7 @@
> #define AES_MR_OPMOD_CFB (0x3 << 12)
> #define AES_MR_OPMOD_CTR (0x4 << 12)
> #define AES_MR_OPMOD_GCM (0x5 << 12)
> +#define AES_MR_OPMOD_XTS (0x6 << 12)
> #define AES_MR_LOD (0x1 << 15)
> #define AES_MR_CFBS_MASK (0x7 << 16)
> #define AES_MR_CFBS_128b (0x0 << 16)
> @@ -67,6 +68,9 @@
> #define AES_CTRR 0x98
> #define AES_GCMHR(x) (0x9c + ((x) * 0x04))
>
> +#define AES_TWR(x) (0xc0 + ((x) * 0x04))
> +#define AES_ALPHAR(x) (0xd0 + ((x) * 0x04))
> +
> #define AES_HW_VERSION 0xFC
>
> #endif /* __ATMEL_AES_REGS_H__ */
> diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
> index 1d9e7bd3f377..b14c10e98a06 100644
> --- a/drivers/crypto/atmel-aes.c
> +++ b/drivers/crypto/atmel-aes.c
> @@ -68,6 +68,7 @@
> #define AES_FLAGS_CFB8 (AES_MR_OPMOD_CFB | AES_MR_CFBS_8b)
> #define AES_FLAGS_CTR AES_MR_OPMOD_CTR
> #define AES_FLAGS_GCM AES_MR_OPMOD_GCM
> +#define AES_FLAGS_XTS AES_MR_OPMOD_XTS
>
> #define AES_FLAGS_MODE_MASK (AES_FLAGS_OPMODE_MASK | \
> AES_FLAGS_ENCRYPT | \
> @@ -89,6 +90,7 @@ struct atmel_aes_caps {
> bool has_cfb64;
> bool has_ctr32;
> bool has_gcm;
> + bool has_xts;
> u32 max_burst_size;
> };
>
> @@ -135,6 +137,12 @@ struct atmel_aes_gcm_ctx {
> atmel_aes_fn_t ghash_resume;
> };
>
> +struct atmel_aes_xts_ctx {
> + struct atmel_aes_base_ctx base;
> +
> + u32 key2[AES_KEYSIZE_256 / sizeof(u32)];
> +};
> +
> struct atmel_aes_reqctx {
> unsigned long mode;
> };
> @@ -282,6 +290,20 @@ static const char *atmel_aes_reg_name(u32 offset, char
> *tmp, size_t sz) snprintf(tmp, sz, "GCMHR[%u]", (offset - AES_GCMHR(0)) >>
> 2);
> break;
>
> + case AES_TWR(0):
> + case AES_TWR(1):
> + case AES_TWR(2):
> + case AES_TWR(3):
> + snprintf(tmp, sz, "TWR[%u]", (offset - AES_TWR(0)) >> 2);
> + break;
> +
> + case AES_ALPHAR(0):
> + case AES_ALPHAR(1):
> + case AES_ALPHAR(2):
> + case AES_ALPHAR(3):
> + snprintf(tmp, sz, "ALPHAR[%u]", (offset - AES_ALPHAR(0)) >> 2);
> + break;
> +
> default:
> snprintf(tmp, sz, "0x%02x", offset);
> break;
> @@ -453,15 +475,15 @@ static inline int atmel_aes_complete(struct
> atmel_aes_dev *dd, int err) return err;
> }
>
> -static void atmel_aes_write_ctrl(struct atmel_aes_dev *dd, bool use_dma,
> - const u32 *iv)
> +static void atmel_aes_write_ctrl_key(struct atmel_aes_dev *dd, bool
> use_dma, + const u32 *iv, const u32 *key, int keylen)
> {
> u32 valmr = 0;
>
> /* MR register must be set before IV registers */
> - if (dd->ctx->keylen == AES_KEYSIZE_128)
> + if (keylen == AES_KEYSIZE_128)
> valmr |= AES_MR_KEYSIZE_128;
> - else if (dd->ctx->keylen == AES_KEYSIZE_192)
> + else if (keylen == AES_KEYSIZE_192)
> valmr |= AES_MR_KEYSIZE_192;
> else
> valmr |= AES_MR_KEYSIZE_256;
> @@ -478,13 +500,19 @@ static void atmel_aes_write_ctrl(struct atmel_aes_dev
> *dd, bool use_dma,
>
> atmel_aes_write(dd, AES_MR, valmr);
>
> - atmel_aes_write_n(dd, AES_KEYWR(0), dd->ctx->key,
> - SIZE_IN_WORDS(dd->ctx->keylen));
> + atmel_aes_write_n(dd, AES_KEYWR(0), key, SIZE_IN_WORDS(keylen));
>
> if (iv && (valmr & AES_MR_OPMOD_MASK) != AES_MR_OPMOD_ECB)
> atmel_aes_write_block(dd, AES_IVR(0), iv);
> }
>
> +static inline void atmel_aes_write_ctrl(struct atmel_aes_dev *dd, bool
> use_dma, + const u32 *iv)
> +
> +{
> + atmel_aes_write_ctrl_key(dd, use_dma, iv,
> + dd->ctx->key, dd->ctx->keylen);
> +}
>
> /* CPU transfer */
>
> @@ -1769,6 +1797,139 @@ static struct aead_alg aes_gcm_alg = {
> };
>
>
> +/* xts functions */
> +
> +static inline struct atmel_aes_xts_ctx *
> +atmel_aes_xts_ctx_cast(struct atmel_aes_base_ctx *ctx)
> +{
> + return container_of(ctx, struct atmel_aes_xts_ctx, base);
> +}
> +
> +static int atmel_aes_xts_process_data(struct atmel_aes_dev *dd);
> +
> +static int atmel_aes_xts_start(struct atmel_aes_dev *dd)
> +{
> + struct atmel_aes_xts_ctx *ctx = atmel_aes_xts_ctx_cast(dd->ctx);
> + struct ablkcipher_request *req = ablkcipher_request_cast(dd->areq);
> + struct atmel_aes_reqctx *rctx = ablkcipher_request_ctx(req);
> + unsigned long flags;
> + int err;
> +
> + atmel_aes_set_mode(dd, rctx);
> +
> + err = atmel_aes_hw_init(dd);
> + if (err)
> + return atmel_aes_complete(dd, err);
> +
> + /* Compute the tweak value from req->info with ecb(aes). */
> + flags = dd->flags;
> + dd->flags &= ~AES_FLAGS_MODE_MASK;
> + dd->flags |= (AES_FLAGS_ECB | AES_FLAGS_ENCRYPT);
> + atmel_aes_write_ctrl_key(dd, false, NULL,
> + ctx->key2, ctx->base.keylen);
> + dd->flags = flags;
> +
> + atmel_aes_write_block(dd, AES_IDATAR(0), req->info);
> + return atmel_aes_wait_for_data_ready(dd, atmel_aes_xts_process_data);
> +}
> +
> +static int atmel_aes_xts_process_data(struct atmel_aes_dev *dd)
> +{
> + struct ablkcipher_request *req = ablkcipher_request_cast(dd->areq);
> + bool use_dma = (req->nbytes >= ATMEL_AES_DMA_THRESHOLD);
> + u32 tweak[AES_BLOCK_SIZE / sizeof(u32)];
> + static const u32 one[AES_BLOCK_SIZE / sizeof(u32)] = {cpu_to_le32(1), };
> + u8 *tweak_bytes = (u8 *)tweak;
> + int i;
> +
> + /* Read the computed ciphered tweak value. */
> + atmel_aes_read_block(dd, AES_ODATAR(0), tweak);
> + /*
> + * Hardware quirk:
> + * the order of the ciphered tweak bytes need to be reverted before
> + * writing them into the ODATARx registers.
> + */
> + for (i = 0; i < AES_BLOCK_SIZE/2; ++i) {
> + u8 tmp = tweak_bytes[AES_BLOCK_SIZE - 1 - i];
> +
> + tweak_bytes[AES_BLOCK_SIZE - 1 - i] = tweak_bytes[i];
> + tweak_bytes[i] = tmp;
> + }
> +
> + /* Process the data. */
> + atmel_aes_write_ctrl(dd, use_dma, NULL);
> + atmel_aes_write_block(dd, AES_TWR(0), tweak);
> + atmel_aes_write_block(dd, AES_ALPHAR(0), one);
> + if (use_dma)
> + return atmel_aes_dma_start(dd, req->src, req->dst, req->nbytes,
> + atmel_aes_transfer_complete);
> +
> + return atmel_aes_cpu_start(dd, req->src, req->dst, req->nbytes,
> + atmel_aes_transfer_complete);
> +}
> +
> +static int atmel_aes_xts_setkey(struct crypto_ablkcipher *tfm, const u8
> *key, + unsigned int keylen)
> +{
> + struct atmel_aes_xts_ctx *ctx = crypto_ablkcipher_ctx(tfm);
> +
> + if (keylen != AES_KEYSIZE_128 * 2 &&
> + keylen != AES_KEYSIZE_192 * 2 &&
> + keylen != AES_KEYSIZE_256 * 2) {
> + crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
> + return -EINVAL;
> + }
Please use xts_check_key as a replacement for this code.
> +
> + memcpy(ctx->base.key, key, keylen/2);
> + memcpy(ctx->key2, key + keylen/2, keylen/2);
> + ctx->base.keylen = keylen/2;
> +
> + return 0;
> +}
> +
> +static int atmel_aes_xts_encrypt(struct ablkcipher_request *req)
> +{
> + return atmel_aes_crypt(req, AES_FLAGS_XTS | AES_FLAGS_ENCRYPT);
> +}
> +
> +static int atmel_aes_xts_decrypt(struct ablkcipher_request *req)
> +{
> + return atmel_aes_crypt(req, AES_FLAGS_XTS);
> +}
> +
> +static int atmel_aes_xts_cra_init(struct crypto_tfm *tfm)
> +{
> + struct atmel_aes_xts_ctx *ctx = crypto_tfm_ctx(tfm);
> +
> + tfm->crt_ablkcipher.reqsize = sizeof(struct atmel_aes_reqctx);
> + ctx->base.start = atmel_aes_xts_start;
> +
> + return 0;
> +}
> +
> +static struct crypto_alg aes_xts_alg = {
> + .cra_name = "xts(aes)",
> + .cra_driver_name = "atmel-xts-aes",
> + .cra_priority = ATMEL_AES_PRIORITY,
> + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
> + .cra_blocksize = AES_BLOCK_SIZE,
> + .cra_ctxsize = sizeof(struct atmel_aes_xts_ctx),
> + .cra_alignmask = 0xf,
> + .cra_type = &crypto_ablkcipher_type,
> + .cra_module = THIS_MODULE,
> + .cra_init = atmel_aes_xts_cra_init,
> + .cra_exit = atmel_aes_cra_exit,
> + .cra_u.ablkcipher = {
> + .min_keysize = 2 * AES_MIN_KEY_SIZE,
> + .max_keysize = 2 * AES_MAX_KEY_SIZE,
> + .ivsize = AES_BLOCK_SIZE,
> + .setkey = atmel_aes_xts_setkey,
> + .encrypt = atmel_aes_xts_encrypt,
> + .decrypt = atmel_aes_xts_decrypt,
> + }
> +};
> +
> +
> /* Probe functions */
>
> static int atmel_aes_buff_init(struct atmel_aes_dev *dd)
> @@ -1877,6 +2038,9 @@ static void atmel_aes_unregister_algs(struct
> atmel_aes_dev *dd) {
> int i;
>
> + if (dd->caps.has_xts)
> + crypto_unregister_alg(&aes_xts_alg);
> +
> if (dd->caps.has_gcm)
> crypto_unregister_aead(&aes_gcm_alg);
>
> @@ -1909,8 +2073,16 @@ static int atmel_aes_register_algs(struct
> atmel_aes_dev *dd) goto err_aes_gcm_alg;
> }
>
> + if (dd->caps.has_xts) {
> + err = crypto_register_alg(&aes_xts_alg);
> + if (err)
> + goto err_aes_xts_alg;
> + }
> +
> return 0;
>
> +err_aes_xts_alg:
> + crypto_unregister_aead(&aes_gcm_alg);
> err_aes_gcm_alg:
> crypto_unregister_alg(&aes_cfb64_alg);
> err_aes_cfb64_alg:
> @@ -1928,6 +2100,7 @@ static void atmel_aes_get_cap(struct atmel_aes_dev
> *dd) dd->caps.has_cfb64 = 0;
> dd->caps.has_ctr32 = 0;
> dd->caps.has_gcm = 0;
> + dd->caps.has_xts = 0;
> dd->caps.max_burst_size = 1;
>
> /* keep only major version number */
> @@ -1937,6 +2110,7 @@ static void atmel_aes_get_cap(struct atmel_aes_dev
> *dd) dd->caps.has_cfb64 = 1;
> dd->caps.has_ctr32 = 1;
> dd->caps.has_gcm = 1;
> + dd->caps.has_xts = 1;
> dd->caps.max_burst_size = 4;
> break;
> case 0x200:
Ciao
Stephan
^ permalink raw reply
* [PATCH v19 05/12] fpga-mgr: add fpga image information struct
From: Michal Simek @ 2016-09-29 17:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANk1AXTbKhiSu3XN4HgTM_rBBQ315qseH06RzojOOZrV74M7yQ@mail.gmail.com>
On 28.9.2016 21:34, Alan Tull wrote:
> On Wed, Sep 28, 2016 at 6:41 PM, Moritz Fischer
> <moritz.fischer@ettus.com> wrote:
> Hi Moritz,
>
>> Hi Alan,
>>
>> generally ok with the change.
>
> Cool!
>
>>
>> On Wed, Sep 28, 2016 at 11:21 AM, Alan Tull <atull@opensource.altera.com> wrote:
>>
>>> -int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
>>> - size_t count)
>>> +int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
>>> + const char *buf, size_t count)
>>
>> Doesn't this break the both socfpga and zynq if [6/12] and [7/12] are
>> not part of this commit?
>> i.e shouldn't 5,6 and 7 be a single commit?
>
> Yeah, squashing those would improve bisectability.
Improve? :-)
Definitely this needs to be the part of this commit.
M
^ permalink raw reply
* [PATCH] drm/sun4i: rgb: Enable panel after controller
From: Sean Paul @ 2016-09-29 17:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929120445.GQ4189@lukather>
On Thu, Sep 29, 2016 at 8:04 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi,
>
> On Tue, Sep 27, 2016 at 10:42:09AM -0400, Sean Paul wrote:
>> As an aside, it seems like (from the diff, I haven't looked at the
>> code) the bridge_pre_enable and bridge_post_disable calls are missing,
>> and the enable/disable calls are in the wrong place.
>
> Actually, I don't even think that's necessary. The atomic helpers
> already call drm_bridge_pre_enable and drm_bridge_enable at the right
> time. So I guess the proper fix would be to just remove the driver's
> call to drm_bridge_enable.
>
Yeah, that sounds good to me. I suppose this is one of the wonderful
ways that drm_bridge and drm_panel differ :-)
Sean
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
^ permalink raw reply
* [PATCH] arm64: KVM: Take S1 walks into account when determining S2 write faults
From: Mark Rutland @ 2016-09-29 17:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475149021-13288-1-git-send-email-will.deacon@arm.com>
[Adding Julien, who seemed to be missing from the real Cc list]
Mark.
On Thu, Sep 29, 2016 at 12:37:01PM +0100, Will Deacon wrote:
> The WnR bit in the HSR/ESR_EL2 indicates whether a data abort was
> generated by a read or a write instruction. For stage 2 data aborts
> generated by a stage 1 translation table walk (i.e. the actual page
> table access faults at EL2), the WnR bit therefore reports whether the
> instruction generating the walk was a load or a store, *not* whether the
> page table walker was reading or writing the entry.
>
> For page tables marked as read-only at stage 2 (e.g. due to KSM merging
> them with the tables from another guest), this could result in livelock,
> where a page table walk generated by a load instruction attempts to
> set the access flag in the stage 1 descriptor, but fails to trigger
> CoW in the host since only a read fault is reported.
>
> This patch modifies the arm64 kvm_vcpu_dabt_iswrite function to
> take into account stage 2 faults in stage 1 walks. Since DBM cannot be
> disabled at EL2 for CPUs that implement it, we assume that these faults
> are always causes by writes, avoiding the livelock situation at the
> expense of occasional, spurious CoWs.
>
> We could, in theory, do a bit better by checking the guest TCR
> configuration and inspecting the page table to see why the PTE faulted.
> However, I doubt this is measurable in practice, and the threat of
> livelock is real.
>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Christoffer Dall <christoffer.dall@linaro.org>
> Cc: Julien Grall <julien.grall@arm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm64/include/asm/kvm_emulate.h | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
> index 4cdeae3b17c6..948a9a8a9297 100644
> --- a/arch/arm64/include/asm/kvm_emulate.h
> +++ b/arch/arm64/include/asm/kvm_emulate.h
> @@ -167,11 +167,6 @@ static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu)
> return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_ISV);
> }
>
> -static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu)
> -{
> - return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR);
> -}
> -
> static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu)
> {
> return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SSE);
> @@ -192,6 +187,12 @@ static inline bool kvm_vcpu_dabt_iss1tw(const struct kvm_vcpu *vcpu)
> return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_S1PTW);
> }
>
> +static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu)
> +{
> + return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR) ||
> + kvm_vcpu_dabt_iss1tw(vcpu); /* AF/DBM update */
> +}
> +
> static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu)
> {
> return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_CM);
> --
> 2.1.4
>
> _______________________________________________
> kvmarm mailing list
> kvmarm at lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
>
^ permalink raw reply
* [GIT PULL 00/27] perf/core improvements and fixes
From: Ingo Molnar @ 2016-09-29 17:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475159756-21326-1-git-send-email-acme@kernel.org>
* Arnaldo Carvalho de Melo <acme@kernel.org> wrote:
> Hi Ingo,
>
> Please consider pulling, more to come soon,
>
> - Arnaldo
>
> Build and test results at the end of this message.
>
> The following changes since commit 6b652de2b27c0a4020ce0e8f277e782b6af76096:
>
> Merge tag 'perf-core-for-mingo-20160922' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core (2016-09-23 07:21:38 +0200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git tags/perf-core-for-mingo-20160929
>
> for you to fetch changes up to d18019a53a07e009899ff6b8dc5ec30f249360d9:
>
> perf tests: Add dwarf unwind test for powerpc (2016-09-29 11:18:21 -0300)
>
> ----------------------------------------------------------------
> perf/core improvements and fixes:
>
> User visible:
> -------------
>
> New features:
>
> - Add support for using symbols in address filters with Intel PT and ARM
> CoreSight (hardware assisted tracing facilities) (Adrian Hunter, Mathieu Poirier)
>
> Fixes:
>
> - Fix MMAP event synthesis for pre-existing threads when no hugetlbfs
> mount is in place (Adrian Hunter)
>
> - Don't ignore kernel idle symbols in 'perf script' (Adrian Hunter)
>
> - Assorted Intel PT fixes (Adrian Hunter)
>
> Improvements:
>
> - Fix handling of C++ symbols in 'perf probe' (Masami Hiramatsu)
>
> - Beautify sched_[gs]et_attr return value in 'perf trace' (Arnaldo Carvalho de Melo)
>
> Infrastructure:
> ---------------
>
> New features:
>
> - Add dwarf unwind 'perf test' for powerpc (Ravi Bangoria)
>
> Fixes:
>
> - Fix error paths in 'perf record' (Adrian Hunter)
>
> Documentation:
>
> - Update documentation info about quipper, a C++ parser for converting
> to/from perf.data/chromium profiling format (Simon Que)
>
> Build Fixes:
>
> Fix building in 32 bit platform with libbabeltrace (Wang Nan)
>
> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
>
> ----------------------------------------------------------------
> Adrian Hunter (16):
> perf record: Fix documentation 'event_sources' -> 'event_source'
> perf tools: Fix MMAP event synthesis broken by MAP_HUGETLB change
> perf script: Fix vanished idle symbols
> perf record: Rename label 'out_symbol_exit'
> perf record: Fix error paths
> perf symbols: Add dso__last_symbol()
> perf record: Add support for using symbols in address filters
> perf probe: Increase debug level of SDT debug messages
> perf intel-pt: Fix snapshot overlap detection decoder errors
> perf intel-pt: Add support for recording the max non-turbo ratio
> perf intel-pt: Fix missing error codes processing auxtrace_info
> perf intel-pt: Add a helper function for processing AUXTRACE_INFO
> perf intel-pt: Record address filter in AUXTRACE_INFO event
> perf intel-pt: Read address filter from AUXTRACE_INFO event
> perf intel-pt: Enable decoder to handle TIP.PGD with missing IP
> perf intel-pt: Fix decoding when there are address filters
>
> Arnaldo Carvalho de Melo (1):
> perf trace: Beautify sched_[gs]et_attr return value
>
> Masami Hiramatsu (4):
> perf probe: Ignore the error of finding inline instance
> perf probe: Skip if the function address is 0
> perf probe: Fix to cut off incompatible chars from group name
> perf probe: Match linkage name with mangled name
>
> Mathieu Poirier (3):
> perf tools: Make perf_evsel__append_filter() generic
> perf evsel: New tracepoint specific function
> perf evsel: Add support for address filters
>
> Ravi Bangoria (1):
> perf tests: Add dwarf unwind test for powerpc
>
> Simon Que (1):
> perf tools: Update documentation info about quipper
>
> Wang Nan (1):
> perf data: Fix building in 32 bit platform with libbabeltrace
>
> tools/perf/Documentation/perf-record.txt | 61 +-
> tools/perf/Documentation/perf.data-file-format.txt | 6 +-
> tools/perf/arch/powerpc/Build | 1 +
> tools/perf/arch/powerpc/include/arch-tests.h | 13 +
> tools/perf/arch/powerpc/include/perf_regs.h | 2 +
> tools/perf/arch/powerpc/tests/Build | 4 +
> tools/perf/arch/powerpc/tests/arch-tests.c | 15 +
> tools/perf/arch/powerpc/tests/dwarf-unwind.c | 62 ++
> tools/perf/arch/powerpc/tests/regs_load.S | 94 +++
> tools/perf/arch/x86/util/intel-pt.c | 57 +-
> tools/perf/builtin-record.c | 32 +-
> tools/perf/builtin-trace.c | 10 +-
> tools/perf/tests/Build | 2 +-
> tools/perf/tests/dwarf-unwind.c | 2 +-
> tools/perf/util/auxtrace.c | 737 +++++++++++++++++++++
> tools/perf/util/auxtrace.h | 54 ++
> tools/perf/util/build-id.c | 4 +-
> tools/perf/util/data-convert-bt.c | 2 +-
> tools/perf/util/dwarf-aux.c | 28 +-
> tools/perf/util/dwarf-aux.h | 3 +
> tools/perf/util/event.c | 3 +-
> tools/perf/util/evsel.c | 16 +-
> tools/perf/util/evsel.h | 5 +-
> tools/perf/util/evsel_fprintf.c | 7 +-
> .../perf/util/intel-pt-decoder/intel-pt-decoder.c | 30 +
> .../perf/util/intel-pt-decoder/intel-pt-decoder.h | 1 +
> tools/perf/util/intel-pt.c | 172 ++++-
> tools/perf/util/intel-pt.h | 4 +-
> tools/perf/util/parse-events.c | 41 +-
> tools/perf/util/probe-event.c | 10 +-
> tools/perf/util/probe-file.c | 2 +-
> tools/perf/util/probe-finder.c | 17 +-
> tools/perf/util/symbol.c | 15 +
> tools/perf/util/symbol.h | 1 +
> 34 files changed, 1451 insertions(+), 62 deletions(-)
> create mode 100644 tools/perf/arch/powerpc/include/arch-tests.h
> create mode 100644 tools/perf/arch/powerpc/tests/Build
> create mode 100644 tools/perf/arch/powerpc/tests/arch-tests.c
> create mode 100644 tools/perf/arch/powerpc/tests/dwarf-unwind.c
> create mode 100644 tools/perf/arch/powerpc/tests/regs_load.S
>
> # time dm
> 1 alpine:3.4: Ok
> 2 android-ndk:r12b-arm: Ok
> 3 archlinux:latest: Ok
> 4 centos:5: Ok
> 5 centos:6: Ok
> 6 centos:7: Ok
> 7 debian:7: Ok
> 8 debian:8: Ok
> 9 debian:experimental: Ok
> 10 fedora:20: Ok
> 11 fedora:21: Ok
> 12 fedora:22: Ok
> 13 fedora:23: Ok
> 14 fedora:24: Ok
> 15 fedora:24-x-ARC-uClibc: Ok
> 16 fedora:rawhide: Ok
> 17 mageia:5: Ok
> 18 opensuse:13.2: Ok
> 19 opensuse:42.1: Ok
> 20 opensuse:tumbleweed: Ok
> 21 ubuntu:12.04.5: Ok
> 22 ubuntu:14.04: Ok
> 23 ubuntu:14.04.4: Ok
> 24 ubuntu:15.10: Ok
> 25 ubuntu:16.04: Ok
> 26 ubuntu:16.04-x-arm: Ok
> 27 ubuntu:16.04-x-arm64: Ok
> 28 ubuntu:16.04-x-powerpc: Ok
> 29 ubuntu:16.04-x-powerpc64: Ok
> 30 ubuntu:16.04-x-powerpc64el: Ok
> 31 ubuntu:16.04-x-s390: Ok
> 32 ubuntu:16.10: Ok
> 33 2246.21
>
> real 37m26.862s
> user 0m2.148s
> sys 0m2.256s
> #
>
> # perf test
> 1: vmlinux symtab matches kallsyms : Ok
> 2: detect openat syscall event : Ok
> 3: detect openat syscall event on all cpus : Ok
> 4: read samples using the mmap interface : Ok
> 5: parse events tests : Ok
> 6: Validate PERF_RECORD_* events & perf_sample fields : Ok
> 7: Test perf pmu format parsing : Ok
> 8: Test dso data read : Ok
> 9: Test dso data cache : Ok
> 10: Test dso data reopen : Ok
> 11: roundtrip evsel->name check : Ok
> 12: Check parsing of sched tracepoints fields : Ok
> 13: Generate and check syscalls:sys_enter_openat event fields: Ok
> 14: struct perf_event_attr setup : Ok
> 15: Test matching and linking multiple hists : Ok
> 16: Try 'import perf' in python, checking link problems : Ok
> 17: Test breakpoint overflow signal handler : Ok
> 18: Test breakpoint overflow sampling : Ok
> 19: Test number of exit event of a simple workload : Ok
> 20: Test software clock events have valid period values : Ok
> 21: Test object code reading : Ok
> 22: Test sample parsing : Ok
> 23: Test using a dummy software event to keep tracking : Ok
> 24: Test parsing with no sample_id_all bit set : Ok
> 25: Test filtering hist entries : Ok
> 26: Test mmap thread lookup : Ok
> 27: Test thread mg sharing : Ok
> 28: Test output sorting of hist entries : Ok
> 29: Test cumulation of child hist entries : Ok
> 30: Test tracking with sched_switch : Ok
> 31: Filter fds with revents mask in a fdarray : Ok
> 32: Add fd to a fdarray, making it autogrow : Ok
> 33: Test kmod_path__parse function : Ok
> 34: Test thread map : Ok
> 35: Test LLVM searching and compiling :
> 35.1: Basic BPF llvm compiling test : Ok
> 35.2: Test kbuild searching : Ok
> 35.3: Compile source for BPF prologue generation test : Ok
> 35.4: Compile source for BPF relocation test : Ok
> 36: Test topology in session : Ok
> 37: Test BPF filter :
> 37.1: Test basic BPF filtering : Ok
> 37.2: Test BPF prologue generation : Ok
> 37.3: Test BPF relocation checker : Ok
> 38: Test thread map synthesize : Ok
> 39: Test cpu map synthesize : Ok
> 40: Test stat config synthesize : Ok
> 41: Test stat synthesize : Ok
> 42: Test stat round synthesize : Ok
> 43: Test attr update synthesize : Ok
> 44: Test events times : Ok
> 45: Test backward reading from ring buffer : Ok
> 46: Test cpu map print : Ok
> 47: Test SDT event probing : Ok
> 48: Test is_printable_array function : Ok
> 49: Test bitmap print : Ok
> 50: x86 rdpmc test : Ok
> 51: Test converting perf time to TSC : Ok
> 52: Test dwarf unwind : Ok
> 53: Test x86 instruction decoder - new instructions : Ok
> 54: Test intel cqm nmi context read : Skip
> #
>
> $ make -C tools/perf build-test
> make: Entering directory '/home/acme/git/linux/tools/perf'
> tarpkg: ./tests/perf-targz-src-pkg .
> make_debug_O: make DEBUG=1
> make_no_libnuma_O: make NO_LIBNUMA=1
> make_no_slang_O: make NO_SLANG=1
> make_no_libaudit_O: make NO_LIBAUDIT=1
> make_no_libbpf_O: make NO_LIBBPF=1
> make_install_prefix_slash_O: make install prefix=/tmp/krava/
> make_tags_O: make tags
> make_doc_O: make doc
> make_no_libunwind_O: make NO_LIBUNWIND=1
> make_install_bin_O: make install-bin
> make_no_libbionic_O: make NO_LIBBIONIC=1
> make_with_babeltrace_O: make LIBBABELTRACE=1
> make_no_demangle_O: make NO_DEMANGLE=1
> make_perf_o_O: make perf.o
> make_no_auxtrace_O: make NO_AUXTRACE=1
> make_no_scripts_O: make NO_LIBPYTHON=1 NO_LIBPERL=1
> make_pure_O: make
> make_util_map_o_O: make util/map.o
> make_no_libdw_dwarf_unwind_O: make NO_LIBDW_DWARF_UNWIND=1
> make_no_newt_O: make NO_NEWT=1
> make_no_libpython_O: make NO_LIBPYTHON=1
> make_util_pmu_bison_o_O: make util/pmu-bison.o
> make_help_O: make help
> make_install_prefix_O: make install prefix=/tmp/krava
> make_static_O: make LDFLAGS=-static
> make_no_ui_O: make NO_NEWT=1 NO_SLANG=1 NO_GTK2=1
> make_no_backtrace_O: make NO_BACKTRACE=1
> make_clean_all_O: make clean all
> make_install_O: make install
> make_no_libelf_O: make NO_LIBELF=1
> make_no_libperl_O: make NO_LIBPERL=1
> make_no_gtk2_O: make NO_GTK2=1
> make_minimal_O: make NO_LIBPERL=1 NO_LIBPYTHON=1 NO_NEWT=1 NO_GTK2=1 NO_DEMANGLE=1 NO_LIBELF=1 NO_LIBUNWIND=1 NO_BACKTRACE=1 NO_LIBNUMA=1 NO_LIBAUDIT=1 NO_LIBBIONIC=1 NO_LIBDW_DWARF_UNWIND=1 NO_AUXTRACE=1 NO_LIBBPF=1 NO_LIBCRYPTO=1 NO_SDT=1
> OK
> make: Leaving directory '/home/acme/git/linux/tools/perf'
> $
Pulled, thanks a lot Arnaldo!
Ingo
^ permalink raw reply
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