* [PATCH] clk: mvebu: armada-37xx-periph: Fix the clock provider registration
From: Stephen Boyd @ 2016-10-17 22:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929142855.30408-1-gregory.clement@free-electrons.com>
On 09/29, Gregory CLEMENT wrote:
> While trying using a peripheral clock on a driver, I saw that the clock
> pointer returned by the provider was NULL.
>
> The problem was a missing indirection. It was the pointer stored in the
> hws array which needed to be updated not the value it contains.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH] clk: mvebu: armada-37xx-periph: Fix the clock provider registration
From: Stephen Boyd @ 2016-10-17 22:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87h98ovb4i.fsf@free-electrons.com>
On 10/07, Gregory CLEMENT wrote:
> Hi Stephen and Mike
>
> On jeu., sept. 29 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
> > While trying using a peripheral clock on a driver, I saw that the clock
> > pointer returned by the provider was NULL.
> >
> > The problem was a missing indirection. It was the pointer stored in the
> > hws array which needed to be updated not the value it contains.
> >
> > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>
> I saw that you already did the pull request for the clk subsystem.
>
> Do you consider to do a another pull request for the fixes?
>
> It would be nice to have this driver working since the rc1 :)
>
> For this driver an other fix is needed:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/459640.html
>
Yep I was on vacation/conferencing during the merge window. I'll
be sending off a set of fixes in a couple days.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH] clk: core: add __init decoration for CLK_OF_DECLARE_DRIVER function
From: Stephen Boyd @ 2016-10-17 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475917178-15488-1-git-send-email-shawn.guo@linaro.org>
On 10/08, Shawn Guo wrote:
> The new introduced macro CLK_OF_DECLARE_DRIVER is usually used to
> declare clock driver init functions, which are mostly decorated with
> __init. Add __init decoration for CLK_OF_DECLARE_DRIVER function to
> avoid causing section mismatch warnings on client clock drivers.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2] clk: samsung: clk-exynos-audss: Fix module autoload
From: Stephen Boyd @ 2016-10-17 22:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476625507-21377-1-git-send-email-javier@osg.samsung.com>
On 10/16, Javier Martinez Canillas wrote:
> If the driver is built as a module, autoload won't work because the module
> alias information is not filled. So user-space can't match the registered
> device with the corresponding module.
>
> Export the module alias information using the MODULE_DEVICE_TABLE() macro.
>
> Before this patch:
>
> $ modinfo drivers/clk/samsung/clk-exynos-audss.ko | grep alias
> alias: platform:exynos-audss-clk
>
> After this patch:
>
> $ modinfo drivers/clk/samsung/clk-exynos-audss.ko | grep alias
> alias: platform:exynos-audss-clk
> alias: of:N*T*Csamsung,exynos5420-audss-clockC*
> alias: of:N*T*Csamsung,exynos5420-audss-clock
> alias: of:N*T*Csamsung,exynos5410-audss-clockC*
> alias: of:N*T*Csamsung,exynos5410-audss-clock
> alias: of:N*T*Csamsung,exynos5250-audss-clockC*
> alias: of:N*T*Csamsung,exynos5250-audss-clock
> alias: of:N*T*Csamsung,exynos4210-audss-clockC*
> alias: of:N*T*Csamsung,exynos4210-audss-clock
>
> Fixes: 4d252fd5719b ("clk: samsung: Allow modular build of the Audio Subsystem CLKCON driver")
> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> ---
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH] clk: uniphier: fix type of variable passed to regmap_read()
From: Stephen Boyd @ 2016-10-17 22:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476631555-2059-1-git-send-email-yamada.masahiro@socionext.com>
On 10/17, Masahiro Yamada wrote:
> The 3rd argument of regmap_read() takes a pointer to unsigned int.
> This driver is saved just because u32 happens to be typedef'ed as
> unsigned int, but we should not rely on that fact. Change the
> variable type just in case.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH] clk: uniphier: add system clock support for sLD3 SoC
From: Stephen Boyd @ 2016-10-17 22:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476630674-29402-1-git-send-email-yamada.masahiro@socionext.com>
On 10/17, Masahiro Yamada wrote:
> I do not know why, but I missed to add this compatible string in
> the initial commit of this driver.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 20/28] net: bcm63xx: avoid referencing uninitialized variable
From: Arnd Bergmann @ 2016-10-17 22:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161017220342.1627073-1-arnd@arndb.de>
gcc found a reference to an uninitialized variable in the error handling
of bcm_enet_open, introduced by a recent cleanup:
drivers/net/ethernet/broadcom/bcm63xx_enet.c: In function 'bcm_enet_open'
drivers/net/ethernet/broadcom/bcm63xx_enet.c:1129:2: warning: 'phydev' may be used uninitialized in this function [-Wmaybe-uninitialized]
This makes the use of that variable conditional, so we only reference it
here after it has been used before. Unlike my normal patches, I have not
build-tested this one, as I don't currently have mips test in my
randconfig setup.
Fixes: 625eb8667d6f ("net: ethernet: broadcom: bcm63xx: use phydev from struct net_device")
Cc: Philippe Reynes <tremyfr@gmail.com>
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index ae364c7..5370909 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -1126,7 +1126,8 @@ static int bcm_enet_open(struct net_device *dev)
free_irq(dev->irq, dev);
out_phy_disconnect:
- phy_disconnect(phydev);
+ if (priv->has_phy)
+ phy_disconnect(phydev);
return ret;
}
--
2.9.0
^ permalink raw reply related
* [PATCHv2 1/4] arm64: dump: Make ptdump debugfs a separate option
From: Laura Abbott @ 2016-10-17 22:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161017105252.GA29095@leverpostej>
On 10/17/2016 03:52 AM, Mark Rutland wrote:
> Hi Laura,
>
> In looking at this, I realised I was confused about ptdump_initialize()
> previously, and now see why we can't decouple the debugfs registration
> of the kernel page tables from the rest of the ptdump init. Sorry for
> the noise on that.
>
> Aside from one issue below, this looks good to me.
>
> On Wed, Oct 12, 2016 at 03:31:59PM -0700, Laura Abbott wrote:
>> diff --git a/arch/arm64/include/asm/ptdump.h b/arch/arm64/include/asm/ptdump.h
>> index 07b8ed0..7c35689 100644
>> --- a/arch/arm64/include/asm/ptdump.h
>> +++ b/arch/arm64/include/asm/ptdump.h
>> @@ -16,9 +16,10 @@
>> #ifndef __ASM_PTDUMP_H
>> #define __ASM_PTDUMP_H
>>
>> -#ifdef CONFIG_ARM64_PTDUMP
>> +#ifdef CONFIG_ARM64_PTDUMP_CORE
>>
>> #include <linux/mm_types.h>
>> +#include <linux/seq_file.h>
>>
>> struct addr_marker {
>> unsigned long start_address;
>> @@ -32,13 +33,15 @@ struct ptdump_info {
>> unsigned long max_addr;
>> };
>>
>> -int ptdump_register(struct ptdump_info *info, const char *name);
>> -
>> +void ptdump_walk_pgd(struct seq_file *s, struct ptdump_info *info);
>> +#ifdef CONFIG_ARM64_PTDUMP_DEBUGFS
>> +int ptdump_debugfs_register(struct ptdump_info *info, const char *name);
>> #else
>> -static inline int ptdump_register(struct ptdump_info *info, const char *name)
>> +static inline int ptdump_debugfs_register(struct ptdump_info *info,
>> + const char *name)
>> {
>> return 0;
>> }
>> -#endif /* CONFIG_ARM64_PTDUMP */
>> +#endif
>
> I think you didn't mean to remove the existing endif here?
>
> It's still needed to guard the CONFIG_ARM64_PTDUMP_CORE case, and the
> new one is needed for the new #ifdef CONFIG_ARM64_PTDUMP_DEBUGFS.
> Without it, I get a build error with this patch atop of v4.9-rc1 with
> CONFIG_ARM64_PTDUMP_DEBUGFS selected:
>
> [mark at leverpostej:~/src/linux]% uselinaro 15.08 make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j10 -s
> In file included from arch/arm64/mm/ptdump_debugfs.c:4:0:
> ./arch/arm64/include/asm/ptdump.h:16:0: error: unterminated #ifndef
> #ifndef __ASM_PTDUMP_H
> ^
> make[1]: *** [arch/arm64/mm/ptdump_debugfs.o] Error 1
> make[1]: *** Waiting for unfinished jobs....
>
> With that #endif restored, everything works fine. So FWIW, with that:
>
Ugh rebase/refactor failure on my part.
> Reviewed-by: Mark Rutland <mark.rutland@arm.com>
> Tested-by: Mark Rutland <mark.rutland@arm.com>
>
> [...]
>
>> diff --git a/drivers/firmware/efi/arm-runtime.c b/drivers/firmware/efi/arm-runtime.c
>> index 7c75a8d..33d35e8 100644
>> --- a/drivers/firmware/efi/arm-runtime.c
>> +++ b/drivers/firmware/efi/arm-runtime.c
>> @@ -39,7 +39,7 @@ static struct mm_struct efi_mm = {
>> .mmlist = LIST_HEAD_INIT(efi_mm.mmlist),
>> };
>>
>> -#ifdef CONFIG_ARM64_PTDUMP
>> +#ifdef CONFIG_ARM64_PTDUMP_DEBUGFS
>> #include <asm/ptdump.h>
>>
>> static struct ptdump_info efi_ptdump_info = {
>> @@ -53,10 +53,9 @@ static struct ptdump_info efi_ptdump_info = {
>>
>> static int __init ptdump_init(void)
>> {
>> - return ptdump_register(&efi_ptdump_info, "efi_page_tables");
>> + return ptdump_debugfs_register(&efi_ptdump_info, "efi_page_tables");
>> }
>> device_initcall(ptdump_init);
>> -
>> #endif
>
> For the EFI changes, we'll need an ack from Ard or Matt; this should
> probably be Cc'd to the linux-efi list for that.
Good point, I'll do that for v3.
>
> Thanks,
> Mark.
>
Thanks,
Laura
^ permalink raw reply
* [PATCH 02/28] [v2] mtd: mtk: avoid warning in mtk_ecc_encode
From: Arnd Bergmann @ 2016-10-17 22:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161017220342.1627073-1-arnd@arndb.de>
When building with -Wmaybe-uninitialized, gcc produces a silly false positive
warning for the mtk_ecc_encode function:
drivers/mtd/nand/mtk_ecc.c: In function 'mtk_ecc_encode':
drivers/mtd/nand/mtk_ecc.c:402:15: error: 'val' may be used uninitialized in this function [-Werror=maybe-uninitialized]
The function for some reason contains a double byte swap on big-endian
builds to get the OOB data into the correct order again, and is written
in a slightly confusing way.
Using a simple memcpy32_fromio() to read the data simplifies it a lot
so it becomes more readable and produces no warning. However, the
output might not have 32-bit alignment, so we have to use another
memcpy to avoid taking alignment faults or writing beyond the end
of the array.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
v2: move temporary buffer into struct mtk_ecc instead of having it
on the stack, as suggested by Boris Brezillon
---
drivers/mtd/nand/mtk_ecc.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c
index d54f666..dbf2562 100644
--- a/drivers/mtd/nand/mtk_ecc.c
+++ b/drivers/mtd/nand/mtk_ecc.c
@@ -86,6 +86,8 @@ struct mtk_ecc {
struct completion done;
struct mutex lock;
u32 sectors;
+
+ u8 eccdata[112];
};
static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc,
@@ -366,9 +368,8 @@ int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config,
u8 *data, u32 bytes)
{
dma_addr_t addr;
- u8 *p;
- u32 len, i, val;
- int ret = 0;
+ u32 len;
+ int ret;
addr = dma_map_single(ecc->dev, data, bytes, DMA_TO_DEVICE);
ret = dma_mapping_error(ecc->dev, addr);
@@ -393,14 +394,12 @@ int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config,
/* Program ECC bytes to OOB: per sector oob = FDM + ECC + SPARE */
len = (config->strength * ECC_PARITY_BITS + 7) >> 3;
- p = data + bytes;
- /* write the parity bytes generated by the ECC back to the OOB region */
- for (i = 0; i < len; i++) {
- if ((i % 4) == 0)
- val = readl(ecc->regs + ECC_ENCPAR(i / 4));
- p[i] = (val >> ((i % 4) * 8)) & 0xff;
- }
+ /* write the parity bytes generated by the ECC back to temp buffer */
+ __ioread32_copy(ecc->eccdata, ecc->regs + ECC_ENCPAR(0), round_up(len, 4));
+
+ /* copy into possibly unaligned OOB region with actual length */
+ memcpy(data + bytes, ecc->eccdata, len);
timeout:
dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE);
--
2.9.0
^ permalink raw reply related
* [PATCH] ARM: multi_v7_defconfig: Enable Intel e1000e driver
From: Olof Johansson @ 2016-10-17 22:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <464e62ad-476e-5a2b-cdb4-c4e7f7f34e7d@broadcom.com>
On Tue, Oct 11, 2016 at 3:38 PM, Scott Branden
<scott.branden@broadcom.com> wrote:
> Hi Arnd,
>
> On 16-10-10 12:47 AM, Arnd Bergmann wrote:
>>
>> On Saturday, October 8, 2016 1:41:04 PM CEST Scott Branden wrote:
>>>
>>> Enable support for the Intel e1000e driver
>>>
>>> Signed-off-by: Ray Jui <rjui@broadcom.com>
>>> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
>>>
>>
>> Can we make this a loadable module and group it with the other
>> ethernet drivers?
>>
> We use a fixed rootfs image to test the kernel. For simplicity we don't
> construct a rootfs or load any modules. We just test the kernel image. So
> for us every defconfig we use needs to be set to y to use the upstreamed
> kernel.
>
> Plus, how do you NFS mount a rootfs if the ethernet driver is a loadable
> module?
Yeah, agreed that it makes sense to enable it here. Applied to fixes.
-Olof
^ permalink raw reply
* [PATCH v2] arm64: defconfig: enable EEPROM_AT25 config option
From: Olof Johansson @ 2016-10-17 21:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476298306-9138-1-git-send-email-scott.branden@broadcom.com>
Hi,
On Wed, Oct 12, 2016 at 11:51 AM, Scott Branden
<scott.branden@broadcom.com> wrote:
> Enable support for on board SPI EEPROM by turning on
> CONFIG_EEPROM_AT25. This needs to be on in order to
> boot and test the kernel with a static rootfs image
> that is not rebuilt everytime the kernel is rebuilt.
If we did this for every kernel option we'd get a huge kernel.
In general, we've said that static options for what's needed to boot
to rootfs (i.e. storage and network drivers for nfsroot) are fine to
enable statically.
I doubt you need the EEPROM driver to boot to rootfs on your system,
so please enable it as a module instead.
Look into using config fragments in case you need to modify the
options for local builds, it should be a convenient way to have a
small delta to apply to fit your internal needs, instead of completely
forking the config file.
-Olof
^ permalink raw reply
* [PATCH] PCI: layerscape: Fix kernel panic on accessing NULL pointer
From: Roy Zang @ 2016-10-17 21:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476740647-11155-1-git-send-email-leoyang.li@nxp.com>
On 10/17/2016 04:50 PM, Li Yang wrote:
> Commit fefe6733e added reference to the pcie->drvdata before it is
> initialized which causes a kernel panic. Fix the problem by
> initializing the pcie->drvdata earlier before it is used.
>
> Reported-by: Stuart Yoder <stuart.yoder@nxp.com>
> Signed-off-by: Li Yang <leoyang.li@nxp.com>
> ---
Acked-by: Roy Zang <roy.zang@nxp.com>
Roy
^ permalink raw reply
* [PATCH 3/3] arm64: dts: Update Broadcom NS2 to generic IOMMU binding
From: Ray Jui @ 2016-10-17 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f2de1b15adb2f57529734a4769ef04d9cde3cc5d.1476706244.git.robin.murphy@arm.com>
Hi Robin,
On 10/17/2016 5:13 AM, Robin Murphy wrote:
> With the "mmu-masters" property now deprecated and optional, the
> generic binding offers a more efficient way to specify no masters.
>
> CC: Ray Jui <rjui@broadcom.com>
> CC: Scott Branden <sbranden@broadcom.com>
> CC: Jon Mason <jonmason@broadcom.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> arch/arm64/boot/dts/broadcom/ns2.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> index d95dc408629a..65530e193e8a 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> @@ -248,7 +248,7 @@
> <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
> - mmu-masters;
> + #iommu-cells = <1>;
> };
>
> pinctrl: pinctrl at 6501d130 {
>
Thanks!
Acked-by: Ray Jui <ray.jui@broadcom.com>
^ permalink raw reply
* [PATCH] PCI: layerscape: Fix kernel panic on accessing NULL pointer
From: Li Yang @ 2016-10-17 21:44 UTC (permalink / raw)
To: linux-arm-kernel
Commit fefe6733e added reference to the pcie->drvdata before it is
initialized which causes a kernel panic. Fix the problem by
initializing the pcie->drvdata earlier before it is used.
Reported-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
drivers/pci/host/pci-layerscape.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
index 2cb7315..958187f 100644
--- a/drivers/pci/host/pci-layerscape.c
+++ b/drivers/pci/host/pci-layerscape.c
@@ -245,6 +245,7 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
if (!pcie)
return -ENOMEM;
+ pcie->drvdata = match->data;
pp = &pcie->pp;
pp->dev = dev;
pp->ops = pcie->drvdata->ops;
@@ -256,7 +257,6 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
return PTR_ERR(pcie->pp.dbi_base);
}
- pcie->drvdata = match->data;
pcie->lut = pcie->pp.dbi_base + pcie->drvdata->lut_offset;
if (!ls_pcie_is_bridge(pcie))
--
1.9.0
^ permalink raw reply related
* [PATCH v2] MAINTAINERS: add myself as Marvell berlin SoC maintainer
From: Olof Johansson @ 2016-10-17 21:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160929105120.374-1-jszhang@marvell.com>
On Thu, Sep 29, 2016 at 06:51:20PM +0800, Jisheng Zhang wrote:
> I would like to take maintainership for Marvell berlin SoCs.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Applied to fixes. Thanks.
-Olof
^ permalink raw reply
* [PATCH V4 1/2] ACPI: Add support for ResourceSource/IRQ domain mapping
From: Timur Tabi @ 2016-10-17 21:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476738177-24979-2-git-send-email-agustinv@codeaurora.org>
Just a few nits:
Agustin Vega-Frias wrote:
> +int acpi_irq_domain_register_irq(struct acpi_resource_source *source, u32 hwirq,
> + int trigger, int polarity)
> +{
> + struct irq_fwspec fwspec;
> + struct acpi_device *device;
> + acpi_handle handle;
> + acpi_status status;
> + int ret;
> +
> + if (source->string_length == 0)
Would (!source->string_length) be more meaningful?
> + return acpi_register_gsi(NULL, hwirq, trigger, polarity);
> +
> + status = acpi_get_handle(NULL, source->string_ptr, &handle);
> + if (ACPI_FAILURE(status))
> + return -ENODEV;
> +
> + device = acpi_bus_get_acpi_device(handle);
> + if (!device)
> + return -ENODEV;
> +
> + if (acpi_irq_domain_ensure_probed(device))
> + return -ENODEV;
> +
> + fwspec.fwnode = &device->fwnode;
> + fwspec.param[0] = hwirq;
> + fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity);
> + fwspec.param_count = 2;
> +
> + ret = irq_create_fwspec_mapping(&fwspec);
> + acpi_bus_put_acpi_device(device);
> + return ret;
Blank line before 'return'.
> -static void acpi_dev_get_irqresource(struct resource *res, u32 gsi,
> +static void acpi_dev_get_irqresource(struct resource *res, u32 hwirq,
> + struct acpi_resource_source *source,
This should probably be a 'const', because ...
> @@ -448,6 +449,7 @@ bool acpi_dev_resource_interrupt(struct acpi_resource *ares, int index,
> {
> struct acpi_resource_irq *irq;
> struct acpi_resource_extended_irq *ext_irq;
> + struct acpi_resource_source dummy = { 0, 0, NULL };
... then you can make this a static const, which will reduce code size
and improve performance.
> @@ -1024,6 +1030,43 @@ struct acpi_probe_entry {
> (&ACPI_PROBE_TABLE_END(t) - \
> &ACPI_PROBE_TABLE(t))); \
> })
> +
> +#define ACPI_HID_LEN 9
Please add a comment for this.
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH V4 2/2] irqchip: qcom: Add IRQ combiner driver
From: Agustin Vega-Frias @ 2016-10-17 21:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476738177-24979-1-git-send-email-agustinv@codeaurora.org>
Driver for interrupt combiners in the Top-level Control and Status
Registers (TCSR) hardware block in Qualcomm Technologies chips.
An interrupt combiner in this block combines a set of interrupts by
OR'ing the individual interrupt signals into a summary interrupt
signal routed to a parent interrupt controller, and provides read-
only, 32-bit registers to query the status of individual interrupts.
The status bit for IRQ n is bit (n % 32) within register (n / 32)
of the given combiner. Thus, each combiner can be described as a set
of register offsets and the number of IRQs managed.
Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
---
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-irq-combiner.c | 332 ++++++++++++++++++++++++++++++++++++
3 files changed, 341 insertions(+)
create mode 100644 drivers/irqchip/qcom-irq-combiner.c
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 82b0b5d..05ecd91 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -279,3 +279,11 @@ config EZNPS_GIC
config STM32_EXTI
bool
select IRQ_DOMAIN
+
+config QCOM_IRQ_COMBINER
+ bool "QCOM IRQ combiner support"
+ depends on ARCH_QCOM
+ select IRQ_DOMAIN
+ help
+ Say yes here to add support for the IRQ combiner devices embedded
+ in Qualcomm Technologies chips.
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index e4dbfc8..1818a0b 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -74,3 +74,4 @@ obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o
obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
+obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
diff --git a/drivers/irqchip/qcom-irq-combiner.c b/drivers/irqchip/qcom-irq-combiner.c
new file mode 100644
index 0000000..b117cd7
--- /dev/null
+++ b/drivers/irqchip/qcom-irq-combiner.c
@@ -0,0 +1,332 @@
+/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Driver for interrupt combiners in the Top-level Control and Status
+ * Registers (TCSR) hardware block in Qualcomm Technologies chips.
+ * An interrupt combiner in this block combines a set of interrupts by
+ * OR'ing the individual interrupt signals into a summary interrupt
+ * signal routed to a parent interrupt controller, and provides read-
+ * only, 32-bit registers to query the status of individual interrupts.
+ * The status bit for IRQ n is bit (n % 32) within register (n / 32)
+ * of the given combiner. Thus, each combiner can be described as a set
+ * of register offsets and the number of IRQs managed.
+ */
+
+#include <linux/acpi.h>
+#include <linux/err.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irqdomain.h>
+
+#define REG_SIZE 32
+
+struct combiner_reg {
+ void __iomem *addr;
+ unsigned long mask;
+};
+
+struct combiner {
+ struct irq_chip irq_chip;
+ struct irq_domain *domain;
+ int parent_irq;
+ u32 nirqs;
+ u32 nregs;
+ struct combiner_reg regs[0];
+};
+
+static inline u32 irq_register(int irq)
+{
+ return irq / REG_SIZE;
+}
+
+static inline u32 irq_bit(int irq)
+{
+ return irq % REG_SIZE;
+
+}
+
+static inline int irq_nr(u32 reg, u32 bit)
+{
+ return reg * REG_SIZE + bit;
+}
+
+/*
+ * Handler for the cascaded IRQ.
+ */
+static void combiner_handle_irq(struct irq_desc *desc)
+{
+ struct combiner *combiner = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ u32 reg;
+
+ chained_irq_enter(chip, desc);
+
+ for (reg = 0; reg < combiner->nregs; reg++) {
+ int virq;
+ int hwirq;
+ u32 bit;
+ u32 status;
+
+ if (combiner->regs[reg].mask == 0)
+ continue;
+
+ status = readl_relaxed(combiner->regs[reg].addr);
+ status &= combiner->regs[reg].mask;
+
+ while (status) {
+ bit = __ffs(status);
+ status &= ~(1 << bit);
+ hwirq = irq_nr(reg, bit);
+ virq = irq_find_mapping(combiner->domain, hwirq);
+ if (virq >= 0)
+ generic_handle_irq(virq);
+
+ }
+ }
+
+ chained_irq_exit(chip, desc);
+}
+
+/*
+ * irqchip callbacks
+ */
+
+static void combiner_irq_chip_mask_irq(struct irq_data *data)
+{
+ struct combiner *combiner = irq_data_get_irq_chip_data(data);
+ struct combiner_reg *reg = combiner->regs + irq_register(data->hwirq);
+
+ clear_bit(irq_bit(data->hwirq), ®->mask);
+}
+
+static void combiner_irq_chip_unmask_irq(struct irq_data *data)
+{
+ struct combiner *combiner = irq_data_get_irq_chip_data(data);
+ struct combiner_reg *reg = combiner->regs + irq_register(data->hwirq);
+
+ set_bit(irq_bit(data->hwirq), ®->mask);
+}
+
+/*
+ * irq_domain_ops callbacks
+ */
+
+static int combiner_irq_map(struct irq_domain *domain, unsigned int irq,
+ irq_hw_number_t hwirq)
+{
+ struct combiner *combiner = domain->host_data;
+
+ if (hwirq >= combiner->nirqs)
+ return -EINVAL;
+
+ irq_set_chip_and_handler(irq, &combiner->irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, combiner);
+ irq_set_parent(irq, combiner->parent_irq);
+ irq_set_noprobe(irq);
+ return 0;
+}
+
+static void combiner_irq_unmap(struct irq_domain *domain, unsigned int irq)
+{
+ irq_set_chip_and_handler(irq, NULL, NULL);
+ irq_set_chip_data(irq, NULL);
+ irq_set_parent(irq, -1);
+}
+
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+static int combiner_irq_translate(struct irq_domain *d, struct irq_fwspec *fws,
+ unsigned long *hwirq, unsigned int *type)
+{
+ if (is_acpi_node(fws->fwnode)) {
+ if (fws->param_count != 2)
+ return -EINVAL;
+
+ *hwirq = fws->param[0];
+ *type = fws->param[1];
+ return 0;
+ }
+
+ return -EINVAL;
+}
+#endif
+
+static const struct irq_domain_ops domain_ops = {
+ .map = combiner_irq_map,
+ .unmap = combiner_irq_unmap,
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ .translate = combiner_irq_translate
+#endif
+};
+
+/*
+ * Device probing
+ */
+
+static acpi_status count_registers_cb(struct acpi_resource *ares, void *context)
+{
+ int *count = context;
+
+ if (ares->type == ACPI_RESOURCE_TYPE_GENERIC_REGISTER)
+ ++(*count);
+ return AE_OK;
+}
+
+static int count_registers(struct acpi_device *adev)
+{
+ acpi_status status;
+ int count = 0;
+
+ if (!acpi_has_method(adev->handle, METHOD_NAME__CRS))
+ return -EINVAL;
+
+ status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS,
+ count_registers_cb, &count);
+ if (ACPI_FAILURE(status))
+ return -EINVAL;
+ return count;
+}
+
+struct get_registers_context {
+ struct device *dev;
+ struct combiner *combiner;
+ int err;
+};
+
+static acpi_status get_registers_cb(struct acpi_resource *ares, void *context)
+{
+ struct get_registers_context *ctx = context;
+ struct acpi_resource_generic_register *reg;
+ phys_addr_t paddr;
+ void __iomem *vaddr;
+
+ if (ares->type != ACPI_RESOURCE_TYPE_GENERIC_REGISTER)
+ return AE_OK;
+
+ reg = &ares->data.generic_reg;
+ paddr = reg->address;
+ if ((reg->space_id != ACPI_SPACE_MEM) ||
+ (reg->bit_offset != 0) ||
+ (reg->bit_width > REG_SIZE)) {
+ dev_err(ctx->dev, "Bad register resource @%pa\n", &paddr);
+ ctx->err = -EINVAL;
+ return AE_ERROR;
+ }
+
+ vaddr = devm_ioremap(ctx->dev, reg->address, REG_SIZE);
+ if (IS_ERR(vaddr)) {
+ dev_err(ctx->dev, "Can't map register @%pa\n", &paddr);
+ ctx->err = PTR_ERR(vaddr);
+ return AE_ERROR;
+ }
+
+ ctx->combiner->regs[ctx->combiner->nregs].addr = vaddr;
+ ctx->combiner->nirqs += reg->bit_width;
+ ctx->combiner->nregs++;
+ return AE_OK;
+}
+
+static int get_registers(struct acpi_device *adev, struct combiner *comb)
+{
+ acpi_status status;
+ struct get_registers_context ctx;
+
+ if (!acpi_has_method(adev->handle, METHOD_NAME__CRS))
+ return -EINVAL;
+
+ ctx.dev = &adev->dev;
+ ctx.combiner = comb;
+ ctx.err = 0;
+
+ status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS,
+ get_registers_cb, &ctx);
+ if (ACPI_FAILURE(status))
+ return ctx.err;
+ return 0;
+}
+
+static acpi_status get_parent_irq_cb(struct acpi_resource *ares, void *context)
+{
+ int *irq = context;
+ struct acpi_resource_extended_irq *eirq;
+
+ if (ares->type != ACPI_RESOURCE_TYPE_EXTENDED_IRQ)
+ return AE_OK;
+
+ eirq = &ares->data.extended_irq;
+ *irq = acpi_irq_domain_register_irq(&eirq->resource_source,
+ eirq->interrupts[0],
+ eirq->triggering, eirq->polarity);
+ return AE_OK;
+}
+
+static int get_parent_irq(struct acpi_device *adev)
+{
+ acpi_status status;
+ int irq = -1;
+
+ if (!acpi_has_method(adev->handle, METHOD_NAME__CRS))
+ return -EINVAL;
+
+ status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS,
+ get_parent_irq_cb, &irq);
+ if (ACPI_FAILURE(status))
+ return -EINVAL;
+ return irq;
+}
+
+static int __init combiner_probe(struct acpi_device *adev)
+{
+ struct combiner *combiner;
+ size_t alloc_sz;
+ u32 nregs;
+ int err;
+
+ nregs = count_registers(adev);
+ if (nregs <= 0) {
+ dev_err(&adev->dev, "Error reading register resources\n");
+ return -EINVAL;
+ }
+
+ alloc_sz = sizeof(*combiner) + sizeof(struct combiner_reg) * nregs;
+ combiner = devm_kzalloc(&adev->dev, alloc_sz, GFP_KERNEL);
+ if (!combiner)
+ return -ENOMEM;
+
+ err = get_registers(adev, combiner);
+ if (err < 0)
+ return err;
+
+ combiner->parent_irq = get_parent_irq(adev);
+ if (combiner->parent_irq <= 0) {
+ dev_err(&adev->dev, "Error getting IRQ resource\n");
+ return -EINVAL;
+ }
+
+ combiner->domain = irq_domain_create_linear(
+ &adev->fwnode, combiner->nirqs, &domain_ops, combiner);
+ if (!combiner->domain)
+ /* Errors printed by irq_domain_create_linear */
+ return -ENODEV;
+
+ irq_set_chained_handler_and_data(combiner->parent_irq,
+ combiner_handle_irq, combiner);
+ combiner->irq_chip.irq_mask = combiner_irq_chip_mask_irq;
+ combiner->irq_chip.irq_unmask = combiner_irq_chip_unmask_irq;
+ combiner->irq_chip.name = dev_name(&adev->dev);
+
+ dev_info(&adev->dev, "Initialized with [p=%d,n=%d,r=%p]\n",
+ combiner->parent_irq, combiner->nirqs, combiner->regs[0].addr);
+ return 0;
+}
+
+IRQCHIP_ACPI_DECLARE(qcom_combiner, "QCOM80B1", combiner_probe);
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related
* [PATCH V4 1/2] ACPI: Add support for ResourceSource/IRQ domain mapping
From: Agustin Vega-Frias @ 2016-10-17 21:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476738177-24979-1-git-send-email-agustinv@codeaurora.org>
This allows irqchip drivers to associate an ACPI DSDT device to
an IRQ domain and provides support for using the ResourceSource
in Extended IRQ Resources to find the domain and map the IRQs
specified on that domain.
Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
---
drivers/acpi/Makefile | 1 +
drivers/acpi/irqdomain.c | 135 ++++++++++++++++++++++++++++++++++++++
drivers/acpi/resource.c | 21 +++---
include/asm-generic/vmlinux.lds.h | 1 +
include/linux/acpi.h | 50 ++++++++++++++
include/linux/irqchip.h | 17 ++++-
6 files changed, 213 insertions(+), 12 deletions(-)
create mode 100644 drivers/acpi/irqdomain.c
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index 9ed0878..81bdc95 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile
@@ -57,6 +57,7 @@ acpi-$(CONFIG_ACPI_PROCFS_POWER) += cm_sbs.o
acpi-y += acpi_lpat.o
acpi-$(CONFIG_ACPI_GENERIC_GSI) += gsi.o
acpi-$(CONFIG_ACPI_WATCHDOG) += acpi_watchdog.o
+acpi-y += irqdomain.o
# These are (potentially) separate modules
diff --git a/drivers/acpi/irqdomain.c b/drivers/acpi/irqdomain.c
new file mode 100644
index 0000000..0429607
--- /dev/null
+++ b/drivers/acpi/irqdomain.c
@@ -0,0 +1,135 @@
+/*
+ * ACPI ResourceSource/IRQ domain mapping support
+ *
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/acpi.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+
+/**
+ * acpi_irq_domain_ensure_probed() - Check if the device has registered
+ * an IRQ domain and probe as necessary
+ *
+ * @device: Device to check and probe
+ *
+ * Returns: 0 on success, -ENODEV otherwise
+ */
+static int acpi_irq_domain_ensure_probed(struct acpi_device *device)
+{
+ struct acpi_dsdt_probe_entry *entry;
+
+ if (irq_find_matching_fwnode(&device->fwnode, DOMAIN_BUS_ANY) != 0)
+ return 0;
+
+ for (entry = &__dsdt_acpi_probe_table;
+ entry < &__dsdt_acpi_probe_table_end; e++)
+ if (strcmp(e->_hid, acpi_device_hid(device)) == 0)
+ return e->probe(device);
+
+ return -ENODEV;
+}
+
+/**
+ * acpi_irq_domain_register_irq() - Register the mapping for an IRQ produced
+ * by the given acpi_resource_source to a
+ * Linux IRQ number
+ * @source: IRQ source
+ * @hwirq: Hardware IRQ number
+ * @trigger: trigger type of the IRQ number to be mapped
+ * @polarity: polarity of the IRQ to be mapped
+ *
+ * Returns: a valid linux IRQ number on success
+ * -ENODEV if the given acpi_resource_source cannot be found
+ * -EPROBE_DEFER if the IRQ domain has not been registered
+ * -EINVAL for all other errors
+ */
+int acpi_irq_domain_register_irq(struct acpi_resource_source *source, u32 hwirq,
+ int trigger, int polarity)
+{
+ struct irq_fwspec fwspec;
+ struct acpi_device *device;
+ acpi_handle handle;
+ acpi_status status;
+ int ret;
+
+ if (source->string_length == 0)
+ return acpi_register_gsi(NULL, hwirq, trigger, polarity);
+
+ status = acpi_get_handle(NULL, source->string_ptr, &handle);
+ if (ACPI_FAILURE(status))
+ return -ENODEV;
+
+ device = acpi_bus_get_acpi_device(handle);
+ if (!device)
+ return -ENODEV;
+
+ if (acpi_irq_domain_ensure_probed(device))
+ return -ENODEV;
+
+ fwspec.fwnode = &device->fwnode;
+ fwspec.param[0] = hwirq;
+ fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity);
+ fwspec.param_count = 2;
+
+ ret = irq_create_fwspec_mapping(&fwspec);
+ acpi_bus_put_acpi_device(device);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(acpi_irq_domain_register_irq);
+
+/**
+ * acpi_irq_domain_unregister_irq() - Delete the mapping for an IRQ produced
+ * by the given acpi_resource_source to a
+ * Linux IRQ number
+ * @source: IRQ source
+ * @hwirq: Hardware IRQ number
+ *
+ * Returns: 0 on success
+ * -ENODEV if the given acpi_resource_source cannot be found
+ * -EINVAL for all other errors
+ */
+int acpi_irq_domain_unregister_irq(struct acpi_resource_source *source,
+ u32 hwirq)
+{
+ struct irq_domain *domain;
+ struct acpi_device *device;
+ acpi_handle handle;
+ acpi_status status;
+ int ret = 0;
+
+ if (source->string_length == 0) {
+ acpi_unregister_gsi(hwirq);
+ return 0;
+ }
+
+ status = acpi_get_handle(NULL, source->string_ptr, &handle);
+ if (ACPI_FAILURE(status))
+ return -ENODEV;
+
+ device = acpi_bus_get_acpi_device(handle);
+ if (!device)
+ return -ENODEV;
+
+ domain = irq_find_matching_fwnode(&device->fwnode, DOMAIN_BUS_ANY);
+ if (!domain) {
+ ret = -EINVAL;
+ goto out_put_device;
+ }
+
+ irq_dispose_mapping(irq_find_mapping(domain, hwirq));
+
+out_put_device:
+ acpi_bus_put_acpi_device(device);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(acpi_irq_domain_unregister_irq);
diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c
index 56241eb..8e69a7a 100644
--- a/drivers/acpi/resource.c
+++ b/drivers/acpi/resource.c
@@ -381,14 +381,15 @@ static void acpi_dev_irqresource_disabled(struct resource *res, u32 gsi)
res->flags = IORESOURCE_IRQ | IORESOURCE_DISABLED | IORESOURCE_UNSET;
}
-static void acpi_dev_get_irqresource(struct resource *res, u32 gsi,
+static void acpi_dev_get_irqresource(struct resource *res, u32 hwirq,
+ struct acpi_resource_source *source,
u8 triggering, u8 polarity, u8 shareable,
bool legacy)
{
int irq, p, t;
- if (!valid_IRQ(gsi)) {
- acpi_dev_irqresource_disabled(res, gsi);
+ if ((source->string_length == 0) && !valid_IRQ(hwirq)) {
+ acpi_dev_irqresource_disabled(res, hwirq);
return;
}
@@ -402,25 +403,25 @@ static void acpi_dev_get_irqresource(struct resource *res, u32 gsi,
* using extended IRQ descriptors we take the IRQ configuration
* from _CRS directly.
*/
- if (legacy && !acpi_get_override_irq(gsi, &t, &p)) {
+ if (legacy && !acpi_get_override_irq(hwirq, &t, &p)) {
u8 trig = t ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
u8 pol = p ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
if (triggering != trig || polarity != pol) {
- pr_warning("ACPI: IRQ %d override to %s, %s\n", gsi,
- t ? "level" : "edge", p ? "low" : "high");
+ pr_warn("ACPI: IRQ %d override to %s, %s\n", hwirq,
+ t ? "level" : "edge", p ? "low" : "high");
triggering = trig;
polarity = pol;
}
}
res->flags = acpi_dev_irq_flags(triggering, polarity, shareable);
- irq = acpi_register_gsi(NULL, gsi, triggering, polarity);
+ irq = acpi_irq_domain_register_irq(source, hwirq, triggering, polarity);
if (irq >= 0) {
res->start = irq;
res->end = irq;
} else {
- acpi_dev_irqresource_disabled(res, gsi);
+ acpi_dev_irqresource_disabled(res, hwirq);
}
}
@@ -448,6 +449,7 @@ bool acpi_dev_resource_interrupt(struct acpi_resource *ares, int index,
{
struct acpi_resource_irq *irq;
struct acpi_resource_extended_irq *ext_irq;
+ struct acpi_resource_source dummy = { 0, 0, NULL };
switch (ares->type) {
case ACPI_RESOURCE_TYPE_IRQ:
@@ -460,7 +462,7 @@ bool acpi_dev_resource_interrupt(struct acpi_resource *ares, int index,
acpi_dev_irqresource_disabled(res, 0);
return false;
}
- acpi_dev_get_irqresource(res, irq->interrupts[index],
+ acpi_dev_get_irqresource(res, irq->interrupts[index], &dummy,
irq->triggering, irq->polarity,
irq->sharable, true);
break;
@@ -471,6 +473,7 @@ bool acpi_dev_resource_interrupt(struct acpi_resource *ares, int index,
return false;
}
acpi_dev_get_irqresource(res, ext_irq->interrupts[index],
+ &ext_irq->resource_source,
ext_irq->triggering, ext_irq->polarity,
ext_irq->sharable, false);
break;
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 3074796..f808afdc 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -563,6 +563,7 @@
IRQCHIP_OF_MATCH_TABLE() \
ACPI_PROBE_TABLE(irqchip) \
ACPI_PROBE_TABLE(clksrc) \
+ ACPI_PROBE_TABLE(dsdt) \
EARLYCON_TABLE()
#define INIT_TEXT \
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index ddbeda6..619cd4f 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -26,6 +26,7 @@
#include <linux/resource_ext.h>
#include <linux/device.h>
#include <linux/property.h>
+#include <linux/irqdomain.h>
#ifndef _LINUX
#define _LINUX
@@ -309,6 +310,11 @@ static inline bool acpi_sci_irq_valid(void)
void acpi_set_irq_model(enum acpi_irq_model_id model,
struct fwnode_handle *fwnode);
+int acpi_irq_domain_register_irq(struct acpi_resource_source *source, u32 hwirq,
+ int trigger, int polarity);
+int acpi_irq_domain_unregister_irq(struct acpi_resource_source *source,
+ u32 hwirq);
+
#ifdef CONFIG_X86_IO_APIC
extern int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity);
#else
@@ -1024,6 +1030,43 @@ struct acpi_probe_entry {
(&ACPI_PROBE_TABLE_END(t) - \
&ACPI_PROBE_TABLE(t))); \
})
+
+#define ACPI_HID_LEN 9
+
+typedef int (*acpi_dsdt_handler)(struct acpi_device *);
+
+/**
+ * struct acpi_probe_dsdt_entry - boot-time probing entry for DSDT devices
+ * @hid: _HID of the device
+ * @fn: Callback to the driver being probed
+ * @driver_data: Sideband data provided back to the driver
+ */
+struct acpi_dsdt_probe_entry {
+ __u8 _hid[ACPI_HID_LEN];
+ acpi_dsdt_handler probe;
+};
+
+#define ACPI_DECLARE_DSDT_PROBE_ENTRY(name, hid, fn) \
+ static const struct acpi_dsdt_probe_entry __acpi_probe_##name \
+ __used __section(__dsdt_acpi_probe_table) = \
+ { \
+ ._hid = hid, \
+ .probe = fn, \
+ }
+
+extern struct acpi_dsdt_probe_entry __dsdt_acpi_probe_table;
+extern struct acpi_dsdt_probe_entry __dsdt_acpi_probe_table_end;
+
+#define MADT_IRQCHIP_ACPI_DECLARE(name, subtable, validate, data, fn) \
+ ACPI_DECLARE_PROBE_ENTRY(irqchip, name, ACPI_SIG_MADT, \
+ subtable, validate, data, fn)
+
+#define DSDT_IRQCHIP_ACPI_DECLARE(name, hid, fn) \
+ ACPI_DECLARE_DSDT_PROBE_ENTRY(name, hid, fn)
+
+#define __IRQCHIP_ACPI_DECLARE(_a1, _a2, _a3, _a4, _a5, type, ...) \
+ type##_IRQCHIP_ACPI_DECLARE
+
#else
static inline int acpi_dev_get_property(struct acpi_device *adev,
const char *name, acpi_object_type type,
@@ -1101,6 +1144,13 @@ static inline struct fwnode_handle *acpi_get_next_subnode(struct device *dev,
(void *) data }
#define acpi_probe_device_table(t) ({ int __r = 0; __r;})
+
+#define ACPI_DECLARE_DSDT_PROBE_ENTRY(name, hid, fn) \
+ static const void *__acpi_probe_##name[] \
+ __attribute__((unused)) \
+ = { (void *) hid, \
+ (void *) fn }
+
#endif
#ifdef CONFIG_ACPI_TABLE_UPGRADE
diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h
index 89c34b2..c2d0c12 100644
--- a/include/linux/irqchip.h
+++ b/include/linux/irqchip.h
@@ -29,6 +29,10 @@
/*
* This macro must be used by the different irqchip drivers to declare
* the association between their version and their initialization function.
+ * Two syntaxes are supported depending on the table where the irqchip device
+ * is declared:
+ *
+ * - MADT irqchip syntax, which requires the following five arguments:
*
* @name: name that must be unique accross all IRQCHIP_ACPI_DECLARE of the
* same file.
@@ -37,10 +41,17 @@
* Can be NULL.
* @data: data to be checked by the validate function.
* @fn: initialization function
+ *
+ * - DSDT irqchip syntax, which requires the following three arguments:
+ *
+ * @name: name that must be unique across all IRQCHIP_ACPI_DECLARE of the
+ * same file.
+ * @hid: _HID of the DSDT device
+ * @fn: initialization function
*/
-#define IRQCHIP_ACPI_DECLARE(name, subtable, validate, data, fn) \
- ACPI_DECLARE_PROBE_ENTRY(irqchip, name, ACPI_SIG_MADT, \
- subtable, validate, data, fn)
+
+#define IRQCHIP_ACPI_DECLARE(...) \
+ __IRQCHIP_ACPI_DECLARE(__VA_ARGS__, MADT, _unused, DSDT)(__VA_ARGS__)
#ifdef CONFIG_IRQCHIP
void irqchip_init(void);
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related
* [PATCH V4 0/2] irqchip: qcom: Add IRQ combiner driver
From: Agustin Vega-Frias @ 2016-10-17 21:02 UTC (permalink / raw)
To: linux-arm-kernel
Add support for IRQ combiners in the Top-level Control and Status
Registers (TCSR) hardware block in Qualcomm Technologies chips.
The first patch adds support for ResourceSource/IRQ domain mapping
when using Extended IRQ Resources with a specific ResourceSource.
The core ACPI resource management code has been changed to lookup
the IRQ domain when an IRQ resource indicates a ResourceSource,
and register the IRQ on that domain, instead of a GSI.
The second patch takes advantage of the new capabilities to implement
the driver for the IRQ combiners.
Changes V1 -> V2:
* Remove use of GPIO library for the combiner
* Refactor to use fwnode/ResourceSource to IRQ domain mapping
introduced in ACPI core
Changes V2 -> V3:
* Removed parsing of _PRS to find IRQs
* Removed acpi_irq_domain_create and acpi_irq_domain_remove
Changes V3 -> V3:
* Add a DSDT device probe table that is used to probe DSDT IRQ chips
as necessary when converting HW IRQs to Linux IRQs
* Describe IRQ combiner registers as ACPI Register resources
Agustin Vega-Frias (2):
ACPI: Add support for ResourceSource/IRQ domain mapping
irqchip: qcom: Add IRQ combiner driver
drivers/acpi/Makefile | 1 +
drivers/acpi/irqdomain.c | 135 +++++++++++++++
drivers/acpi/resource.c | 21 ++-
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-irq-combiner.c | 332 ++++++++++++++++++++++++++++++++++++
include/asm-generic/vmlinux.lds.h | 1 +
include/linux/acpi.h | 50 ++++++
include/linux/irqchip.h | 17 +-
9 files changed, 554 insertions(+), 12 deletions(-)
create mode 100644 drivers/acpi/irqdomain.c
create mode 100644 drivers/irqchip/qcom-irq-combiner.c
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH v20 02/10] doc: fpga-mgr: add fpga image info to api
From: Moritz Fischer @ 2016-10-17 21:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161017160941.4205-3-atull@opensource.altera.com>
Hi Alan,
couple of nits inline and some comments on ordering the patches ;-)
On Mon, Oct 17, 2016 at 6:09 PM, Alan Tull <atull@opensource.altera.com> wrote:
> This patch adds a minor change in the FPGA Mangager API
s/Mangager/Manager/
> to hold information that is specific to an FPGA image
> file. This change is expected to bring little, if any,
> pain.
>
> An FPGA image file will have particulars that affect how the
> image is programmed to the FPGA. One example is that
> current 'flags' currently has one bit which shows whether the
> FPGA image was built for full reconfiguration or partial
> reconfiguration. Another example is timeout values for
> enabling or disabling the bridges in the FPGA. As the
> complexity of the FPGA design increases, the bridges in the
> FPGA may take longer times to enable or disable.
According for the current ordering bridges are not yet defined if we
merge patches in this order?
Not terrible imho, but I thought I'd point it out. Would swapping the
order make sense?
I also think [5/10] should be squashed together with this commit to
make it an atomic change.
Apart from my comments above feel free to add my Acked-by
Thanks for keeping this going,
Moritz
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: Updated NAND DT properties for NS2 SVK
From: Ray Jui @ 2016-10-17 20:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1469051631-7896-3-git-send-email-ray.jui@broadcom.com>
Hi Florian,
Would you be able to help to queue the following patch for v4.10? Sorry
I did not include you in the "To" field of the original email.
Thanks,
Ray
On 7/20/2016 2:53 PM, Ray Jui wrote:
> This patch adds NAND DT properties for NS2 SVK to configure the bus
> width width and OOB sector size
>
> Signed-off-by: Prafulla Kota <prafulla.kota@broadcom.com>
> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
> ---
> arch/arm64/boot/dts/broadcom/ns2-svk.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> index 54ca40c..5ef0407 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> @@ -128,6 +128,8 @@
> nand-ecc-mode = "hw";
> nand-ecc-strength = <8>;
> nand-ecc-step-size = <512>;
> + nand-bus-width = <16>;
> + brcm,nand-oob-sector-size = <16>;
> #address-cells = <1>;
> #size-cells = <1>;
> };
>
^ permalink raw reply
* [PATCH v2 1/2] arm64: dts: zx: Fix gic GICR property
From: Olof Johansson @ 2016-10-17 20:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476361881-19685-2-git-send-email-jun.nie@linaro.org>
On Thu, Oct 13, 2016 at 08:31:20PM +0800, Jun Nie wrote:
> GICR for multiple CPU can be described with start address and stride,
> or with multiple address. Current multiple address and stride are
> both used. Fix it.
>
> vmalloc patch 727a7f5a9 triggered this bug:
> [ 0.097146] Unable to handle kernel paging request at virtual address ffff000008060008
> [ 0.097150] pgd = ffff000008602000
> [ 0.097160] [ffff000008060008] *pgd=000000007fffe003, *pud=000000007fffd003, *pmd=000000007fffc003, *pte=0000000000000000
> [ 0.097165] Internal error: Oops: 96000007 [#1] PREEMPT SMP
> [ 0.097170] Modules linked in:
> [ 0.097177] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.8.0+ #1474
> [ 0.097179] Hardware name: ZTE zx296718 evaluation board (DT)
> [ 0.097183] task: ffff80003e8c8b80 task.stack: ffff80003e8d0000
> [ 0.097197] PC is at gic_populate_rdist+0x74/0x15c
> [ 0.097202] LR is at gic_starting_cpu+0xc/0x20
> [ 0.097206] pc : [<ffff0000082b1b18>] lr : [<ffff0000082b26e0>] pstate: 600001c5
>
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
A Fixes: tag would be useful on a patch like this, to tell what patch
introduced the problem. Please consider using them in the future.
I've applied this one to fixes now.
-Olof
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: zx: Add clock controller nodes
From: Olof Johansson @ 2016-10-17 20:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476361881-19685-3-git-send-email-jun.nie@linaro.org>
On Thu, Oct 13, 2016 at 08:31:21PM +0800, Jun Nie wrote:
> Add clock controller nodes, including one top controller
> two low speed controllers and one audio controller.
>
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
> ---
> arch/arm64/boot/dts/zte/zx296718.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
This isn't a fix for a bug, so please send this with your other updates for
v4.10.
Thanks,
-Olof
^ permalink raw reply
* [GIT PULL] ARM: mvebu: fixes for v4.8 (#3)
From: Olof Johansson @ 2016-10-17 20:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6481361.Tzq3EBKYRj@wuerfel>
On Mon, Oct 17, 2016 at 03:42:30PM +0200, Arnd Bergmann wrote:
> On Monday, October 17, 2016 2:51:03 PM CEST Gregory CLEMENT wrote:
> > Hi Arnd,
> >
> > On mer., sept. 21 2016, Arnd Bergmann <arnd@arndb.de> wrote:
> >
> > > On Tuesday, September 20, 2016 6:14:47 PM CEST Gregory CLEMENT wrote:
> > >> mvebu fixes for 4.8 (part 3)
> > >>
> > >> - Select corediv clk for all mvebu v7 SoC
> > >> - Fix clocksource for CP110 master SPI0 for Armada 7K/8K
> > >>
> > >
> > > Pulled into fixes, thanks!
> >
> > I don't see this patch in the v4.8 or the v4.9-rc1.
> >
> > I think it slipped through the cracks as there were the only one in the
> > fixes branches.
> >
> > Do you think you could make them part of your next pull request for
> > fixes for 4.9-rc2?
>
> Indeed, I missed how this was still on the fixes branch during
> the merge window. It is still on that branch (and nothing else
> is so far), and it will be part of the next fixes pull request.
>
> Thanks for the reminder.
I've re-merged it since I wanted to forward the fixes branch to
v4.9-rc1, but I've made sure it's applied again.
Agreed, thanks for the reminder.
-Olof
^ permalink raw reply
* [PATCH] bus: qcom-ebi2: depend on ARCH_QCOM or COMPILE_TEST
From: Olof Johansson @ 2016-10-17 20:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475582179-5085-1-git-send-email-linus.walleij@linaro.org>
On Tue, Oct 04, 2016 at 01:56:19PM +0200, Linus Walleij wrote:
> This hides the option for people who do not want their Kconfig
> vision cluttered (i.e. x86) and enables compile testing apart
> from the supported main arch.
>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ARM SoC people: please apply this to next/drivers as well
> or as a fix depending on timing.
Applied to fixes. Thanks.
-Olof
^ permalink raw reply
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