* [PATCH v20 03/10] add bindings document for altera freeze bridge
From: atull @ 2016-10-18 18:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018162656.dsx7hnip3xqm7j26@rob-hp-laptop>
On Tue, 18 Oct 2016, Rob Herring wrote:
> On Mon, Oct 17, 2016 at 11:09:34AM -0500, Alan Tull wrote:
> > Add bindings document for the Altera Freeze Bridge. A Freeze
> > Bridge is used to gate traffic to/from a region of a FPGA
> > such that that region can be reprogrammed. The Freeze Bridge
> > exist in FPGA fabric that is not currently being reconfigured.
> >
> > Signed-off-by: Alan Tull <atull@opensource.altera.com>
> > Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
> > ---
> > v19: Added in v19 of patchset, uses fpga image info struct
> > v20: fix one underscore to hyphen
> > ---
> > .../bindings/fpga/altera-freeze-bridge.txt | 23 ++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
>
> Acked-by: Rob Herring <robh@kernel.org>
>
Thanks!
Alan
^ permalink raw reply
* [PATCH v1 0/4] Add support for Broadcom iProc mailbox controller
From: Jonathan Richardson @ 2016-10-18 19:00 UTC (permalink / raw)
To: linux-arm-kernel
This patch set contains mailbox support for Broadcom iProc based SoC's. The
mailbox controller handles all communication with a Cortex-M0 MCU processor that
provides support for power, clock, and reset management.
The patch set enables the mailbox controller for Cygnus and also interrupt
support for the Cygnus CRMU GPIO driver which requires use of the M0 processor.
Jonathan Richardson (4):
dt-bindings: Document Broadcom iProc mailbox controller driver
mailbox: Add iProc mailbox controller driver
ARM: dts: Enable Broadcom iProc mailbox controller
ARM: dts: Enable interrupt support for cygnus crmu gpio driver
.../bindings/mailbox/brcm,iproc-mailbox.txt | 20 +
arch/arm/boot/dts/bcm-cygnus.dtsi | 12 +
drivers/mailbox/Kconfig | 10 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/bcm-iproc-mailbox.c | 422 +++++++++++++++++++++
include/linux/bcm_iproc_mailbox.h | 32 ++
6 files changed, 498 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-mailbox.txt
create mode 100644 drivers/mailbox/bcm-iproc-mailbox.c
create mode 100644 include/linux/bcm_iproc_mailbox.h
--
1.9.1
^ permalink raw reply
* [PATCH v1 1/4] dt-bindings: Document Broadcom iProc mailbox controller driver
From: Jonathan Richardson @ 2016-10-18 19:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476817238-1226-1-git-send-email-jonathan.richardson@broadcom.com>
Reviewed-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
---
.../bindings/mailbox/brcm,iproc-mailbox.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-mailbox.txt
diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-mailbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-mailbox.txt
new file mode 100644
index 0000000..a40d810
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-mailbox.txt
@@ -0,0 +1,20 @@
+* Broadcom's iProc Mailbox Controller
+
+Required properties:
+- compatible: Must be "brcm,iproc-mailbox"
+- reg: Defines the base address of the mailbox controller.
+- interrupts: The mailbox controller's interrupt.
+- #interrupt-cells: Must be 1.
+- interrupt-controller: Sets device as an interrupt controller.
+- #mbox-cells: Must be 1.
+
+Example:
+
+ mailbox: mailbox at 3024024 {
+ compatible = "brcm,iproc-mailbox";
+ reg = <0x03024024 0x40>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ #mbox-cells = <1>;
+ };
--
1.9.1
^ permalink raw reply related
* [PATCH v1 2/4] mailbox: Add iProc mailbox controller driver
From: Jonathan Richardson @ 2016-10-18 19:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476817238-1226-1-git-send-email-jonathan.richardson@broadcom.com>
The Broadcom iProc mailbox controller handles all communication with a
Cortex-M0 MCU processor that provides support for power, clock, and
reset management.
Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
---
drivers/mailbox/Kconfig | 10 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/bcm-iproc-mailbox.c | 422 ++++++++++++++++++++++++++++++++++++
include/linux/bcm_iproc_mailbox.h | 32 +++
4 files changed, 466 insertions(+)
create mode 100644 drivers/mailbox/bcm-iproc-mailbox.c
create mode 100644 include/linux/bcm_iproc_mailbox.h
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 11eebfe..284916d 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -143,4 +143,14 @@ config BCM_PDC_MBOX
Mailbox implementation for the Broadcom PDC ring manager,
which provides access to various offload engines on Broadcom
SoCs. Say Y here if you want to use the Broadcom PDC.
+
+config BCM_IPROC_MBOX
+ bool "Broadcom iProc Mailbox"
+ depends on ARCH_BCM_IPROC || COMPILE_TEST
+ default ARCH_BCM_IPROC
+ help
+ Broadcom iProc architected SoC's have an always on Cortex-M0 MCU processor
+ that handles support for power, clock, and reset management. The iProc
+ mailbox controller handles all communication with this processor.
+
endif
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index ace6fed..f96eab6 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -29,3 +29,5 @@ obj-$(CONFIG_XGENE_SLIMPRO_MBOX) += mailbox-xgene-slimpro.o
obj-$(CONFIG_HI6220_MBOX) += hi6220-mailbox.o
obj-$(CONFIG_BCM_PDC_MBOX) += bcm-pdc-mailbox.o
+
+obj-$(CONFIG_BCM_IPROC_MBOX) += bcm-iproc-mailbox.o
diff --git a/drivers/mailbox/bcm-iproc-mailbox.c b/drivers/mailbox/bcm-iproc-mailbox.c
new file mode 100644
index 0000000..4e5c97c
--- /dev/null
+++ b/drivers/mailbox/bcm-iproc-mailbox.c
@@ -0,0 +1,422 @@
+/*
+ * Copyright (C) 2016 Broadcom.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/of_device.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/notifier.h>
+#include <linux/reboot.h>
+#include <linux/mailbox_controller.h>
+#include <linux/mailbox_client.h>
+#include <linux/bcm_iproc_mailbox.h>
+#include <linux/delay.h>
+
+#define IPROC_CRMU_MAILBOX0_OFFSET 0x0
+#define IPROC_CRMU_MAILBOX1_OFFSET 0x4
+
+#define CRMU_IPROC_MAILBOX0_OFFSET 0x8
+#define CRMU_IPROC_MAILBOX1_OFFSET 0xc
+
+#define IPROC_INTR_STATUS 0x34
+#define IPROC_MAILBOX_INTR_SHIFT 0
+#define IPROC_MAILBOX_INTR_MASK 0x1
+
+#define IPROC_INTR_CLEAR 0x3c
+#define IPROC_MAILBOX_INTR_CLR_SHIFT 0
+
+#define M0_IPC_CMD_DONE_MASK 0x80000000
+#define M0_IPC_CMD_REPLY_MASK 0x3fff0000
+#define M0_IPC_CMD_REPLY_SHIFT 16
+
+/* Domains that interrupts get forwarded to. */
+enum mbox_domain {
+ AON_GPIO_DOMAIN = 0,
+};
+
+enum iproc_m0_cmd {
+ /*
+ * Enable/disable GPIO event forwarding from M0 to A9
+ * Param - 1 to enable, 0 to disable
+ * Response - return code
+ */
+ M0_IPC_M0_CMD_AON_GPIO_FORWARDING_ENABLE = 0xe,
+
+ /*
+ * AON GPIO interrupt ("forwarded" to IPROC)
+ * Param - AON GPIO mask
+ */
+ M0_IPC_HOST_CMD_AON_GPIO_EVENT = 0x102,
+};
+
+struct iproc_mbox {
+ struct device *dev;
+ void __iomem *base;
+ spinlock_t lock;
+ struct irq_domain *irq_domain;
+ struct mbox_controller controller;
+ u32 num_chans;
+ int mbox_irq;
+};
+
+static struct lock_class_key mbox_lock_class;
+
+static void iproc_mbox_irq_handler(struct irq_desc *desc)
+{
+ struct iproc_mbox *mbox = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned long status;
+ u32 cmd, param;
+ int virq;
+
+ chained_irq_enter(chip, desc);
+
+ /* Determine type of interrupt. */
+ status = readl(mbox->base + IPROC_INTR_STATUS);
+ status = (status >> IPROC_MAILBOX_INTR_SHIFT) &
+ IPROC_MAILBOX_INTR_MASK;
+
+ /* Process mailbox interrupts. */
+ if (status) {
+ writel(1 << IPROC_MAILBOX_INTR_CLR_SHIFT,
+ mbox->base + IPROC_INTR_CLEAR);
+
+ cmd = readl(mbox->base + CRMU_IPROC_MAILBOX0_OFFSET);
+ param = readl(mbox->base + CRMU_IPROC_MAILBOX1_OFFSET);
+
+ dev_dbg(mbox->dev,
+ "Received message from M0: cmd 0x%x param 0x%x\n",
+ cmd, param);
+
+ /* Process AON GPIO interrupt - forward to GPIO handler. */
+ if (cmd == M0_IPC_HOST_CMD_AON_GPIO_EVENT) {
+ virq = irq_find_mapping(mbox->irq_domain,
+ AON_GPIO_DOMAIN);
+ generic_handle_irq(virq);
+ }
+ }
+
+ chained_irq_exit(chip, desc);
+}
+
+static int iproc_mbox_send_data_m0_imp(struct iproc_mbox *mbox,
+ struct iproc_mbox_msg *msg, int max_retries, int poll_period_us)
+{
+ unsigned long flags;
+ u32 val;
+ int err = 0;
+ int retries;
+
+ spin_lock_irqsave(&mbox->lock, flags);
+
+ dev_dbg(mbox->dev, "Send msg to M0: cmd=0x%x, param=0x%x, wait_ack=%d\n",
+ msg->cmd, msg->param, msg->wait_ack);
+
+ writel(msg->cmd, mbox->base + IPROC_CRMU_MAILBOX0_OFFSET);
+ writel(msg->param, mbox->base + IPROC_CRMU_MAILBOX1_OFFSET);
+
+ if (msg->wait_ack) {
+ err = msg->reply_code = -ETIMEDOUT;
+ for (retries = 0; retries < max_retries; retries++) {
+ val = readl(mbox->base + IPROC_CRMU_MAILBOX0_OFFSET);
+ if (val & M0_IPC_CMD_DONE_MASK) {
+ /*
+ * M0 replied - save reply code and
+ * clear error.
+ */
+ msg->reply_code = (val &
+ M0_IPC_CMD_REPLY_MASK) >>
+ M0_IPC_CMD_REPLY_SHIFT;
+ err = 0;
+ break;
+ }
+ udelay(poll_period_us);
+ }
+ }
+
+ spin_unlock_irqrestore(&mbox->lock, flags);
+
+ return err;
+}
+
+static void iproc_mbox_aon_gpio_forwarding_enable(struct iproc_mbox *mbox,
+ bool en)
+{
+ struct iproc_mbox_msg msg;
+ const int max_retries = 5;
+ const int poll_period_us = 200;
+
+ msg.cmd = M0_IPC_M0_CMD_AON_GPIO_FORWARDING_ENABLE;
+ msg.param = en ? 1 : 0;
+ msg.wait_ack = true;
+
+ iproc_mbox_send_data_m0_imp(mbox, &msg, max_retries, poll_period_us);
+}
+
+static void iproc_mbox_irq_unmask(struct irq_data *d)
+{
+ struct iproc_mbox *iproc_mbox = irq_data_get_irq_chip_data(d);
+
+ iproc_mbox_aon_gpio_forwarding_enable(iproc_mbox, true);
+}
+
+static void iproc_mbox_irq_mask(struct irq_data *d)
+{
+ /* Do nothing - Mask callback is not required, since upon GPIO event,
+ * M0 disables GPIO forwarding to A9. Hence, GPIO forwarding is already
+ * disabled when in mbox irq handler, and no other mbox events from M0
+ * to A9 are expected until GPIO forwarding is enabled following
+ * iproc_mbox_irq_unmask()
+ */
+}
+
+static struct irq_chip iproc_mbox_irq_chip = {
+ .name = "bcm-iproc-mbox",
+ .irq_mask = iproc_mbox_irq_mask,
+ .irq_unmask = iproc_mbox_irq_unmask,
+};
+
+static int iproc_mbox_irq_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hwirq)
+{
+ int ret;
+
+ ret = irq_set_chip_data(irq, d->host_data);
+ if (ret < 0)
+ return ret;
+ irq_set_lockdep_class(irq, &mbox_lock_class);
+ irq_set_chip_and_handler(irq, &iproc_mbox_irq_chip,
+ handle_simple_irq);
+
+ return 0;
+}
+
+static void iproc_mbox_irq_unmap(struct irq_domain *d, unsigned int irq)
+{
+ irq_set_chip_and_handler(irq, NULL, NULL);
+ irq_set_chip_data(irq, NULL);
+}
+
+static struct irq_domain_ops iproc_mbox_irq_ops = {
+ .map = iproc_mbox_irq_map,
+ .unmap = iproc_mbox_irq_unmap,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static const struct of_device_id iproc_mbox_of_match[] = {
+ { .compatible = "brcm,iproc-mailbox" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, iproc_mbox_of_match);
+
+/*
+ * Sends a message to M0. The mailbox framework prevents multiple accesses to
+ * the same channel but there is only one h/w "channel". This driver allows
+ * multiple clients to create channels to the controller but must serialize
+ * access to the mailbox registers used to communicate with the M0.
+ */
+static int iproc_mbox_send_data_m0(struct mbox_chan *chan, void *data)
+{
+ struct iproc_mbox *mbox = dev_get_drvdata(chan->mbox->dev);
+ struct iproc_mbox_msg *msg = (struct iproc_mbox_msg *)data;
+ int err = 0;
+ const int poll_period_us = 5;
+ int max_retries;
+
+ if (!msg)
+ return -EINVAL;
+
+ /* At least 1 attempt for misconfigured clients. */
+ if (chan->cl->tx_tout == 0)
+ max_retries = 1;
+ else
+ max_retries = (chan->cl->tx_tout * 1000) / poll_period_us;
+
+ err = iproc_mbox_send_data_m0_imp(mbox, msg, max_retries,
+ poll_period_us);
+
+ return err;
+}
+
+static int iproc_mbox_startup(struct mbox_chan *chan)
+{
+ /* Do nothing. */
+ return 0;
+}
+
+static void iproc_mbox_shutdown(struct mbox_chan *chan)
+{
+ /* Do nothing. */
+}
+
+static struct mbox_chan_ops iproc_mbox_ops = {
+ .send_data = iproc_mbox_send_data_m0,
+ .startup = iproc_mbox_startup,
+ .shutdown = iproc_mbox_shutdown,
+};
+
+static int __init iproc_mbox_probe(struct platform_device *pdev)
+{
+ int virq;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct iproc_mbox *iproc_mbox;
+ int err;
+ struct device_node *node;
+ const char *mbox_prop_name = "mboxes";
+
+ dev_info(&pdev->dev, "Initializing iproc mailbox controller\n");
+
+ iproc_mbox = devm_kzalloc(dev, sizeof(*iproc_mbox), GFP_KERNEL);
+ if (!iproc_mbox)
+ return -ENOMEM;
+
+ iproc_mbox->dev = dev;
+ spin_lock_init(&iproc_mbox->lock);
+
+ platform_set_drvdata(pdev, iproc_mbox);
+
+ /* Count number of "mboxes" properties to determine # channels. */
+ for_each_of_allnodes(node) {
+ struct property *prop = of_find_property(
+ node, mbox_prop_name, NULL);
+ if (prop) {
+ struct device_node *mbox_phandle = of_parse_phandle(
+ node, mbox_prop_name, 0);
+ if (mbox_phandle == dev->of_node)
+ iproc_mbox->num_chans++;
+ }
+ }
+
+ /*
+ * Allocate mailbox channels. If the mailbox driver is only being used
+ * to forward interrupts to the gpio domain then there may be no
+ * clients.
+ */
+ if (iproc_mbox->num_chans > 0) {
+ struct mbox_chan *chans = devm_kzalloc(&pdev->dev,
+ sizeof(*chans) * iproc_mbox->num_chans, GFP_KERNEL);
+
+ if (!chans)
+ return -ENOMEM;
+
+ /* Initialize mailbox controller. */
+ iproc_mbox->controller.dev = iproc_mbox->dev;
+ iproc_mbox->controller.num_chans = iproc_mbox->num_chans;
+ iproc_mbox->controller.chans = chans;
+ iproc_mbox->controller.ops = &iproc_mbox_ops;
+ iproc_mbox->controller.txdone_irq = false;
+ iproc_mbox->controller.txdone_poll = false;
+ err = mbox_controller_register(&iproc_mbox->controller);
+ if (err) {
+ dev_err(&pdev->dev, "Register mailbox failed\n");
+ return err;
+ }
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ iproc_mbox->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(iproc_mbox->base)) {
+ dev_err(&pdev->dev, "unable to map I/O memory\n");
+ return PTR_ERR(iproc_mbox->base);
+ }
+
+ iproc_mbox->mbox_irq = irq_of_parse_and_map(dev->of_node, 0);
+ if (!iproc_mbox->mbox_irq) {
+ dev_err(&pdev->dev, "irq_of_parse_and_map failed\n");
+ return -ENODEV;
+ }
+
+ iproc_mbox->irq_domain = irq_domain_add_linear(dev->of_node, 1,
+ &iproc_mbox_irq_ops, iproc_mbox);
+ if (!iproc_mbox->irq_domain) {
+ dev_err(&pdev->dev, "unable to allocate IRQ domain\n");
+ err = -ENXIO;
+ goto dispose_mapping;
+ }
+
+ /* Map irq for AON GPIO interrupt handling into this domain. */
+ virq = irq_create_mapping(iproc_mbox->irq_domain, AON_GPIO_DOMAIN);
+ if (!virq) {
+ dev_err(&pdev->dev, "failed mapping irq into domain\n");
+ err = -ENXIO;
+ goto domain_remove;
+ }
+ dev_dbg(&pdev->dev, "irq for aon gpio domain: %d\n", virq);
+
+ irq_set_chained_handler_and_data(iproc_mbox->mbox_irq,
+ iproc_mbox_irq_handler, iproc_mbox);
+
+ return 0;
+
+domain_remove:
+ irq_domain_remove(iproc_mbox->irq_domain);
+
+dispose_mapping:
+ irq_dispose_mapping(iproc_mbox->mbox_irq);
+
+ return err;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int iproc_mbox_suspend(struct device *dev)
+{
+ struct iproc_mbox *mbox = dev_get_drvdata(dev);
+
+ dev_info(dev,
+ "Suspending mailbox controller: disabling GPIO forwarding\n");
+ iproc_mbox_aon_gpio_forwarding_enable(mbox, false);
+ synchronize_irq(mbox->mbox_irq);
+
+ return 0;
+}
+
+static int iproc_mbox_resume(struct device *dev)
+{
+ struct iproc_mbox *mbox = dev_get_drvdata(dev);
+
+ dev_info(dev,
+ "Resuming mailbox controller: enabling AON GPIO forwarding\n");
+ iproc_mbox_aon_gpio_forwarding_enable(mbox, true);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(iproc_mbox_pm_ops, iproc_mbox_suspend,
+ iproc_mbox_resume);
+
+struct platform_driver iproc_mbox_driver = {
+ .driver = {
+ .name = "brcm,iproc-mailbox",
+ .of_match_table = iproc_mbox_of_match,
+ .pm = &iproc_mbox_pm_ops,
+ },
+ .probe = iproc_mbox_probe,
+};
+
+static int __init iproc_mbox_init(void)
+{
+ return platform_driver_register(&iproc_mbox_driver);
+}
+arch_initcall(iproc_mbox_init);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("Broadcom iProc Mailbox Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/bcm_iproc_mailbox.h b/include/linux/bcm_iproc_mailbox.h
new file mode 100644
index 0000000..68f37e4
--- /dev/null
+++ b/include/linux/bcm_iproc_mailbox.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2016 Broadcom.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef _BCM_IPROC_MAILBOX_H_
+#define _BCM_IPROC_MAILBOX_H_
+
+/*
+ * A message to send to the M0 processor.
+ * @cmd Command to send.
+ * @param Parameter corresponding to command.
+ * @wait_ack true if mbox_send_message() should wait for a reply from the M0,
+ * false if the M0 doesn't reply. This depends on the message being sent.
+ * @reply_code The response code from the M0 for the command sent (wait_ack was
+ * set to true).
+ */
+struct iproc_mbox_msg {
+ u32 cmd;
+ u32 param;
+ bool wait_ack;
+ u32 reply_code;
+};
+
+#endif
--
1.9.1
^ permalink raw reply related
* [PATCH v1 3/4] ARM: dts: Enable Broadcom iProc mailbox controller
From: Jonathan Richardson @ 2016-10-18 19:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476817238-1226-1-git-send-email-jonathan.richardson@broadcom.com>
Reviewed-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index fabc9f3..f873b74 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -114,6 +114,15 @@
<0x0301d24c 0x2c>;
};
+ mailbox: mailbox at 03024024 {
+ compatible = "brcm,iproc-mailbox";
+ reg = <0x03024024 0x40>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ #mbox-cells = <1>;
+ };
+
gpio_crmu: gpio at 03024800 {
compatible = "brcm,cygnus-crmu-gpio";
reg = <0x03024800 0x50>,
--
1.9.1
^ permalink raw reply related
* [PATCH v1 4/4] ARM: dts: Enable interrupt support for cygnus crmu gpio driver
From: Jonathan Richardson @ 2016-10-18 19:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476817238-1226-1-git-send-email-jonathan.richardson@broadcom.com>
The M0 processor handles interrupts for the always-on CRMU GPIO
controller. Setting the CRMU GPIO driver with the mailbox controller as
the interrupt parent allows the mailbox controller to forward interrupts
from the M0 to the GPIO driver for processing.
Reviewed-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index f873b74..8b046a8 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -130,6 +130,9 @@
ngpios = <6>;
#gpio-cells = <2>;
gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&mailbox>;
+ interrupts = <0>;
};
i2c0: i2c at 18008000 {
--
1.9.1
^ permalink raw reply related
* [PATCH v2] drivers: psci: PSCI checker module
From: Jean-Philippe Brucker @ 2016-10-18 19:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160921143905.36197-1-kevin.brodsky@arm.com>
Hi Kevin,
On 21/09/16 15:39, Kevin Brodsky wrote:
> On arm and arm64, PSCI is one of the possible firmware interfaces
> used for power management. This includes both turning CPUs on and off,
> and suspending them (entering idle states).
>
> This patch adds a PSCI checker module that enables basic testing of
> PSCI operations during startup. There are two main tests: CPU
> hotplugging and suspending.
>
> In the hotplug tests, the hotplug API is used to turn off and on again
> all CPUs in the system, and then all CPUs in each cluster, checking
> the consistency of the return codes.
>
> In the suspend tests, a high-priority thread is created on each core
> and uses low-level cpuidle functionalities to enter suspend, in all
> the possible states and multiple times. This should allow a maximum
> number of CPUs to enter the same sleep state at the same or slightly
> different time.
>
> In essence, the suspend tests use a principle similar to that of the
> intel_powerclamp driver (drivers/thermal/intel_powerclamp.c), but the
> threads are only kept for the duration of the test (they are already
> gone when userspace is started).
>
> While in theory power management PSCI functions (CPU_{ON,OFF,SUSPEND})
> could be directly called, this proved too difficult as it would imply
> the duplication of all the logic used by the kernel to allow for a
> clean shutdown/bringup/suspend of the CPU (the deepest sleep states
> implying potentially the shutdown of the CPU).
>
> Note that this file cannot be compiled as a loadable module, since it
> uses a number of non-exported identifiers (essentially for
> PSCI-specific checks and direct use of cpuidle) and relies on the
> absence of userspace to avoid races when calling hotplug and cpuidle
> functions.
>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Kevin Hilman <khilman@kernel.org>
> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com>
> ---
> Changelog v1..v2:
> * Do not count tick_broadcast_enter() failures as errors, as they may
> be unavoidable. When it happens, fall back to WFI.
> * Do not count unexpected sleep states as errors (currently, the only
> case is when falling back to WFI). Instead, report the number of
> times it happens before the suspend thread exits.
> * Use usecs_to_jiffies() to compute the suspend timeout. The previous
> version resulted in a zero timeout if the target residency was
> shorter than a jiffy.
> * Various cleanup.
>
> Thanks to Lorenzo for his help with improving this patch!
>
> Kevin
[...]
> +
> +static int suspend_tests(void)
> +{
> + int i, cpu, err = 0;
> + struct task_struct **threads;
> + int nb_threads = 0;
> +
> + threads = kmalloc_array(nb_available_cpus, sizeof(*threads),
> + GFP_KERNEL);
> + if (!threads)
> + return -ENOMEM;
> +
> + for_each_online_cpu(cpu) {
> + struct task_struct *thread;
> + /* Check that cpuidle is available on that CPU. */
> + struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
> + struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev);
> +
> + if (cpuidle_not_available(drv, dev)) {
> + pr_warn("cpuidle not available on CPU %d, ignoring\n",
> + cpu);
> + continue;
> + }
> +
> + thread = kthread_create_on_cpu(suspend_stress_thread,
> + (void *)(long)cpu, cpu,
> + "psci_suspend_stress");
> + if (IS_ERR(thread))
> + pr_err("Failed to create kthread on CPU %d\n", cpu);
> + else
> + threads[nb_threads++] = thread;
> + }
> + if (nb_threads < 1) {
> + kfree(threads);
> + return -ENODEV;
> + }
> +
> + atomic_set(&nb_active_threads, nb_threads);
> +
> + /*
> + * Stop cpuidle to prevent the idle tasks from entering a deep sleep
> + * mode, as it might interfere with the suspend threads on other CPUs.
> + * This does not prevent the suspend threads from using cpuidle (only
> + * the idle tasks check this status).
> + */
> + cpuidle_pause();
> +
> + /*
> + * Unpark the suspend threads. To avoid the main thread being preempted
> + * before all the threads have been unparked, the suspend threads will
> + * wait for the completion of suspend_threads_started.
> + */
> + for (i = 0; i < nb_threads; ++i)
> + kthread_unpark(threads[i]);
Just a heads up: this doesn't work anymore, since a65d4096
(kthread/smpboot: do not park in kthread_create_on_cpu()), in 4.9-rc1. I
think that the unpark call could be replaced by wake_up_process. The
comment of kthread_create_on_cpu is now misleading.
Thanks,
Jean-Philippe
^ permalink raw reply
* [PATCH 1/3] ARM: remove indirection of asm/mach-types.h
From: Russell King @ 2016-10-18 19:31 UTC (permalink / raw)
To: linux-arm-kernel
Arrange for mach-types.h to be directly generated in the relevant
path, so we don't need a one-liner file in arch/arm/include/asm/.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
arch/arm/Makefile | 2 +-
arch/arm/include/asm/Kbuild | 2 ++
arch/arm/include/asm/mach-types.h | 1 -
arch/arm/tools/Makefile | 16 +++++++++++++++-
4 files changed, 18 insertions(+), 3 deletions(-)
delete mode 100644 arch/arm/include/asm/mach-types.h
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6be9ee148b78..2208a73ba1d4 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -312,7 +312,7 @@ all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
boot := arch/arm/boot
archprepare:
- $(Q)$(MAKE) $(build)=arch/arm/tools include/generated/mach-types.h
+ $(Q)$(MAKE) $(build)=arch/arm/tools kapi
# Convert bzImage to zImage
bzImage: zImage
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 0745538b26d3..5b06064946ce 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -39,3 +39,5 @@ generic-y += termios.h
generic-y += timex.h
generic-y += trace_clock.h
generic-y += unaligned.h
+
+generated-y += mach-types.h
diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
deleted file mode 100644
index 948178cc6ba8..000000000000
--- a/arch/arm/include/asm/mach-types.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <generated/mach-types.h>
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index 6e4cd1867a9f..bdf48e4949ad 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -4,10 +4,24 @@
# Copyright (C) 2001 Russell King
#
+gen := arch/$(ARCH)/include/generated
+kapi := $(gen)/asm
+
+kapi-hdrs-y := $(kapi)/mach-types.h
+
+targets += $(addprefix ../../../,$(kapi-hdrs-y))
+
+PHONY += kapi
+
+kapi: $(kapi-hdrs-y)
+
+# Create output directory if not already present
+_dummy := $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)')
+
quiet_cmd_gen_mach = GEN $@
cmd_gen_mach = mkdir -p $(dir $@) && \
$(AWK) -f $(filter-out $(PHONY),$^) > $@ || \
{ rm -f $@; /bin/false; }
-include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types FORCE
+$(kapi)/mach-types.h: $(src)/gen-mach-types $(src)/mach-types FORCE
$(call if_changed,gen_mach)
--
2.1.0
^ permalink raw reply related
* [PATCH 2/3] ARM: convert to generated system call tables
From: Russell King @ 2016-10-18 19:31 UTC (permalink / raw)
To: linux-arm-kernel
Convert ARM to use a similar mechanism to x86 to generate the unistd.h
system call numbers and the various kernel system call tables. This
means that rather than having to edit three places (asm/unistd.h for
the total number of system calls, uapi/asm/unistd.h for the system call
numbers, and arch/arm/kernel/calls.S for the call table) we have only
one place to edit, making the process much more simple.
The scripts have knowledge of the table padding requirements, so there's
no need to worry about __NR_syscalls not fitting within the immediate
constant field of ALU instructions anymore.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
arch/arm/Makefile | 3 +
arch/arm/include/asm/Kbuild | 1 +
arch/arm/include/asm/unistd.h | 26 ++-
arch/arm/include/uapi/asm/Kbuild | 3 +
arch/arm/include/uapi/asm/unistd.h | 421 +-----------------------------------
arch/arm/kernel/calls.S | 412 -----------------------------------
arch/arm/kernel/entry-common.S | 76 ++++---
arch/arm/tools/Makefile | 62 +++++-
arch/arm/tools/syscall.tbl | 428 +++++++++++++++++++++++++++++++++++++
arch/arm/tools/syscallhdr.sh | 30 +++
arch/arm/tools/syscallnr.sh | 33 +++
arch/arm/tools/syscalltbl.sh | 21 ++
12 files changed, 643 insertions(+), 873 deletions(-)
delete mode 100644 arch/arm/kernel/calls.S
create mode 100644 arch/arm/tools/syscall.tbl
create mode 100644 arch/arm/tools/syscallhdr.sh
create mode 100644 arch/arm/tools/syscallnr.sh
create mode 100644 arch/arm/tools/syscalltbl.sh
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 2208a73ba1d4..5a26576fba9a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -311,6 +311,9 @@ all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
boot := arch/arm/boot
+archheaders:
+ $(Q)$(MAKE) $(build)=arch/arm/tools uapi
+
archprepare:
$(Q)$(MAKE) $(build)=arch/arm/tools kapi
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 5b06064946ce..b7960e3956b2 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -41,3 +41,4 @@ generic-y += trace_clock.h
generic-y += unaligned.h
generated-y += mach-types.h
+generated-y += unistd-nr.h
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 194b69923389..076090d2dbf5 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -14,12 +14,7 @@
#define __ASM_ARM_UNISTD_H
#include <uapi/asm/unistd.h>
-
-/*
- * This may need to be greater than __NR_last_syscall+1 in order to
- * account for the padding in the syscall table
- */
-#define __NR_syscalls (396)
+#include <asm/unistd-nr.h>
#define __ARCH_WANT_STAT64
#define __ARCH_WANT_SYS_GETHOSTNAME
@@ -52,4 +47,23 @@
#define __IGNORE_fadvise64_64
#define __IGNORE_migrate_pages
+#ifdef __ARM_EABI__
+/*
+ * The following syscalls are obsolete and no longer available for EABI:
+ * __NR_time
+ * __NR_umount
+ * __NR_stime
+ * __NR_alarm
+ * __NR_utime
+ * __NR_getrlimit
+ * __NR_select
+ * __NR_readdir
+ * __NR_mmap
+ * __NR_socketcall
+ * __NR_syscall
+ * __NR_ipc
+ */
+#define __IGNORE_getrlimit
+#endif
+
#endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/include/uapi/asm/Kbuild b/arch/arm/include/uapi/asm/Kbuild
index a1c05f93d920..46a76cd6acb6 100644
--- a/arch/arm/include/uapi/asm/Kbuild
+++ b/arch/arm/include/uapi/asm/Kbuild
@@ -18,3 +18,6 @@ header-y += stat.h
header-y += statfs.h
header-y += swab.h
header-y += unistd.h
+genhdr-y += unistd-common.h
+genhdr-y += unistd-oabi.h
+genhdr-y += unistd-eabi.h
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 2cb9dc770e1d..28bd456494a3 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -17,409 +17,14 @@
#if defined(__thumb__) || defined(__ARM_EABI__)
#define __NR_SYSCALL_BASE 0
+#include <asm/unistd-eabi.h>
#else
#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
+#include <asm/unistd-oabi.h>
#endif
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall (__NR_SYSCALL_BASE+ 0)
-#define __NR_exit (__NR_SYSCALL_BASE+ 1)
-#define __NR_fork (__NR_SYSCALL_BASE+ 2)
-#define __NR_read (__NR_SYSCALL_BASE+ 3)
-#define __NR_write (__NR_SYSCALL_BASE+ 4)
-#define __NR_open (__NR_SYSCALL_BASE+ 5)
-#define __NR_close (__NR_SYSCALL_BASE+ 6)
- /* 7 was sys_waitpid */
-#define __NR_creat (__NR_SYSCALL_BASE+ 8)
-#define __NR_link (__NR_SYSCALL_BASE+ 9)
-#define __NR_unlink (__NR_SYSCALL_BASE+ 10)
-#define __NR_execve (__NR_SYSCALL_BASE+ 11)
-#define __NR_chdir (__NR_SYSCALL_BASE+ 12)
-#define __NR_time (__NR_SYSCALL_BASE+ 13)
-#define __NR_mknod (__NR_SYSCALL_BASE+ 14)
-#define __NR_chmod (__NR_SYSCALL_BASE+ 15)
-#define __NR_lchown (__NR_SYSCALL_BASE+ 16)
- /* 17 was sys_break */
- /* 18 was sys_stat */
-#define __NR_lseek (__NR_SYSCALL_BASE+ 19)
-#define __NR_getpid (__NR_SYSCALL_BASE+ 20)
-#define __NR_mount (__NR_SYSCALL_BASE+ 21)
-#define __NR_umount (__NR_SYSCALL_BASE+ 22)
-#define __NR_setuid (__NR_SYSCALL_BASE+ 23)
-#define __NR_getuid (__NR_SYSCALL_BASE+ 24)
-#define __NR_stime (__NR_SYSCALL_BASE+ 25)
-#define __NR_ptrace (__NR_SYSCALL_BASE+ 26)
-#define __NR_alarm (__NR_SYSCALL_BASE+ 27)
- /* 28 was sys_fstat */
-#define __NR_pause (__NR_SYSCALL_BASE+ 29)
-#define __NR_utime (__NR_SYSCALL_BASE+ 30)
- /* 31 was sys_stty */
- /* 32 was sys_gtty */
-#define __NR_access (__NR_SYSCALL_BASE+ 33)
-#define __NR_nice (__NR_SYSCALL_BASE+ 34)
- /* 35 was sys_ftime */
-#define __NR_sync (__NR_SYSCALL_BASE+ 36)
-#define __NR_kill (__NR_SYSCALL_BASE+ 37)
-#define __NR_rename (__NR_SYSCALL_BASE+ 38)
-#define __NR_mkdir (__NR_SYSCALL_BASE+ 39)
-#define __NR_rmdir (__NR_SYSCALL_BASE+ 40)
-#define __NR_dup (__NR_SYSCALL_BASE+ 41)
-#define __NR_pipe (__NR_SYSCALL_BASE+ 42)
-#define __NR_times (__NR_SYSCALL_BASE+ 43)
- /* 44 was sys_prof */
-#define __NR_brk (__NR_SYSCALL_BASE+ 45)
-#define __NR_setgid (__NR_SYSCALL_BASE+ 46)
-#define __NR_getgid (__NR_SYSCALL_BASE+ 47)
- /* 48 was sys_signal */
-#define __NR_geteuid (__NR_SYSCALL_BASE+ 49)
-#define __NR_getegid (__NR_SYSCALL_BASE+ 50)
-#define __NR_acct (__NR_SYSCALL_BASE+ 51)
-#define __NR_umount2 (__NR_SYSCALL_BASE+ 52)
- /* 53 was sys_lock */
-#define __NR_ioctl (__NR_SYSCALL_BASE+ 54)
-#define __NR_fcntl (__NR_SYSCALL_BASE+ 55)
- /* 56 was sys_mpx */
-#define __NR_setpgid (__NR_SYSCALL_BASE+ 57)
- /* 58 was sys_ulimit */
- /* 59 was sys_olduname */
-#define __NR_umask (__NR_SYSCALL_BASE+ 60)
-#define __NR_chroot (__NR_SYSCALL_BASE+ 61)
-#define __NR_ustat (__NR_SYSCALL_BASE+ 62)
-#define __NR_dup2 (__NR_SYSCALL_BASE+ 63)
-#define __NR_getppid (__NR_SYSCALL_BASE+ 64)
-#define __NR_getpgrp (__NR_SYSCALL_BASE+ 65)
-#define __NR_setsid (__NR_SYSCALL_BASE+ 66)
-#define __NR_sigaction (__NR_SYSCALL_BASE+ 67)
- /* 68 was sys_sgetmask */
- /* 69 was sys_ssetmask */
-#define __NR_setreuid (__NR_SYSCALL_BASE+ 70)
-#define __NR_setregid (__NR_SYSCALL_BASE+ 71)
-#define __NR_sigsuspend (__NR_SYSCALL_BASE+ 72)
-#define __NR_sigpending (__NR_SYSCALL_BASE+ 73)
-#define __NR_sethostname (__NR_SYSCALL_BASE+ 74)
-#define __NR_setrlimit (__NR_SYSCALL_BASE+ 75)
-#define __NR_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */
-#define __NR_getrusage (__NR_SYSCALL_BASE+ 77)
-#define __NR_gettimeofday (__NR_SYSCALL_BASE+ 78)
-#define __NR_settimeofday (__NR_SYSCALL_BASE+ 79)
-#define __NR_getgroups (__NR_SYSCALL_BASE+ 80)
-#define __NR_setgroups (__NR_SYSCALL_BASE+ 81)
-#define __NR_select (__NR_SYSCALL_BASE+ 82)
-#define __NR_symlink (__NR_SYSCALL_BASE+ 83)
- /* 84 was sys_lstat */
-#define __NR_readlink (__NR_SYSCALL_BASE+ 85)
-#define __NR_uselib (__NR_SYSCALL_BASE+ 86)
-#define __NR_swapon (__NR_SYSCALL_BASE+ 87)
-#define __NR_reboot (__NR_SYSCALL_BASE+ 88)
-#define __NR_readdir (__NR_SYSCALL_BASE+ 89)
-#define __NR_mmap (__NR_SYSCALL_BASE+ 90)
-#define __NR_munmap (__NR_SYSCALL_BASE+ 91)
-#define __NR_truncate (__NR_SYSCALL_BASE+ 92)
-#define __NR_ftruncate (__NR_SYSCALL_BASE+ 93)
-#define __NR_fchmod (__NR_SYSCALL_BASE+ 94)
-#define __NR_fchown (__NR_SYSCALL_BASE+ 95)
-#define __NR_getpriority (__NR_SYSCALL_BASE+ 96)
-#define __NR_setpriority (__NR_SYSCALL_BASE+ 97)
- /* 98 was sys_profil */
-#define __NR_statfs (__NR_SYSCALL_BASE+ 99)
-#define __NR_fstatfs (__NR_SYSCALL_BASE+100)
- /* 101 was sys_ioperm */
-#define __NR_socketcall (__NR_SYSCALL_BASE+102)
-#define __NR_syslog (__NR_SYSCALL_BASE+103)
-#define __NR_setitimer (__NR_SYSCALL_BASE+104)
-#define __NR_getitimer (__NR_SYSCALL_BASE+105)
-#define __NR_stat (__NR_SYSCALL_BASE+106)
-#define __NR_lstat (__NR_SYSCALL_BASE+107)
-#define __NR_fstat (__NR_SYSCALL_BASE+108)
- /* 109 was sys_uname */
- /* 110 was sys_iopl */
-#define __NR_vhangup (__NR_SYSCALL_BASE+111)
- /* 112 was sys_idle */
-#define __NR_syscall (__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
-#define __NR_wait4 (__NR_SYSCALL_BASE+114)
-#define __NR_swapoff (__NR_SYSCALL_BASE+115)
-#define __NR_sysinfo (__NR_SYSCALL_BASE+116)
-#define __NR_ipc (__NR_SYSCALL_BASE+117)
-#define __NR_fsync (__NR_SYSCALL_BASE+118)
-#define __NR_sigreturn (__NR_SYSCALL_BASE+119)
-#define __NR_clone (__NR_SYSCALL_BASE+120)
-#define __NR_setdomainname (__NR_SYSCALL_BASE+121)
-#define __NR_uname (__NR_SYSCALL_BASE+122)
- /* 123 was sys_modify_ldt */
-#define __NR_adjtimex (__NR_SYSCALL_BASE+124)
-#define __NR_mprotect (__NR_SYSCALL_BASE+125)
-#define __NR_sigprocmask (__NR_SYSCALL_BASE+126)
- /* 127 was sys_create_module */
-#define __NR_init_module (__NR_SYSCALL_BASE+128)
-#define __NR_delete_module (__NR_SYSCALL_BASE+129)
- /* 130 was sys_get_kernel_syms */
-#define __NR_quotactl (__NR_SYSCALL_BASE+131)
-#define __NR_getpgid (__NR_SYSCALL_BASE+132)
-#define __NR_fchdir (__NR_SYSCALL_BASE+133)
-#define __NR_bdflush (__NR_SYSCALL_BASE+134)
-#define __NR_sysfs (__NR_SYSCALL_BASE+135)
-#define __NR_personality (__NR_SYSCALL_BASE+136)
- /* 137 was sys_afs_syscall */
-#define __NR_setfsuid (__NR_SYSCALL_BASE+138)
-#define __NR_setfsgid (__NR_SYSCALL_BASE+139)
-#define __NR__llseek (__NR_SYSCALL_BASE+140)
-#define __NR_getdents (__NR_SYSCALL_BASE+141)
-#define __NR__newselect (__NR_SYSCALL_BASE+142)
-#define __NR_flock (__NR_SYSCALL_BASE+143)
-#define __NR_msync (__NR_SYSCALL_BASE+144)
-#define __NR_readv (__NR_SYSCALL_BASE+145)
-#define __NR_writev (__NR_SYSCALL_BASE+146)
-#define __NR_getsid (__NR_SYSCALL_BASE+147)
-#define __NR_fdatasync (__NR_SYSCALL_BASE+148)
-#define __NR__sysctl (__NR_SYSCALL_BASE+149)
-#define __NR_mlock (__NR_SYSCALL_BASE+150)
-#define __NR_munlock (__NR_SYSCALL_BASE+151)
-#define __NR_mlockall (__NR_SYSCALL_BASE+152)
-#define __NR_munlockall (__NR_SYSCALL_BASE+153)
-#define __NR_sched_setparam (__NR_SYSCALL_BASE+154)
-#define __NR_sched_getparam (__NR_SYSCALL_BASE+155)
-#define __NR_sched_setscheduler (__NR_SYSCALL_BASE+156)
-#define __NR_sched_getscheduler (__NR_SYSCALL_BASE+157)
-#define __NR_sched_yield (__NR_SYSCALL_BASE+158)
-#define __NR_sched_get_priority_max (__NR_SYSCALL_BASE+159)
-#define __NR_sched_get_priority_min (__NR_SYSCALL_BASE+160)
-#define __NR_sched_rr_get_interval (__NR_SYSCALL_BASE+161)
-#define __NR_nanosleep (__NR_SYSCALL_BASE+162)
-#define __NR_mremap (__NR_SYSCALL_BASE+163)
-#define __NR_setresuid (__NR_SYSCALL_BASE+164)
-#define __NR_getresuid (__NR_SYSCALL_BASE+165)
- /* 166 was sys_vm86 */
- /* 167 was sys_query_module */
-#define __NR_poll (__NR_SYSCALL_BASE+168)
-#define __NR_nfsservctl (__NR_SYSCALL_BASE+169)
-#define __NR_setresgid (__NR_SYSCALL_BASE+170)
-#define __NR_getresgid (__NR_SYSCALL_BASE+171)
-#define __NR_prctl (__NR_SYSCALL_BASE+172)
-#define __NR_rt_sigreturn (__NR_SYSCALL_BASE+173)
-#define __NR_rt_sigaction (__NR_SYSCALL_BASE+174)
-#define __NR_rt_sigprocmask (__NR_SYSCALL_BASE+175)
-#define __NR_rt_sigpending (__NR_SYSCALL_BASE+176)
-#define __NR_rt_sigtimedwait (__NR_SYSCALL_BASE+177)
-#define __NR_rt_sigqueueinfo (__NR_SYSCALL_BASE+178)
-#define __NR_rt_sigsuspend (__NR_SYSCALL_BASE+179)
-#define __NR_pread64 (__NR_SYSCALL_BASE+180)
-#define __NR_pwrite64 (__NR_SYSCALL_BASE+181)
-#define __NR_chown (__NR_SYSCALL_BASE+182)
-#define __NR_getcwd (__NR_SYSCALL_BASE+183)
-#define __NR_capget (__NR_SYSCALL_BASE+184)
-#define __NR_capset (__NR_SYSCALL_BASE+185)
-#define __NR_sigaltstack (__NR_SYSCALL_BASE+186)
-#define __NR_sendfile (__NR_SYSCALL_BASE+187)
- /* 188 reserved */
- /* 189 reserved */
-#define __NR_vfork (__NR_SYSCALL_BASE+190)
-#define __NR_ugetrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */
-#define __NR_mmap2 (__NR_SYSCALL_BASE+192)
-#define __NR_truncate64 (__NR_SYSCALL_BASE+193)
-#define __NR_ftruncate64 (__NR_SYSCALL_BASE+194)
-#define __NR_stat64 (__NR_SYSCALL_BASE+195)
-#define __NR_lstat64 (__NR_SYSCALL_BASE+196)
-#define __NR_fstat64 (__NR_SYSCALL_BASE+197)
-#define __NR_lchown32 (__NR_SYSCALL_BASE+198)
-#define __NR_getuid32 (__NR_SYSCALL_BASE+199)
-#define __NR_getgid32 (__NR_SYSCALL_BASE+200)
-#define __NR_geteuid32 (__NR_SYSCALL_BASE+201)
-#define __NR_getegid32 (__NR_SYSCALL_BASE+202)
-#define __NR_setreuid32 (__NR_SYSCALL_BASE+203)
-#define __NR_setregid32 (__NR_SYSCALL_BASE+204)
-#define __NR_getgroups32 (__NR_SYSCALL_BASE+205)
-#define __NR_setgroups32 (__NR_SYSCALL_BASE+206)
-#define __NR_fchown32 (__NR_SYSCALL_BASE+207)
-#define __NR_setresuid32 (__NR_SYSCALL_BASE+208)
-#define __NR_getresuid32 (__NR_SYSCALL_BASE+209)
-#define __NR_setresgid32 (__NR_SYSCALL_BASE+210)
-#define __NR_getresgid32 (__NR_SYSCALL_BASE+211)
-#define __NR_chown32 (__NR_SYSCALL_BASE+212)
-#define __NR_setuid32 (__NR_SYSCALL_BASE+213)
-#define __NR_setgid32 (__NR_SYSCALL_BASE+214)
-#define __NR_setfsuid32 (__NR_SYSCALL_BASE+215)
-#define __NR_setfsgid32 (__NR_SYSCALL_BASE+216)
-#define __NR_getdents64 (__NR_SYSCALL_BASE+217)
-#define __NR_pivot_root (__NR_SYSCALL_BASE+218)
-#define __NR_mincore (__NR_SYSCALL_BASE+219)
-#define __NR_madvise (__NR_SYSCALL_BASE+220)
-#define __NR_fcntl64 (__NR_SYSCALL_BASE+221)
- /* 222 for tux */
- /* 223 is unused */
-#define __NR_gettid (__NR_SYSCALL_BASE+224)
-#define __NR_readahead (__NR_SYSCALL_BASE+225)
-#define __NR_setxattr (__NR_SYSCALL_BASE+226)
-#define __NR_lsetxattr (__NR_SYSCALL_BASE+227)
-#define __NR_fsetxattr (__NR_SYSCALL_BASE+228)
-#define __NR_getxattr (__NR_SYSCALL_BASE+229)
-#define __NR_lgetxattr (__NR_SYSCALL_BASE+230)
-#define __NR_fgetxattr (__NR_SYSCALL_BASE+231)
-#define __NR_listxattr (__NR_SYSCALL_BASE+232)
-#define __NR_llistxattr (__NR_SYSCALL_BASE+233)
-#define __NR_flistxattr (__NR_SYSCALL_BASE+234)
-#define __NR_removexattr (__NR_SYSCALL_BASE+235)
-#define __NR_lremovexattr (__NR_SYSCALL_BASE+236)
-#define __NR_fremovexattr (__NR_SYSCALL_BASE+237)
-#define __NR_tkill (__NR_SYSCALL_BASE+238)
-#define __NR_sendfile64 (__NR_SYSCALL_BASE+239)
-#define __NR_futex (__NR_SYSCALL_BASE+240)
-#define __NR_sched_setaffinity (__NR_SYSCALL_BASE+241)
-#define __NR_sched_getaffinity (__NR_SYSCALL_BASE+242)
-#define __NR_io_setup (__NR_SYSCALL_BASE+243)
-#define __NR_io_destroy (__NR_SYSCALL_BASE+244)
-#define __NR_io_getevents (__NR_SYSCALL_BASE+245)
-#define __NR_io_submit (__NR_SYSCALL_BASE+246)
-#define __NR_io_cancel (__NR_SYSCALL_BASE+247)
-#define __NR_exit_group (__NR_SYSCALL_BASE+248)
-#define __NR_lookup_dcookie (__NR_SYSCALL_BASE+249)
-#define __NR_epoll_create (__NR_SYSCALL_BASE+250)
-#define __NR_epoll_ctl (__NR_SYSCALL_BASE+251)
-#define __NR_epoll_wait (__NR_SYSCALL_BASE+252)
-#define __NR_remap_file_pages (__NR_SYSCALL_BASE+253)
- /* 254 for set_thread_area */
- /* 255 for get_thread_area */
-#define __NR_set_tid_address (__NR_SYSCALL_BASE+256)
-#define __NR_timer_create (__NR_SYSCALL_BASE+257)
-#define __NR_timer_settime (__NR_SYSCALL_BASE+258)
-#define __NR_timer_gettime (__NR_SYSCALL_BASE+259)
-#define __NR_timer_getoverrun (__NR_SYSCALL_BASE+260)
-#define __NR_timer_delete (__NR_SYSCALL_BASE+261)
-#define __NR_clock_settime (__NR_SYSCALL_BASE+262)
-#define __NR_clock_gettime (__NR_SYSCALL_BASE+263)
-#define __NR_clock_getres (__NR_SYSCALL_BASE+264)
-#define __NR_clock_nanosleep (__NR_SYSCALL_BASE+265)
-#define __NR_statfs64 (__NR_SYSCALL_BASE+266)
-#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267)
-#define __NR_tgkill (__NR_SYSCALL_BASE+268)
-#define __NR_utimes (__NR_SYSCALL_BASE+269)
-#define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270)
-#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271)
-#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272)
-#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273)
-#define __NR_mq_open (__NR_SYSCALL_BASE+274)
-#define __NR_mq_unlink (__NR_SYSCALL_BASE+275)
-#define __NR_mq_timedsend (__NR_SYSCALL_BASE+276)
-#define __NR_mq_timedreceive (__NR_SYSCALL_BASE+277)
-#define __NR_mq_notify (__NR_SYSCALL_BASE+278)
-#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279)
-#define __NR_waitid (__NR_SYSCALL_BASE+280)
-#define __NR_socket (__NR_SYSCALL_BASE+281)
-#define __NR_bind (__NR_SYSCALL_BASE+282)
-#define __NR_connect (__NR_SYSCALL_BASE+283)
-#define __NR_listen (__NR_SYSCALL_BASE+284)
-#define __NR_accept (__NR_SYSCALL_BASE+285)
-#define __NR_getsockname (__NR_SYSCALL_BASE+286)
-#define __NR_getpeername (__NR_SYSCALL_BASE+287)
-#define __NR_socketpair (__NR_SYSCALL_BASE+288)
-#define __NR_send (__NR_SYSCALL_BASE+289)
-#define __NR_sendto (__NR_SYSCALL_BASE+290)
-#define __NR_recv (__NR_SYSCALL_BASE+291)
-#define __NR_recvfrom (__NR_SYSCALL_BASE+292)
-#define __NR_shutdown (__NR_SYSCALL_BASE+293)
-#define __NR_setsockopt (__NR_SYSCALL_BASE+294)
-#define __NR_getsockopt (__NR_SYSCALL_BASE+295)
-#define __NR_sendmsg (__NR_SYSCALL_BASE+296)
-#define __NR_recvmsg (__NR_SYSCALL_BASE+297)
-#define __NR_semop (__NR_SYSCALL_BASE+298)
-#define __NR_semget (__NR_SYSCALL_BASE+299)
-#define __NR_semctl (__NR_SYSCALL_BASE+300)
-#define __NR_msgsnd (__NR_SYSCALL_BASE+301)
-#define __NR_msgrcv (__NR_SYSCALL_BASE+302)
-#define __NR_msgget (__NR_SYSCALL_BASE+303)
-#define __NR_msgctl (__NR_SYSCALL_BASE+304)
-#define __NR_shmat (__NR_SYSCALL_BASE+305)
-#define __NR_shmdt (__NR_SYSCALL_BASE+306)
-#define __NR_shmget (__NR_SYSCALL_BASE+307)
-#define __NR_shmctl (__NR_SYSCALL_BASE+308)
-#define __NR_add_key (__NR_SYSCALL_BASE+309)
-#define __NR_request_key (__NR_SYSCALL_BASE+310)
-#define __NR_keyctl (__NR_SYSCALL_BASE+311)
-#define __NR_semtimedop (__NR_SYSCALL_BASE+312)
-#define __NR_vserver (__NR_SYSCALL_BASE+313)
-#define __NR_ioprio_set (__NR_SYSCALL_BASE+314)
-#define __NR_ioprio_get (__NR_SYSCALL_BASE+315)
-#define __NR_inotify_init (__NR_SYSCALL_BASE+316)
-#define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317)
-#define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318)
-#define __NR_mbind (__NR_SYSCALL_BASE+319)
-#define __NR_get_mempolicy (__NR_SYSCALL_BASE+320)
-#define __NR_set_mempolicy (__NR_SYSCALL_BASE+321)
-#define __NR_openat (__NR_SYSCALL_BASE+322)
-#define __NR_mkdirat (__NR_SYSCALL_BASE+323)
-#define __NR_mknodat (__NR_SYSCALL_BASE+324)
-#define __NR_fchownat (__NR_SYSCALL_BASE+325)
-#define __NR_futimesat (__NR_SYSCALL_BASE+326)
-#define __NR_fstatat64 (__NR_SYSCALL_BASE+327)
-#define __NR_unlinkat (__NR_SYSCALL_BASE+328)
-#define __NR_renameat (__NR_SYSCALL_BASE+329)
-#define __NR_linkat (__NR_SYSCALL_BASE+330)
-#define __NR_symlinkat (__NR_SYSCALL_BASE+331)
-#define __NR_readlinkat (__NR_SYSCALL_BASE+332)
-#define __NR_fchmodat (__NR_SYSCALL_BASE+333)
-#define __NR_faccessat (__NR_SYSCALL_BASE+334)
-#define __NR_pselect6 (__NR_SYSCALL_BASE+335)
-#define __NR_ppoll (__NR_SYSCALL_BASE+336)
-#define __NR_unshare (__NR_SYSCALL_BASE+337)
-#define __NR_set_robust_list (__NR_SYSCALL_BASE+338)
-#define __NR_get_robust_list (__NR_SYSCALL_BASE+339)
-#define __NR_splice (__NR_SYSCALL_BASE+340)
-#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341)
+#include <asm/unistd-common.h>
#define __NR_sync_file_range2 __NR_arm_sync_file_range
-#define __NR_tee (__NR_SYSCALL_BASE+342)
-#define __NR_vmsplice (__NR_SYSCALL_BASE+343)
-#define __NR_move_pages (__NR_SYSCALL_BASE+344)
-#define __NR_getcpu (__NR_SYSCALL_BASE+345)
-#define __NR_epoll_pwait (__NR_SYSCALL_BASE+346)
-#define __NR_kexec_load (__NR_SYSCALL_BASE+347)
-#define __NR_utimensat (__NR_SYSCALL_BASE+348)
-#define __NR_signalfd (__NR_SYSCALL_BASE+349)
-#define __NR_timerfd_create (__NR_SYSCALL_BASE+350)
-#define __NR_eventfd (__NR_SYSCALL_BASE+351)
-#define __NR_fallocate (__NR_SYSCALL_BASE+352)
-#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353)
-#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354)
-#define __NR_signalfd4 (__NR_SYSCALL_BASE+355)
-#define __NR_eventfd2 (__NR_SYSCALL_BASE+356)
-#define __NR_epoll_create1 (__NR_SYSCALL_BASE+357)
-#define __NR_dup3 (__NR_SYSCALL_BASE+358)
-#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
-#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
-#define __NR_preadv (__NR_SYSCALL_BASE+361)
-#define __NR_pwritev (__NR_SYSCALL_BASE+362)
-#define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363)
-#define __NR_perf_event_open (__NR_SYSCALL_BASE+364)
-#define __NR_recvmmsg (__NR_SYSCALL_BASE+365)
-#define __NR_accept4 (__NR_SYSCALL_BASE+366)
-#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
-#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
-#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
-#define __NR_name_to_handle_at (__NR_SYSCALL_BASE+370)
-#define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371)
-#define __NR_clock_adjtime (__NR_SYSCALL_BASE+372)
-#define __NR_syncfs (__NR_SYSCALL_BASE+373)
-#define __NR_sendmmsg (__NR_SYSCALL_BASE+374)
-#define __NR_setns (__NR_SYSCALL_BASE+375)
-#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
-#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
-#define __NR_kcmp (__NR_SYSCALL_BASE+378)
-#define __NR_finit_module (__NR_SYSCALL_BASE+379)
-#define __NR_sched_setattr (__NR_SYSCALL_BASE+380)
-#define __NR_sched_getattr (__NR_SYSCALL_BASE+381)
-#define __NR_renameat2 (__NR_SYSCALL_BASE+382)
-#define __NR_seccomp (__NR_SYSCALL_BASE+383)
-#define __NR_getrandom (__NR_SYSCALL_BASE+384)
-#define __NR_memfd_create (__NR_SYSCALL_BASE+385)
-#define __NR_bpf (__NR_SYSCALL_BASE+386)
-#define __NR_execveat (__NR_SYSCALL_BASE+387)
-#define __NR_userfaultfd (__NR_SYSCALL_BASE+388)
-#define __NR_membarrier (__NR_SYSCALL_BASE+389)
-#define __NR_mlock2 (__NR_SYSCALL_BASE+390)
-#define __NR_copy_file_range (__NR_SYSCALL_BASE+391)
-#define __NR_preadv2 (__NR_SYSCALL_BASE+392)
-#define __NR_pwritev2 (__NR_SYSCALL_BASE+393)
/*
* The following SWIs are ARM private.
@@ -431,24 +36,4 @@
#define __ARM_NR_usr32 (__ARM_NR_BASE+4)
#define __ARM_NR_set_tls (__ARM_NR_BASE+5)
-/*
- * The following syscalls are obsolete and no longer available for EABI.
- */
-#if !defined(__KERNEL__)
-#if defined(__ARM_EABI__)
-#undef __NR_time
-#undef __NR_umount
-#undef __NR_stime
-#undef __NR_alarm
-#undef __NR_utime
-#undef __NR_getrlimit
-#undef __NR_select
-#undef __NR_readdir
-#undef __NR_mmap
-#undef __NR_socketcall
-#undef __NR_syscall
-#undef __NR_ipc
-#endif
-#endif
-
#endif /* _UAPI__ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
deleted file mode 100644
index 703fa0f3cd8f..000000000000
--- a/arch/arm/kernel/calls.S
+++ /dev/null
@@ -1,412 +0,0 @@
-/*
- * linux/arch/arm/kernel/calls.S
- *
- * Copyright (C) 1995-2005 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This file is included thrice in entry-common.S
- */
-/* 0 */ CALL(sys_restart_syscall)
- CALL(sys_exit)
- CALL(sys_fork)
- CALL(sys_read)
- CALL(sys_write)
-/* 5 */ CALL(sys_open)
- CALL(sys_close)
- CALL(sys_ni_syscall) /* was sys_waitpid */
- CALL(sys_creat)
- CALL(sys_link)
-/* 10 */ CALL(sys_unlink)
- CALL(sys_execve)
- CALL(sys_chdir)
- CALL(OBSOLETE(sys_time)) /* used by libc4 */
- CALL(sys_mknod)
-/* 15 */ CALL(sys_chmod)
- CALL(sys_lchown16)
- CALL(sys_ni_syscall) /* was sys_break */
- CALL(sys_ni_syscall) /* was sys_stat */
- CALL(sys_lseek)
-/* 20 */ CALL(sys_getpid)
- CALL(sys_mount)
- CALL(OBSOLETE(sys_oldumount)) /* used by libc4 */
- CALL(sys_setuid16)
- CALL(sys_getuid16)
-/* 25 */ CALL(OBSOLETE(sys_stime))
- CALL(sys_ptrace)
- CALL(OBSOLETE(sys_alarm)) /* used by libc4 */
- CALL(sys_ni_syscall) /* was sys_fstat */
- CALL(sys_pause)
-/* 30 */ CALL(OBSOLETE(sys_utime)) /* used by libc4 */
- CALL(sys_ni_syscall) /* was sys_stty */
- CALL(sys_ni_syscall) /* was sys_getty */
- CALL(sys_access)
- CALL(sys_nice)
-/* 35 */ CALL(sys_ni_syscall) /* was sys_ftime */
- CALL(sys_sync)
- CALL(sys_kill)
- CALL(sys_rename)
- CALL(sys_mkdir)
-/* 40 */ CALL(sys_rmdir)
- CALL(sys_dup)
- CALL(sys_pipe)
- CALL(sys_times)
- CALL(sys_ni_syscall) /* was sys_prof */
-/* 45 */ CALL(sys_brk)
- CALL(sys_setgid16)
- CALL(sys_getgid16)
- CALL(sys_ni_syscall) /* was sys_signal */
- CALL(sys_geteuid16)
-/* 50 */ CALL(sys_getegid16)
- CALL(sys_acct)
- CALL(sys_umount)
- CALL(sys_ni_syscall) /* was sys_lock */
- CALL(sys_ioctl)
-/* 55 */ CALL(sys_fcntl)
- CALL(sys_ni_syscall) /* was sys_mpx */
- CALL(sys_setpgid)
- CALL(sys_ni_syscall) /* was sys_ulimit */
- CALL(sys_ni_syscall) /* was sys_olduname */
-/* 60 */ CALL(sys_umask)
- CALL(sys_chroot)
- CALL(sys_ustat)
- CALL(sys_dup2)
- CALL(sys_getppid)
-/* 65 */ CALL(sys_getpgrp)
- CALL(sys_setsid)
- CALL(sys_sigaction)
- CALL(sys_ni_syscall) /* was sys_sgetmask */
- CALL(sys_ni_syscall) /* was sys_ssetmask */
-/* 70 */ CALL(sys_setreuid16)
- CALL(sys_setregid16)
- CALL(sys_sigsuspend)
- CALL(sys_sigpending)
- CALL(sys_sethostname)
-/* 75 */ CALL(sys_setrlimit)
- CALL(OBSOLETE(sys_old_getrlimit)) /* used by libc4 */
- CALL(sys_getrusage)
- CALL(sys_gettimeofday)
- CALL(sys_settimeofday)
-/* 80 */ CALL(sys_getgroups16)
- CALL(sys_setgroups16)
- CALL(OBSOLETE(sys_old_select)) /* used by libc4 */
- CALL(sys_symlink)
- CALL(sys_ni_syscall) /* was sys_lstat */
-/* 85 */ CALL(sys_readlink)
- CALL(sys_uselib)
- CALL(sys_swapon)
- CALL(sys_reboot)
- CALL(OBSOLETE(sys_old_readdir)) /* used by libc4 */
-/* 90 */ CALL(OBSOLETE(sys_old_mmap)) /* used by libc4 */
- CALL(sys_munmap)
- CALL(sys_truncate)
- CALL(sys_ftruncate)
- CALL(sys_fchmod)
-/* 95 */ CALL(sys_fchown16)
- CALL(sys_getpriority)
- CALL(sys_setpriority)
- CALL(sys_ni_syscall) /* was sys_profil */
- CALL(sys_statfs)
-/* 100 */ CALL(sys_fstatfs)
- CALL(sys_ni_syscall) /* sys_ioperm */
- CALL(OBSOLETE(ABI(sys_socketcall, sys_oabi_socketcall)))
- CALL(sys_syslog)
- CALL(sys_setitimer)
-/* 105 */ CALL(sys_getitimer)
- CALL(sys_newstat)
- CALL(sys_newlstat)
- CALL(sys_newfstat)
- CALL(sys_ni_syscall) /* was sys_uname */
-/* 110 */ CALL(sys_ni_syscall) /* was sys_iopl */
- CALL(sys_vhangup)
- CALL(sys_ni_syscall)
- CALL(OBSOLETE(sys_syscall)) /* call a syscall */
- CALL(sys_wait4)
-/* 115 */ CALL(sys_swapoff)
- CALL(sys_sysinfo)
- CALL(OBSOLETE(ABI(sys_ipc, sys_oabi_ipc)))
- CALL(sys_fsync)
- CALL(sys_sigreturn_wrapper)
-/* 120 */ CALL(sys_clone)
- CALL(sys_setdomainname)
- CALL(sys_newuname)
- CALL(sys_ni_syscall) /* modify_ldt */
- CALL(sys_adjtimex)
-/* 125 */ CALL(sys_mprotect)
- CALL(sys_sigprocmask)
- CALL(sys_ni_syscall) /* was sys_create_module */
- CALL(sys_init_module)
- CALL(sys_delete_module)
-/* 130 */ CALL(sys_ni_syscall) /* was sys_get_kernel_syms */
- CALL(sys_quotactl)
- CALL(sys_getpgid)
- CALL(sys_fchdir)
- CALL(sys_bdflush)
-/* 135 */ CALL(sys_sysfs)
- CALL(sys_personality)
- CALL(sys_ni_syscall) /* reserved for afs_syscall */
- CALL(sys_setfsuid16)
- CALL(sys_setfsgid16)
-/* 140 */ CALL(sys_llseek)
- CALL(sys_getdents)
- CALL(sys_select)
- CALL(sys_flock)
- CALL(sys_msync)
-/* 145 */ CALL(sys_readv)
- CALL(sys_writev)
- CALL(sys_getsid)
- CALL(sys_fdatasync)
- CALL(sys_sysctl)
-/* 150 */ CALL(sys_mlock)
- CALL(sys_munlock)
- CALL(sys_mlockall)
- CALL(sys_munlockall)
- CALL(sys_sched_setparam)
-/* 155 */ CALL(sys_sched_getparam)
- CALL(sys_sched_setscheduler)
- CALL(sys_sched_getscheduler)
- CALL(sys_sched_yield)
- CALL(sys_sched_get_priority_max)
-/* 160 */ CALL(sys_sched_get_priority_min)
- CALL(sys_sched_rr_get_interval)
- CALL(sys_nanosleep)
- CALL(sys_mremap)
- CALL(sys_setresuid16)
-/* 165 */ CALL(sys_getresuid16)
- CALL(sys_ni_syscall) /* vm86 */
- CALL(sys_ni_syscall) /* was sys_query_module */
- CALL(sys_poll)
- CALL(sys_ni_syscall) /* was nfsservctl */
-/* 170 */ CALL(sys_setresgid16)
- CALL(sys_getresgid16)
- CALL(sys_prctl)
- CALL(sys_rt_sigreturn_wrapper)
- CALL(sys_rt_sigaction)
-/* 175 */ CALL(sys_rt_sigprocmask)
- CALL(sys_rt_sigpending)
- CALL(sys_rt_sigtimedwait)
- CALL(sys_rt_sigqueueinfo)
- CALL(sys_rt_sigsuspend)
-/* 180 */ CALL(ABI(sys_pread64, sys_oabi_pread64))
- CALL(ABI(sys_pwrite64, sys_oabi_pwrite64))
- CALL(sys_chown16)
- CALL(sys_getcwd)
- CALL(sys_capget)
-/* 185 */ CALL(sys_capset)
- CALL(sys_sigaltstack)
- CALL(sys_sendfile)
- CALL(sys_ni_syscall) /* getpmsg */
- CALL(sys_ni_syscall) /* putpmsg */
-/* 190 */ CALL(sys_vfork)
- CALL(sys_getrlimit)
- CALL(sys_mmap2)
- CALL(ABI(sys_truncate64, sys_oabi_truncate64))
- CALL(ABI(sys_ftruncate64, sys_oabi_ftruncate64))
-/* 195 */ CALL(ABI(sys_stat64, sys_oabi_stat64))
- CALL(ABI(sys_lstat64, sys_oabi_lstat64))
- CALL(ABI(sys_fstat64, sys_oabi_fstat64))
- CALL(sys_lchown)
- CALL(sys_getuid)
-/* 200 */ CALL(sys_getgid)
- CALL(sys_geteuid)
- CALL(sys_getegid)
- CALL(sys_setreuid)
- CALL(sys_setregid)
-/* 205 */ CALL(sys_getgroups)
- CALL(sys_setgroups)
- CALL(sys_fchown)
- CALL(sys_setresuid)
- CALL(sys_getresuid)
-/* 210 */ CALL(sys_setresgid)
- CALL(sys_getresgid)
- CALL(sys_chown)
- CALL(sys_setuid)
- CALL(sys_setgid)
-/* 215 */ CALL(sys_setfsuid)
- CALL(sys_setfsgid)
- CALL(sys_getdents64)
- CALL(sys_pivot_root)
- CALL(sys_mincore)
-/* 220 */ CALL(sys_madvise)
- CALL(ABI(sys_fcntl64, sys_oabi_fcntl64))
- CALL(sys_ni_syscall) /* TUX */
- CALL(sys_ni_syscall)
- CALL(sys_gettid)
-/* 225 */ CALL(ABI(sys_readahead, sys_oabi_readahead))
- CALL(sys_setxattr)
- CALL(sys_lsetxattr)
- CALL(sys_fsetxattr)
- CALL(sys_getxattr)
-/* 230 */ CALL(sys_lgetxattr)
- CALL(sys_fgetxattr)
- CALL(sys_listxattr)
- CALL(sys_llistxattr)
- CALL(sys_flistxattr)
-/* 235 */ CALL(sys_removexattr)
- CALL(sys_lremovexattr)
- CALL(sys_fremovexattr)
- CALL(sys_tkill)
- CALL(sys_sendfile64)
-/* 240 */ CALL(sys_futex)
- CALL(sys_sched_setaffinity)
- CALL(sys_sched_getaffinity)
- CALL(sys_io_setup)
- CALL(sys_io_destroy)
-/* 245 */ CALL(sys_io_getevents)
- CALL(sys_io_submit)
- CALL(sys_io_cancel)
- CALL(sys_exit_group)
- CALL(sys_lookup_dcookie)
-/* 250 */ CALL(sys_epoll_create)
- CALL(ABI(sys_epoll_ctl, sys_oabi_epoll_ctl))
- CALL(ABI(sys_epoll_wait, sys_oabi_epoll_wait))
- CALL(sys_remap_file_pages)
- CALL(sys_ni_syscall) /* sys_set_thread_area */
-/* 255 */ CALL(sys_ni_syscall) /* sys_get_thread_area */
- CALL(sys_set_tid_address)
- CALL(sys_timer_create)
- CALL(sys_timer_settime)
- CALL(sys_timer_gettime)
-/* 260 */ CALL(sys_timer_getoverrun)
- CALL(sys_timer_delete)
- CALL(sys_clock_settime)
- CALL(sys_clock_gettime)
- CALL(sys_clock_getres)
-/* 265 */ CALL(sys_clock_nanosleep)
- CALL(sys_statfs64_wrapper)
- CALL(sys_fstatfs64_wrapper)
- CALL(sys_tgkill)
- CALL(sys_utimes)
-/* 270 */ CALL(sys_arm_fadvise64_64)
- CALL(sys_pciconfig_iobase)
- CALL(sys_pciconfig_read)
- CALL(sys_pciconfig_write)
- CALL(sys_mq_open)
-/* 275 */ CALL(sys_mq_unlink)
- CALL(sys_mq_timedsend)
- CALL(sys_mq_timedreceive)
- CALL(sys_mq_notify)
- CALL(sys_mq_getsetattr)
-/* 280 */ CALL(sys_waitid)
- CALL(sys_socket)
- CALL(ABI(sys_bind, sys_oabi_bind))
- CALL(ABI(sys_connect, sys_oabi_connect))
- CALL(sys_listen)
-/* 285 */ CALL(sys_accept)
- CALL(sys_getsockname)
- CALL(sys_getpeername)
- CALL(sys_socketpair)
- CALL(sys_send)
-/* 290 */ CALL(ABI(sys_sendto, sys_oabi_sendto))
- CALL(sys_recv)
- CALL(sys_recvfrom)
- CALL(sys_shutdown)
- CALL(sys_setsockopt)
-/* 295 */ CALL(sys_getsockopt)
- CALL(ABI(sys_sendmsg, sys_oabi_sendmsg))
- CALL(sys_recvmsg)
- CALL(ABI(sys_semop, sys_oabi_semop))
- CALL(sys_semget)
-/* 300 */ CALL(sys_semctl)
- CALL(sys_msgsnd)
- CALL(sys_msgrcv)
- CALL(sys_msgget)
- CALL(sys_msgctl)
-/* 305 */ CALL(sys_shmat)
- CALL(sys_shmdt)
- CALL(sys_shmget)
- CALL(sys_shmctl)
- CALL(sys_add_key)
-/* 310 */ CALL(sys_request_key)
- CALL(sys_keyctl)
- CALL(ABI(sys_semtimedop, sys_oabi_semtimedop))
-/* vserver */ CALL(sys_ni_syscall)
- CALL(sys_ioprio_set)
-/* 315 */ CALL(sys_ioprio_get)
- CALL(sys_inotify_init)
- CALL(sys_inotify_add_watch)
- CALL(sys_inotify_rm_watch)
- CALL(sys_mbind)
-/* 320 */ CALL(sys_get_mempolicy)
- CALL(sys_set_mempolicy)
- CALL(sys_openat)
- CALL(sys_mkdirat)
- CALL(sys_mknodat)
-/* 325 */ CALL(sys_fchownat)
- CALL(sys_futimesat)
- CALL(ABI(sys_fstatat64, sys_oabi_fstatat64))
- CALL(sys_unlinkat)
- CALL(sys_renameat)
-/* 330 */ CALL(sys_linkat)
- CALL(sys_symlinkat)
- CALL(sys_readlinkat)
- CALL(sys_fchmodat)
- CALL(sys_faccessat)
-/* 335 */ CALL(sys_pselect6)
- CALL(sys_ppoll)
- CALL(sys_unshare)
- CALL(sys_set_robust_list)
- CALL(sys_get_robust_list)
-/* 340 */ CALL(sys_splice)
- CALL(sys_sync_file_range2)
- CALL(sys_tee)
- CALL(sys_vmsplice)
- CALL(sys_move_pages)
-/* 345 */ CALL(sys_getcpu)
- CALL(sys_epoll_pwait)
- CALL(sys_kexec_load)
- CALL(sys_utimensat)
- CALL(sys_signalfd)
-/* 350 */ CALL(sys_timerfd_create)
- CALL(sys_eventfd)
- CALL(sys_fallocate)
- CALL(sys_timerfd_settime)
- CALL(sys_timerfd_gettime)
-/* 355 */ CALL(sys_signalfd4)
- CALL(sys_eventfd2)
- CALL(sys_epoll_create1)
- CALL(sys_dup3)
- CALL(sys_pipe2)
-/* 360 */ CALL(sys_inotify_init1)
- CALL(sys_preadv)
- CALL(sys_pwritev)
- CALL(sys_rt_tgsigqueueinfo)
- CALL(sys_perf_event_open)
-/* 365 */ CALL(sys_recvmmsg)
- CALL(sys_accept4)
- CALL(sys_fanotify_init)
- CALL(sys_fanotify_mark)
- CALL(sys_prlimit64)
-/* 370 */ CALL(sys_name_to_handle_at)
- CALL(sys_open_by_handle_at)
- CALL(sys_clock_adjtime)
- CALL(sys_syncfs)
- CALL(sys_sendmmsg)
-/* 375 */ CALL(sys_setns)
- CALL(sys_process_vm_readv)
- CALL(sys_process_vm_writev)
- CALL(sys_kcmp)
- CALL(sys_finit_module)
-/* 380 */ CALL(sys_sched_setattr)
- CALL(sys_sched_getattr)
- CALL(sys_renameat2)
- CALL(sys_seccomp)
- CALL(sys_getrandom)
-/* 385 */ CALL(sys_memfd_create)
- CALL(sys_bpf)
- CALL(sys_execveat)
- CALL(sys_userfaultfd)
- CALL(sys_membarrier)
-/* 390 */ CALL(sys_mlock2)
- CALL(sys_copy_file_range)
- CALL(sys_preadv2)
- CALL(sys_pwritev2)
-#ifndef syscalls_counted
-.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
-#define syscalls_counted
-#endif
-.rept syscalls_padding
- CALL(sys_ni_syscall)
-.endr
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 10c3283d6c19..eb5cd77bf1d8 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -12,6 +12,11 @@
#include <asm/unistd.h>
#include <asm/ftrace.h>
#include <asm/unwind.h>
+#ifdef CONFIG_AEABI
+#include <asm/unistd-oabi.h>
+#endif
+
+ .equ NR_syscalls, __NR_syscalls
#ifdef CONFIG_NEED_RET_TO_USER
#include <mach/entry-macro.S>
@@ -120,21 +125,6 @@ ENTRY(ret_from_fork)
b ret_slow_syscall
ENDPROC(ret_from_fork)
- .equ NR_syscalls,0
-#define CALL(x) .equ NR_syscalls,NR_syscalls+1
-#include "calls.S"
-
-/*
- * Ensure that the system call table is equal to __NR_syscalls,
- * which is the value the rest of the system sees
- */
-.ifne NR_syscalls - __NR_syscalls
-.error "__NR_syscalls is not equal to the size of the syscall table"
-.endif
-
-#undef CALL
-#define CALL(x) .long x
-
/*=============================================================================
* SWI handler
*-----------------------------------------------------------------------------
@@ -291,22 +281,48 @@ ENDPROC(vector_swi)
#endif
.ltorg
+ .macro syscall_table_start, sym
+ .equ __sys_nr, 0
+ .type \sym, #object
+ENTRY(\sym)
+ .endm
+
+ .macro syscall, nr, func
+ .ifgt __sys_nr - \nr
+ .error "Duplicated/unorded system call entry"
+ .endif
+ .rept \nr - __sys_nr
+ .long sys_ni_syscall
+ .endr
+ .long \func
+ .equ __sys_nr, \nr + 1
+ .endm
+
+ .macro syscall_table_end, sym
+ .ifgt __sys_nr - __NR_syscalls
+ .error "System call table too big"
+ .endif
+ .rept __NR_syscalls - __sys_nr
+ .long sys_ni_syscall
+ .endr
+ .size \sym, . - \sym
+ .endm
+
+#define NATIVE(nr, func) syscall nr, func
+
/*
* This is the syscall table declaration for native ABI syscalls.
* With EABI a couple syscalls are obsolete and defined as sys_ni_syscall.
*/
-#define ABI(native, compat) native
+ syscall_table_start sys_call_table
+#define COMPAT(nr, native, compat) syscall nr, native
#ifdef CONFIG_AEABI
-#define OBSOLETE(syscall) sys_ni_syscall
+#include <calls-eabi.S>
#else
-#define OBSOLETE(syscall) syscall
+#include <calls-oabi.S>
#endif
-
- .type sys_call_table, #object
-ENTRY(sys_call_table)
-#include "calls.S"
-#undef ABI
-#undef OBSOLETE
+#undef COMPAT
+ syscall_table_end sys_call_table
/*============================================================================
* Special system call wrappers
@@ -407,14 +423,10 @@ ENDPROC(sys_oabi_readahead)
* Let's declare a second syscall table for old ABI binaries
* using the compatibility syscall entries.
*/
-#define ABI(native, compat) compat
-#define OBSOLETE(syscall) syscall
-
- .type sys_oabi_call_table, #object
-ENTRY(sys_oabi_call_table)
-#include "calls.S"
-#undef ABI
-#undef OBSOLETE
+ syscall_table_start sys_oabi_call_table
+#define COMPAT(nr, native, compat) syscall nr, compat
+#include <calls-oabi.S>
+ syscall_table_end sys_oabi_call_table
#endif
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index bdf48e4949ad..92eb5c3b486c 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -6,17 +6,31 @@
gen := arch/$(ARCH)/include/generated
kapi := $(gen)/asm
+uapi := $(gen)/uapi/asm
+syshdr := $(srctree)/$(src)/syscallhdr.sh
+sysnr := $(srctree)/$(src)/syscallnr.sh
+systbl := $(srctree)/$(src)/syscalltbl.sh
+syscall := $(srctree)/$(src)/syscall.tbl
-kapi-hdrs-y := $(kapi)/mach-types.h
+gen-y := $(gen)/calls-oabi.S
+gen-y += $(gen)/calls-eabi.S
+kapi-hdrs-y := $(kapi)/unistd-nr.h
+kapi-hdrs-y += $(kapi)/mach-types.h
+uapi-hdrs-y := $(uapi)/unistd-common.h
+uapi-hdrs-y += $(uapi)/unistd-oabi.h
+uapi-hdrs-y += $(uapi)/unistd-eabi.h
-targets += $(addprefix ../../../,$(kapi-hdrs-y))
+targets += $(addprefix ../../../,$(gen-y) $(kapi-hdrs-y) $(uapi-hdrs-y))
-PHONY += kapi
+PHONY += kapi uapi
-kapi: $(kapi-hdrs-y)
+kapi: $(kapi-hdrs-y) $(gen-y)
+
+uapi: $(uapi-hdrs-y)
# Create output directory if not already present
-_dummy := $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)')
+_dummy := $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)') \
+ $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)')
quiet_cmd_gen_mach = GEN $@
cmd_gen_mach = mkdir -p $(dir $@) && \
@@ -25,3 +39,41 @@ quiet_cmd_gen_mach = GEN $@
$(kapi)/mach-types.h: $(src)/gen-mach-types $(src)/mach-types FORCE
$(call if_changed,gen_mach)
+
+quiet_cmd_syshdr = SYSHDR $@
+ cmd_syshdr = $(CONFIG_SHELL) '$(syshdr)' '$<' '$@' \
+ '$(syshdr_abi_$(basetarget))' \
+ '$(syshdr_pfx_$(basetarget))' \
+ '__NR_SYSCALL_BASE'
+
+quiet_cmd_systbl = SYSTBL $@
+ cmd_systbl = $(CONFIG_SHELL) '$(systbl)' '$<' '$@' \
+ '$(systbl_abi_$(basetarget))'
+
+quiet_cmd_sysnr = SYSNR $@
+ cmd_sysnr = $(CONFIG_SHELL) '$(sysnr)' '$<' '$@' \
+ '$(syshdr_abi_$(basetarget))'
+
+syshdr_abi_unistd-common := common
+$(uapi)/unistd-common.h: $(syscall) $(syshdr) FORCE
+ $(call if_changed,syshdr)
+
+syshdr_abi_unistd-oabi := oabi
+$(uapi)/unistd-oabi.h: $(syscall) $(syshdr) FORCE
+ $(call if_changed,syshdr)
+
+syshdr_abi_unistd-eabi := eabi
+$(uapi)/unistd-eabi.h: $(syscall) $(syshdr) FORCE
+ $(call if_changed,syshdr)
+
+sysnr_abi_unistd-nr := common,oabi,eabi,compat
+$(kapi)/unistd-nr.h: $(syscall) $(sysnr) FORCE
+ $(call if_changed,sysnr)
+
+systbl_abi_calls-oabi := common,oabi
+$(gen)/calls-oabi.S: $(syscall) $(systbl) FORCE
+ $(call if_changed,systbl)
+
+systbl_abi_calls-eabi := common,eabi
+$(gen)/calls-eabi.S: $(syscall) $(systbl) FORCE
+ $(call if_changed,systbl)
diff --git a/arch/arm/tools/syscall.tbl b/arch/arm/tools/syscall.tbl
new file mode 100644
index 000000000000..62285cbd09c0
--- /dev/null
+++ b/arch/arm/tools/syscall.tbl
@@ -0,0 +1,428 @@
+#
+# Linux system call numbers and entry vectors
+#
+# The format is:
+# <num> <abi> <name> <entry point> <oabi compat entry point>
+#
+# Where abi is:
+# common - for system calls shared between oabi and eabi
+# oabi - for oabi-only system calls (may have compat)
+# eabi - for eabi-only system calls
+#
+# For each syscall number, "common" is mutually exclusive with oabi and eabi
+#
+0 common restart_syscall sys_restart_syscall
+1 common exit sys_exit
+2 common fork sys_fork
+3 common read sys_read
+4 common write sys_write
+5 common open sys_open
+6 common close sys_close
+# 7 was sys_waitpid
+8 common creat sys_creat
+9 common link sys_link
+10 common unlink sys_unlink
+11 common execve sys_execve
+12 common chdir sys_chdir
+13 oabi time sys_time
+14 common mknod sys_mknod
+15 common chmod sys_chmod
+16 common lchown sys_lchown16
+# 17 was sys_break
+# 18 was sys_stat
+19 common lseek sys_lseek
+20 common getpid sys_getpid
+21 common mount sys_mount
+22 oabi umount sys_oldumount
+23 common setuid sys_setuid16
+24 common getuid sys_getuid16
+25 oabi stime sys_stime
+26 common ptrace sys_ptrace
+27 oabi alarm sys_alarm
+# 28 was sys_fstat
+29 common pause sys_pause
+30 oabi utime sys_utime
+# 31 was sys_stty
+# 32 was sys_gtty
+33 common access sys_access
+34 common nice sys_nice
+# 35 was sys_ftime
+36 common sync sys_sync
+37 common kill sys_kill
+38 common rename sys_rename
+39 common mkdir sys_mkdir
+40 common rmdir sys_rmdir
+41 common dup sys_dup
+42 common pipe sys_pipe
+43 common times sys_times
+# 44 was sys_prof
+45 common brk sys_brk
+46 common setgid sys_setgid16
+47 common getgid sys_getgid16
+# 48 was sys_signal
+49 common geteuid sys_geteuid16
+50 common getegid sys_getegid16
+51 common acct sys_acct
+52 common umount2 sys_umount
+# 53 was sys_lock
+54 common ioctl sys_ioctl
+55 common fcntl sys_fcntl
+# 56 was sys_mpx
+57 common setpgid sys_setpgid
+# 58 was sys_ulimit
+# 59 was sys_olduname
+60 common umask sys_umask
+61 common chroot sys_chroot
+62 common ustat sys_ustat
+63 common dup2 sys_dup2
+64 common getppid sys_getppid
+65 common getpgrp sys_getpgrp
+66 common setsid sys_setsid
+67 common sigaction sys_sigaction
+# 68 was sys_sgetmask
+# 69 was sys_ssetmask
+70 common setreuid sys_setreuid16
+71 common setregid sys_setregid16
+72 common sigsuspend sys_sigsuspend
+73 common sigpending sys_sigpending
+74 common sethostname sys_sethostname
+75 common setrlimit sys_setrlimit
+# Back compat 2GB limited rlimit
+76 oabi getrlimit sys_old_getrlimit
+77 common getrusage sys_getrusage
+78 common gettimeofday sys_gettimeofday
+79 common settimeofday sys_settimeofday
+80 common getgroups sys_getgroups16
+81 common setgroups sys_setgroups16
+82 oabi select sys_old_select
+83 common symlink sys_symlink
+# 84 was sys_lstat
+85 common readlink sys_readlink
+86 common uselib sys_uselib
+87 common swapon sys_swapon
+88 common reboot sys_reboot
+89 oabi readdir sys_old_readdir
+90 oabi mmap sys_old_mmap
+91 common munmap sys_munmap
+92 common truncate sys_truncate
+93 common ftruncate sys_ftruncate
+94 common fchmod sys_fchmod
+95 common fchown sys_fchown16
+96 common getpriority sys_getpriority
+97 common setpriority sys_setpriority
+# 98 was sys_profil
+99 common statfs sys_statfs
+100 common fstatfs sys_fstatfs
+# 101 was sys_ioperm
+102 oabi socketcall sys_socketcall sys_oabi_socketcall
+103 common syslog sys_syslog
+104 common setitimer sys_setitimer
+105 common getitimer sys_getitimer
+106 common stat sys_newstat
+107 common lstat sys_newlstat
+108 common fstat sys_newfstat
+# 109 was sys_uname
+# 110 was sys_iopl
+111 common vhangup sys_vhangup
+# 112 was sys_idle
+# syscall to call a syscall!
+113 oabi syscall sys_syscall
+114 common wait4 sys_wait4
+115 common swapoff sys_swapoff
+116 common sysinfo sys_sysinfo
+117 oabi ipc sys_ipc sys_oabi_ipc
+118 common fsync sys_fsync
+119 common sigreturn sys_sigreturn_wrapper
+120 common clone sys_clone
+121 common setdomainname sys_setdomainname
+122 common uname sys_newuname
+# 123 was sys_modify_ldt
+124 common adjtimex sys_adjtimex
+125 common mprotect sys_mprotect
+126 common sigprocmask sys_sigprocmask
+# 127 was sys_create_module
+128 common init_module sys_init_module
+129 common delete_module sys_delete_module
+# 130 was sys_get_kernel_syms
+131 common quotactl sys_quotactl
+132 common getpgid sys_getpgid
+133 common fchdir sys_fchdir
+134 common bdflush sys_bdflush
+135 common sysfs sys_sysfs
+136 common personality sys_personality
+# 137 was sys_afs_syscall
+138 common setfsuid sys_setfsuid16
+139 common setfsgid sys_setfsgid16
+140 common _llseek sys_llseek
+141 common getdents sys_getdents
+142 common _newselect sys_select
+143 common flock sys_flock
+144 common msync sys_msync
+145 common readv sys_readv
+146 common writev sys_writev
+147 common getsid sys_getsid
+148 common fdatasync sys_fdatasync
+149 common _sysctl sys_sysctl
+150 common mlock sys_mlock
+151 common munlock sys_munlock
+152 common mlockall sys_mlockall
+153 common munlockall sys_munlockall
+154 common sched_setparam sys_sched_setparam
+155 common sched_getparam sys_sched_getparam
+156 common sched_setscheduler sys_sched_setscheduler
+157 common sched_getscheduler sys_sched_getscheduler
+158 common sched_yield sys_sched_yield
+159 common sched_get_priority_max sys_sched_get_priority_max
+160 common sched_get_priority_min sys_sched_get_priority_min
+161 common sched_rr_get_interval sys_sched_rr_get_interval
+162 common nanosleep sys_nanosleep
+163 common mremap sys_mremap
+164 common setresuid sys_setresuid16
+165 common getresuid sys_getresuid16
+# 166 was sys_vm86
+# 167 was sys_query_module
+168 common poll sys_poll
+169 common nfsservctl
+170 common setresgid sys_setresgid16
+171 common getresgid sys_getresgid16
+172 common prctl sys_prctl
+173 common rt_sigreturn sys_rt_sigreturn_wrapper
+174 common rt_sigaction sys_rt_sigaction
+175 common rt_sigprocmask sys_rt_sigprocmask
+176 common rt_sigpending sys_rt_sigpending
+177 common rt_sigtimedwait sys_rt_sigtimedwait
+178 common rt_sigqueueinfo sys_rt_sigqueueinfo
+179 common rt_sigsuspend sys_rt_sigsuspend
+180 oabi pread64 sys_pread64 sys_oabi_pread64
+180 eabi pread64 sys_pread64
+181 oabi pwrite64 sys_pwrite64 sys_oabi_pwrite64
+181 eabi pwrite64 sys_pwrite64
+182 common chown sys_chown16
+183 common getcwd sys_getcwd
+184 common capget sys_capget
+185 common capset sys_capset
+186 common sigaltstack sys_sigaltstack
+187 common sendfile sys_sendfile
+# 188 reserved
+# 189 reserved
+190 common vfork sys_vfork
+# SuS compliant getrlimit
+191 common ugetrlimit sys_getrlimit
+192 common mmap2 sys_mmap2
+193 oabi truncate64 sys_truncate64 sys_oabi_truncate64
+193 eabi truncate64 sys_truncate64
+194 oabi ftruncate64 sys_ftruncate64 sys_oabi_ftruncate64
+194 eabi ftruncate64 sys_ftruncate64
+195 oabi stat64 sys_stat64 sys_oabi_stat64
+195 eabi stat64 sys_stat64
+196 oabi lstat64 sys_lstat64 sys_oabi_lstat64
+196 eabi lstat64 sys_lstat64
+197 oabi fstat64 sys_fstat64 sys_oabi_fstat64
+197 eabi fstat64 sys_fstat64
+198 common lchown32 sys_lchown
+199 common getuid32 sys_getuid
+200 common getgid32 sys_getgid
+201 common geteuid32 sys_geteuid
+202 common getegid32 sys_getegid
+203 common setreuid32 sys_setreuid
+204 common setregid32 sys_setregid
+205 common getgroups32 sys_getgroups
+206 common setgroups32 sys_setgroups
+207 common fchown32 sys_fchown
+208 common setresuid32 sys_setresuid
+209 common getresuid32 sys_getresuid
+210 common setresgid32 sys_setresgid
+211 common getresgid32 sys_getresgid
+212 common chown32 sys_chown
+213 common setuid32 sys_setuid
+214 common setgid32 sys_setgid
+215 common setfsuid32 sys_setfsuid
+216 common setfsgid32 sys_setfsgid
+217 common getdents64 sys_getdents64
+218 common pivot_root sys_pivot_root
+219 common mincore sys_mincore
+220 common madvise sys_madvise
+221 oabi fcntl64 sys_fcntl64 sys_oabi_fcntl64
+221 eabi fcntl64 sys_fcntl64
+# 222 for tux
+# 223 is unused
+224 common gettid sys_gettid
+225 oabi readahead sys_readahead sys_oabi_readahead
+225 eabi readahead sys_readahead
+226 common setxattr sys_setxattr
+227 common lsetxattr sys_lsetxattr
+228 common fsetxattr sys_fsetxattr
+229 common getxattr sys_getxattr
+230 common lgetxattr sys_lgetxattr
+231 common fgetxattr sys_fgetxattr
+232 common listxattr sys_listxattr
+233 common llistxattr sys_llistxattr
+234 common flistxattr sys_flistxattr
+235 common removexattr sys_removexattr
+236 common lremovexattr sys_lremovexattr
+237 common fremovexattr sys_fremovexattr
+238 common tkill sys_tkill
+239 common sendfile64 sys_sendfile64
+240 common futex sys_futex
+241 common sched_setaffinity sys_sched_setaffinity
+242 common sched_getaffinity sys_sched_getaffinity
+243 common io_setup sys_io_setup
+244 common io_destroy sys_io_destroy
+245 common io_getevents sys_io_getevents
+246 common io_submit sys_io_submit
+247 common io_cancel sys_io_cancel
+248 common exit_group sys_exit_group
+249 common lookup_dcookie sys_lookup_dcookie
+250 common epoll_create sys_epoll_create
+251 oabi epoll_ctl sys_epoll_ctl sys_oabi_epoll_ctl
+251 eabi epoll_ctl sys_epoll_ctl
+252 oabi epoll_wait sys_epoll_wait sys_oabi_epoll_wait
+252 eabi epoll_wait sys_epoll_wait
+253 common remap_file_pages sys_remap_file_pages
+# 254 for set_thread_area
+# 255 for get_thread_area
+256 common set_tid_address sys_set_tid_address
+257 common timer_create sys_timer_create
+258 common timer_settime sys_timer_settime
+259 common timer_gettime sys_timer_gettime
+260 common timer_getoverrun sys_timer_getoverrun
+261 common timer_delete sys_timer_delete
+262 common clock_settime sys_clock_settime
+263 common clock_gettime sys_clock_gettime
+264 common clock_getres sys_clock_getres
+265 common clock_nanosleep sys_clock_nanosleep
+266 common statfs64 sys_statfs64_wrapper
+267 common fstatfs64 sys_fstatfs64_wrapper
+268 common tgkill sys_tgkill
+269 common utimes sys_utimes
+270 common arm_fadvise64_64 sys_arm_fadvise64_64
+271 common pciconfig_iobase sys_pciconfig_iobase
+272 common pciconfig_read sys_pciconfig_read
+273 common pciconfig_write sys_pciconfig_write
+274 common mq_open sys_mq_open
+275 common mq_unlink sys_mq_unlink
+276 common mq_timedsend sys_mq_timedsend
+277 common mq_timedreceive sys_mq_timedreceive
+278 common mq_notify sys_mq_notify
+279 common mq_getsetattr sys_mq_getsetattr
+280 common waitid sys_waitid
+281 common socket sys_socket
+282 oabi bind sys_bind sys_oabi_bind
+282 eabi bind sys_bind
+283 oabi connect sys_connect sys_oabi_connect
+283 eabi connect sys_connect
+284 common listen sys_listen
+285 common accept sys_accept
+286 common getsockname sys_getsockname
+287 common getpeername sys_getpeername
+288 common socketpair sys_socketpair
+289 common send sys_send
+290 oabi sendto sys_sendto sys_oabi_sendto
+290 eabi sendto sys_sendto
+291 common recv sys_recv
+292 common recvfrom sys_recvfrom
+293 common shutdown sys_shutdown
+294 common setsockopt sys_setsockopt
+295 common getsockopt sys_getsockopt
+296 oabi sendmsg sys_sendmsg sys_oabi_sendmsg
+296 eabi sendmsg sys_sendmsg
+297 common recvmsg sys_recvmsg
+298 oabi semop sys_semop sys_oabi_semop
+298 eabi semop sys_semop
+299 common semget sys_semget
+300 common semctl sys_semctl
+301 common msgsnd sys_msgsnd
+302 common msgrcv sys_msgrcv
+303 common msgget sys_msgget
+304 common msgctl sys_msgctl
+305 common shmat sys_shmat
+306 common shmdt sys_shmdt
+307 common shmget sys_shmget
+308 common shmctl sys_shmctl
+309 common add_key sys_add_key
+310 common request_key sys_request_key
+311 common keyctl sys_keyctl
+312 oabi semtimedop sys_semtimedop sys_oabi_semtimedop
+312 eabi semtimedop sys_semtimedop
+313 common vserver
+314 common ioprio_set sys_ioprio_set
+315 common ioprio_get sys_ioprio_get
+316 common inotify_init sys_inotify_init
+317 common inotify_add_watch sys_inotify_add_watch
+318 common inotify_rm_watch sys_inotify_rm_watch
+319 common mbind sys_mbind
+320 common get_mempolicy sys_get_mempolicy
+321 common set_mempolicy sys_set_mempolicy
+322 common openat sys_openat
+323 common mkdirat sys_mkdirat
+324 common mknodat sys_mknodat
+325 common fchownat sys_fchownat
+326 common futimesat sys_futimesat
+327 oabi fstatat64 sys_fstatat64 sys_oabi_fstatat64
+327 eabi fstatat64 sys_fstatat64
+328 common unlinkat sys_unlinkat
+329 common renameat sys_renameat
+330 common linkat sys_linkat
+331 common symlinkat sys_symlinkat
+332 common readlinkat sys_readlinkat
+333 common fchmodat sys_fchmodat
+334 common faccessat sys_faccessat
+335 common pselect6 sys_pselect6
+336 common ppoll sys_ppoll
+337 common unshare sys_unshare
+338 common set_robust_list sys_set_robust_list
+339 common get_robust_list sys_get_robust_list
+340 common splice sys_splice
+341 common arm_sync_file_range sys_sync_file_range2
+342 common tee sys_tee
+343 common vmsplice sys_vmsplice
+344 common move_pages sys_move_pages
+345 common getcpu sys_getcpu
+346 common epoll_pwait sys_epoll_pwait
+347 common kexec_load sys_kexec_load
+348 common utimensat sys_utimensat
+349 common signalfd sys_signalfd
+350 common timerfd_create sys_timerfd_create
+351 common eventfd sys_eventfd
+352 common fallocate sys_fallocate
+353 common timerfd_settime sys_timerfd_settime
+354 common timerfd_gettime sys_timerfd_gettime
+355 common signalfd4 sys_signalfd4
+356 common eventfd2 sys_eventfd2
+357 common epoll_create1 sys_epoll_create1
+358 common dup3 sys_dup3
+359 common pipe2 sys_pipe2
+360 common inotify_init1 sys_inotify_init1
+361 common preadv sys_preadv
+362 common pwritev sys_pwritev
+363 common rt_tgsigqueueinfo sys_rt_tgsigqueueinfo
+364 common perf_event_open sys_perf_event_open
+365 common recvmmsg sys_recvmmsg
+366 common accept4 sys_accept4
+367 common fanotify_init sys_fanotify_init
+368 common fanotify_mark sys_fanotify_mark
+369 common prlimit64 sys_prlimit64
+370 common name_to_handle_at sys_name_to_handle_at
+371 common open_by_handle_at sys_open_by_handle_at
+372 common clock_adjtime sys_clock_adjtime
+373 common syncfs sys_syncfs
+374 common sendmmsg sys_sendmmsg
+375 common setns sys_setns
+376 common process_vm_readv sys_process_vm_readv
+377 common process_vm_writev sys_process_vm_writev
+378 common kcmp sys_kcmp
+379 common finit_module sys_finit_module
+380 common sched_setattr sys_sched_setattr
+381 common sched_getattr sys_sched_getattr
+382 common renameat2 sys_renameat2
+383 common seccomp sys_seccomp
+384 common getrandom sys_getrandom
+385 common memfd_create sys_memfd_create
+386 common bpf sys_bpf
+387 common execveat sys_execveat
+388 common userfaultfd sys_userfaultfd
+389 common membarrier sys_membarrier
+390 common mlock2 sys_mlock2
+391 common copy_file_range sys_copy_file_range
+392 common preadv2 sys_preadv2
+393 common pwritev2 sys_pwritev2
diff --git a/arch/arm/tools/syscallhdr.sh b/arch/arm/tools/syscallhdr.sh
new file mode 100644
index 000000000000..72d4b2e3bdec
--- /dev/null
+++ b/arch/arm/tools/syscallhdr.sh
@@ -0,0 +1,30 @@
+#!/bin/sh
+
+in="$1"
+out="$2"
+my_abis=`echo "($3)" | tr ',' '|'`
+prefix="$4"
+offset="$5"
+
+fileguard=_ASM_ARM_`basename "$out" | sed \
+ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
+ -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
+if echo $out | grep -q uapi; then
+ fileguard="_UAPI$fileguard"
+fi
+grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
+ echo "#ifndef ${fileguard}"
+ echo "#define ${fileguard} 1"
+ echo ""
+
+ while read nr abi name entry ; do
+ if [ -z "$offset" ]; then
+ echo "#define __NR_${prefix}${name} $nr"
+ else
+ echo "#define __NR_${prefix}${name} ($offset + $nr)"
+ fi
+ done
+
+ echo ""
+ echo "#endif /* ${fileguard} */"
+) > "$out"
diff --git a/arch/arm/tools/syscallnr.sh b/arch/arm/tools/syscallnr.sh
new file mode 100644
index 000000000000..d2971296469a
--- /dev/null
+++ b/arch/arm/tools/syscallnr.sh
@@ -0,0 +1,33 @@
+#!/bin/sh
+in="$1"
+out="$2"
+my_abis=`echo "($3)" | tr ',' '|'`
+align=1
+
+fileguard=_ASM_ARM_`basename "$out" | sed \
+ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
+ -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
+
+grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | tail -n1 | (
+ echo "#ifndef ${fileguard}
+#define ${fileguard} 1
+
+/*
+ * This needs to be greater than __NR_last_syscall+1 in order to account
+ * for the padding in the syscall table.
+ */
+"
+
+ while read nr abi name entry; do
+ nr=$(($nr + 1))
+ while [ "$(($nr / (256 * $align) ))" -gt 0 ]; do
+ align=$(( $align * 4 ))
+ done
+ nr=$(( ($nr + $align - 1) & ~($align - 1) ))
+ echo "/* aligned to $align */"
+ echo "#define __NR_syscalls $nr"
+ done
+
+ echo ""
+ echo "#endif /* ${fileguard} */"
+) > "$out"
diff --git a/arch/arm/tools/syscalltbl.sh b/arch/arm/tools/syscalltbl.sh
new file mode 100644
index 000000000000..5ca834545ed3
--- /dev/null
+++ b/arch/arm/tools/syscalltbl.sh
@@ -0,0 +1,21 @@
+#!/bin/sh
+in="$1"
+out="$2"
+my_abis=`echo "($3)" | tr ',' '|'`
+
+grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
+ while read nr abi name entry compat; do
+ if [ "$abi" = "eabi" -a -n "$compat" ]; then
+ echo "$in: error: a compat entry for an EABI syscall ($name) makes no sense" >&2
+ exit 1
+ fi
+
+ if [ -n "$entry" ]; then
+ if [ -z "$compat" ]; then
+ echo "NATIVE($nr, $entry)"
+ else
+ echo "COMPAT($nr, $entry, $compat)"
+ fi
+ fi
+ done
+) > "$out"
--
2.1.0
^ permalink raw reply related
* [PATCH 3/3] ARM: wire up new pkey syscalls
From: Russell King @ 2016-10-18 19:31 UTC (permalink / raw)
To: linux-arm-kernel
Wire up the new pkey syscalls for ARM. This illustrates the ease that
the generated/tabular approach gives us: adding new system calls
becomes much easier, and all the dependencies are automatically handled
for the update.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
Of course, this is development, and there will be a patch for -rc2 to
wire these up in due course. I'm using this as an illustration for
this approach - compared with f2335a2a0a59 ("ARM: wire up preadv2 and
pwritev2 syscalls") adding two syscalls, with a diffstat of:
arch/arm/include/asm/unistd.h | 2 +-
arch/arm/include/uapi/asm/unistd.h | 2 ++
arch/arm/kernel/calls.S | 4 +++-
3 files changed, 6 insertions(+), 2 deletions(-)
vs this patch adding three plus reserving two, giving:
arch/arm/tools/syscall.tbl | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/tools/syscall.tbl b/arch/arm/tools/syscall.tbl
index 62285cbd09c0..c2af3b281bcb 100644
--- a/arch/arm/tools/syscall.tbl
+++ b/arch/arm/tools/syscall.tbl
@@ -426,3 +426,8 @@
391 common copy_file_range sys_copy_file_range
392 common preadv2 sys_preadv2
393 common pwritev2 sys_pwritev2
+394 common pkey_mprotect sys_pkey_mprotect
+395 common pkey_alloc sys_pkey_alloc
+396 common pkey_free sys_pkey_free
+# 397 for pkey_get
+# 398 for pkey_set
--
2.1.0
^ permalink raw reply related
* [PATCH 02/28] [v2] mtd: mtk: avoid warning in mtk_ecc_encode
From: Boris Brezillon @ 2016-10-18 19:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476785552.24626.4.camel@mtkswgap22>
On Tue, 18 Oct 2016 18:12:32 +0800
RogerCC.Lin <rogercc.lin@mediatek.com> wrote:
> On Tue, 2016-10-18 at 07:19 +0200, Boris Brezillon wrote:
> > On Tue, 18 Oct 2016 00:05:31 +0200
> > Arnd Bergmann <arnd@arndb.de> wrote:
> >
> > > When building with -Wmaybe-uninitialized, gcc produces a silly false positive
> > > warning for the mtk_ecc_encode function:
> > >
> > > drivers/mtd/nand/mtk_ecc.c: In function 'mtk_ecc_encode':
> > > drivers/mtd/nand/mtk_ecc.c:402:15: error: 'val' may be used uninitialized in this function [-Werror=maybe-uninitialized]
> > >
> > > The function for some reason contains a double byte swap on big-endian
> > > builds to get the OOB data into the correct order again, and is written
> > > in a slightly confusing way.
> > >
> > > Using a simple memcpy32_fromio() to read the data simplifies it a lot
> > > so it becomes more readable and produces no warning. However, the
> > > output might not have 32-bit alignment, so we have to use another
> > > memcpy to avoid taking alignment faults or writing beyond the end
> > > of the array.
> > >
> > > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> >
> > Jorge, RogerCC, can I have an Acked-by and/or Tested-by for this patch?
> Tested, this patch is OK,
> Tested-by: RogerCC Lin <rogercc.lin@mediatek.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Brian, can you take this patch for the next -rc?
>
> >
> > > ---
> > > v2: move temporary buffer into struct mtk_ecc instead of having it
> > > on the stack, as suggested by Boris Brezillon
> > > ---
> > > drivers/mtd/nand/mtk_ecc.c | 19 +++++++++----------
> > > 1 file changed, 9 insertions(+), 10 deletions(-)
> > >
> > > diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c
> > > index d54f666..dbf2562 100644
> > > --- a/drivers/mtd/nand/mtk_ecc.c
> > > +++ b/drivers/mtd/nand/mtk_ecc.c
> > > @@ -86,6 +86,8 @@ struct mtk_ecc {
> > > struct completion done;
> > > struct mutex lock;
> > > u32 sectors;
> > > +
> > > + u8 eccdata[112];
> > > };
> > >
> > > static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc,
> > > @@ -366,9 +368,8 @@ int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config,
> > > u8 *data, u32 bytes)
> > > {
> > > dma_addr_t addr;
> > > - u8 *p;
> > > - u32 len, i, val;
> > > - int ret = 0;
> > > + u32 len;
> > > + int ret;
> > >
> > > addr = dma_map_single(ecc->dev, data, bytes, DMA_TO_DEVICE);
> > > ret = dma_mapping_error(ecc->dev, addr);
> > > @@ -393,14 +394,12 @@ int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config,
> > >
> > > /* Program ECC bytes to OOB: per sector oob = FDM + ECC + SPARE */
> > > len = (config->strength * ECC_PARITY_BITS + 7) >> 3;
> > > - p = data + bytes;
> > >
> > > - /* write the parity bytes generated by the ECC back to the OOB region */
> > > - for (i = 0; i < len; i++) {
> > > - if ((i % 4) == 0)
> > > - val = readl(ecc->regs + ECC_ENCPAR(i / 4));
> > > - p[i] = (val >> ((i % 4) * 8)) & 0xff;
> > > - }
> > > + /* write the parity bytes generated by the ECC back to temp buffer */
> > > + __ioread32_copy(ecc->eccdata, ecc->regs + ECC_ENCPAR(0), round_up(len, 4));
> > > +
> > > + /* copy into possibly unaligned OOB region with actual length */
> > > + memcpy(data + bytes, ecc->eccdata, len);
> > > timeout:
> > >
> > > dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE);
> >
>
>
^ permalink raw reply
* [PATCH v4] MMC: meson: initial support for GX platforms
From: Kevin Hilman @ 2016-10-18 19:56 UTC (permalink / raw)
To: linux-arm-kernel
Initial support for the SD/eMMC controller in the Amlogic S905/GX*
family of SoCs.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
Changes from v3:
- better handling of clock error paths
- rename to meson-gx to reflect support for newer SoCs
- has now been tested with SDIO
.../devicetree/bindings/mmc/amlogic,meson-gxbb.txt | 33 +
MAINTAINERS | 1 +
drivers/mmc/host/Kconfig | 10 +
drivers/mmc/host/Makefile | 1 +
drivers/mmc/host/meson-gx.c | 853 +++++++++++++++++++++
5 files changed, 898 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt
create mode 100644 drivers/mmc/host/meson-gx.c
diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt
new file mode 100644
index 000000000000..a2fa9a1c26ae
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt
@@ -0,0 +1,33 @@
+Amlogic SD / eMMC controller for S905/GXBB family SoCs
+
+The MMC 5.1 compliant host controller on Amlogic provides the
+interface for SD, eMMC and SDIO devices.
+
+This file documents the properties in addition to those available in
+the MMC core bindings, documented by mmc.txt.
+
+Required properties:
+- compatible : contains one of:
+ - "amlogic,meson-gx-mmc"
+ - "amlogic,meson-gxbb-mmc"
+ - "amlogic,meson-gxl-mmc"
+ - "amlogic,meson-gxm-mmc"
+- clocks : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
+- clock-names: Should contain the following:
+ "core" - Main peripheral bus clock
+ "clkin0" - Parent clock of internal mux
+ "clkin1" - Other parent clock of internal mux
+ The driver has an interal mux clock which switches between clkin0 and clkin1 depending on the
+ clock rate requested by the MMC core.
+
+Example:
+
+ sd_emmc_a: mmc at 70000 {
+ compatible = "amlogic,meson-gxbb-mmc";
+ reg = <0x0 0x70000 0x0 0x2000>;
+ interrupts = < GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+ pinctrl-0 = <&emmc_pins>;
+ };
+
diff --git a/MAINTAINERS b/MAINTAINERS
index 1cd38a7e0064..73e8d64ec28c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1036,6 +1036,7 @@ F: arch/arm/mach-meson/
F: arch/arm/boot/dts/meson*
F: arch/arm64/boot/dts/amlogic/
F: drivers/pinctrl/meson/
+F: drivers/mmc/host/meson*
N: meson
ARM/Annapurna Labs ALPINE ARCHITECTURE
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 5274f503a39a..5cf7ebaf1e8b 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -322,6 +322,16 @@ config MMC_SDHCI_IPROC
If unsure, say N.
+config MMC_MESON_GX
+ tristate "Amlogic S905/GX* SD/MMC Host Controller support"
+ depends on ARCH_MESON && MMC
+ help
+ This selects support for the Amlogic SD/MMC Host Controller
+ found on the S905/GX* family of SoCs. This controller is
+ MMC 5.1 compliant and supports SD, eMMC and SDIO interfaces.
+
+ If you have a controller with this interface, say Y here.
+
config MMC_MOXART
tristate "MOXART SD/MMC Host Controller support"
depends on ARCH_MOXART && MMC
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index e2bdaaf43184..1c4852999ae4 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
obj-$(CONFIG_MMC_VUB300) += vub300.o
obj-$(CONFIG_MMC_USHC) += ushc.o
obj-$(CONFIG_MMC_WMT) += wmt-sdmmc.o
+obj-$(CONFIG_MMC_MESON_GX) += meson-gx.o
obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o
obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o
obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o
diff --git a/drivers/mmc/host/meson-gx.c b/drivers/mmc/host/meson-gx.c
new file mode 100644
index 000000000000..fd3c40322b2d
--- /dev/null
+++ b/drivers/mmc/host/meson-gx.c
@@ -0,0 +1,853 @@
+/*
+ * Amlogic SD/eMMC driver for the GX/S905 family SoCs
+ *
+ * Copyright (c) 2016 BayLibre, SAS.
+ * Author: Kevin Hilman <khilman@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ * The full GNU General Public License is included in this distribution
+ * in the file called COPYING.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/ioport.h>
+#include <linux/spinlock.h>
+#include <linux/dma-mapping.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/mmc.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/slot-gpio.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/regulator/consumer.h>
+
+#define DRIVER_NAME "meson-gxbb-mmc"
+
+#define SD_EMMC_CLOCK 0x0
+#define CLK_DIV_SHIFT 0
+#define CLK_DIV_WIDTH 6
+#define CLK_DIV_MASK 0x3f
+#define CLK_DIV_MAX 63
+#define CLK_SRC_SHIFT 6
+#define CLK_SRC_WIDTH 2
+#define CLK_SRC_MASK 0x3
+#define CLK_SRC_XTAL 0 /* external crystal */
+#define CLK_SRC_XTAL_RATE 24000000
+#define CLK_SRC_PLL 1 /* FCLK_DIV2 */
+#define CLK_SRC_PLL_RATE 1000000000
+#define CLK_PHASE_SHIFT 8
+#define CLK_PHASE_MASK 0x3
+#define CLK_PHASE_0 0
+#define CLK_PHASE_90 1
+#define CLK_PHASE_180 2
+#define CLK_PHASE_270 3
+#define CLK_ALWAYS_ON BIT(24)
+
+#define SD_EMMC_DElAY 0x4
+#define SD_EMMC_ADJUST 0x8
+#define SD_EMMC_CALOUT 0x10
+#define SD_EMMC_START 0x40
+#define START_DESC_INIT BIT(0)
+#define START_DESC_BUSY BIT(1)
+#define START_DESC_ADDR_SHIFT 2
+#define START_DESC_ADDR_MASK (~0x3)
+
+#define SD_EMMC_CFG 0x44
+#define CFG_BUS_WIDTH_SHIFT 0
+#define CFG_BUS_WIDTH_MASK 0x3
+#define CFG_BUS_WIDTH_1 0x0
+#define CFG_BUS_WIDTH_4 0x1
+#define CFG_BUS_WIDTH_8 0x2
+#define CFG_DDR BIT(2)
+#define CFG_BLK_LEN_SHIFT 4
+#define CFG_BLK_LEN_MASK 0xf
+#define CFG_RESP_TIMEOUT_SHIFT 8
+#define CFG_RESP_TIMEOUT_MASK 0xf
+#define CFG_RC_CC_SHIFT 12
+#define CFG_RC_CC_MASK 0xf
+#define CFG_STOP_CLOCK BIT(22)
+#define CFG_CLK_ALWAYS_ON BIT(18)
+#define CFG_AUTO_CLK BIT(23)
+
+#define SD_EMMC_STATUS 0x48
+#define STATUS_BUSY BIT(31)
+
+#define SD_EMMC_IRQ_EN 0x4c
+#define IRQ_EN_MASK 0x3fff
+#define IRQ_RXD_ERR_SHIFT 0
+#define IRQ_RXD_ERR_MASK 0xff
+#define IRQ_TXD_ERR BIT(8)
+#define IRQ_DESC_ERR BIT(9)
+#define IRQ_RESP_ERR BIT(10)
+#define IRQ_RESP_TIMEOUT BIT(11)
+#define IRQ_DESC_TIMEOUT BIT(12)
+#define IRQ_END_OF_CHAIN BIT(13)
+#define IRQ_RESP_STATUS BIT(14)
+#define IRQ_SDIO BIT(15)
+
+#define SD_EMMC_CMD_CFG 0x50
+#define SD_EMMC_CMD_ARG 0x54
+#define SD_EMMC_CMD_DAT 0x58
+#define SD_EMMC_CMD_RSP 0x5c
+#define SD_EMMC_CMD_RSP1 0x60
+#define SD_EMMC_CMD_RSP2 0x64
+#define SD_EMMC_CMD_RSP3 0x68
+
+#define SD_EMMC_RXD 0x94
+#define SD_EMMC_TXD 0x94
+#define SD_EMMC_LAST_REG SD_EMMC_TXD
+
+#define SD_EMMC_CFG_BLK_SIZE 512 /* internal buffer max: 512 bytes */
+#define SD_EMMC_CFG_RESP_TIMEOUT 256 /* in clock cycles */
+#define SD_EMMC_CFG_CMD_GAP 16 /* in clock cycles */
+#define MUX_CLK_NUM_PARENTS 2
+
+struct meson_host {
+ struct device *dev;
+ struct mmc_host *mmc;
+ struct mmc_request *mrq;
+ struct mmc_command *cmd;
+
+ spinlock_t lock;
+ void __iomem *regs;
+ int irq;
+ u32 ocr_mask;
+ struct clk *core_clk;
+ struct clk_mux mux;
+ struct clk *mux_clk;
+ struct clk *mux_parent[MUX_CLK_NUM_PARENTS];
+ unsigned long mux_parent_rate[MUX_CLK_NUM_PARENTS];
+
+ struct clk_divider cfg_div;
+ struct clk *cfg_div_clk;
+
+ unsigned int bounce_buf_size;
+ void *bounce_buf;
+ dma_addr_t bounce_dma_addr;
+
+ bool vqmmc_enabled;
+};
+
+struct sd_emmc_desc {
+ u32 cmd_cfg;
+ u32 cmd_arg;
+ u32 cmd_data;
+ u32 cmd_resp;
+};
+#define CMD_CFG_LENGTH_SHIFT 0
+#define CMD_CFG_LENGTH_MASK 0x1ff
+#define CMD_CFG_BLOCK_MODE BIT(9)
+#define CMD_CFG_R1B BIT(10)
+#define CMD_CFG_END_OF_CHAIN BIT(11)
+#define CMD_CFG_TIMEOUT_SHIFT 12
+#define CMD_CFG_TIMEOUT_MASK 0xf
+#define CMD_CFG_NO_RESP BIT(16)
+#define CMD_CFG_NO_CMD BIT(17)
+#define CMD_CFG_DATA_IO BIT(18)
+#define CMD_CFG_DATA_WR BIT(19)
+#define CMD_CFG_RESP_NOCRC BIT(20)
+#define CMD_CFG_RESP_128 BIT(21)
+#define CMD_CFG_RESP_NUM BIT(22)
+#define CMD_CFG_DATA_NUM BIT(23)
+#define CMD_CFG_CMD_INDEX_SHIFT 24
+#define CMD_CFG_CMD_INDEX_MASK 0x3f
+#define CMD_CFG_ERROR BIT(30)
+#define CMD_CFG_OWNER BIT(31)
+
+#define CMD_DATA_MASK (~0x3)
+#define CMD_DATA_BIG_ENDIAN BIT(1)
+#define CMD_DATA_SRAM BIT(0)
+#define CMD_RESP_MASK (~0x1)
+#define CMD_RESP_SRAM BIT(0)
+
+static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate)
+{
+ struct mmc_host *mmc = host->mmc;
+ int ret = 0;
+ u32 cfg;
+
+ if (clk_rate) {
+ if (WARN_ON(clk_rate > mmc->f_max))
+ clk_rate = mmc->f_max;
+ else if (WARN_ON(clk_rate < mmc->f_min))
+ clk_rate = mmc->f_min;
+ }
+
+ if (clk_rate == mmc->actual_clock)
+ return 0;
+
+ /* stop clock */
+ cfg = readl(host->regs + SD_EMMC_CFG);
+ if (!(cfg & CFG_STOP_CLOCK)) {
+ cfg |= CFG_STOP_CLOCK;
+ writel(cfg, host->regs + SD_EMMC_CFG);
+ }
+
+ dev_dbg(host->dev, "change clock rate %u -> %lu\n",
+ mmc->actual_clock, clk_rate);
+
+ if (clk_rate == 0) {
+ mmc->actual_clock = 0;
+ return 0;
+ }
+
+ ret = clk_set_rate(host->cfg_div_clk, clk_rate);
+ if (ret)
+ dev_warn(host->dev, "Unable to set cfg_div_clk to %lu. ret=%d\n",
+ clk_rate, ret);
+ else if (clk_rate && clk_rate != clk_get_rate(host->cfg_div_clk))
+ dev_warn(host->dev, "divider requested rate %lu != actual rate %lu: ret=%d\n",
+ clk_rate, clk_get_rate(host->cfg_div_clk), ret);
+ else
+ mmc->actual_clock = clk_rate;
+
+ /* (re)start clock, if non-zero */
+ if (!ret && clk_rate) {
+ cfg = readl(host->regs + SD_EMMC_CFG);
+ cfg &= ~CFG_STOP_CLOCK;
+ writel(cfg, host->regs + SD_EMMC_CFG);
+ }
+
+ return ret;
+}
+
+/*
+ * The SD/eMMC IP block has an internal mux and divider used for
+ * generating the MMC clock. Use the clock framework to create and
+ * manage these clocks.
+ */
+static int meson_mmc_clk_init(struct meson_host *host)
+{
+ struct clk_init_data init;
+ char clk_name[32];
+ int i, ret = 0;
+ const char *mux_parent_names[MUX_CLK_NUM_PARENTS];
+ unsigned int mux_parent_count = 0;
+ const char *clk_div_parents[1];
+ unsigned int f_min = UINT_MAX;
+ u32 clk_reg, cfg;
+
+ /* get the mux parents */
+ for (i = 0; i < MUX_CLK_NUM_PARENTS; i++) {
+ char name[16];
+
+ snprintf(name, sizeof(name), "clkin%d", i);
+ host->mux_parent[i] = devm_clk_get(host->dev, name);
+ if (IS_ERR(host->mux_parent[i])) {
+ ret = PTR_ERR(host->mux_parent[i]);
+ if (PTR_ERR(host->mux_parent[i]) != -EPROBE_DEFER)
+ dev_err(host->dev, "Missing clock %s\n", name);
+ host->mux_parent[i] = NULL;
+ return ret;
+ }
+
+ host->mux_parent_rate[i] = clk_get_rate(host->mux_parent[i]);
+ mux_parent_names[i] = __clk_get_name(host->mux_parent[i]);
+ mux_parent_count++;
+ if (host->mux_parent_rate[i] < f_min)
+ f_min = host->mux_parent_rate[i];
+ }
+
+ /* cacluate f_min based on input clocks, and max divider value */
+ if (f_min != UINT_MAX)
+ f_min = DIV_ROUND_UP(CLK_SRC_XTAL_RATE, CLK_DIV_MAX);
+ else
+ f_min = 4000000; /* default min: 400 MHz */
+ host->mmc->f_min = f_min;
+
+ /* create the mux */
+ snprintf(clk_name, sizeof(clk_name), "%s#mux", dev_name(host->dev));
+ init.name = clk_name;
+ init.ops = &clk_mux_ops;
+ init.flags = 0;
+ init.parent_names = mux_parent_names;
+ init.num_parents = mux_parent_count;
+
+ host->mux.reg = host->regs + SD_EMMC_CLOCK;
+ host->mux.shift = CLK_SRC_SHIFT;
+ host->mux.mask = CLK_SRC_MASK;
+ host->mux.flags = 0;
+ host->mux.table = NULL;
+ host->mux.hw.init = &init;
+
+ host->mux_clk = devm_clk_register(host->dev, &host->mux.hw);
+ if (WARN_ON(IS_ERR(host->mux_clk)))
+ return PTR_ERR(host->mux_clk);
+
+ /* create the divider */
+ snprintf(clk_name, sizeof(clk_name), "%s#div", dev_name(host->dev));
+ init.name = devm_kstrdup(host->dev, clk_name, GFP_KERNEL);
+ init.ops = &clk_divider_ops;
+ init.flags = CLK_SET_RATE_PARENT;
+ clk_div_parents[0] = __clk_get_name(host->mux_clk);
+ init.parent_names = clk_div_parents;
+ init.num_parents = ARRAY_SIZE(clk_div_parents);
+
+ host->cfg_div.reg = host->regs + SD_EMMC_CLOCK;
+ host->cfg_div.shift = CLK_DIV_SHIFT;
+ host->cfg_div.width = CLK_DIV_WIDTH;
+ host->cfg_div.hw.init = &init;
+ host->cfg_div.flags = CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ROUND_CLOSEST | CLK_DIVIDER_ALLOW_ZERO;
+
+ host->cfg_div_clk = devm_clk_register(host->dev, &host->cfg_div.hw);
+ if (WARN_ON(PTR_ERR_OR_ZERO(host->cfg_div_clk)))
+ return PTR_ERR(host->cfg_div_clk);
+
+ /* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
+ clk_reg = 0;
+ clk_reg |= CLK_PHASE_180 << CLK_PHASE_SHIFT;
+ clk_reg |= CLK_SRC_XTAL << CLK_SRC_SHIFT;
+ clk_reg |= CLK_DIV_MAX << CLK_DIV_SHIFT;
+ clk_reg &= ~CLK_ALWAYS_ON;
+ writel(clk_reg, host->regs + SD_EMMC_CLOCK);
+
+ /* Ensure clock starts in "auto" mode, not "always on" */
+ cfg = readl(host->regs + SD_EMMC_CFG);
+ cfg &= ~CFG_CLK_ALWAYS_ON;
+ cfg |= CFG_AUTO_CLK;
+ writel(cfg, host->regs + SD_EMMC_CFG);
+
+ ret = clk_prepare_enable(host->cfg_div_clk);
+ if (!ret)
+ ret = meson_mmc_clk_set(host, f_min);
+
+ if (!ret)
+ clk_disable_unprepare(host->cfg_div_clk);
+
+ return ret;
+}
+
+static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+ struct meson_host *host = mmc_priv(mmc);
+ u32 bus_width;
+ u32 val, orig;
+
+ /*
+ * GPIO regulator, only controls switching between 1v8 and
+ * 3v3, doesn't support MMC_POWER_OFF, MMC_POWER_ON.
+ */
+ switch (ios->power_mode) {
+ case MMC_POWER_OFF:
+ if (!IS_ERR(mmc->supply.vmmc))
+ mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
+
+ if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) {
+ regulator_disable(mmc->supply.vqmmc);
+ host->vqmmc_enabled = false;
+ }
+
+ break;
+
+ case MMC_POWER_UP:
+ if (!IS_ERR(mmc->supply.vmmc))
+ mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
+ break;
+
+ case MMC_POWER_ON:
+ if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) {
+ int ret = regulator_enable(mmc->supply.vqmmc);
+
+ if (ret < 0)
+ dev_err(mmc_dev(mmc),
+ "failed to enable vqmmc regulator\n");
+ else
+ host->vqmmc_enabled = true;
+ }
+
+ break;
+ }
+
+
+ meson_mmc_clk_set(host, ios->clock);
+
+ /* Bus width */
+ val = readl(host->regs + SD_EMMC_CFG);
+ switch (ios->bus_width) {
+ case MMC_BUS_WIDTH_1:
+ bus_width = CFG_BUS_WIDTH_1;
+ break;
+ case MMC_BUS_WIDTH_4:
+ bus_width = CFG_BUS_WIDTH_4;
+ break;
+ case MMC_BUS_WIDTH_8:
+ bus_width = CFG_BUS_WIDTH_8;
+ break;
+ default:
+ dev_err(host->dev, "Invalid ios->bus_width: %u. Setting to 4.\n",
+ ios->bus_width);
+ bus_width = CFG_BUS_WIDTH_4;
+ return;
+ }
+
+ val = readl(host->regs + SD_EMMC_CFG);
+ orig = val;
+
+ val &= ~(CFG_BUS_WIDTH_MASK << CFG_BUS_WIDTH_SHIFT);
+ val |= bus_width << CFG_BUS_WIDTH_SHIFT;
+
+ val &= ~(CFG_BLK_LEN_MASK << CFG_BLK_LEN_SHIFT);
+ val |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT;
+
+ val &= ~(CFG_RESP_TIMEOUT_MASK << CFG_RESP_TIMEOUT_SHIFT);
+ val |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT;
+
+ val &= ~(CFG_RC_CC_MASK << CFG_RC_CC_SHIFT);
+ val |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT;
+
+ writel(val, host->regs + SD_EMMC_CFG);
+
+ if (val != orig)
+ dev_dbg(host->dev, "%s: SD_EMMC_CFG: 0x%08x -> 0x%08x\n",
+ __func__, orig, val);
+}
+
+static int meson_mmc_request_done(struct mmc_host *mmc, struct mmc_request *mrq)
+{
+ struct meson_host *host = mmc_priv(mmc);
+
+ WARN_ON(host->mrq != mrq);
+
+ host->mrq = NULL;
+ host->cmd = NULL;
+ mmc_request_done(host->mmc, mrq);
+
+ return 0;
+}
+
+static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
+{
+ struct meson_host *host = mmc_priv(mmc);
+ struct sd_emmc_desc *desc, desc_tmp;
+ u32 cfg;
+ u8 blk_len, cmd_cfg_timeout;
+ unsigned int xfer_bytes = 0;
+
+ /* Setup descriptors */
+ dma_rmb();
+ desc = &desc_tmp;
+ memset(desc, 0, sizeof(struct sd_emmc_desc));
+
+ desc->cmd_cfg |= (cmd->opcode & CMD_CFG_CMD_INDEX_MASK) <<
+ CMD_CFG_CMD_INDEX_SHIFT;
+ desc->cmd_cfg |= CMD_CFG_OWNER; /* owned by CPU */
+ desc->cmd_arg = cmd->arg;
+
+ /* Response */
+ if (cmd->flags & MMC_RSP_PRESENT) {
+ desc->cmd_cfg &= ~CMD_CFG_NO_RESP;
+ if (cmd->flags & MMC_RSP_136)
+ desc->cmd_cfg |= CMD_CFG_RESP_128;
+ desc->cmd_cfg |= CMD_CFG_RESP_NUM;
+ desc->cmd_resp = 0;
+
+ if (!(cmd->flags & MMC_RSP_CRC))
+ desc->cmd_cfg |= CMD_CFG_RESP_NOCRC;
+
+ if (cmd->flags & MMC_RSP_BUSY)
+ desc->cmd_cfg |= CMD_CFG_R1B;
+ } else {
+ desc->cmd_cfg |= CMD_CFG_NO_RESP;
+ }
+
+ /* data? */
+ if (cmd->data) {
+ desc->cmd_cfg |= CMD_CFG_DATA_IO;
+ if (cmd->data->blocks > 1) {
+ desc->cmd_cfg |= CMD_CFG_BLOCK_MODE;
+ desc->cmd_cfg |=
+ (cmd->data->blocks & CMD_CFG_LENGTH_MASK) <<
+ CMD_CFG_LENGTH_SHIFT;
+
+ /* check if block-size matches, if not update */
+ cfg = readl(host->regs + SD_EMMC_CFG);
+ blk_len = cfg & (CFG_BLK_LEN_MASK << CFG_BLK_LEN_SHIFT);
+ blk_len >>= CFG_BLK_LEN_SHIFT;
+ if (blk_len != ilog2(cmd->data->blksz)) {
+ dev_warn(host->dev, "%s: update blk_len %d -> %d\n",
+ __func__, blk_len,
+ ilog2(cmd->data->blksz));
+ blk_len = ilog2(cmd->data->blksz);
+ cfg &= ~(CFG_BLK_LEN_MASK << CFG_BLK_LEN_SHIFT);
+ cfg |= blk_len << CFG_BLK_LEN_SHIFT;
+ writel(cfg, host->regs + SD_EMMC_CFG);
+ }
+ } else {
+ desc->cmd_cfg &= ~CMD_CFG_BLOCK_MODE;
+ desc->cmd_cfg |=
+ (cmd->data->blksz & CMD_CFG_LENGTH_MASK) <<
+ CMD_CFG_LENGTH_SHIFT;
+ }
+
+ cmd->data->bytes_xfered = 0;
+ xfer_bytes = cmd->data->blksz * cmd->data->blocks;
+ if (cmd->data->flags & MMC_DATA_WRITE) {
+ desc->cmd_cfg |= CMD_CFG_DATA_WR;
+ WARN_ON(xfer_bytes > host->bounce_buf_size);
+ sg_copy_to_buffer(cmd->data->sg, cmd->data->sg_len,
+ host->bounce_buf, xfer_bytes);
+ cmd->data->bytes_xfered = xfer_bytes;
+ dma_wmb();
+ } else {
+ desc->cmd_cfg &= ~CMD_CFG_DATA_WR;
+ }
+
+ if (xfer_bytes > 0) {
+ desc->cmd_cfg &= ~CMD_CFG_DATA_NUM;
+ desc->cmd_data = host->bounce_dma_addr & CMD_DATA_MASK;
+ } else {
+ /* write data to data_addr */
+ desc->cmd_cfg |= CMD_CFG_DATA_NUM;
+ desc->cmd_data = 0;
+ }
+
+ cmd_cfg_timeout = 12;
+ } else {
+ desc->cmd_cfg &= ~CMD_CFG_DATA_IO;
+ cmd_cfg_timeout = 10;
+ }
+ desc->cmd_cfg |= (cmd_cfg_timeout & CMD_CFG_TIMEOUT_MASK) <<
+ CMD_CFG_TIMEOUT_SHIFT;
+
+ host->cmd = cmd;
+
+ /* Last descriptor */
+ desc->cmd_cfg |= CMD_CFG_END_OF_CHAIN;
+ writel(desc->cmd_cfg, host->regs + SD_EMMC_CMD_CFG);
+ writel(desc->cmd_data, host->regs + SD_EMMC_CMD_DAT);
+ writel(desc->cmd_resp, host->regs + SD_EMMC_CMD_RSP);
+ wmb(); /* ensure descriptor is written before kicked */
+ writel(desc->cmd_arg, host->regs + SD_EMMC_CMD_ARG);
+}
+
+static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
+{
+ struct meson_host *host = mmc_priv(mmc);
+
+ WARN_ON(host->mrq != NULL);
+
+ /* Stop execution */
+ writel(0, host->regs + SD_EMMC_START);
+
+ /* clear, ack, enable all interrupts */
+ writel(0, host->regs + SD_EMMC_IRQ_EN);
+ writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS);
+ writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN);
+
+ host->mrq = mrq;
+
+ if (mrq->sbc)
+ meson_mmc_start_cmd(mmc, mrq->sbc);
+ else
+ meson_mmc_start_cmd(mmc, mrq->cmd);
+}
+
+static int meson_mmc_read_resp(struct mmc_host *mmc, struct mmc_command *cmd)
+{
+ struct meson_host *host = mmc_priv(mmc);
+
+ if (cmd->flags & MMC_RSP_136) {
+ cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP3);
+ cmd->resp[1] = readl(host->regs + SD_EMMC_CMD_RSP2);
+ cmd->resp[2] = readl(host->regs + SD_EMMC_CMD_RSP1);
+ cmd->resp[3] = readl(host->regs + SD_EMMC_CMD_RSP);
+ } else if (cmd->flags & MMC_RSP_PRESENT) {
+ cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP);
+ }
+
+ return 0;
+}
+
+static irqreturn_t meson_mmc_irq(int irq, void *dev_id)
+{
+ struct meson_host *host = dev_id;
+ struct mmc_request *mrq;
+ struct mmc_command *cmd = host->cmd;
+ u32 irq_en, status, raw_status;
+ irqreturn_t ret = IRQ_HANDLED;
+
+ if (WARN_ON(!host))
+ return IRQ_NONE;
+
+ mrq = host->mrq;
+
+ if (WARN_ON(!mrq))
+ return IRQ_NONE;
+
+ if (WARN_ON(!cmd))
+ return IRQ_NONE;
+
+ spin_lock(&host->lock);
+ irq_en = readl(host->regs + SD_EMMC_IRQ_EN);
+ raw_status = readl(host->regs + SD_EMMC_STATUS);
+ status = raw_status & irq_en;
+
+ if (!status) {
+ dev_warn(host->dev, "Spurious IRQ! status=0x%08x, irq_en=0x%08x\n",
+ raw_status, irq_en);
+ ret = IRQ_NONE;
+ goto out;
+ }
+
+ cmd->error = 0;
+ if (status & IRQ_RXD_ERR_MASK) {
+ dev_dbg(host->dev, "Unhandled IRQ: RXD error\n");
+ cmd->error = -EILSEQ;
+ }
+ if (status & IRQ_TXD_ERR) {
+ dev_dbg(host->dev, "Unhandled IRQ: TXD error\n");
+ cmd->error = -EILSEQ;
+ }
+ if (status & IRQ_DESC_ERR)
+ dev_dbg(host->dev, "Unhandled IRQ: Descriptor error\n");
+ if (status & IRQ_RESP_ERR) {
+ dev_dbg(host->dev, "Unhandled IRQ: Response error\n");
+ cmd->error = -EILSEQ;
+ }
+ if (status & IRQ_RESP_TIMEOUT) {
+ dev_dbg(host->dev, "Unhandled IRQ: Response timeout\n");
+ cmd->error = -ETIMEDOUT;
+ }
+ if (status & IRQ_DESC_TIMEOUT) {
+ dev_dbg(host->dev, "Unhandled IRQ: Descriptor timeout\n");
+ cmd->error = -ETIMEDOUT;
+ }
+ if (status & IRQ_SDIO)
+ dev_dbg(host->dev, "Unhandled IRQ: SDIO.\n");
+
+ if (status & (IRQ_END_OF_CHAIN | IRQ_RESP_STATUS))
+ ret = IRQ_WAKE_THREAD;
+ else {
+ dev_warn(host->dev, "Unknown IRQ! status=0x%04x: MMC CMD%u arg=0x%08x flags=0x%08x stop=%d\n",
+ status, cmd->opcode, cmd->arg,
+ cmd->flags, mrq->stop ? 1 : 0);
+ if (cmd->data) {
+ struct mmc_data *data = cmd->data;
+
+ dev_warn(host->dev, "\tblksz %u blocks %u flags 0x%08x (%s%s)",
+ data->blksz, data->blocks, data->flags,
+ data->flags & MMC_DATA_WRITE ? "write" : "",
+ data->flags & MMC_DATA_READ ? "read" : "");
+ }
+ }
+
+out:
+ /* ack all (enabled) interrupts */
+ writel(status, host->regs + SD_EMMC_STATUS);
+
+ if (ret == IRQ_HANDLED) {
+ meson_mmc_read_resp(host->mmc, cmd);
+ meson_mmc_request_done(host->mmc, cmd->mrq);
+ }
+
+ spin_unlock(&host->lock);
+ return ret;
+}
+
+static irqreturn_t meson_mmc_irq_thread(int irq, void *dev_id)
+{
+ struct meson_host *host = dev_id;
+ struct mmc_request *mrq = host->mrq;
+ struct mmc_command *cmd = host->cmd;
+ struct mmc_data *data;
+ unsigned int xfer_bytes;
+ int ret = IRQ_HANDLED;
+
+ if (WARN_ON(!mrq))
+ ret = IRQ_NONE;
+
+ if (WARN_ON(!cmd))
+ ret = IRQ_NONE;
+
+ data = cmd->data;
+ if (data) {
+ xfer_bytes = data->blksz * data->blocks;
+ if (data->flags & MMC_DATA_READ) {
+ WARN_ON(xfer_bytes > host->bounce_buf_size);
+ sg_copy_from_buffer(data->sg, data->sg_len,
+ host->bounce_buf, xfer_bytes);
+ data->bytes_xfered = xfer_bytes;
+ }
+ }
+
+ meson_mmc_read_resp(host->mmc, cmd);
+ if (!data || !data->stop || mrq->sbc)
+ meson_mmc_request_done(host->mmc, mrq);
+ else
+ meson_mmc_start_cmd(host->mmc, data->stop);
+
+ return ret;
+}
+
+/*
+ * NOTE: we only need this until the GPIO/pinctrl driver can handle
+ * interrupts. For now, the MMC core will use this for polling.
+ */
+static int meson_mmc_get_cd(struct mmc_host *mmc)
+{
+ int status = mmc_gpio_get_cd(mmc);
+
+ if (status == -ENOSYS)
+ return 1; /* assume present */
+
+ return status;
+}
+
+static const struct mmc_host_ops meson_mmc_ops = {
+ .request = meson_mmc_request,
+ .set_ios = meson_mmc_set_ios,
+ .get_cd = meson_mmc_get_cd,
+};
+
+static int meson_mmc_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ struct meson_host *host;
+ struct mmc_host *mmc;
+ int ret;
+
+ mmc = mmc_alloc_host(sizeof(struct meson_host), &pdev->dev);
+ if (!mmc)
+ return -ENOMEM;
+ host = mmc_priv(mmc);
+ host->mmc = mmc;
+ host->dev = &pdev->dev;
+ dev_set_drvdata(&pdev->dev, host);
+
+ spin_lock_init(&host->lock);
+
+ /* Get regulators and the supported OCR mask */
+ host->vqmmc_enabled = false;
+ ret = mmc_regulator_get_supply(mmc);
+ if (ret == -EPROBE_DEFER)
+ goto free_host;
+
+ ret = mmc_of_parse(mmc);
+ if (ret) {
+ dev_warn(&pdev->dev, "error parsing DT: %d\n", ret);
+ goto free_host;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ host->regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(host->regs)) {
+ ret = PTR_ERR(host->regs);
+ goto free_host;
+ }
+
+ host->irq = platform_get_irq(pdev, 0);
+ if (host->irq == 0) {
+ dev_err(&pdev->dev, "failed to get interrupt resource.\n");
+ ret = -EINVAL;
+ goto free_host;
+ }
+
+ host->core_clk = devm_clk_get(&pdev->dev, "core");
+ if (IS_ERR(host->core_clk)) {
+ ret = PTR_ERR(host->core_clk);
+ goto free_host;
+ }
+
+ ret = clk_prepare_enable(host->core_clk);
+ if (ret)
+ goto free_host;
+
+ ret = meson_mmc_clk_init(host);
+ if (ret)
+ goto free_host;
+
+ /* Stop execution */
+ writel(0, host->regs + SD_EMMC_START);
+
+ /* clear, ack, enable all interrupts */
+ writel(0, host->regs + SD_EMMC_IRQ_EN);
+ writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS);
+
+ ret = devm_request_threaded_irq(&pdev->dev, host->irq,
+ meson_mmc_irq, meson_mmc_irq_thread,
+ IRQF_SHARED, DRIVER_NAME, host);
+ if (ret)
+ goto free_host;
+
+ /* data bounce buffer */
+ host->bounce_buf_size = SZ_512K;
+ host->bounce_buf =
+ dma_alloc_coherent(host->dev, host->bounce_buf_size,
+ &host->bounce_dma_addr, GFP_KERNEL);
+ if (host->bounce_buf == NULL) {
+ dev_err(host->dev, "Unable to map allocate DMA bounce buffer.\n");
+ ret = -ENOMEM;
+ goto free_host;
+ }
+
+ mmc->ops = &meson_mmc_ops;
+ mmc_add_host(mmc);
+
+ return 0;
+
+free_host:
+ clk_disable_unprepare(host->cfg_div_clk);
+ clk_disable_unprepare(host->core_clk);
+ mmc_free_host(mmc);
+ return ret;
+}
+
+static int meson_mmc_remove(struct platform_device *pdev)
+{
+ struct meson_host *host = dev_get_drvdata(&pdev->dev);
+
+ if (WARN_ON(!host))
+ return 0;
+
+ if (host->bounce_buf)
+ dma_free_coherent(host->dev, host->bounce_buf_size,
+ host->bounce_buf, host->bounce_dma_addr);
+
+ clk_disable_unprepare(host->cfg_div_clk);
+ clk_disable_unprepare(host->core_clk);
+
+ mmc_free_host(host->mmc);
+ return 0;
+}
+
+static const struct of_device_id meson_mmc_of_match[] = {
+ { .compatible = "amlogic,meson-gx-mmc", },
+ { .compatible = "amlogic,meson-gxbb-mmc", },
+ { .compatible = "amlogic,meson-gxl-mmc", },
+ { .compatible = "amlogic,meson-gxm-mmc", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, meson_mmc_of_match);
+
+static struct platform_driver meson_mmc_driver = {
+ .probe = meson_mmc_probe,
+ .remove = meson_mmc_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .of_match_table = of_match_ptr(meson_mmc_of_match),
+ },
+};
+
+module_platform_driver(meson_mmc_driver);
+
+MODULE_ALIAS("platform:" DRIVER_NAME);
+MODULE_DESCRIPTION("Amlogic S905/GXBB SD/eMMC driver");
+MODULE_AUTHOR("Kevin Hilman <khilman@baylibre.com>");
+MODULE_LICENSE("GPL v2");
+
--
2.9.3
^ permalink raw reply related
* [PATCH 1/2] mmc: sdhci-iproc: Add brcm, sdhci-iproc compat string in bindings document
From: Scott Branden @ 2016-10-18 20:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018131614.lskxbdir3ghun5md@rob-hp-laptop>
Hi Rob,
On 16-10-18 06:16 AM, Rob Herring wrote:
> On Wed, Oct 12, 2016 at 11:35:51AM -0700, Scott Branden wrote:
>> Adds brcm,sdhci-iproc compat string to DT bindings document for
>> the iProc SDHCI driver.
>>
>> Signed-off-by: Anup Patel <anup.patel@broadcom.com>
>> Signed-off-by: Scott Branden <scott.branden@broadcom.com>
>> ---
>> Documentation/devicetree/bindings/mmc/brcm,sdhci-iproc.txt | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-iproc.txt b/Documentation/devicetree/bindings/mmc/brcm,sdhci-iproc.txt
>> index be56d2b..aa58b94 100644
>> --- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-iproc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-iproc.txt
>> @@ -7,6 +7,7 @@ Required properties:
>> - compatible : Should be one of the following
>> "brcm,bcm2835-sdhci"
>> "brcm,sdhci-iproc-cygnus"
>> + "brcm,sdhci-iproc"
>
> Seems kind of generic. SoC specific compatible strings please.
>
The compatibility string is generic on purpose as it is not intended to
be SoC specific but work on all new iproc SoCs that have the proper
fixes in place for this block (unlike bcm2835 and cygnus class devices
which can only do 32-bit accesses). I could call it brcm,sdhci-iproc-v2
if that is better or leave it as is. Please let me know your preferences.
Regards,
Scott
^ permalink raw reply
* [RFC PATCH] mtd: nand: Add OX820 NAND Support
From: Boris Brezillon @ 2016-10-18 20:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018090927.1990-1-narmstrong@baylibre.com>
Hi Neil,
On Tue, 18 Oct 2016 11:09:27 +0200
Neil Armstrong <narmstrong@baylibre.com> wrote:
> Add NAND driver to support the Oxford Semiconductor OX820 NAND Controller.
> This is a simple memory mapped NAND controller with single chip select and
> software ECC.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> .../devicetree/bindings/mtd/oxnas-nand.txt | 24 ++++
> drivers/mtd/nand/Kconfig | 5 +
> drivers/mtd/nand/Makefile | 1 +
> drivers/mtd/nand/oxnas_nand.c | 144 +++++++++++++++++++++
> 4 files changed, 174 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> create mode 100644 drivers/mtd/nand/oxnas_nand.c
>
> diff --git a/Documentation/devicetree/bindings/mtd/oxnas-nand.txt b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> new file mode 100644
> index 0000000..83b684d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt
> @@ -0,0 +1,24 @@
> +* Oxford Semiconductor OXNAS NAND Controller
> +
> +Please refer to nand.txt for generic information regarding MTD NAND bindings.
> +
> +Required properties:
> + - compatible: "oxsemi,ox820-nand"
> + - reg: Base address and length for NAND mapped memory.
> +
> +Optional Properties:
> + - clocks: phandle to the NAND gate clock if needed.
> + - resets: phandle to the NAND reset control if needed.
> +
> +Example:
> +
> +nand: nand at 41000000 {
> + compatible = "oxsemi,ox820-nand";
> + reg = <0x41000000 0x100000>;
> + nand-ecc-mode = "soft";
> + clocks = <&stdclk CLK_820_NAND>;
> + resets = <&reset RESET_NAND>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +};
Can you switch to new DT representation for NAND controllers, with one
node for the NAND controller and NAND devices connected to this NAND
controller defined as sub-nodes of this NAND controller [1]?
> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index 7b7a887..c023125 100644
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -426,6 +426,11 @@ config MTD_NAND_ORION
> No board specific support is done by this driver, each board
> must advertise a platform_device for the driver to attach.
>
> +config MTD_NAND_OXNAS
> + tristate "NAND Flash support for Oxford Semiconductor SoC"
> + help
> + This enables the NAND flash controller on Oxford Semiconductor SoCs.
> +
> config MTD_NAND_FSL_ELBC
> tristate "NAND support for Freescale eLBC controllers"
> depends on FSL_SOC
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index cafde6f..05fc054 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -35,6 +35,7 @@ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
> obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
> obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
> obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
> +obj-$(CONFIG_MTD_NAND_OXNAS) += oxnas_nand.o
> obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o
> obj-$(CONFIG_MTD_NAND_FSL_IFC) += fsl_ifc_nand.o
> obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o
> diff --git a/drivers/mtd/nand/oxnas_nand.c b/drivers/mtd/nand/oxnas_nand.c
> new file mode 100644
> index 0000000..ee402ab
> --- /dev/null
> +++ b/drivers/mtd/nand/oxnas_nand.c
> @@ -0,0 +1,144 @@
> +/*
> + * Oxford Semiconductor OXNAS NAND driver
> + *
> + * Heavily based on plat_nand.c :
> + * Author: Vitaly Wool <vitalywool@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + */
> +
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/clk.h>
> +#include <linux/reset.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/nand.h>
> +#include <linux/mtd/partitions.h>
> +
> +/* nand commands */
> +#define NAND_CMD_ALE BIT(18)
> +#define NAND_CMD_CLE BIT(19)
> +#define NAND_CMD_CS 0
I guess this is zero here because you only support connecting a NAND to
CS0.
It's probably something like
OX820_NAND_CS(x) ((x) << CS_FIELD_SHIFT)
> +#define NAND_CMD_RESET 0xff
Why do you have to redefine it? it's already defined here [2].
> +#define NAND_CMD (NAND_CMD_CS | NAND_CMD_CLE)
> +#define NAND_ADDR (NAND_CMD_CS | NAND_CMD_ALE)
> +#define NAND_DATA (NAND_CMD_CS)
Please prefix those macros with OX820, has stated above, this can
conflict with generic definitions.
Also, I'm not sure you should pass the CS information here.
> +
> +struct oxnas_nand_data {
> + struct nand_chip chip;
> + void __iomem *io_base;
> + struct clk *clk;
> +};
Even if your driver does not seem to support connecting several chips
to the same controller, I'd like you to clearly separate the NAND
controller and NAND chip objects:
#define OXNAS_NAND_MAX_CHIPS 1
struct oxnas_nand_controller {
struct nand_hw_control base;
void __iomem *io_base;
struct clk *clk;
struct nand_chip *chips[OXNAS_NAND_MAX_CHIPS];
}
> +
> +static void oxnas_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> + unsigned int ctrl)
> +{
> + struct nand_chip *this = mtd->priv;
> + unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
Please use the ->io_base field directly, and do not use ->IO_ADDR_W/R
(I'd like to get rid of them at some point).
Also, declare the nandaddr as a void __iomem *, and use the '+'
operator instead of '|'.
> +
> + if (ctrl & NAND_CTRL_CHANGE) {
> + nandaddr &= ~(NAND_CMD | NAND_ADDR);
This is not needed.
> + if (ctrl & NAND_CLE)
> + nandaddr |= NAND_CMD;
> + else if (ctrl & NAND_ALE)
> + nandaddr |= NAND_ADDR;
> + this->IO_ADDR_W = (void __iomem *) nandaddr;
This is not needed, is it?
> + }
> +
> + if (cmd != NAND_CMD_NONE)
> + writeb(cmd, (void __iomem *) nandaddr);
> +}
> +
> +/*
> + * Probe for the NAND device.
> + */
> +static int oxnas_nand_probe(struct platform_device *pdev)
> +{
> + struct oxnas_nand_data *data;
> + struct mtd_info *mtd;
> + struct resource *res;
> + int err = 0;
> +
> + /* Allocate memory for the device structure (and zero it) */
> + data = devm_kzalloc(&pdev->dev, sizeof(struct oxnas_nand_data),
> + GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + data->io_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(data->io_base))
> + return PTR_ERR(data->io_base);
> +
> + data->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(data->clk))
> + data->clk = NULL;
> +
> + nand_set_flash_node(&data->chip, pdev->dev.of_node);
> + mtd = nand_to_mtd(&data->chip);
> + mtd->dev.parent = &pdev->dev;
> + mtd->priv = &data->chip;
> +
> + data->chip.IO_ADDR_R = data->io_base;
> + data->chip.IO_ADDR_W = data->io_base;
As I said above, don't use these fields.
> + data->chip.cmd_ctrl = oxnas_nand_cmd_ctrl;
> + data->chip.chip_delay = 30;
> + data->chip.ecc.mode = NAND_ECC_SOFT;
> + data->chip.ecc.algo = NAND_ECC_HAMMING;
Probably a good idea to support soft ECC as well...
> +
> + platform_set_drvdata(pdev, data);
> +
> + clk_prepare_enable(data->clk);
> + device_reset_optional(&pdev->dev);
> +
> + /* Scan to find existence of the device */
> + if (nand_scan(mtd, 1)) {
Why not returning nand_scan() error code?
> + err = -ENXIO;
> + goto out;
Return directly here.
> + }
> +
> + err = mtd_device_parse_register(mtd, NULL, NULL, NULL, 0);
Use mtd_device_register() here.
> + if (!err)
> + return err;
> +
> + nand_release(mtd);
Why not
if (err)
nand_release(mtd);
> +out:
Drop this label.
> + return err;
> +}
> +
> +static int oxnas_nand_remove(struct platform_device *pdev)
> +{
> + struct oxnas_nand_data *data = platform_get_drvdata(pdev);
> +
> + nand_release(nand_to_mtd(&data->chip));
> +
> + return 0;
> +}
> +
> +static const struct of_device_id oxnas_nand_match[] = {
> + { .compatible = "oxsemi,ox820-nand" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, oxnas_nand_match);
> +
> +static struct platform_driver oxnas_nand_driver = {
> + .probe = oxnas_nand_probe,
> + .remove = oxnas_nand_remove,
> + .driver = {
> + .name = "oxnas_nand",
> + .of_match_table = oxnas_nand_match,
> + },
> +};
> +
> +module_platform_driver(oxnas_nand_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Vitaly Wool");
> +MODULE_DESCRIPTION("Oxnas NAND driver");
> +MODULE_ALIAS("platform:oxnas_nand");
Thanks,
Boris
[1]https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/mtd/nand.txt?id=refs/tags/v4.9-rc1#n57
[2]http://lxr.free-electrons.com/source/include/linux/mtd/nand.h#L90
^ permalink raw reply
* [PATCH v2] arm64: defconfig: enable EEPROM_AT25 config option
From: Scott Branden @ 2016-10-18 20:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMhSic4k3K6oSxf+GMWVFZvvJYE4aZpmzS29qZLwakvLsA@mail.gmail.com>
Hi Olof,
On 16-10-17 05:04 PM, Olof Johansson wrote:
> On Mon, Oct 17, 2016 at 4:24 PM, Scott Branden
> <scott.branden@broadcom.com> wrote:
>> Hi Olof,
>>
>> On 16-10-17 02:58 PM, Olof Johansson wrote:
>>>
>>> Hi,
>>>
>>> On Wed, Oct 12, 2016 at 11:51 AM, Scott Branden
>>> <scott.branden@broadcom.com> wrote:
>>>>
>>>> Enable support for on board SPI EEPROM by turning on
>>>> CONFIG_EEPROM_AT25. This needs to be on in order to
>>>> boot and test the kernel with a static rootfs image
>>>> that is not rebuilt everytime the kernel is rebuilt.
>>>
>>>
>>> If we did this for every kernel option we'd get a huge kernel.
>>>
>>> In general, we've said that static options for what's needed to boot
>>> to rootfs (i.e. storage and network drivers for nfsroot) are fine to
>>> enable statically.
>>>
>>> I doubt you need the EEPROM driver to boot to rootfs on your system,
>>> so please enable it as a module instead.
OK, I will upstream as module and need config fragments maintained
locally in order to test defconfig on our test setup.
>>>
>>> Look into using config fragments in case you need to modify the
>>> options for local builds, it should be a convenient way to have a
>>> small delta to apply to fit your internal needs, instead of completely
>>> forking the config file.
>>
>>
>> Do you allow such config fragments to be upstreamed or do we need to
>> maintain these in our tree?
>
> There's no place for them upstream. Maintain locally or in a separate repo.
If that is the case - shall we cleanup arch/arm/configs and delete
dram_0x00000000.config that was introduced in the 4.4 kernel?
>
>
> -Olof
>
Thanks,
Scott
^ permalink raw reply
* [PATCH v3] arm64: defconfig: enable EEPROM_AT25 config option
From: Scott Branden @ 2016-10-18 20:40 UTC (permalink / raw)
To: linux-arm-kernel
Enable support for on board SPI EEPROM by setting
CONFIG_EEPROM_AT25=m
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index eadf485..4c62662 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -136,6 +136,7 @@ CONFIG_MTD_SPI_NOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=m
CONFIG_VIRTIO_BLK=y
+CONFIG_EEPROM_AT25=m
CONFIG_SRAM=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
--
2.5.0
^ permalink raw reply related
* [PATCH v2 21/58] exynos4-is: don't break long lines
From: Mauro Carvalho Chehab @ 2016-10-18 20:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476822924.git.mchehab@s-opensource.com>
Due to the 80-cols restrictions, and latter due to checkpatch
warnings, several strings were broken into multiple lines. This
is not considered a good practice anymore, as it makes harder
to grep for strings at the source code.
As we're right now fixing other drivers due to KERN_CONT, we need
to be able to identify what printk strings don't end with a "\n".
It is a way easier to detect those if we don't break long lines.
So, join those continuation lines.
The patch was generated via the script below, and manually
adjusted if needed.
</script>
use Text::Tabs;
while (<>) {
if ($next ne "") {
$c=$_;
if ($c =~ /^\s+\"(.*)/) {
$c2=$1;
$next =~ s/\"\n$//;
$n = expand($next);
$funpos = index($n, '(');
$pos = index($c2, '",');
if ($funpos && $pos > 0) {
$s1 = substr $c2, 0, $pos + 2;
$s2 = ' ' x ($funpos + 1) . substr $c2, $pos + 2;
$s2 =~ s/^\s+//;
$s2 = ' ' x ($funpos + 1) . $s2 if ($s2 ne "");
print unexpand("$next$s1\n");
print unexpand("$s2\n") if ($s2 ne "");
} else {
print "$next$c2\n";
}
$next="";
next;
} else {
print $next;
}
$next="";
} else {
if (m/\"$/) {
if (!m/\\n\"$/) {
$next=$_;
next;
}
}
}
print $_;
}
</script>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
---
drivers/media/platform/exynos4-is/media-dev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 1a1154a9dfa4..e3a8709138fa 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -938,8 +938,7 @@ static int fimc_md_create_links(struct fimc_md *fmd)
csis = fmd->csis[pdata->mux_id].sd;
if (WARN(csis == NULL,
- "MIPI-CSI interface specified "
- "but s5p-csis module is not loaded!\n"))
+ "MIPI-CSI interface specified but s5p-csis module is not loaded!\n"))
return -EINVAL;
pad = sensor->entity.num_pads - 1;
--
2.7.4
^ permalink raw reply related
* [PATCH v2 25/58] s5p-mfc: don't break long lines
From: Mauro Carvalho Chehab @ 2016-10-18 20:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476822924.git.mchehab@s-opensource.com>
Due to the 80-cols restrictions, and latter due to checkpatch
warnings, several strings were broken into multiple lines. This
is not considered a good practice anymore, as it makes harder
to grep for strings at the source code.
As we're right now fixing other drivers due to KERN_CONT, we need
to be able to identify what printk strings don't end with a "\n".
It is a way easier to detect those if we don't break long lines.
So, join those continuation lines.
The patch was generated via the script below, and manually
adjusted if needed.
</script>
use Text::Tabs;
while (<>) {
if ($next ne "") {
$c=$_;
if ($c =~ /^\s+\"(.*)/) {
$c2=$1;
$next =~ s/\"\n$//;
$n = expand($next);
$funpos = index($n, '(');
$pos = index($c2, '",');
if ($funpos && $pos > 0) {
$s1 = substr $c2, 0, $pos + 2;
$s2 = ' ' x ($funpos + 1) . substr $c2, $pos + 2;
$s2 =~ s/^\s+//;
$s2 = ' ' x ($funpos + 1) . $s2 if ($s2 ne "");
print unexpand("$next$s1\n");
print unexpand("$s2\n") if ($s2 ne "");
} else {
print "$next$c2\n";
}
$next="";
next;
} else {
print $next;
}
$next="";
} else {
if (m/\"$/) {
if (!m/\\n\"$/) {
$next=$_;
next;
}
}
}
print $_;
}
</script>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
---
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 13 ++++++-------
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c | 7 ++-----
2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 52081ddc9bf2..cf787eae11b7 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -793,18 +793,17 @@ static int vidioc_g_crop(struct file *file, void *priv,
cr->c.top = top;
cr->c.width = ctx->img_width - left - right;
cr->c.height = ctx->img_height - top - bottom;
- mfc_debug(2, "Cropping info [h264]: l=%d t=%d "
- "w=%d h=%d (r=%d b=%d fw=%d fh=%d\n", left, top,
- cr->c.width, cr->c.height, right, bottom,
- ctx->buf_width, ctx->buf_height);
+ mfc_debug(2, "Cropping info [h264]: l=%d t=%d w=%d h=%d (r=%d b=%d fw=%d fh=%d\n",
+ left, top, cr->c.width, cr->c.height, right, bottom,
+ ctx->buf_width, ctx->buf_height);
} else {
cr->c.left = 0;
cr->c.top = 0;
cr->c.width = ctx->img_width;
cr->c.height = ctx->img_height;
- mfc_debug(2, "Cropping info: w=%d h=%d fw=%d "
- "fh=%d\n", cr->c.width, cr->c.height, ctx->buf_width,
- ctx->buf_height);
+ mfc_debug(2, "Cropping info: w=%d h=%d fw=%d fh=%d\n",
+ cr->c.width, cr->c.height, ctx->buf_width,
+ ctx->buf_height);
}
return 0;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
index 81e1e4ce6c24..f4301d5bbd32 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
@@ -1293,14 +1293,11 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx)
* First set the output frame buffers
*/
if (ctx->capture_state != QUEUE_BUFS_MMAPED) {
- mfc_err("It seems that not all destionation buffers were "
- "mmaped\nMFC requires that all destination are mmaped "
- "before starting processing\n");
+ mfc_err("It seems that not all destionation buffers were mmaped\nMFC requires that all destination are mmaped before starting processing\n");
return -EAGAIN;
}
if (list_empty(&ctx->src_queue)) {
- mfc_err("Header has been deallocated in the middle of"
- " initialization\n");
+ mfc_err("Header has been deallocated in the middle of initialization\n");
return -EIO;
}
temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
--
2.7.4
^ permalink raw reply related
* [PATCH v2 26/58] c8sectpfe: don't break long lines
From: Mauro Carvalho Chehab @ 2016-10-18 20:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1476822924.git.mchehab@s-opensource.com>
Due to the 80-cols restrictions, and latter due to checkpatch
warnings, several strings were broken into multiple lines. This
is not considered a good practice anymore, as it makes harder
to grep for strings at the source code.
As we're right now fixing other drivers due to KERN_CONT, we need
to be able to identify what printk strings don't end with a "\n".
It is a way easier to detect those if we don't break long lines.
So, join those continuation lines.
The patch was generated via the script below, and manually
adjusted if needed.
</script>
use Text::Tabs;
while (<>) {
if ($next ne "") {
$c=$_;
if ($c =~ /^\s+\"(.*)/) {
$c2=$1;
$next =~ s/\"\n$//;
$n = expand($next);
$funpos = index($n, '(');
$pos = index($c2, '",');
if ($funpos && $pos > 0) {
$s1 = substr $c2, 0, $pos + 2;
$s2 = ' ' x ($funpos + 1) . substr $c2, $pos + 2;
$s2 =~ s/^\s+//;
$s2 = ' ' x ($funpos + 1) . $s2 if ($s2 ne "");
print unexpand("$next$s1\n");
print unexpand("$s2\n") if ($s2 ne "");
} else {
print "$next$c2\n";
}
$next="";
next;
} else {
print $next;
}
$next="";
} else {
if (m/\"$/) {
if (!m/\\n\"$/) {
$next=$_;
next;
}
}
}
print $_;
}
</script>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
---
drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c b/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c
index 30c148b9d65e..42b123ff2953 100644
--- a/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c
+++ b/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c
@@ -112,8 +112,7 @@ static void channel_swdemux_tsklet(unsigned long data)
buf = (u8 *) channel->back_buffer_aligned;
dev_dbg(fei->dev,
- "chan=%d channel=%p num_packets = %d, buf = %p, pos = 0x%x\n\t"
- "rp=0x%lx, wp=0x%lx\n",
+ "chan=%d channel=%p num_packets = %d, buf = %p, pos = 0x%x\n\trp=0x%lx, wp=0x%lx\n",
channel->tsin_id, channel, num_packets, buf, pos, rp, wp);
for (n = 0; n < num_packets; n++) {
@@ -789,8 +788,7 @@ static int c8sectpfe_probe(struct platform_device *pdev)
/* sanity check value */
if (tsin->tsin_id > fei->hw_stats.num_ib) {
dev_err(&pdev->dev,
- "tsin-num %d specified greater than number\n\t"
- "of input block hw in SoC! (%d)",
+ "tsin-num %d specified greater than number\n\tof input block hw in SoC! (%d)",
tsin->tsin_id, fei->hw_stats.num_ib);
ret = -EINVAL;
goto err_clk_disable;
@@ -855,8 +853,7 @@ static int c8sectpfe_probe(struct platform_device *pdev)
tsin->demux_mapping = index;
dev_dbg(fei->dev,
- "channel=%p n=%d tsin_num=%d, invert-ts-clk=%d\n\t"
- "serial-not-parallel=%d pkt-clk-valid=%d dvb-card=%d\n",
+ "channel=%p n=%d tsin_num=%d, invert-ts-clk=%d\n\tserial-not-parallel=%d pkt-clk-valid=%d dvb-card=%d\n",
fei->channel_data[index], index,
tsin->tsin_id, tsin->invert_ts_clk,
tsin->serial_not_parallel, tsin->async_not_sync,
@@ -1045,8 +1042,8 @@ static void load_imem_segment(struct c8sectpfei *fei, Elf32_Phdr *phdr,
*/
dev_dbg(fei->dev,
- "Loading IMEM segment %d 0x%08x\n\t"
- " (0x%x bytes) -> 0x%p (0x%x bytes)\n", seg_num,
+ "Loading IMEM segment %d 0x%08x\n\t (0x%x bytes) -> 0x%p (0x%x bytes)\n",
+seg_num,
phdr->p_paddr, phdr->p_filesz,
dest, phdr->p_memsz + phdr->p_memsz / 3);
@@ -1075,8 +1072,7 @@ static void load_dmem_segment(struct c8sectpfei *fei, Elf32_Phdr *phdr,
*/
dev_dbg(fei->dev,
- "Loading DMEM segment %d 0x%08x\n\t"
- "(0x%x bytes) -> 0x%p (0x%x bytes)\n",
+ "Loading DMEM segment %d 0x%08x\n\t(0x%x bytes) -> 0x%p (0x%x bytes)\n",
seg_num, phdr->p_paddr, phdr->p_filesz,
dst, phdr->p_memsz);
--
2.7.4
^ permalink raw reply related
* [PATCH 1/3] ARM: memory: da8xx-ddrctl: new driver
From: Laurent Pinchart @ 2016-10-18 20:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476721850-454-2-git-send-email-bgolaszewski@baylibre.com>
Hi Bartosz,
Thank you for the patch.
On Monday 17 Oct 2016 18:30:48 Bartosz Golaszewski wrote:
> Create a new driver for the da8xx DDR2/mDDR controller and implement
> support for writing to the Peripheral Bus Burst Priority Register.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> .../memory-controllers/ti-da8xx-ddrctl.txt | 25 +++++++
> drivers/memory/Kconfig | 8 +++
> drivers/memory/Makefile | 1 +
> drivers/memory/da8xx-ddrctl.c | 77 +++++++++++++++++++
> 4 files changed, 111 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt
> create mode 100644 drivers/memory/da8xx-ddrctl.c
>
> diff --git
> a/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt
> b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt
> new file mode 100644
> index 0000000..e340404
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt
> @@ -0,0 +1,25 @@
> +* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory
> controller
> +
> +The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs
> memory
> +maps a set of registers which allow to tweak the controller's behavior.
> +
> +Documentation:
> +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
> +
> +Required properties:
> +
> +- compatible: "ti,da850-ddrctl"
Don't you need a reg property ?
> +Optional properties:
> +
> +- ti,pr-old-count: Priority raise old counter. Specifies the number of
> + memory transfers after which the DDR2/mDDR memory
> + controller will elevate the priority of the oldest
> + command in the command FIFO. Must be between 0-255.
Isn't this a system configuration more than a hardware description ?
> +Example for da850 shown below.
> +
> +ddrctl {
> + compatible = "ti,da850-ddrctl";
> + ti,pr-old-count = <0x20>;
> +};
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 4b4c0c3..ec80e35 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -134,6 +134,14 @@ config MTK_SMI
> mainly help enable/disable iommu and control the power domain and
> clocks for each local arbiter.
>
> +config DA8XX_DDRCTL
> + bool "Texas Instruments da8xx DDR2/mDDR driver"
> + depends on ARCH_DAVINCI_DA8XX
> + help
> + This driver is for the DDR2/mDDR Memory Controller present on
> + Texas Instruments da8xx SoCs. It's used to tweak various memory
> + controller configuration options.
> +
> source "drivers/memory/samsung/Kconfig"
> source "drivers/memory/tegra/Kconfig"
>
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index b20ae38..e88097fb 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -17,6 +17,7 @@ obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
> obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
> obj-$(CONFIG_JZ4780_NEMC) += jz4780-nemc.o
> obj-$(CONFIG_MTK_SMI) += mtk-smi.o
> +obj-$(CONFIG_DA8XX_DDRCTL) += da8xx-ddrctl.o
>
> obj-$(CONFIG_SAMSUNG_MC) += samsung/
> obj-$(CONFIG_TEGRA_MC) += tegra/
> diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c
> new file mode 100644
> index 0000000..dcd0a61
> --- /dev/null
> +++ b/drivers/memory/da8xx-ddrctl.c
> @@ -0,0 +1,77 @@
> +/*
> + * TI da8xx DDR2/mDDR controller driver
> + *
> + * Copyright (C) 2016 BayLibre SAS
> + *
> + * Author:
> + * Bartosz Golaszewski <bgolaszewski@baylibre.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +
> +#define DA8XX_DDR_CTL_BASE 0xB0000000
> +#define DA8XX_PBBPR_OFFSET 0x00000020
> +#define DA8XX_PBBPR_REG(p) ((p) + DA8XX_PBBPR_OFFSET)
> +
> +#define DA8XX_PBBPR_MAX 0xff
> +
> +static void da8xx_ddrctl_set_pbbpr(void __iomem *ddrctl, struct device
> *dev) +{
> + struct device_node *node = dev->of_node;
> + u32 pr_old_count;
> + int ret;
> +
> + ret = of_property_read_u32(node, "ti,pr-old-count", &pr_old_count);
> + if (ret)
> + return;
> +
> + if (pr_old_count > DA8XX_PBBPR_MAX) {
> + dev_warn(dev, "priority raise old counter value too high\n");
> + return;
> + }
> +
> + __raw_writel(pr_old_count, DA8XX_PBBPR_REG(ddrctl));
> +}
> +
> +static int da8xx_ddrctl_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + void __iomem *ddrctl;
> +
> + ddrctl = ioremap(DA8XX_DDR_CTL_BASE, SZ_256);
> + if (!ddrctl) {
> + dev_err(dev, "unable to map memory controller registers\n");
> + return -EIO;
> + }
> +
> + da8xx_ddrctl_set_pbbpr(ddrctl, dev);
> +
> + iounmap(ddrctl);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id da8xx_ddrctl_of_match[] = {
> + { .compatible = "ti,da850-ddrctl", },
> + { },
> +};
> +
> +static struct platform_driver da8xx_ddrctl_driver = {
> + .probe = da8xx_ddrctl_probe,
> + .driver = {
> + .name = "da8xx-ddrctl",
> + .of_match_table = da8xx_ddrctl_of_match,
> + },
> +};
> +module_platform_driver(da8xx_ddrctl_driver);
> +
> +MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
> +MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver");
> +MODULE_LICENSE("GPL v2");
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH v2] arm64: defconfig: enable EEPROM_AT25 config option
From: Olof Johansson @ 2016-10-18 20:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <89501c0e-b544-8d5c-a158-7a3484af935d@broadcom.com>
On Tue, Oct 18, 2016 at 1:38 PM, Scott Branden
<scott.branden@broadcom.com> wrote:
> Hi Olof,
>
> On 16-10-17 05:04 PM, Olof Johansson wrote:
>>
>> On Mon, Oct 17, 2016 at 4:24 PM, Scott Branden
>> <scott.branden@broadcom.com> wrote:
>>>
>>> Hi Olof,
>>>
>>> On 16-10-17 02:58 PM, Olof Johansson wrote:
>>>>
>>>>
>>>> Hi,
>>>>
>>>> On Wed, Oct 12, 2016 at 11:51 AM, Scott Branden
>>>> <scott.branden@broadcom.com> wrote:
>>>>>
>>>>>
>>>>> Enable support for on board SPI EEPROM by turning on
>>>>> CONFIG_EEPROM_AT25. This needs to be on in order to
>>>>> boot and test the kernel with a static rootfs image
>>>>> that is not rebuilt everytime the kernel is rebuilt.
>>>>
>>>>
>>>>
>>>> If we did this for every kernel option we'd get a huge kernel.
>>>>
>>>> In general, we've said that static options for what's needed to boot
>>>> to rootfs (i.e. storage and network drivers for nfsroot) are fine to
>>>> enable statically.
>>>>
>>>> I doubt you need the EEPROM driver to boot to rootfs on your system,
>>>> so please enable it as a module instead.
>
> OK, I will upstream as module and need config fragments maintained locally
> in order to test defconfig on our test setup.
Great.
>>>>
>>>>
>>>> Look into using config fragments in case you need to modify the
>>>> options for local builds, it should be a convenient way to have a
>>>> small delta to apply to fit your internal needs, instead of completely
>>>> forking the config file.
>>>
>>>
>>>
>>> Do you allow such config fragments to be upstreamed or do we need to
>>> maintain these in our tree?
>>
>>
>> There's no place for them upstream. Maintain locally or in a separate
>> repo.
>
> If that is the case - shall we cleanup arch/arm/configs and delete
> dram_0x00000000.config that was introduced in the 4.4 kernel?
That one is a bit different, in that it allows us to do defconfig
consolidation, and as such keeps the number of defconfigs needed down.
In particular, see the email from Arnd here:
http://marc.info/?l=linux-arm-kernel&m=145700132713703
-Olof
^ permalink raw reply
* [PATCH v2] ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
From: Gottfried Haider @ 2016-10-18 20:48 UTC (permalink / raw)
To: linux-arm-kernel
Hi Eric, Linus,
I'll hopefully find time to look at the more recent changes to the
gpio subsystem (lsgpio?!), but since this patch is up for discussion
now - what I was wondering: how does this change relate to
/sys/class/gpio/gpio%d? Is this completely orthogonal - or would this
change the sysfs interface as well?
Regarding the proposed format using the header pin numbers: From what
I've seen in terms of existing educational materials, it seems the
overwhelming majority ends up using GPIO numbers instead of physical
pin header numbering. (e.g. [1] [2])
Would it be too confusing to try to pick GPIO 5 from an alphabetically
sorted list like this "P11_GPIO17", "P12_GPIO18"? (I know,
alphabetical sorting is an issue here already for a different reason.
But applications might do it, I guess?)
Best
Gottfried
[1] https://www.raspberrypi.org/learning/physical-computing-with-python/worksheet/
[2] https://pinout.xyz/pinout/
^ permalink raw reply
* [PATCH 2/3] ARM: bus: da8xx-syscfg: new driver
From: Laurent Pinchart @ 2016-10-18 20:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com>
Hi Bartosz,
Thank you for the patch.
On Monday 17 Oct 2016 18:30:49 Bartosz Golaszewski wrote:
> Create the driver for the da8xx System Configuration and implement
> support for writing to the three Master Priority registers.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> .../devicetree/bindings/bus/ti,da850-syscfg.txt | 63 +++++++
> drivers/bus/Kconfig | 8 +
> drivers/bus/Makefile | 2 +
> drivers/bus/da8xx-syscfg.c | 206 ++++++++++++++++++
> 4 files changed, 279 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/bus/ti,da850-syscfg.txt create mode
> 100644 drivers/bus/da8xx-syscfg.c
>
> diff --git a/Documentation/devicetree/bindings/bus/ti,da850-syscfg.txt
> b/Documentation/devicetree/bindings/bus/ti,da850-syscfg.txt new file mode
> 100644
> index 0000000..07e5c38
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/ti,da850-syscfg.txt
> @@ -0,0 +1,63 @@
> +* Device tree bindings for Texas Instruments da8xx system configuration
> driver
> +
> +The system configuration (SYSCFG) module is a system-level module
> containing
> +status and top level control logic required by the device. The system
> +configuration module consists of a set of memory-mapped status and control
> +registers, accessible by the CPU, supporting all of the following system
> +features, and miscellaneous functions and operations.
> +
> +Documentation:
> +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
> +
> +Required properties:
> +
> +- compatible: "ti,da850-syscfg"
Don't you need a reg property ?
> +Optional properties:
> +
> +The below properties are used to specify the priority of master
> peripherals.
> +They must be between 0-7 where 0 is the highest priority and 7 is the
> lowest.
> +
> +- ti,pri-arm-i: ARM_I port priority.
> +
> +- ti,pri-arm-d: ARM_D port priority.
> +
> +- ti,pri-upp: uPP port priority.
> +
> +- ti,pri-sata: SATA port priority.
> +
> +- ti,pri-pru0: PRU0 port priority.
> +
> +- ti,pri-pru1: PRU1 port priority.
> +
> +- ti,pri-edma30tc0: EDMA3_0_TC0 port priority.
> +
> +- ti,pri-edma30tc1: EDMA3_0_TC1 port priority.
> +
> +- ti,pri-edma31tc0: EDMA3_1_TC0 port priority.
> +
> +- ti,pri-vpif-dma-0: VPIF DMA0 port priority.
> +
> +- ti,pri-vpif-dma-1: VPIF DMA1 port priority.
> +
> +- ti,pri-emac: EMAC port priority.
> +
> +- ti,pri-usb0cfg: USB0 CFG port priority.
> +
> +- ti,pri-usb0cdma: USB0 CDMA port priority.
> +
> +- ti,pri-uhpi: HPI port priority.
> +
> +- ti,pri-usb1: USB1 port priority.
> +
> +- ti,pri-lcdc: LCDC port priority.
I'm afraid this looks more like system configuration than hardware description
to me.
There was a BoF session about how to support this kind of performance knobs at
ELCE last week: https://openiotelceurope2016.sched.org/event/7rss/bof-linux-device-performance-framework-michael-turquette-baylibre :-)
> +If any of the above properties is absent, the default value will be used as
> +defined in the documentation.
> +
> +Example for da850-lcdk is shown below.
> +
> +mstpri {
> + compatible = "ti,da850-mstpri";
> + ti,pri-lcdc = 0;
> +};
> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
> index 5a2d47c..6276132 100644
> --- a/drivers/bus/Kconfig
> +++ b/drivers/bus/Kconfig
> @@ -165,4 +165,12 @@ config VEXPRESS_CONFIG
> help
> Platform configuration infrastructure for the ARM Ltd.
> Versatile Express.
> +
> +config DA8XX_SYSCFG
> + bool "TI da8xx system configuration driver"
> + depends on ARCH_DAVINCI_DA8XX
> + help
> + Driver for Texas Instruments da8xx system configuration. Allows to
> + adjust various SoC configuration options.
> +
> endmenu
> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
> index c6cfa6b..3cba66a 100644
> --- a/drivers/bus/Makefile
> +++ b/drivers/bus/Makefile
> @@ -21,3 +21,5 @@ obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
> obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
> obj-$(CONFIG_UNIPHIER_SYSTEM_BUS) += uniphier-system-bus.o
> obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o
> +
> +obj-$(CONFIG_DA8XX_SYSCFG) += da8xx-syscfg.o
> diff --git a/drivers/bus/da8xx-syscfg.c b/drivers/bus/da8xx-syscfg.c
> new file mode 100644
> index 0000000..8a2cb4f
> --- /dev/null
> +++ b/drivers/bus/da8xx-syscfg.c
> @@ -0,0 +1,206 @@
> +/*
> + * TI da8xx System Configuration driver
> + *
> + * Copyright (C) 2016 BayLibre SAS
> + *
> + * Author:
> + * Bartosz Golaszewski <bgolaszewski@baylibre.com.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +
> +#define DA8XX_IO_PHYS 0x01c00000ul
> +#define DA8XX_SYSCFG0_BASE (DA8XX_IO_PHYS + 0x14000)
> +
> +#define DA8XX_MSTPRI0_REG 0x110
> +#define DA8XX_MSTPRI1_REG 0x114
> +#define DA8XX_MSTPRI2_REG 0x118
> +
> +#define DA8XX_MSTPRI_MAX 7
> +
> +struct da8xx_mstpri_descr {
> + const char *property;
> + int reg;
> + int shift;
> + int mask;
> +};
> +
> +static const struct da8xx_mstpri_descr priorities[] = {
> + {
> + .property = "ti,pri-arm-i",
> + .reg = DA8XX_MSTPRI0_REG,
> + .shift = 0,
> + .mask = 0xfffffff0,
> + },
> + {
> + .property = "ti,pri-arm-d",
> + .reg = DA8XX_MSTPRI0_REG,
> + .shift = 4,
> + .mask = 0xffffff0f,
> + },
> + {
> + .property = "ti,pri-upp",
> + .reg = DA8XX_MSTPRI0_REG,
> + .shift = 16,
> + .mask = 0xfff0ffff,
> + },
> + {
> + .property = "ti,pri-sata",
> + .reg = DA8XX_MSTPRI0_REG,
> + .shift = 20,
> + .mask = 0xff0fffff,
> + },
> + {
> + .property = "ti,pri-pru0",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 0,
> + .mask = 0xfffffff0,
> + },
> + {
> + .property = "ti,pri-pru1",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 4,
> + .mask = 0xffffff0f,
> + },
> + {
> + .property = "ti,pri-edma30tc0",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 8,
> + .mask = 0xfffff0ff,
> + },
> + {
> + .property = "ti,pri-edma30tc1",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 12,
> + .mask = 0xffff0fff,
> + },
> + {
> + .property = "ti,pri-edma31tc0",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 16,
> + .mask = 0xfff0ffff,
> + },
> + {
> + .property = "ti,pri-vpif-dma-0",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 24,
> + .mask = 0xf0ffffff,
> + },
> + {
> + .property = "ti,pri-vpif-dma-1",
> + .reg = DA8XX_MSTPRI1_REG,
> + .shift = 28,
> + .mask = 0x0fffffff,
> + },
> + {
> + .property = "ti,pri-emac",
> + .reg = DA8XX_MSTPRI2_REG,
> + .shift = 0,
> + .mask = 0xfffffff0,
> + },
> + {
> + .property = "ti,pri-usb0cfg",
> + .reg = DA8XX_MSTPRI2_REG,
> + .shift = 8,
> + .mask = 0xfffff0ff,
> + },
> + {
> + .property = "ti,pri-usb0cdma",
> + .reg = DA8XX_MSTPRI2_REG,
> + .shift = 12,
> + .mask = 0xffff0fff,
> + },
> + {
> + .property = "ti,pri-uhpi",
> + .reg = DA8XX_MSTPRI2_REG,
> + .shift = 20,
> + .mask = 0xff0fffff,
> + },
> + {
> + .property = "ti,pri-usb1",
> + .reg = DA8XX_MSTPRI2_REG,
> + .shift = 24,
> + .mask = 0xf0ffffff,
> + },
> + {
> + .property = "ti,pri-lcdc",
> + .reg = DA8XX_MSTPRI2_REG,
> + .shift = 28,
> + .mask = 0x0fffffff,
> + },
> +};
> +
> +static void da8xx_syscfg_set_mstpri(void __iomem *syscfg0, struct device
> *dev) +{
> + const struct da8xx_mstpri_descr *pri_descr;
> + struct device_node *node = dev->of_node;
> + void __iomem *mstpri;
> + u32 old_pri, new_pri;
> + int ret, i;
> +
> + for (i = 0; i < ARRAY_SIZE(priorities); i++) {
> + pri_descr = &priorities[i];
> +
> + ret = of_property_read_u32(node, pri_descr->property,
&new_pri);
> + if (ret)
> + continue;
> +
> + if (new_pri > DA8XX_MSTPRI_MAX) {
> + dev_warn(dev,
> + "omitting property '%s' - value too high\n",
> + pri_descr->property);
> + continue;
> + }
> +
> + mstpri = syscfg0 + pri_descr->reg;
> + old_pri = __raw_readl(mstpri);
> + old_pri &= pri_descr->mask;
> + new_pri <<= pri_descr->shift;
> + new_pri |= old_pri;
> +
> + __raw_writel(new_pri, mstpri);
> + }
> +}
> +
> +static int da8xx_syscfg_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + void __iomem *syscfg0;
> +
> + syscfg0 = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
> + if (!syscfg0) {
> + dev_err(dev, "unable to map syscfg0\n");
> + return -EIO;
> + }
> +
> + da8xx_syscfg_set_mstpri(syscfg0, dev);
> +
> + iounmap(syscfg0);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id da8xx_syscfg_of_match[] = {
> + { .compatible = "ti,da850-syscfg", },
> + { },
> +};
> +
> +static struct platform_driver da8xx_syscfg_driver = {
> + .probe = da8xx_syscfg_probe,
> + .driver = {
> + .name = "da8xx-syscfg",
> + .of_match_table = da8xx_syscfg_of_match,
> + },
> +};
> +module_platform_driver(da8xx_syscfg_driver);
> +
> +MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
> +MODULE_DESCRIPTION("TI da8xx System Configuration driver");
> +MODULE_LICENSE("GPL v2");
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH v5 00/23] Support qcom's HSIC USB and rewrite USB2 HS support
From: Stephen Boyd @ 2016-10-18 20:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018093139.GB6294@b29397-desktop>
Quoting Peter Chen (2016-10-18 02:31:40)
> On Mon, Oct 17, 2016 at 06:56:13PM -0700, Stephen Boyd wrote:
> > I've also sent separate patches for other minor pieces to make this
> > all work. The full tree can be found here[2], hacks and all to get
> > things working. I've tested this on the db410c, apq8074 dragonboard,
> > and ifc6410 with configfs gadgets and otg cables.
> >
> > Patches based on v4.8-rc1
Oops should be v4.9-rc1 here.
> >
> > Changes from v4:
> > * Picked up Acks from Rob
> > * Updated HS phy init sequence DT property to restrict it to offsets
>
> I remembered that you got all my acks for chipidea patches, right? I did
> not check for this series.
Sorry I've added in one more patch
usb: chipidea: Emulate OTGSC interrupt enable path
to fix extcon interrupt emulation even further.
>
> Besides, the patch "gpu: Remove depends on RESET_CONTROLLER when not a
> provider" [1] still not be accepted, I need this patch to be merged
> first, then apply your chipidea part, otherwise, there is a building
> warning.
>
> [1] https://patchwork.kernel.org/patch/9322583/
Yes, I'm going to resend that patch now. I hope that David will apply it
for -rc2.
^ permalink raw reply
* [PATCH] gpu: Remove depends on RESET_CONTROLLER when not a provider
From: Stephen Boyd @ 2016-10-18 20:57 UTC (permalink / raw)
To: linux-arm-kernel
These GPU drivers only depend on the RESET_CONTROLLER config
option to fix build issues that existed when there weren't stub
reset APIs for reset controller consumers. Given that these
drivers aren't providing any reset controllers themselves, they
don't actually depend on the API to build (just to function) so
they don't need to depend on it. Remove the dependency to fix
recursive build errors like the following:
drivers/usb/Kconfig:39:error: recursive dependency detected!
drivers/usb/Kconfig:39: symbol USB is selected by MOUSE_APPLETOUCH
drivers/input/mouse/Kconfig:187: symbol MOUSE_APPLETOUCH depends on INPUT
drivers/input/Kconfig:8: symbol INPUT is selected by VT
drivers/tty/Kconfig:12: symbol VT is selected by FB_STI
drivers/video/fbdev/Kconfig:674: symbol FB_STI depends on FB
drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER
drivers/gpu/drm/Kconfig:42: symbol DRM_KMS_FB_HELPER is selected by DRM_KMS_CMA_HELPER
drivers/gpu/drm/Kconfig:98: symbol DRM_KMS_CMA_HELPER is selected by DRM_IMX
drivers/gpu/drm/imx/Kconfig:1: symbol DRM_IMX depends on IMX_IPUV3_CORE
drivers/gpu/ipu-v3/Kconfig:1: symbol IMX_IPUV3_CORE depends on RESET_CONTROLLER
drivers/reset/Kconfig:4: symbol RESET_CONTROLLER is selected by USB_CHIPIDEA
drivers/usb/chipidea/Kconfig:1: symbol USB_CHIPIDEA depends on USB_EHCI_HCD
drivers/usb/host/Kconfig:84: symbol USB_EHCI_HCD depends on USB
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: <dri-devel@lists.freedesktop.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Mark Yao <mark.yao@rock-chips.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
This has come out of some USB chipidea patches I've been working on. Please see
http://lkml.kernel.org/r/20160907213519.27340-1-stephen.boyd at linaro.org for
more details.
I'm resending with the ack from Philipp picked up.
drivers/gpu/drm/rockchip/Kconfig | 1 -
drivers/gpu/drm/tegra/Kconfig | 1 -
drivers/gpu/ipu-v3/Kconfig | 1 -
3 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 3c58669a06ce..6f7f9c59f05b 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -1,7 +1,6 @@
config DRM_ROCKCHIP
tristate "DRM Support for Rockchip"
depends on DRM && ROCKCHIP_IOMMU
- depends on RESET_CONTROLLER
select DRM_GEM_CMA_HELPER
select DRM_KMS_HELPER
select DRM_PANEL
diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index 63ebb154b9b5..bbf5a4b7e0b6 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -3,7 +3,6 @@ config DRM_TEGRA
depends on ARCH_TEGRA || (ARM && COMPILE_TEST)
depends on COMMON_CLK
depends on DRM
- depends on RESET_CONTROLLER
select DRM_KMS_HELPER
select DRM_MIPI_DSI
select DRM_PANEL
diff --git a/drivers/gpu/ipu-v3/Kconfig b/drivers/gpu/ipu-v3/Kconfig
index aefdff95356d..08766c6e7856 100644
--- a/drivers/gpu/ipu-v3/Kconfig
+++ b/drivers/gpu/ipu-v3/Kconfig
@@ -1,7 +1,6 @@
config IMX_IPUV3_CORE
tristate "IPUv3 core support"
depends on SOC_IMX5 || SOC_IMX6Q || ARCH_MULTIPLATFORM
- depends on RESET_CONTROLLER
select GENERIC_IRQ_CHIP
help
Choose this if you have a i.MX5/6 system and want to use the Image
--
2.10.0.297.gf6727b0
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