* [PATCH V6 00/10] dmaengine: qcom_hidma: add MSI interrupt support
From: Sinan Kaya @ 2016-10-20 21:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a4c95bd6-d760-1f02-bbb1-89538037d41e@codeaurora.org>
Hi Vinod,
On 10/20/2016 10:34 AM, Sinan Kaya wrote:
> On 10/20/2016 9:43 AM, Vinod Koul wrote:
>>> slave-dma git://git.infradead.org/users/vkoul/slave-dma.git (fetch)
>>>> slave-dma git://git.infradead.org/users/vkoul/slave-dma.git (push)
>> You seem to have missed topic/qcom which I pushed last night. next would have worked too!!
>>
>
> OK. Let me pick that up and test.
>
It looks like patches were applied out of order.
This is the post order
-rw-rw-r-- 1 okaya users 8176 Oct 20 17:44 0010-dmaengine-qcom_hidma-add-MSI-support-for-interrupts.patch
-rw-rw-r-- 1 okaya users 1175 Oct 20 17:44 0009-dmaengine-qcom_hidma-break-completion-processing-on-.patch
-rw-rw-r-- 1 okaya users 4773 Oct 20 17:44 0008-dmaengine-qcom_hidma-protect-common-data-structures.patch
-rw-rw-r-- 1 okaya users 2752 Oct 20 17:44 0007-dmaengine-qcom_hidma-add-a-common-API-to-setup-the-i.patch
-rw-rw-r-- 1 okaya users 3225 Oct 20 17:44 0006-dmaengine-qcom_hidma-bring-out-interrupt-cause.patch
-rw-rw-r-- 1 okaya users 4284 Oct 20 17:44 0005-dmaengine-qcom_hidma-make-pending_tre_count-atomic.patch
-rw-rw-r-- 1 okaya users 1090 Oct 20 17:44 0004-dmaengine-qcom_hidma-configure-DMA-and-MSI-for-OF.patch
-rw-rw-r-- 1 okaya users 959 Oct 20 17:44 0003-of-irq-make-of_msi_configure-accessible-from-modules.patch
-rw-rw-r-- 1 okaya users 1558 Oct 20 17:44 0002-Documentation-DT-qcom_hidma-correct-spelling-mistake.patch
-rw-rw-r-- 1 okaya users 1588 Oct 20 17:44 0001-Documentation-DT-qcom_hidma-update-binding-for-MSI.patch
This is the commit order in topic/dma branch. I added <<< for the patches missing below.
<<< 0010-dmaengine-qcom_hidma-add-MSI-support-for-interrupts.patch
<<< 0009-dmaengine-qcom_hidma-break-completion-processing-on-.patch
fc73796 dmaengine: qcom_hidma: break completion processing on error
<<< 0008-dmaengine-qcom_hidma-protect-common-data-structures.patch
d3eab50 dmaengine: qcom_hidma: add a common API to setup the interrupt
<<< 0006-dmaengine-qcom_hidma-bring-out-interrupt-cause.patch
<<< 0005-dmaengine-qcom_hidma-make-pending_tre_count-atomic.patch
9da0be8 dmaengine: qcom_hidma: configure DMA and MSI for OF
5282c18 of: irq: make of_msi_configure accessible from modules
13af1c8 Documentation: DT: qcom_hidma: correct spelling mistakes
ef6661b Documentation: DT: qcom_hidma: update binding for MSI
I also looked@the binary contents of the patches in topic/dma with what I posted
on v6. They match excluding your Signed off lines.
Sinan
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 1/4] arm64: dts: msm8996: Add SMEM reserve-memory node
From: Andy Gross @ 2016-10-20 21:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4ca66e5d-c235-435b-c966-49a0e0722b8e@codeaurora.org>
On Thu, Oct 20, 2016 at 02:16:41PM -0700, Sarangdhar Joshi wrote:
> On 10/20/2016 12:57 PM, Bjorn Andersson wrote:
> >On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> >
> >>Add DT node to carveout memory for shared memory region.
> >>
> >
> >Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Thanks for reviewing.
>
All of the patches looked good. I do agree with Bjorn's comments on the other
patch. When you resend these, please use a cover letter and a V2. I'll then
pick them up for the next pull request.
Thanks for sending these!
Andy
^ permalink raw reply
* [PATCH 3/4] arm64: dts: msm8996: Add SMEM DT nodes
From: Andy Gross @ 2016-10-20 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1c7504f2-48ca-bcae-3eef-16589513d1aa@codeaurora.org>
On Thu, Oct 20, 2016 at 02:18:33PM -0700, Sarangdhar Joshi wrote:
> On 10/20/2016 12:56 PM, Bjorn Andersson wrote:
> >On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> >
> >>From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >>
> >>Add SMEM and TCSR DT nodes on MSM8996.
> >>
> >>Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >>Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
> >>---
> >> arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 +++++++++++++++++++
> >> 1 file changed, 19 insertions(+)
> >>
> >>diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >>index 949b096..0a810f5 100644
> >>--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >>+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >>@@ -169,12 +169,31 @@
> >> method = "smc";
> >> };
> >>
> >>+ smem {
> >>+ compatible = "qcom,smem";
> >>+
> >>+ memory-region = <&smem_mem>;
> >>+
> >>+ hwlocks = <&tcsr_mutex 3>;
> >>+ };
> >>+
> >> soc: soc {
> >> #address-cells = <1>;
> >> #size-cells = <1>;
> >> ranges = <0 0 0 0xffffffff>;
> >> compatible = "simple-bus";
> >>
> >>+ tcsr_mutex_regs: syscon at 740000 {
> >>+ compatible = "syscon";
> >>+ reg = <0x740000 0x20000>;
> >>+ };
> >>+
> >>+ tcsr_mutex: hwlock {
> >>+ compatible = "qcom,tcsr-mutex";
> >>+ syscon = <&tcsr_mutex_regs 0 0x1000>;
> >>+ #hwlock-cells = <1>;
> >>+ };
> >
> >Sorry, I got this in the wrong place, the hwlock node should sit outside
> >of soc {} - looks like we got this wrong in msm8916 as well.
>
> Thanks for reviewing the patch. Do you mean to move it under / {}; (i.e.
> root)?
Yes. Any node that doesn't have reg properties should go under the root.
Andy
^ permalink raw reply
* [PATCH] drm: convert DT component matching to component_match_add_release()
From: Russell King - ARM Linux @ 2016-10-20 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOw6vbK=z3wJKTh8jZoU2Gj1PtTLLH_sAUUShbsxL=Qi7d+FLw@mail.gmail.com>
On Thu, Oct 20, 2016 at 04:39:04PM -0400, Sean Paul wrote:
> On Wed, Oct 19, 2016 at 6:28 AM, Russell King
> <rmk+kernel@armlinux.org.uk> wrote:
> > Convert DT component matching to use component_match_add_release().
> >
> > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> > ---
> > Can we please get this patch from May merged into the drm-misc or
> > whatever trees so that we don't end up with conflicts? I've no idea
> > who looks after drm-misc, as they have _still_ failed to add
> > themselves to MAINTAINERS.
>
> I think Daniel explained pretty clearly why this wasn't happening in
> the previous thread.
>
> Next time you send a v2, can you please mark it as such and include a
> "Changes in v2" section?
Why - nothing's changed other than a rebase onto 4.9-rc1. This isn't
a "I've changed it in XYZ way, so here's a new copy". It's being
posted in the hope that someone will finally either comment on it or
merge the damn thing, rather than ignoring it was done when it was
last posted.
> > drivers/gpu/drm/arm/hdlcd_drv.c | 3 ++-
> > drivers/gpu/drm/arm/malidp_drv.c | 4 +++-
> > drivers/gpu/drm/armada/armada_drv.c | 2 +-
> > drivers/gpu/drm/drm_of.c | 28 +++++++++++++++++++++++--
> > drivers/gpu/drm/etnaviv/etnaviv_drv.c | 5 +++--
> > drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 7 ++++---
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +++-
> > drivers/gpu/drm/msm/msm_drv.c | 12 ++++++-----
> > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 6 ++++--
> > drivers/gpu/drm/sti/sti_drv.c | 5 +++--
> > drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
> > drivers/gpu/drm/tilcdc/tilcdc_external.c | 4 +++-
> > include/drm/drm_of.h | 12 +++++++++++
> > 13 files changed, 73 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
> > index fb6a418ce6be..6477d1a65266 100644
> > --- a/drivers/gpu/drm/arm/hdlcd_drv.c
> > +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
> > @@ -453,7 +453,8 @@ static int hdlcd_probe(struct platform_device *pdev)
> > return -EAGAIN;
> > }
> >
> > - component_match_add(&pdev->dev, &match, compare_dev, port);
> > + drm_of_component_match_add(&pdev->dev, &match, compare_dev, port);
> > + of_node_put(port);
>
> There's no mention in your commit message about fixing these node leaks.
Isn't that kind-of the whole point of this patch?
> >
> > return component_master_add_with_match(&pdev->dev, &hdlcd_master_ops,
> > match);
> > diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
> > index 9280358b8f15..9f4739452a25 100644
> > --- a/drivers/gpu/drm/arm/malidp_drv.c
> > +++ b/drivers/gpu/drm/arm/malidp_drv.c
> > @@ -493,7 +493,9 @@ static int malidp_platform_probe(struct platform_device *pdev)
> > return -EAGAIN;
> > }
> >
> > - component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
> > + drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
> > + port);
> > + of_node_put(port);
> > return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
> > match);
> > }
> > diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
> > index 1e0e68f608e4..94e46da9a758 100644
> > --- a/drivers/gpu/drm/armada/armada_drv.c
> > +++ b/drivers/gpu/drm/armada/armada_drv.c
> > @@ -254,7 +254,7 @@ static void armada_add_endpoints(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, match, compare_of, remote);
> > + drm_of_component_match_add(dev, match, compare_of, remote);
> > of_node_put(remote);
> > }
> > }
> > diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
> > index bc98bb94264d..47848ed8ca48 100644
> > --- a/drivers/gpu/drm/drm_of.c
> > +++ b/drivers/gpu/drm/drm_of.c
> > @@ -6,6 +6,11 @@
> > #include <drm/drm_crtc.h>
> > #include <drm/drm_of.h>
> >
> > +static void drm_release_of(struct device *dev, void *data)
> > +{
> > + of_node_put(data);
> > +}
> > +
> > /**
> > * drm_crtc_port_mask - find the mask of a registered CRTC by port OF node
> > * @dev: DRM device
> > @@ -64,6 +69,24 @@ uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> > EXPORT_SYMBOL(drm_of_find_possible_crtcs);
> >
> > /**
> > + * drm_of_component_match_add - Add a component helper OF node match rule
> > + * @master: master device
> > + * @matchptr: component match pointer
> > + * @compare: compare function used for matching component
> > + * @node: of_node
> > + */
> > +void drm_of_component_match_add(struct device *master,
> > + struct component_match **matchptr,
> > + int (*compare)(struct device *, void *),
> > + struct device_node *node)
> > +{
> > + of_node_get(node);
> > + component_match_add_release(master, matchptr, drm_release_of,
> > + compare, node);
> > +}
> > +EXPORT_SYMBOL_GPL(drm_of_component_match_add);
> > +
> > +/**
> > * drm_of_component_probe - Generic probe function for a component based master
> > * @dev: master device containing the OF node
> > * @compare_of: compare function used for matching components
> > @@ -101,7 +124,7 @@ int drm_of_component_probe(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, &match, compare_of, port);
> > + drm_of_component_match_add(dev, &match, compare_of, port);
> > of_node_put(port);
> > }
> >
> > @@ -140,7 +163,8 @@ int drm_of_component_probe(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, &match, compare_of, remote);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + remote);
> > of_node_put(remote);
> > }
> > of_node_put(port);
> > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> > index aa687669e22b..0dee6acbd880 100644
> > --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> > +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> > @@ -16,6 +16,7 @@
> >
> > #include <linux/component.h>
> > #include <linux/of_platform.h>
> > +#include <drm/drm_of.h>
> >
> > #include "etnaviv_drv.h"
> > #include "etnaviv_gpu.h"
> > @@ -629,8 +630,8 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
> > if (!core_node)
> > break;
> >
> > - component_match_add(&pdev->dev, &match, compare_of,
> > - core_node);
> > + drm_of_component_match_add(&pdev->dev, &match,
> > + compare_of, core_node);
> > of_node_put(core_node);
> > }
> > } else if (dev->platform_data) {
> > diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> > index 90377a609c98..e88fde18c946 100644
> > --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> > +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> > @@ -24,6 +24,7 @@
> > #include <drm/drm_fb_cma_helper.h>
> > #include <drm/drm_atomic_helper.h>
> > #include <drm/drm_crtc_helper.h>
> > +#include <drm/drm_of.h>
> >
> > #include "kirin_drm_drv.h"
> >
> > @@ -260,14 +261,13 @@ static struct device_node *kirin_get_remote_node(struct device_node *np)
> > DRM_ERROR("no valid endpoint node\n");
> > return ERR_PTR(-ENODEV);
> > }
> > - of_node_put(endpoint);
> >
> > remote = of_graph_get_remote_port_parent(endpoint);
> > + of_node_put(endpoint);
>
> Another bug that's being fixed without mention in the commit.
>
> > if (!remote) {
> > DRM_ERROR("no valid remote node\n");
> > return ERR_PTR(-ENODEV);
> > }
> > - of_node_put(remote);
> >
> > if (!of_device_is_available(remote)) {
> > DRM_ERROR("not available for remote node\n");
> > @@ -294,7 +294,8 @@ static int kirin_drm_platform_probe(struct platform_device *pdev)
> > if (IS_ERR(remote))
> > return PTR_ERR(remote);
> >
> > - component_match_add(dev, &match, compare_of, remote);
> > + drm_of_component_match_add(dev, &match, compare_of, remote);
> > + of_node_put(remote);
> >
> > return component_master_add_with_match(dev, &kirin_drm_ops, match);
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > index cf83f6507ec8..9c5430fb82a2 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > @@ -18,6 +18,7 @@
> > #include <drm/drm_crtc_helper.h>
> > #include <drm/drm_gem.h>
> > #include <drm/drm_gem_cma_helper.h>
> > +#include <drm/drm_of.h>
> > #include <linux/component.h>
> > #include <linux/iommu.h>
> > #include <linux/of_address.h>
> > @@ -415,7 +416,8 @@ static int mtk_drm_probe(struct platform_device *pdev)
> > comp_type == MTK_DPI) {
> > dev_info(dev, "Adding component match for %s\n",
> > node->full_name);
> > - component_match_add(dev, &match, compare_of, node);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + node);
> > } else {
> > struct mtk_ddp_comp *comp;
> >
> > diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> > index fb5c0b0a7594..84d38eaea585 100644
> > --- a/drivers/gpu/drm/msm/msm_drv.c
> > +++ b/drivers/gpu/drm/msm/msm_drv.c
> > @@ -15,6 +15,8 @@
> > * this program. If not, see <http://www.gnu.org/licenses/>.
> > */
> >
> > +#include <drm/drm_of.h>
> > +
> > #include "msm_drv.h"
> > #include "msm_debugfs.h"
> > #include "msm_fence.h"
> > @@ -919,8 +921,8 @@ static int add_components_mdp(struct device *mdp_dev,
> > continue;
> > }
> >
> > - component_match_add(master_dev, matchptr, compare_of, intf);
> > -
> > + drm_of_component_match_add(master_dev, matchptr, compare_of,
> > + intf);
> > of_node_put(intf);
> > of_node_put(ep_node);
> > }
> > @@ -962,8 +964,8 @@ static int add_display_components(struct device *dev,
> > put_device(mdp_dev);
> >
> > /* add the MDP component itself */
> > - component_match_add(dev, matchptr, compare_of,
> > - mdp_dev->of_node);
> > + drm_of_component_match_add(dev, matchptr, compare_of,
> > + mdp_dev->of_node);
> > } else {
> > /* MDP4 */
> > mdp_dev = dev;
> > @@ -996,7 +998,7 @@ static int add_gpu_components(struct device *dev,
> > if (!np)
> > return 0;
> >
> > - component_match_add(dev, matchptr, compare_of, np);
> > + drm_of_component_match_add(dev, matchptr, compare_of, np);
> >
> > of_node_put(np);
> >
> > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> > index 8c8cbe837e61..6fe161192bb4 100644
> > --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> > @@ -20,6 +20,7 @@
> > #include <drm/drm_crtc_helper.h>
> > #include <drm/drm_fb_helper.h>
> > #include <drm/drm_gem_cma_helper.h>
> > +#include <drm/drm_of.h>
> > #include <linux/dma-mapping.h>
> > #include <linux/pm_runtime.h>
> > #include <linux/module.h>
> > @@ -388,7 +389,7 @@ static void rockchip_add_endpoints(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, match, compare_of, remote);
> > + drm_of_component_match_add(dev, match, compare_of, remote);
> > of_node_put(remote);
> > }
> > }
> > @@ -437,7 +438,8 @@ static int rockchip_drm_platform_probe(struct platform_device *pdev)
> > }
> >
> > of_node_put(iommu);
> > - component_match_add(dev, &match, compare_of, port->parent);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + port->parent);
> > of_node_put(port);
> > }
> >
> > diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
> > index 2784919a7366..5e819876e642 100644
> > --- a/drivers/gpu/drm/sti/sti_drv.c
> > +++ b/drivers/gpu/drm/sti/sti_drv.c
> > @@ -17,6 +17,7 @@
> > #include <drm/drm_crtc_helper.h>
> > #include <drm/drm_gem_cma_helper.h>
> > #include <drm/drm_fb_cma_helper.h>
> > +#include <drm/drm_of.h>
> >
> > #include "sti_crtc.h"
> > #include "sti_drv.h"
> > @@ -423,8 +424,8 @@ static int sti_platform_probe(struct platform_device *pdev)
> > child_np = of_get_next_available_child(node, NULL);
> >
> > while (child_np) {
> > - component_match_add(dev, &match, compare_of, child_np);
> > - of_node_put(child_np);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + child_np);
> > child_np = of_get_next_available_child(node, child_np);
> > }
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
> > index 0da9862ad8ed..b3c4ad605e81 100644
> > --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
> > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
> > @@ -18,6 +18,7 @@
> > #include <drm/drm_fb_cma_helper.h>
> > #include <drm/drm_gem_cma_helper.h>
> > #include <drm/drm_fb_helper.h>
> > +#include <drm/drm_of.h>
> >
> > #include "sun4i_crtc.h"
> > #include "sun4i_drv.h"
> > @@ -239,7 +240,7 @@ static int sun4i_drv_add_endpoints(struct device *dev,
> > /* Add current component */
> > DRM_DEBUG_DRIVER("Adding component %s\n",
> > of_node_full_name(node));
> > - component_match_add(dev, match, compare_of, node);
> > + drm_of_component_match_add(dev, match, compare_of, node);
> > count++;
> > }
> >
> > diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> > index 68e895021005..06a4c584f3cb 100644
> > --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
> > +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> > @@ -10,6 +10,7 @@
> >
> > #include <linux/component.h>
> > #include <linux/of_graph.h>
> > +#include <drm/drm_of.h>
> >
> > #include "tilcdc_drv.h"
> > #include "tilcdc_external.h"
> > @@ -160,7 +161,8 @@ int tilcdc_get_external_components(struct device *dev,
> >
> > dev_dbg(dev, "Subdevice node '%s' found\n", node->name);
> > if (match)
> > - component_match_add(dev, match, dev_match_of, node);
> > + drm_of_component_match_add(dev, match, dev_match_of,
> > + node);
> > of_node_put(node);
> > count++;
> > }
> > diff --git a/include/drm/drm_of.h b/include/drm/drm_of.h
> > index 3fd87b386ed7..d6b4c5587bbe 100644
> > --- a/include/drm/drm_of.h
> > +++ b/include/drm/drm_of.h
> > @@ -4,6 +4,7 @@
> > #include <linux/of_graph.h>
> >
> > struct component_master_ops;
> > +struct component_match;
> > struct device;
> > struct drm_device;
> > struct drm_encoder;
> > @@ -12,6 +13,10 @@ struct device_node;
> > #ifdef CONFIG_OF
> > extern uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> > struct device_node *port);
> > +extern void drm_of_component_match_add(struct device *master,
> > + struct component_match **matchptr,
> > + int (*compare)(struct device *, void *),
> > + struct device_node *node);
> > extern int drm_of_component_probe(struct device *dev,
> > int (*compare_of)(struct device *, void *),
> > const struct component_master_ops *m_ops);
> > @@ -25,6 +30,13 @@ static inline uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> > return 0;
> > }
> >
> > +static void drm_of_component_match_add(struct device *master,
> > + struct component_match **matchptr,
> > + int (*compare)(struct device *, void *),
> > + struct device_node *node)
> > +{
> > +}
> > +
> > static inline int
> > drm_of_component_probe(struct device *dev,
> > int (*compare_of)(struct device *, void *),
> > --
> > 2.1.0
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* [PATCH v3 3/3] mtd: s3c2410: parse the device configuration from OF node
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476999766-32526-1-git-send-email-sergio.prado@e-labworks.com>
Allows configuring Samsung's s3c2410 memory controller using a
devicetree.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
---
drivers/mtd/nand/s3c2410.c | 158 ++++++++++++++++++++++---
include/linux/platform_data/mtd-nand-s3c2410.h | 1 +
2 files changed, 143 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 371db0d48135..ec170be881bc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -39,6 +39,8 @@
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
@@ -185,6 +187,22 @@ struct s3c2410_nand_info {
#endif
};
+struct s3c24XX_nand_devtype_data {
+ enum s3c_cpu_type type;
+};
+
+static const struct s3c24XX_nand_devtype_data s3c2410_nand_devtype_data = {
+ .type = TYPE_S3C2410,
+};
+
+static const struct s3c24XX_nand_devtype_data s3c2412_nand_devtype_data = {
+ .type = TYPE_S3C2412,
+};
+
+static const struct s3c24XX_nand_devtype_data s3c2440_nand_devtype_data = {
+ .type = TYPE_S3C2440,
+};
+
/* conversion functions */
static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
@@ -794,6 +812,30 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
return -ENODEV;
}
+static int s3c2410_nand_setup_data_interface(struct mtd_info *mtd,
+ const struct nand_data_interface *conf,
+ bool check_only)
+{
+ struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
+ struct s3c2410_platform_nand *pdata = info->platform;
+ const struct nand_sdr_timings *timings;
+ int tacls;
+
+ timings = nand_get_sdr_timings(conf);
+ if (IS_ERR(timings))
+ return -ENOTSUPP;
+
+ tacls = timings->tCLS_min - timings->tWP_min;
+ if (tacls < 0)
+ tacls = 0;
+
+ pdata->tacls = DIV_ROUND_UP(tacls, 1000);
+ pdata->twrph0 = DIV_ROUND_UP(timings->tWP_min, 1000);
+ pdata->twrph1 = DIV_ROUND_UP(timings->tCLH_min, 1000);
+
+ return 0;
+}
+
/**
* s3c2410_nand_init_chip - initialise a single instance of an chip
* @info: The base NAND controller the chip is on.
@@ -808,9 +850,12 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
struct s3c2410_nand_mtd *nmtd,
struct s3c2410_nand_set *set)
{
+ struct device_node *np = info->device->of_node;
struct nand_chip *chip = &nmtd->chip;
void __iomem *regs = info->regs;
+ nand_set_flash_node(chip, set->of_node);
+
chip->write_buf = s3c2410_nand_write_buf;
chip->read_buf = s3c2410_nand_read_buf;
chip->select_chip = s3c2410_nand_select_chip;
@@ -819,6 +864,13 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
chip->options = set->options;
chip->controller = &info->controller;
+ /*
+ * let's keep behavior unchanged for legacy boards booting via pdata and
+ * auto-detect timings only when booting with a device tree.
+ */
+ if (np)
+ chip->setup_data_interface = s3c2410_nand_setup_data_interface;
+
switch (info->cpu_type) {
case TYPE_S3C2410:
chip->IO_ADDR_W = regs + S3C2410_NFDATA;
@@ -859,12 +911,9 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
chip->ecc.mode = info->platform->ecc_mode;
/* If you use u-boot BBT creation code, specifying this flag will
- * let the kernel fish out the BBT from the NAND, and also skip the
- * full NAND scan that can take 1/2s or so. Little things... */
- if (set->flash_bbt) {
+ * let the kernel fish out the BBT from the NAND */
+ if (set->flash_bbt)
chip->bbt_options |= NAND_BBT_USE_FLASH;
- chip->options |= NAND_SKIP_BBTSCAN;
- }
}
/**
@@ -943,6 +992,77 @@ static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
return -EINVAL;
}
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ return 0;
+}
+
+static const struct of_device_id s3c24xx_nand_dt_ids[] = {
+ {
+ .compatible = "samsung,s3c2410-nand",
+ .data = &s3c2410_nand_devtype_data,
+ }, {
+ .compatible = "samsung,s3c2412-nand", /* also compatible with s3c6400 */
+ .data = &s3c2412_nand_devtype_data,
+ }, {
+ .compatible = "samsung,s3c2440-nand",
+ .data = &s3c2440_nand_devtype_data,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, s3c24xx_nand_dt_ids);
+
+static int s3c24xx_nand_probe_dt(struct platform_device *pdev)
+{
+ const struct s3c24XX_nand_devtype_data *devtype_data;
+ struct s3c2410_platform_nand *pdata;
+ struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
+ struct device_node *np = pdev->dev.of_node, *child;
+ struct s3c2410_nand_set *sets;
+
+ devtype_data = of_device_get_match_data(&pdev->dev);
+ if (!devtype_data)
+ return -ENODEV;
+
+ info->cpu_type = devtype_data->type;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ pdev->dev.platform_data = pdata;
+
+ pdata->nr_sets = of_get_child_count(np);
+ if (!pdata->nr_sets)
+ return 0;
+
+ sets = devm_kzalloc(&pdev->dev, sizeof(*sets) * pdata->nr_sets, GFP_KERNEL);
+ if (!sets)
+ return -ENOMEM;
+
+ pdata->sets = sets;
+
+ for_each_available_child_of_node(np, child) {
+
+ sets->name = (char *)child->name;
+ sets->of_node = child;
+ sets->nr_chips = 1;
+
+ of_node_get(child);
+
+ sets++;
+ }
+
+ return 0;
+}
+
+static int s3c24xx_nand_probe_pdata(struct platform_device *pdev)
+{
+ struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
+
+ info->cpu_type = platform_get_device_id(pdev)->driver_data;
+
return 0;
}
@@ -955,8 +1075,7 @@ static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
*/
static int s3c24xx_nand_probe(struct platform_device *pdev)
{
- struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
- enum s3c_cpu_type cpu_type;
+ struct s3c2410_platform_nand *plat;
struct s3c2410_nand_info *info;
struct s3c2410_nand_mtd *nmtd;
struct s3c2410_nand_set *sets;
@@ -966,8 +1085,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
int nr_sets;
int setno;
- cpu_type = platform_get_device_id(pdev)->driver_data;
-
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
if (info == NULL) {
err = -ENOMEM;
@@ -989,6 +1106,16 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
+ if (pdev->dev.of_node)
+ err = s3c24xx_nand_probe_dt(pdev);
+ else
+ err = s3c24xx_nand_probe_pdata(pdev);
+
+ if (err)
+ goto exit_error;
+
+ plat = to_nand_plat(pdev);
+
/* allocate and map the resource */
/* currently we assume we have the one resource */
@@ -997,7 +1124,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
info->device = &pdev->dev;
info->platform = plat;
- info->cpu_type = cpu_type;
info->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(info->regs)) {
@@ -1007,12 +1133,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
- /* initialise the hardware */
-
- err = s3c2410_nand_inithw(info);
- if (err != 0)
- goto exit_error;
-
sets = (plat != NULL) ? plat->sets : NULL;
nr_sets = (plat != NULL) ? plat->nr_sets : 1;
@@ -1056,6 +1176,11 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
sets++;
}
+ /* initialise the hardware */
+ err = s3c2410_nand_inithw(info);
+ if (err != 0)
+ goto exit_error;
+
err = s3c2410_nand_cpufreq_register(info);
if (err < 0) {
dev_err(&pdev->dev, "failed to init cpufreq support\n");
@@ -1156,6 +1281,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
.id_table = s3c24xx_driver_ids,
.driver = {
.name = "s3c24xx-nand",
+ .of_match_table = s3c24xx_nand_dt_ids,
},
};
diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h b/include/linux/platform_data/mtd-nand-s3c2410.h
index 729af13d1773..f01659026b26 100644
--- a/include/linux/platform_data/mtd-nand-s3c2410.h
+++ b/include/linux/platform_data/mtd-nand-s3c2410.h
@@ -40,6 +40,7 @@ struct s3c2410_nand_set {
char *name;
int *nr_map;
struct mtd_partition *partitions;
+ struct device_node *of_node;
};
struct s3c2410_platform_nand {
--
1.9.1
^ permalink raw reply related
* [PATCH v3 2/3] dt-bindings: mtd: add DT binding for s3c2410 flash controller
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476999766-32526-1-git-send-email-sergio.prado@e-labworks.com>
Adds the device tree bindings description for Samsung S3C2410 and
compatible NAND flash controller.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
---
.../devicetree/bindings/mtd/samsung-s3c2410.txt | 56 ++++++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
diff --git a/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
new file mode 100644
index 000000000000..0040eb8895e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
@@ -0,0 +1,56 @@
+* Samsung S3C2410 and compatible NAND flash controller
+
+Required properties:
+- compatible : The possible values are:
+ "samsung,s3c2410-nand"
+ "samsung,s3c2412-nand"
+ "samsung,s3c2440-nand"
+- reg : register's location and length.
+- #address-cells, #size-cells : see nand.txt
+- clocks : phandle to the nand controller clock
+- clock-names : must contain "nand"
+
+Optional child nodes:
+Child nodes representing the available nand chips.
+
+Optional child properties:
+- nand-ecc-mode : see nand.txt
+- nand-on-flash-bbt : see nand.txt
+
+Each child device node may optionally contain a 'partitions' sub-node,
+which further contains sub-nodes describing the flash partition mapping.
+See partition.txt for more detail.
+
+Example:
+
+nand-controller at 4e000000 {
+ compatible = "samsung,s3c2440-nand";
+ reg = <0x4e000000 0x40>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clocks = <&clocks HCLK_NAND>;
+ clock-names = "nand";
+
+ nand {
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "u-boot";
+ reg = <0 0x040000>;
+ };
+
+ partition at 40000 {
+ label = "kernel";
+ reg = <0x040000 0x500000>;
+ };
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related
* [PATCH v3 1/3] mtd: s3c2410: make ecc mode configurable via platform data
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476999766-32526-1-git-send-email-sergio.prado@e-labworks.com>
Removing CONFIG_MTD_NAND_S3C2410_HWECC option and adding a ecc_mode
field in the drivers's platform data structure so it can be selectable
via platform data.
Also setting this field to NAND_ECC_SOFT in all boards using this
driver since none of them had CONFIG_MTD_NAND_S3C2410_HWECC enabled.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
---
arch/arm/mach-s3c24xx/common-smdk.c | 1 +
arch/arm/mach-s3c24xx/mach-anubis.c | 1 +
arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 +
arch/arm/mach-s3c24xx/mach-bast.c | 1 +
arch/arm/mach-s3c24xx/mach-gta02.c | 1 +
arch/arm/mach-s3c24xx/mach-jive.c | 1 +
arch/arm/mach-s3c24xx/mach-mini2440.c | 1 +
arch/arm/mach-s3c24xx/mach-osiris.c | 1 +
arch/arm/mach-s3c24xx/mach-qt2410.c | 1 +
arch/arm/mach-s3c24xx/mach-rx1950.c | 1 +
arch/arm/mach-s3c24xx/mach-rx3715.c | 1 +
arch/arm/mach-s3c24xx/mach-vstms.c | 1 +
arch/arm/mach-s3c64xx/mach-hmt.c | 1 +
arch/arm/mach-s3c64xx/mach-mini6410.c | 1 +
arch/arm/mach-s3c64xx/mach-real6410.c | 1 +
drivers/mtd/nand/Kconfig | 9 --
drivers/mtd/nand/s3c2410.c | 119 +++++++++++++------------
include/linux/platform_data/mtd-nand-s3c2410.h | 6 +-
18 files changed, 79 insertions(+), 70 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/common-smdk.c b/arch/arm/mach-s3c24xx/common-smdk.c
index e9fbcc91c5c0..9e0bc46e90ec 100644
--- a/arch/arm/mach-s3c24xx/common-smdk.c
+++ b/arch/arm/mach-s3c24xx/common-smdk.c
@@ -171,6 +171,7 @@
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(smdk_nand_sets),
.sets = smdk_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* devices we initialise */
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index d03df0df01fa..029ef1b58925 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -223,6 +223,7 @@ static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
.nr_sets = ARRAY_SIZE(anubis_nand_sets),
.sets = anubis_nand_sets,
.select_chip = anubis_nand_select,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* IDE channels */
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index 9ae170fef2a7..7b28eb623fc1 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -114,6 +114,7 @@
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
.sets = at2440evb_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index ed07cf392d4b..5185036765db 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -299,6 +299,7 @@ static void bast_nand_select(struct s3c2410_nand_set *set, int slot)
.nr_sets = ARRAY_SIZE(bast_nand_sets),
.sets = bast_nand_sets,
.select_chip = bast_nand_select,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* DM9000 */
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 27ae6877550f..b0ed401da3a3 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -443,6 +443,7 @@ static void gta02_udc_vbus_draw(unsigned int ma)
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(gta02_nand_sets),
.sets = gta02_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index 7d99fe8f6157..895aca225952 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -232,6 +232,7 @@
.twrph1 = 40,
.sets = jive_nand_sets,
.nr_sets = ARRAY_SIZE(jive_nand_sets),
+ .ecc_mode = NAND_ECC_SOFT,
};
static int __init jive_mtdset(char *options)
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index ec60bd4a1646..71af8d2fd320 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -287,6 +287,7 @@
.nr_sets = ARRAY_SIZE(mini2440_nand_sets),
.sets = mini2440_nand_sets,
.ignore_unset_ecc = 1,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index 2f6fdc326835..70b0eb7d3134 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -238,6 +238,7 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
.nr_sets = ARRAY_SIZE(osiris_nand_sets),
.sets = osiris_nand_sets,
.select_chip = osiris_nand_select,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* PCMCIA control and configuration */
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index 984516e8307a..868c82087403 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -284,6 +284,7 @@
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(qt2410_nand_sets),
.sets = qt2410_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* UDC */
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 25a139bb9826..e86ad6a68a0b 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -611,6 +611,7 @@ static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd)
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(rx1950_nand_sets),
.sets = rx1950_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index cf55196f89ca..a39fb9780dd3 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -164,6 +164,7 @@
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(rx3715_nand_sets),
.sets = rx3715_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct platform_device *rx3715_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index b4460d5f7011..f5e6322145fa 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -117,6 +117,7 @@
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(vstms_nand_sets),
.sets = vstms_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct platform_device *vstms_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index bc7dc1fcbf7d..59b5531f1987 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -204,6 +204,7 @@ static void hmt_bl_exit(struct device *dev)
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(hmt_nand_sets),
.sets = hmt_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct gpio_led hmt_leds[] = {
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index ae999fb3fe6d..a3e3e25728b4 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -142,6 +142,7 @@
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(mini6410_nand_sets),
.sets = mini6410_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 4e240ffa7ac7..d6b3ffd7704b 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -194,6 +194,7 @@
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(real6410_nand_sets),
.sets = real6410_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct platform_device *real6410_devices[] __initdata = {
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 7b7a887b4709..9748f3580d4b 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -179,15 +179,6 @@ config MTD_NAND_S3C2410_DEBUG
help
Enable debugging of the S3C NAND driver
-config MTD_NAND_S3C2410_HWECC
- bool "Samsung S3C NAND Hardware ECC"
- depends on MTD_NAND_S3C2410
- help
- Enable the use of the controller's internal ECC generator when
- using NAND. Early versions of the chips have had problems with
- incorrect ECC generation, and if using these, the default of
- software ECC is preferable.
-
config MTD_NAND_NDFC
tristate "NDFC NanD Flash Controller"
depends on 4xx
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index d459c19d78de..371db0d48135 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -497,7 +497,6 @@ static int s3c2412_nand_devready(struct mtd_info *mtd)
/* ECC handling functions */
-#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
@@ -649,7 +648,6 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
return 0;
}
-#endif
/* over-ride the standard functions for a little more speed. We can
* use read/write block to move the data buffers to/from the controller
@@ -858,50 +856,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
nmtd->info = info;
nmtd->set = set;
-#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
- chip->ecc.calculate = s3c2410_nand_calculate_ecc;
- chip->ecc.correct = s3c2410_nand_correct_data;
- chip->ecc.mode = NAND_ECC_HW;
- chip->ecc.strength = 1;
-
- switch (info->cpu_type) {
- case TYPE_S3C2410:
- chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
- chip->ecc.calculate = s3c2410_nand_calculate_ecc;
- break;
-
- case TYPE_S3C2412:
- chip->ecc.hwctl = s3c2412_nand_enable_hwecc;
- chip->ecc.calculate = s3c2412_nand_calculate_ecc;
- break;
-
- case TYPE_S3C2440:
- chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
- chip->ecc.calculate = s3c2440_nand_calculate_ecc;
- break;
- }
-#else
- chip->ecc.mode = NAND_ECC_SOFT;
- chip->ecc.algo = NAND_ECC_HAMMING;
-#endif
-
- if (set->disable_ecc)
- chip->ecc.mode = NAND_ECC_NONE;
-
- switch (chip->ecc.mode) {
- case NAND_ECC_NONE:
- dev_info(info->device, "NAND ECC disabled\n");
- break;
- case NAND_ECC_SOFT:
- dev_info(info->device, "NAND soft ECC\n");
- break;
- case NAND_ECC_HW:
- dev_info(info->device, "NAND hardware ECC\n");
- break;
- default:
- dev_info(info->device, "NAND ECC UNKNOWN\n");
- break;
- }
+ chip->ecc.mode = info->platform->ecc_mode;
/* If you use u-boot BBT creation code, specifying this flag will
* let the kernel fish out the BBT from the NAND, and also skip the
@@ -923,28 +878,72 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
*
* The internal state is currently limited to the ECC state information.
*/
-static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
+static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
struct s3c2410_nand_mtd *nmtd)
{
struct nand_chip *chip = &nmtd->chip;
- dev_dbg(info->device, "chip %p => page shift %d\n",
- chip, chip->page_shift);
+ switch (chip->ecc.mode) {
- if (chip->ecc.mode != NAND_ECC_HW)
- return;
+ case NAND_ECC_NONE:
+ dev_info(info->device, "ECC disabled\n");
+ break;
+
+ case NAND_ECC_SOFT:
+ /*
+ * This driver expects Hamming based ECC when ecc_mode is set
+ * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_HAMMING to
+ * avoid adding an extra ecc_algo field to s3c2410_platform_nand.
+ */
+ chip->ecc.algo = NAND_ECC_HAMMING;
+ dev_info(info->device, "soft ECC\n");
+ break;
+
+ case NAND_ECC_HW:
+ chip->ecc.calculate = s3c2410_nand_calculate_ecc;
+ chip->ecc.correct = s3c2410_nand_correct_data;
+ chip->ecc.strength = 1;
+
+ switch (info->cpu_type) {
+ case TYPE_S3C2410:
+ chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
+ chip->ecc.calculate = s3c2410_nand_calculate_ecc;
+ break;
+
+ case TYPE_S3C2412:
+ chip->ecc.hwctl = s3c2412_nand_enable_hwecc;
+ chip->ecc.calculate = s3c2412_nand_calculate_ecc;
+ break;
+
+ case TYPE_S3C2440:
+ chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
+ chip->ecc.calculate = s3c2440_nand_calculate_ecc;
+ break;
+ }
+
+ dev_dbg(info->device, "chip %p => page shift %d\n",
+ chip, chip->page_shift);
/* change the behaviour depending on whether we are using
* the large or small page nand device */
+ if (chip->page_shift > 10) {
+ chip->ecc.size = 256;
+ chip->ecc.bytes = 3;
+ } else {
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 3;
+ mtd_set_ooblayout(nand_to_mtd(chip), &s3c2410_ooblayout_ops);
+ }
- if (chip->page_shift > 10) {
- chip->ecc.size = 256;
- chip->ecc.bytes = 3;
- } else {
- chip->ecc.size = 512;
- chip->ecc.bytes = 3;
- mtd_set_ooblayout(nand_to_mtd(chip), &s3c2410_ooblayout_ops);
+ dev_info(info->device, "hardware ECC\n");
+ break;
+
+ default:
+ dev_err(info->device, "invalid ECC mode!\n");
+ return -EINVAL;
}
+
+ return 0;
}
/* s3c24xx_nand_probe
@@ -1046,7 +1045,9 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
NULL);
if (nmtd->scan_res == 0) {
- s3c2410_nand_update_chip(info, nmtd);
+ err = s3c2410_nand_update_chip(info, nmtd);
+ if (err < 0)
+ goto exit_error;
nand_scan_tail(mtd);
s3c2410_nand_add_partition(info, nmtd, sets);
}
diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h b/include/linux/platform_data/mtd-nand-s3c2410.h
index c55e42ee57fa..729af13d1773 100644
--- a/include/linux/platform_data/mtd-nand-s3c2410.h
+++ b/include/linux/platform_data/mtd-nand-s3c2410.h
@@ -12,9 +12,10 @@
#ifndef __MTD_NAND_S3C2410_H
#define __MTD_NAND_S3C2410_H
+#include <linux/mtd/nand.h>
+
/**
* struct s3c2410_nand_set - define a set of one or more nand chips
- * @disable_ecc: Entirely disable ECC - Dangerous
* @flash_bbt: Openmoko u-boot can create a Bad Block Table
* Setting this flag will allow the kernel to
* look for it at boot time and also skip the NAND
@@ -31,7 +32,6 @@
* a warning at boot time.
*/
struct s3c2410_nand_set {
- unsigned int disable_ecc:1;
unsigned int flash_bbt:1;
unsigned int options;
@@ -51,6 +51,8 @@ struct s3c2410_platform_nand {
unsigned int ignore_unset_ecc:1;
+ nand_ecc_modes_t ecc_mode;
+
int nr_sets;
struct s3c2410_nand_set *sets;
--
1.9.1
^ permalink raw reply related
* [PATCH v3 0/3] mtd: s3c2410: add device tree support
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
This series adds support for configuring Samsung's s3c2410 and
compatible flash memory controller via devicetree.
Tested on FriendlyARM mini2440, based on s3c2440 SoC.
Patch 3 depends on patch 1.
Changes since v2:
- conditionally assign chip->setup_data_interface to
s3c2410_nand_setup_data_interface if booting via device tree
Changes since v1:
- automate timing selection when booting with a device tree
- make s3c24XX_nand_devtype_data structs "static const"
- removing samsung,s3c6400-nand compatible since it is equivalent to
samsung,s3c2412-nand
Changes since initial version:
- patch converted to a patch series
- read timings from nand_sdr_timings when booting with a device tree
- naming improvements in the device tree binding
(s/nand/nand-controller/, s/_/-, s/children/child)
- dropped property samsung,ignore_unset_ecc
- remove @0 from nand device node
- checking pdev->dev.of_node instead of using ifdef CONFIG_OF_MTD
- preventing from parsing device tree properties twice
- increment the nand controller child node refcount, since we
maintain a reference to it and its name field
- using of_device_get_match_data() instead of of_match_device()
to make the code simpler
- remove CONFIG_MTD_NAND_S3C2410_HWECC compile option so we can
select ECC mode using nand-ecc-mode property in the device tree
Sergio Prado (3):
mtd: s3c2410: make ecc mode configurable via platform data
dt-bindings: mtd: add DT binding for s3c2410 flash controller
mtd: s3c2410: parse the device configuration from OF node
.../devicetree/bindings/mtd/samsung-s3c2410.txt | 56 +++++
arch/arm/mach-s3c24xx/common-smdk.c | 1 +
arch/arm/mach-s3c24xx/mach-anubis.c | 1 +
arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 +
arch/arm/mach-s3c24xx/mach-bast.c | 1 +
arch/arm/mach-s3c24xx/mach-gta02.c | 1 +
arch/arm/mach-s3c24xx/mach-jive.c | 1 +
arch/arm/mach-s3c24xx/mach-mini2440.c | 1 +
arch/arm/mach-s3c24xx/mach-osiris.c | 1 +
arch/arm/mach-s3c24xx/mach-qt2410.c | 1 +
arch/arm/mach-s3c24xx/mach-rx1950.c | 1 +
arch/arm/mach-s3c24xx/mach-rx3715.c | 1 +
arch/arm/mach-s3c24xx/mach-vstms.c | 1 +
arch/arm/mach-s3c64xx/mach-hmt.c | 1 +
arch/arm/mach-s3c64xx/mach-mini6410.c | 1 +
arch/arm/mach-s3c64xx/mach-real6410.c | 1 +
drivers/mtd/nand/Kconfig | 9 -
drivers/mtd/nand/s3c2410.c | 277 +++++++++++++++------
include/linux/platform_data/mtd-nand-s3c2410.h | 7 +-
19 files changed, 278 insertions(+), 86 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
--
1.9.1
^ permalink raw reply
* [PATCH V4 1/3] ACPI, PCI, IRQ: assign ISA IRQ directly during early boot stages
From: Rafael J. Wysocki @ 2016-10-20 21:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476915664-27231-2-git-send-email-okaya@codeaurora.org>
On Thu, Oct 20, 2016 at 12:21 AM, Sinan Kaya <okaya@codeaurora.org> wrote:
> The penalty determination of ISA IRQ goes through 4 paths.
> 1. assign PCI_USING during power up via acpi_irq_penalty_init.
> 2. update the penalty with acpi_penalize_isa_irq function based on the
> active parameter.
> 3. kernel command line penalty update via acpi_irq_penalty_update function.
> 4. increment the penalty as USING right after the IRQ is assign to PCI.
>
> acpi_penalize_isa_irq and acpi_irq_penalty_update functions get called
> before the ACPI subsystem is started.
>
> These API need to bypass the acpi_irq_get_penalty function.
>
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
> ---
> drivers/acpi/pci_link.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c
> index c983bf7..4f37938 100644
> --- a/drivers/acpi/pci_link.c
> +++ b/drivers/acpi/pci_link.c
> @@ -849,7 +849,7 @@ static int __init acpi_irq_penalty_update(char *str, int used)
> continue;
>
> if (used)
> - new_penalty = acpi_irq_get_penalty(irq) +
> + new_penalty = acpi_isa_irq_penalty[irq] +
> PIRQ_PENALTY_ISA_USED;
> else
> new_penalty = 0;
> @@ -871,7 +871,7 @@ static int __init acpi_irq_penalty_update(char *str, int used)
> void acpi_penalize_isa_irq(int irq, int active)
> {
> if ((irq >= 0) && (irq < ARRAY_SIZE(acpi_isa_irq_penalty)))
> - acpi_isa_irq_penalty[irq] = acpi_irq_get_penalty(irq) +
> + acpi_isa_irq_penalty[irq] = acpi_isa_irq_penalty[irq] +
This looks slightly odd. What about
+ acpi_isa_irq_penalty[irq] +=
> (active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING);
> }
>
Thanks,
Rafael
^ permalink raw reply
* [PATCH V3 1/3] ACPI, PCI IRQ: add PCI_USING penalty for ISA interrupts
From: Sinan Kaya @ 2016-10-20 21:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJZ5v0gZmNxOF5hf8oYF_UYUNHrYkFy=Y7SWGCZ+VRKGNeJmcA@mail.gmail.com>
On 10/20/2016 2:08 PM, Rafael J. Wysocki wrote:
> On Thu, Oct 20, 2016 at 10:01 PM, Sinan Kaya <okaya@codeaurora.org> wrote:
>> On 10/19/2016 3:44 PM, Bjorn Helgaas wrote:
>
> [cut]
>
>> If we want to move the ISA pieces out of this file, that can be done too.
>> We can also add support for PNPACPI. I'm not a very big fan of scratch
>> everything and start from beginning approach. This refactoring effort already
>> failed 3 times. I'd like to close the issue and move on.
>
> Understood, but we have broken this for too many times already.
>
> Either we have a minimum fix that is known working or we are going back.
Agreed. I think my V4 patch satisfies our short term goals and fixes the issue
you are seeing. IMO, it is good enough for the moment.
>
> Thanks,
> Rafael
>
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH V5 1/2] ACPI: Add support for ResourceSource/IRQ domain mapping
From: agustinv at codeaurora.org @ 2016-10-20 21:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4506c0f4-165a-e84b-73e2-d3cca9c8b9d7@arm.com>
Hey Marc,
On 2016-10-20 13:51, Marc Zyngier wrote:
> On 20/10/16 17:48, Lorenzo Pieralisi wrote:
>> Hi Agustin,
>>
>> On Tue, Oct 18, 2016 at 01:41:48PM -0400, Agustin Vega-Frias wrote:
>>> This allows irqchip drivers to associate an ACPI DSDT device to
>>> an IRQ domain and provides support for using the ResourceSource
>>> in Extended IRQ Resources to find the domain and map the IRQs
>>> specified on that domain.
>>>
>>> Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
>>> ---
>>> drivers/acpi/Makefile | 1 +
>>> drivers/acpi/irqdomain.c | 141
>>> ++++++++++++++++++++++++++++++++++++++
>>> drivers/acpi/resource.c | 21 +++---
>>> include/asm-generic/vmlinux.lds.h | 1 +
>>> include/linux/acpi.h | 71 +++++++++++++++++++
>>> include/linux/irqchip.h | 17 ++++-
>>> 6 files changed, 240 insertions(+), 12 deletions(-)
>>> create mode 100644 drivers/acpi/irqdomain.c
>>>
>>> diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
>>> index 9ed0878..880401b 100644
>>> --- a/drivers/acpi/Makefile
>>> +++ b/drivers/acpi/Makefile
>>> @@ -57,6 +57,7 @@ acpi-$(CONFIG_ACPI_PROCFS_POWER) += cm_sbs.o
>>> acpi-y += acpi_lpat.o
>>> acpi-$(CONFIG_ACPI_GENERIC_GSI) += gsi.o
>>> acpi-$(CONFIG_ACPI_WATCHDOG) += acpi_watchdog.o
>>> +acpi-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
>>>
>>> # These are (potentially) separate modules
>>>
>>> diff --git a/drivers/acpi/irqdomain.c b/drivers/acpi/irqdomain.c
>>> new file mode 100644
>>> index 0000000..c53b9f4
>>> --- /dev/null
>>> +++ b/drivers/acpi/irqdomain.c
>>> @@ -0,0 +1,141 @@
>>> +/*
>>> + * ACPI ResourceSource/IRQ domain mapping support
>>> + *
>>> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify
>>> + * it under the terms of the GNU General Public License version 2
>>> and
>>> + * only version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +#include <linux/acpi.h>
>>> +#include <linux/irq.h>
>>> +#include <linux/irqdomain.h>
>>> +
>>> +/**
>>> + * acpi_irq_domain_ensure_probed() - Check if the device has
>>> registered
>>> + * an IRQ domain and probe as
>>> necessary
>>> + *
>>> + * @device: Device to check and probe
>>> + *
>>> + * Returns: 0 on success, -ENODEV otherwise
>>
>> This is not correct (ie it depends on what
>>
>> struct acpi_dsdt_probe_entry.probe
>>
>> returns) and I would like to take this nit as an opportunity
>> to take a step back and ask you a question below.
>>
>>> + */
>>> +static int acpi_irq_domain_ensure_probed(struct acpi_device *device)
>>> +{
>>> + struct acpi_dsdt_probe_entry *entry;
>>> +
>>> + if (irq_find_matching_fwnode(&device->fwnode, DOMAIN_BUS_ANY) != 0)
>>> + return 0;
>>> +
>>> + for (entry = &__dsdt_acpi_probe_table;
>>> + entry < &__dsdt_acpi_probe_table_end; entry++)
>>> + if (strcmp(entry->_hid, acpi_device_hid(device)) == 0)
>>> + return entry->probe(device);
>>
>> Through this approch we are forcing an irqchip (that by the way it
>> has a physical node ACPI companion by being a DSDT device object so it
>> could be managed by a platform driver) to be probed. The question is:
>> is
>> there a reason (apart from the current ACPI resource parsing API) why
>> this can't be implemented through deferred probing and the device
>> dependencies framework Rafael is working on:
>>
>> http://www.mail-archive.com/linux-kernel at vger.kernel.org/msg1246897.html
>>
>> The DT layer, through the of_irq_get() API, supports probe deferral
>> and what I am asking you is if there is any blocking point (again,
>> apart from the current ACPI API) to implement the same mechanism.
>>
>> I have not reviewed the previous versions so I am certainly missing
>> some of the bits and pieces already discussed, apologies for that.
>
> Also, this function scares me to no end: lack of locking and recursion
> are the main things that worry me. My vote would be to implement
> something based on Rafael's approach (which conveniently solves all
> kind
> of other issues).
I'll review Rafael's latest patchset and comment back on whether it
suits
our needs or if we can build on that.
Thanks
>
> I'll review this patch series in a more in-depth way soon, but I wanted
> to chime in and add my own weight to Lorenzo's proposal.
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a
Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 4/4] arm64: dts: msm8996: Add SMP2P and APCS nodes
From: Sarangdhar Joshi @ 2016-10-20 21:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020200304.GP7509@tuxbot>
On 10/20/2016 01:03 PM, Bjorn Andersson wrote:
> On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
>
>> Add SMP2P and APCS DT nodes required for Qualcomm ADSP
>> Peripheral Image Loader.
>>
>
> Nice, two (very) small nits below. But other than that
>
> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Regards,
> Bjorn
>
>> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 30 ++++++++++++++++++++++++++++++
>> 1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> index 0a810f5..3edb56b 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> @@ -169,6 +169,31 @@
>> method = "smc";
>> };
>>
>> + smp2p-adsp {
>
> Sorry for bikeshedding, but on msm8916 I named these {subsystem}-smp2p,
> so I would prefer this was naemd adsp-smp2p...
Sure. Will do.
>
>> + compatible = "qcom,smp2p";
>> + qcom,smem = <443>, <429>;
>> +
>> + interrupt-parent = <&intc>;
>
> I believe this node inherit intc as interrupt-parent from the root
> already, is there are reason why you need to specify it.
>
Good catch. I will remove it.
>> + interrupts = <0 158 IRQ_TYPE_EDGE_RISING>;
>> +
>> + qcom,ipc = <&apcs 16 10>;
>> +
>> + qcom,local-pid = <0>;
>> + qcom,remote-pid = <2>;
>> +
>> + adsp_smp2p_out: master-kernel {
>> + qcom,entry-name = "master-kernel";
>> + #qcom,state-cells = <1>;
>> + };
>> +
>> + adsp_smp2p_in: slave-kernel {
>> + qcom,entry-name = "slave-kernel";
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> + };
>> +
>> smem {
>> compatible = "qcom,smem";
>>
>> @@ -205,6 +230,11 @@
>> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
>> };
>>
>> + apcs: syscon at 9820000 {
>> + compatible = "syscon";
>> + reg = <0x9820000 0x1000>;
>> + };
>> +
>> gcc: clock-controller at 300000 {
>> compatible = "qcom,gcc-msm8996";
>> #clock-cells = <1>;
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> a Linux Foundation Collaborative Project
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Thanks for reviewing the patch.
Regards,
Sarang
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH V5 1/2] ACPI: Add support for ResourceSource/IRQ domain mapping
From: agustinv at codeaurora.org @ 2016-10-20 21:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020164812.GD8731@red-moon>
Hey Lorenzo,
On 2016-10-20 12:48, Lorenzo Pieralisi wrote:
> Hi Agustin,
>
> On Tue, Oct 18, 2016 at 01:41:48PM -0400, Agustin Vega-Frias wrote:
>> This allows irqchip drivers to associate an ACPI DSDT device to
>> an IRQ domain and provides support for using the ResourceSource
>> in Extended IRQ Resources to find the domain and map the IRQs
>> specified on that domain.
>>
>> Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
>> ---
>> drivers/acpi/Makefile | 1 +
>> drivers/acpi/irqdomain.c | 141
>> ++++++++++++++++++++++++++++++++++++++
>> drivers/acpi/resource.c | 21 +++---
>> include/asm-generic/vmlinux.lds.h | 1 +
>> include/linux/acpi.h | 71 +++++++++++++++++++
>> include/linux/irqchip.h | 17 ++++-
>> 6 files changed, 240 insertions(+), 12 deletions(-)
>> create mode 100644 drivers/acpi/irqdomain.c
>>
>> diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
>> index 9ed0878..880401b 100644
>> --- a/drivers/acpi/Makefile
>> +++ b/drivers/acpi/Makefile
>> @@ -57,6 +57,7 @@ acpi-$(CONFIG_ACPI_PROCFS_POWER) += cm_sbs.o
>> acpi-y += acpi_lpat.o
>> acpi-$(CONFIG_ACPI_GENERIC_GSI) += gsi.o
>> acpi-$(CONFIG_ACPI_WATCHDOG) += acpi_watchdog.o
>> +acpi-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
>>
>> # These are (potentially) separate modules
>>
>> diff --git a/drivers/acpi/irqdomain.c b/drivers/acpi/irqdomain.c
>> new file mode 100644
>> index 0000000..c53b9f4
>> --- /dev/null
>> +++ b/drivers/acpi/irqdomain.c
>> @@ -0,0 +1,141 @@
>> +/*
>> + * ACPI ResourceSource/IRQ domain mapping support
>> + *
>> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +#include <linux/acpi.h>
>> +#include <linux/irq.h>
>> +#include <linux/irqdomain.h>
>> +
>> +/**
>> + * acpi_irq_domain_ensure_probed() - Check if the device has
>> registered
>> + * an IRQ domain and probe as
>> necessary
>> + *
>> + * @device: Device to check and probe
>> + *
>> + * Returns: 0 on success, -ENODEV otherwise
>
> This is not correct (ie it depends on what
>
> struct acpi_dsdt_probe_entry.probe
>
> returns) and I would like to take this nit as an opportunity
> to take a step back and ask you a question below.
>
Will fix this as necessary if this approach is pursued.
>> + */
>> +static int acpi_irq_domain_ensure_probed(struct acpi_device *device)
>> +{
>> + struct acpi_dsdt_probe_entry *entry;
>> +
>> + if (irq_find_matching_fwnode(&device->fwnode, DOMAIN_BUS_ANY) != 0)
>> + return 0;
>> +
>> + for (entry = &__dsdt_acpi_probe_table;
>> + entry < &__dsdt_acpi_probe_table_end; entry++)
>> + if (strcmp(entry->_hid, acpi_device_hid(device)) == 0)
>> + return entry->probe(device);
>
> Through this approch we are forcing an irqchip (that by the way it
> has a physical node ACPI companion by being a DSDT device object so it
> could be managed by a platform driver) to be probed. The question is:
> is
> there a reason (apart from the current ACPI resource parsing API) why
> this can't be implemented through deferred probing and the device
> dependencies framework Rafael is working on:
>
> http://www.mail-archive.com/linux-kernel at vger.kernel.org/msg1246897.html
>
> The DT layer, through the of_irq_get() API, supports probe deferral
> and what I am asking you is if there is any blocking point (again,
> apart from the current ACPI API) to implement the same mechanism.
>
> I have not reviewed the previous versions so I am certainly missing
> some of the bits and pieces already discussed, apologies for that.
>
I need to review the latest version of Rafael's patchset to see if the
issues
around ACPI IRQ resource conversion are addressed.
The problem we found before was that probe deferral didn't work because
the ACPI core converts all ACPI IRQ resources to Linux resources for
devices
at the same init level at the same time and that causes the conversion
to fail unless the supplier driver is promoted to an earlier init level.
Thanks,
Agustin
> Thanks,
> Lorenzo
>
>> +
>> + return -ENODEV;
>> +}
>> +
>> +/**
>> + * acpi_irq_domain_register_irq() - Register the mapping for an IRQ
>> produced
>> + * by the given acpi_resource_source
>> to a
>> + * Linux IRQ number
>> + * @source: IRQ source
>> + * @hwirq: Hardware IRQ number
>> + * @trigger: trigger type of the IRQ number to be mapped
>> + * @polarity: polarity of the IRQ to be mapped
>> + *
>> + * Returns: a valid linux IRQ number on success
>> + * -ENODEV if the given acpi_resource_source cannot be found
>> + * -EPROBE_DEFER if the IRQ domain has not been registered
>> + * -EINVAL for all other errors
>> + */
>> +int acpi_irq_domain_register_irq(const struct acpi_resource_source
>> *source,
>> + u32 hwirq, int trigger, int polarity)
>> +{
>> + struct irq_fwspec fwspec;
>> + struct acpi_device *device;
>> + acpi_handle handle;
>> + acpi_status status;
>> + int ret;
>> +
>> + /* An empty acpi_resource_source means it is a GSI */
>> + if (!source->string_length)
>> + return acpi_register_gsi(NULL, hwirq, trigger, polarity);
>> +
>> + status = acpi_get_handle(NULL, source->string_ptr, &handle);
>> + if (ACPI_FAILURE(status))
>> + return -ENODEV;
>> +
>> + device = acpi_bus_get_acpi_device(handle);
>> + if (!device)
>> + return -ENODEV;
>> +
>> + ret = acpi_irq_domain_ensure_probed(device);
>> + if (ret)
>> + goto out_put_device;
>> +
>> + fwspec.fwnode = &device->fwnode;
>> + fwspec.param[0] = hwirq;
>> + fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity);
>> + fwspec.param_count = 2;
>> +
>> + ret = irq_create_fwspec_mapping(&fwspec);
>> +
>> +out_put_device:
>> + acpi_bus_put_acpi_device(device);
>> +
>> + return ret;
>> +}
>> +EXPORT_SYMBOL_GPL(acpi_irq_domain_register_irq);
>> +
>> +/**
>> + * acpi_irq_domain_unregister_irq() - Delete the mapping for an IRQ
>> produced
>> + * by the given
>> acpi_resource_source to a
>> + * Linux IRQ number
>> + * @source: IRQ source
>> + * @hwirq: Hardware IRQ number
>> + *
>> + * Returns: 0 on success
>> + * -ENODEV if the given acpi_resource_source cannot be found
>> + * -EINVAL for all other errors
>> + */
>> +int acpi_irq_domain_unregister_irq(const struct acpi_resource_source
>> *source,
>> + u32 hwirq)
>> +{
>> + struct irq_domain *domain;
>> + struct acpi_device *device;
>> + acpi_handle handle;
>> + acpi_status status;
>> + int ret = 0;
>> +
>> + if (!source->string_length) {
>> + acpi_unregister_gsi(hwirq);
>> + return 0;
>> + }
>> +
>> + status = acpi_get_handle(NULL, source->string_ptr, &handle);
>> + if (ACPI_FAILURE(status))
>> + return -ENODEV;
>> +
>> + device = acpi_bus_get_acpi_device(handle);
>> + if (!device)
>> + return -ENODEV;
>> +
>> + domain = irq_find_matching_fwnode(&device->fwnode, DOMAIN_BUS_ANY);
>> + if (!domain) {
>> + ret = -EINVAL;
>> + goto out_put_device;
>> + }
>> +
>> + irq_dispose_mapping(irq_find_mapping(domain, hwirq));
>> +
>> +out_put_device:
>> + acpi_bus_put_acpi_device(device);
>> +
>> + return ret;
>> +}
>> +EXPORT_SYMBOL_GPL(acpi_irq_domain_unregister_irq);
>> diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c
>> index 56241eb..3fb7abf 100644
>> --- a/drivers/acpi/resource.c
>> +++ b/drivers/acpi/resource.c
>> @@ -381,14 +381,15 @@ static void acpi_dev_irqresource_disabled(struct
>> resource *res, u32 gsi)
>> res->flags = IORESOURCE_IRQ | IORESOURCE_DISABLED |
>> IORESOURCE_UNSET;
>> }
>>
>> -static void acpi_dev_get_irqresource(struct resource *res, u32 gsi,
>> +static void acpi_dev_get_irqresource(struct resource *res, u32 hwirq,
>> + const struct acpi_resource_source *source,
>> u8 triggering, u8 polarity, u8 shareable,
>> bool legacy)
>> {
>> int irq, p, t;
>>
>> - if (!valid_IRQ(gsi)) {
>> - acpi_dev_irqresource_disabled(res, gsi);
>> + if ((source->string_length == 0) && !valid_IRQ(hwirq)) {
>> + acpi_dev_irqresource_disabled(res, hwirq);
>> return;
>> }
>>
>> @@ -402,25 +403,25 @@ static void acpi_dev_get_irqresource(struct
>> resource *res, u32 gsi,
>> * using extended IRQ descriptors we take the IRQ configuration
>> * from _CRS directly.
>> */
>> - if (legacy && !acpi_get_override_irq(gsi, &t, &p)) {
>> + if (legacy && !acpi_get_override_irq(hwirq, &t, &p)) {
>> u8 trig = t ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
>> u8 pol = p ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
>>
>> if (triggering != trig || polarity != pol) {
>> - pr_warning("ACPI: IRQ %d override to %s, %s\n", gsi,
>> - t ? "level" : "edge", p ? "low" : "high");
>> + pr_warn("ACPI: IRQ %d override to %s, %s\n", hwirq,
>> + t ? "level" : "edge", p ? "low" : "high");
>> triggering = trig;
>> polarity = pol;
>> }
>> }
>>
>> res->flags = acpi_dev_irq_flags(triggering, polarity, shareable);
>> - irq = acpi_register_gsi(NULL, gsi, triggering, polarity);
>> + irq = acpi_irq_domain_register_irq(source, hwirq, triggering,
>> polarity);
>> if (irq >= 0) {
>> res->start = irq;
>> res->end = irq;
>> } else {
>> - acpi_dev_irqresource_disabled(res, gsi);
>> + acpi_dev_irqresource_disabled(res, hwirq);
>> }
>> }
>>
>> @@ -446,6 +447,7 @@ static void acpi_dev_get_irqresource(struct
>> resource *res, u32 gsi,
>> bool acpi_dev_resource_interrupt(struct acpi_resource *ares, int
>> index,
>> struct resource *res)
>> {
>> + const struct acpi_resource_source dummy = { 0, 0, NULL };
>> struct acpi_resource_irq *irq;
>> struct acpi_resource_extended_irq *ext_irq;
>>
>> @@ -460,7 +462,7 @@ bool acpi_dev_resource_interrupt(struct
>> acpi_resource *ares, int index,
>> acpi_dev_irqresource_disabled(res, 0);
>> return false;
>> }
>> - acpi_dev_get_irqresource(res, irq->interrupts[index],
>> + acpi_dev_get_irqresource(res, irq->interrupts[index], &dummy,
>> irq->triggering, irq->polarity,
>> irq->sharable, true);
>> break;
>> @@ -471,6 +473,7 @@ bool acpi_dev_resource_interrupt(struct
>> acpi_resource *ares, int index,
>> return false;
>> }
>> acpi_dev_get_irqresource(res, ext_irq->interrupts[index],
>> + &ext_irq->resource_source,
>> ext_irq->triggering, ext_irq->polarity,
>> ext_irq->sharable, false);
>> break;
>> diff --git a/include/asm-generic/vmlinux.lds.h
>> b/include/asm-generic/vmlinux.lds.h
>> index 3074796..f808afdc 100644
>> --- a/include/asm-generic/vmlinux.lds.h
>> +++ b/include/asm-generic/vmlinux.lds.h
>> @@ -563,6 +563,7 @@
>> IRQCHIP_OF_MATCH_TABLE() \
>> ACPI_PROBE_TABLE(irqchip) \
>> ACPI_PROBE_TABLE(clksrc) \
>> + ACPI_PROBE_TABLE(dsdt) \
>> EARLYCON_TABLE()
>>
>> #define INIT_TEXT \
>> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
>> index ddbeda6..bb1a838 100644
>> --- a/include/linux/acpi.h
>> +++ b/include/linux/acpi.h
>> @@ -26,6 +26,7 @@
>> #include <linux/resource_ext.h>
>> #include <linux/device.h>
>> #include <linux/property.h>
>> +#include <linux/irqdomain.h>
>>
>> #ifndef _LINUX
>> #define _LINUX
>> @@ -321,6 +322,31 @@ void acpi_set_irq_model(enum acpi_irq_model_id
>> model,
>> */
>> void acpi_unregister_gsi (u32 gsi);
>>
>> +#ifdef CONFIG_IRQ_DOMAIN
>> +
>> +int acpi_irq_domain_register_irq(const struct acpi_resource_source
>> *source,
>> + u32 hwirq, int trigger, int polarity);
>> +int acpi_irq_domain_unregister_irq(const struct acpi_resource_source
>> *source,
>> + u32 hwirq);
>> +
>> +#else
>> +
>> +static inline int acpi_irq_domain_register_irq(
>> + const struct acpi_resource_source *source, u32 hwirq, int trigger,
>> + int polarity)
>> +{
>> + return acpi_register_gsi(NULL, hwirq, trigger, polarity);
>> +}
>> +
>> +static inline int acpi_irq_domain_unregister_irq(
>> + const struct acpi_resource_source *source, u32 hwirq)
>> +{
>> + acpi_unregister_gsi(hwirq);
>> + return 0;
>> +}
>> +
>> +#endif /* CONFIG_IRQ_DOMAIN */
>> +
>> struct pci_dev;
>>
>> int acpi_pci_irq_enable (struct pci_dev *dev);
>> @@ -1024,6 +1050,34 @@ struct acpi_probe_entry {
>> (&ACPI_PROBE_TABLE_END(t) - \
>> &ACPI_PROBE_TABLE(t))); \
>> })
>> +
>> +/* Length of Hardware ID field in DSDT entries as per ACPI spec */
>> +#define ACPI_HID_LEN 9
>> +
>> +typedef int (*acpi_dsdt_handler)(struct acpi_device *);
>> +
>> +/**
>> + * struct acpi_probe_dsdt_entry - boot-time probing entry for DSDT
>> devices
>> + * @hid: _HID of the device
>> + * @fn: Callback to the driver being probed
>> + * @driver_data: Sideband data provided back to the driver
>> + */
>> +struct acpi_dsdt_probe_entry {
>> + __u8 _hid[ACPI_HID_LEN];
>> + acpi_dsdt_handler probe;
>> +};
>> +
>> +#define ACPI_DECLARE_DSDT_PROBE_ENTRY(name, hid, fn) \
>> + static const struct acpi_dsdt_probe_entry __acpi_probe_##name \
>> + __used __section(__dsdt_acpi_probe_table) = \
>> + { \
>> + ._hid = hid, \
>> + .probe = fn, \
>> + }
>> +
>> +extern struct acpi_dsdt_probe_entry __dsdt_acpi_probe_table;
>> +extern struct acpi_dsdt_probe_entry __dsdt_acpi_probe_table_end;
>> +
>> #else
>> static inline int acpi_dev_get_property(struct acpi_device *adev,
>> const char *name, acpi_object_type type,
>> @@ -1101,8 +1155,25 @@ static inline struct fwnode_handle
>> *acpi_get_next_subnode(struct device *dev,
>> (void *) data }
>>
>> #define acpi_probe_device_table(t) ({ int __r = 0; __r;})
>> +
>> +#define ACPI_DECLARE_DSDT_PROBE_ENTRY(name, hid, fn) \
>> + static const void *__acpi_probe_##name[] \
>> + __attribute__((unused)) \
>> + = { (void *) hid, \
>> + (void *) fn }
>> +
>> #endif
>>
>> +#define MADT_IRQCHIP_ACPI_DECLARE(name, subtable, validate, data,
>> fn) \
>> + ACPI_DECLARE_PROBE_ENTRY(irqchip, name, ACPI_SIG_MADT, \
>> + subtable, validate, data, fn)
>> +
>> +#define DSDT_IRQCHIP_ACPI_DECLARE(name, hid, fn) \
>> + ACPI_DECLARE_DSDT_PROBE_ENTRY(name, hid, fn)
>> +
>> +#define __IRQCHIP_ACPI_DECLARE(_a1, _a2, _a3, _a4, _a5, type, ...) \
>> + type##_IRQCHIP_ACPI_DECLARE
>> +
>> #ifdef CONFIG_ACPI_TABLE_UPGRADE
>> void acpi_table_upgrade(void);
>> #else
>> diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h
>> index 89c34b2..c2d0c12 100644
>> --- a/include/linux/irqchip.h
>> +++ b/include/linux/irqchip.h
>> @@ -29,6 +29,10 @@
>> /*
>> * This macro must be used by the different irqchip drivers to
>> declare
>> * the association between their version and their initialization
>> function.
>> + * Two syntaxes are supported depending on the table where the
>> irqchip device
>> + * is declared:
>> + *
>> + * - MADT irqchip syntax, which requires the following five
>> arguments:
>> *
>> * @name: name that must be unique accross all IRQCHIP_ACPI_DECLARE
>> of the
>> * same file.
>> @@ -37,10 +41,17 @@
>> * Can be NULL.
>> * @data: data to be checked by the validate function.
>> * @fn: initialization function
>> + *
>> + * - DSDT irqchip syntax, which requires the following three
>> arguments:
>> + *
>> + * @name: name that must be unique across all IRQCHIP_ACPI_DECLARE of
>> the
>> + * same file.
>> + * @hid: _HID of the DSDT device
>> + * @fn: initialization function
>> */
>> -#define IRQCHIP_ACPI_DECLARE(name, subtable, validate, data, fn) \
>> - ACPI_DECLARE_PROBE_ENTRY(irqchip, name, ACPI_SIG_MADT, \
>> - subtable, validate, data, fn)
>> +
>> +#define IRQCHIP_ACPI_DECLARE(...) \
>> + __IRQCHIP_ACPI_DECLARE(__VA_ARGS__, MADT, _unused,
>> DSDT)(__VA_ARGS__)
>>
>> #ifdef CONFIG_IRQCHIP
>> void irqchip_init(void);
>> --
>> Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm
>> Technologies, Inc.
>> Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a
>> Linux Foundation Collaborative Project.
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-acpi"
>> in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a
Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 3/4] arm64: dts: msm8996: Add SMEM DT nodes
From: Sarangdhar Joshi @ 2016-10-20 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020195629.GM7509@tuxbot>
On 10/20/2016 12:56 PM, Bjorn Andersson wrote:
> On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
>
>> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>>
>> Add SMEM and TCSR DT nodes on MSM8996.
>>
>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> index 949b096..0a810f5 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> @@ -169,12 +169,31 @@
>> method = "smc";
>> };
>>
>> + smem {
>> + compatible = "qcom,smem";
>> +
>> + memory-region = <&smem_mem>;
>> +
>> + hwlocks = <&tcsr_mutex 3>;
>> + };
>> +
>> soc: soc {
>> #address-cells = <1>;
>> #size-cells = <1>;
>> ranges = <0 0 0 0xffffffff>;
>> compatible = "simple-bus";
>>
>> + tcsr_mutex_regs: syscon at 740000 {
>> + compatible = "syscon";
>> + reg = <0x740000 0x20000>;
>> + };
>> +
>> + tcsr_mutex: hwlock {
>> + compatible = "qcom,tcsr-mutex";
>> + syscon = <&tcsr_mutex_regs 0 0x1000>;
>> + #hwlock-cells = <1>;
>> + };
>
> Sorry, I got this in the wrong place, the hwlock node should sit outside
> of soc {} - looks like we got this wrong in msm8916 as well.
Thanks for reviewing the patch. Do you mean to move it under / {}; (i.e.
root)?
>
> Regards,
> Bjorn
>
>> +
>> intc: interrupt-controller at 9bc0000 {
>> compatible = "arm,gic-v3";
>> #interrupt-cells = <3>;
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> a Linux Foundation Collaborative Project
>>
Regards,
Sarang
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 2/4] arm64: dts: msm8996: Add reserve-memory nodes
From: Sarangdhar Joshi @ 2016-10-20 21:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020195704.GN7509@tuxbot>
On 10/20/2016 12:57 PM, Bjorn Andersson wrote:
> On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
>
>> Add reserve-memory nodes required for Qualcomm
>> Peripheral Image Loaders
>>
>
> Awesome stuff,
>
> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Thanks for reviewing.
>
> Regards,
> Bjorn
>
>> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> index 36216ae..949b096 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> @@ -36,6 +36,31 @@
>> #size-cells = <2>;
>> ranges;
>>
>> + mba_region: mba at 91500000 {
>> + reg = <0x0 0x91500000 0x0 0x200000>;
>> + no-map;
>> + };
>> +
>> + slpi_region: slpi at 90b00000 {
>> + reg = <0x0 0x90b00000 0xa00000>;
>> + no-map;
>> + };
>> +
>> + venus_region: venus at 90400000 {
>> + reg = <0x0 0x90400000 0x0 0x700000>;
>> + no-map;
>> + };
>> +
>> + adsp_region: adsp at 8ea00000 {
>> + reg = <0x0 0x8ea00000 0x0 0x1a00000>;
>> + no-map;
>> + };
>> +
>> + mpss_region: mpss at 88800000 {
>> + reg = <0x0 0x88800000 0x0 0x6200000>;
>> + no-map;
>> + };
>> +
>> smem_mem: smem-mem at 86000000 {
>> reg = <0x0 0x86000000 0x0 0x200000>;
>> no-map;
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> a Linux Foundation Collaborative Project
>>
Regards,
Sarang
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 1/4] arm64: dts: msm8996: Add SMEM reserve-memory node
From: Sarangdhar Joshi @ 2016-10-20 21:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020195743.GO7509@tuxbot>
On 10/20/2016 12:57 PM, Bjorn Andersson wrote:
> On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
>
>> Add DT node to carveout memory for shared memory region.
>>
>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Thanks for reviewing.
>
> Regards,
> Bjorn
>
>> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> index d6da223..36216ae 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>> @@ -31,6 +31,17 @@
>> reg = <0 0 0 0>;
>> };
>>
>> + reserved-memory {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + smem_mem: smem-mem at 86000000 {
>> + reg = <0x0 0x86000000 0x0 0x200000>;
>> + no-map;
>> + };
>> + };
>> +
>> cpus {
>> #address-cells = <2>;
>> #size-cells = <0>;
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> a Linux Foundation Collaborative Project
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Regards,
Sarang
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH V3 1/3] ACPI, PCI IRQ: add PCI_USING penalty for ISA interrupts
From: Rafael J. Wysocki @ 2016-10-20 21:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a418cf9d-5eeb-a588-6653-fd00e0c2693c@codeaurora.org>
On Thu, Oct 20, 2016 at 10:01 PM, Sinan Kaya <okaya@codeaurora.org> wrote:
> On 10/19/2016 3:44 PM, Bjorn Helgaas wrote:
[cut]
> If we want to move the ISA pieces out of this file, that can be done too.
> We can also add support for PNPACPI. I'm not a very big fan of scratch
> everything and start from beginning approach. This refactoring effort already
> failed 3 times. I'd like to close the issue and move on.
Understood, but we have broken this for too many times already.
Either we have a minimum fix that is known working or we are going back.
Thanks,
Rafael
^ permalink raw reply
* [PATCH] drm: convert DT component matching to component_match_add_release()
From: Sean Paul @ 2016-10-20 20:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1bwo6l-0005Io-Q1@rmk-PC.armlinux.org.uk>
On Wed, Oct 19, 2016 at 6:28 AM, Russell King
<rmk+kernel@armlinux.org.uk> wrote:
> Convert DT component matching to use component_match_add_release().
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
> Can we please get this patch from May merged into the drm-misc or
> whatever trees so that we don't end up with conflicts? I've no idea
> who looks after drm-misc, as they have _still_ failed to add
> themselves to MAINTAINERS.
I think Daniel explained pretty clearly why this wasn't happening in
the previous thread.
Next time you send a v2, can you please mark it as such and include a
"Changes in v2" section?
>
> drivers/gpu/drm/arm/hdlcd_drv.c | 3 ++-
> drivers/gpu/drm/arm/malidp_drv.c | 4 +++-
> drivers/gpu/drm/armada/armada_drv.c | 2 +-
> drivers/gpu/drm/drm_of.c | 28 +++++++++++++++++++++++--
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 5 +++--
> drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 7 ++++---
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +++-
> drivers/gpu/drm/msm/msm_drv.c | 12 ++++++-----
> drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 6 ++++--
> drivers/gpu/drm/sti/sti_drv.c | 5 +++--
> drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
> drivers/gpu/drm/tilcdc/tilcdc_external.c | 4 +++-
> include/drm/drm_of.h | 12 +++++++++++
> 13 files changed, 73 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
> index fb6a418ce6be..6477d1a65266 100644
> --- a/drivers/gpu/drm/arm/hdlcd_drv.c
> +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
> @@ -453,7 +453,8 @@ static int hdlcd_probe(struct platform_device *pdev)
> return -EAGAIN;
> }
>
> - component_match_add(&pdev->dev, &match, compare_dev, port);
> + drm_of_component_match_add(&pdev->dev, &match, compare_dev, port);
> + of_node_put(port);
There's no mention in your commit message about fixing these node leaks.
>
> return component_master_add_with_match(&pdev->dev, &hdlcd_master_ops,
> match);
> diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
> index 9280358b8f15..9f4739452a25 100644
> --- a/drivers/gpu/drm/arm/malidp_drv.c
> +++ b/drivers/gpu/drm/arm/malidp_drv.c
> @@ -493,7 +493,9 @@ static int malidp_platform_probe(struct platform_device *pdev)
> return -EAGAIN;
> }
>
> - component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
> + drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
> + port);
> + of_node_put(port);
> return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
> match);
> }
> diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
> index 1e0e68f608e4..94e46da9a758 100644
> --- a/drivers/gpu/drm/armada/armada_drv.c
> +++ b/drivers/gpu/drm/armada/armada_drv.c
> @@ -254,7 +254,7 @@ static void armada_add_endpoints(struct device *dev,
> continue;
> }
>
> - component_match_add(dev, match, compare_of, remote);
> + drm_of_component_match_add(dev, match, compare_of, remote);
> of_node_put(remote);
> }
> }
> diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
> index bc98bb94264d..47848ed8ca48 100644
> --- a/drivers/gpu/drm/drm_of.c
> +++ b/drivers/gpu/drm/drm_of.c
> @@ -6,6 +6,11 @@
> #include <drm/drm_crtc.h>
> #include <drm/drm_of.h>
>
> +static void drm_release_of(struct device *dev, void *data)
> +{
> + of_node_put(data);
> +}
> +
> /**
> * drm_crtc_port_mask - find the mask of a registered CRTC by port OF node
> * @dev: DRM device
> @@ -64,6 +69,24 @@ uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> EXPORT_SYMBOL(drm_of_find_possible_crtcs);
>
> /**
> + * drm_of_component_match_add - Add a component helper OF node match rule
> + * @master: master device
> + * @matchptr: component match pointer
> + * @compare: compare function used for matching component
> + * @node: of_node
> + */
> +void drm_of_component_match_add(struct device *master,
> + struct component_match **matchptr,
> + int (*compare)(struct device *, void *),
> + struct device_node *node)
> +{
> + of_node_get(node);
> + component_match_add_release(master, matchptr, drm_release_of,
> + compare, node);
> +}
> +EXPORT_SYMBOL_GPL(drm_of_component_match_add);
> +
> +/**
> * drm_of_component_probe - Generic probe function for a component based master
> * @dev: master device containing the OF node
> * @compare_of: compare function used for matching components
> @@ -101,7 +124,7 @@ int drm_of_component_probe(struct device *dev,
> continue;
> }
>
> - component_match_add(dev, &match, compare_of, port);
> + drm_of_component_match_add(dev, &match, compare_of, port);
> of_node_put(port);
> }
>
> @@ -140,7 +163,8 @@ int drm_of_component_probe(struct device *dev,
> continue;
> }
>
> - component_match_add(dev, &match, compare_of, remote);
> + drm_of_component_match_add(dev, &match, compare_of,
> + remote);
> of_node_put(remote);
> }
> of_node_put(port);
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> index aa687669e22b..0dee6acbd880 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> @@ -16,6 +16,7 @@
>
> #include <linux/component.h>
> #include <linux/of_platform.h>
> +#include <drm/drm_of.h>
>
> #include "etnaviv_drv.h"
> #include "etnaviv_gpu.h"
> @@ -629,8 +630,8 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
> if (!core_node)
> break;
>
> - component_match_add(&pdev->dev, &match, compare_of,
> - core_node);
> + drm_of_component_match_add(&pdev->dev, &match,
> + compare_of, core_node);
> of_node_put(core_node);
> }
> } else if (dev->platform_data) {
> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> index 90377a609c98..e88fde18c946 100644
> --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> @@ -24,6 +24,7 @@
> #include <drm/drm_fb_cma_helper.h>
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_crtc_helper.h>
> +#include <drm/drm_of.h>
>
> #include "kirin_drm_drv.h"
>
> @@ -260,14 +261,13 @@ static struct device_node *kirin_get_remote_node(struct device_node *np)
> DRM_ERROR("no valid endpoint node\n");
> return ERR_PTR(-ENODEV);
> }
> - of_node_put(endpoint);
>
> remote = of_graph_get_remote_port_parent(endpoint);
> + of_node_put(endpoint);
Another bug that's being fixed without mention in the commit.
> if (!remote) {
> DRM_ERROR("no valid remote node\n");
> return ERR_PTR(-ENODEV);
> }
> - of_node_put(remote);
>
> if (!of_device_is_available(remote)) {
> DRM_ERROR("not available for remote node\n");
> @@ -294,7 +294,8 @@ static int kirin_drm_platform_probe(struct platform_device *pdev)
> if (IS_ERR(remote))
> return PTR_ERR(remote);
>
> - component_match_add(dev, &match, compare_of, remote);
> + drm_of_component_match_add(dev, &match, compare_of, remote);
> + of_node_put(remote);
>
> return component_master_add_with_match(dev, &kirin_drm_ops, match);
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index cf83f6507ec8..9c5430fb82a2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -18,6 +18,7 @@
> #include <drm/drm_crtc_helper.h>
> #include <drm/drm_gem.h>
> #include <drm/drm_gem_cma_helper.h>
> +#include <drm/drm_of.h>
> #include <linux/component.h>
> #include <linux/iommu.h>
> #include <linux/of_address.h>
> @@ -415,7 +416,8 @@ static int mtk_drm_probe(struct platform_device *pdev)
> comp_type == MTK_DPI) {
> dev_info(dev, "Adding component match for %s\n",
> node->full_name);
> - component_match_add(dev, &match, compare_of, node);
> + drm_of_component_match_add(dev, &match, compare_of,
> + node);
> } else {
> struct mtk_ddp_comp *comp;
>
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> index fb5c0b0a7594..84d38eaea585 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -15,6 +15,8 @@
> * this program. If not, see <http://www.gnu.org/licenses/>.
> */
>
> +#include <drm/drm_of.h>
> +
> #include "msm_drv.h"
> #include "msm_debugfs.h"
> #include "msm_fence.h"
> @@ -919,8 +921,8 @@ static int add_components_mdp(struct device *mdp_dev,
> continue;
> }
>
> - component_match_add(master_dev, matchptr, compare_of, intf);
> -
> + drm_of_component_match_add(master_dev, matchptr, compare_of,
> + intf);
> of_node_put(intf);
> of_node_put(ep_node);
> }
> @@ -962,8 +964,8 @@ static int add_display_components(struct device *dev,
> put_device(mdp_dev);
>
> /* add the MDP component itself */
> - component_match_add(dev, matchptr, compare_of,
> - mdp_dev->of_node);
> + drm_of_component_match_add(dev, matchptr, compare_of,
> + mdp_dev->of_node);
> } else {
> /* MDP4 */
> mdp_dev = dev;
> @@ -996,7 +998,7 @@ static int add_gpu_components(struct device *dev,
> if (!np)
> return 0;
>
> - component_match_add(dev, matchptr, compare_of, np);
> + drm_of_component_match_add(dev, matchptr, compare_of, np);
>
> of_node_put(np);
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> index 8c8cbe837e61..6fe161192bb4 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> @@ -20,6 +20,7 @@
> #include <drm/drm_crtc_helper.h>
> #include <drm/drm_fb_helper.h>
> #include <drm/drm_gem_cma_helper.h>
> +#include <drm/drm_of.h>
> #include <linux/dma-mapping.h>
> #include <linux/pm_runtime.h>
> #include <linux/module.h>
> @@ -388,7 +389,7 @@ static void rockchip_add_endpoints(struct device *dev,
> continue;
> }
>
> - component_match_add(dev, match, compare_of, remote);
> + drm_of_component_match_add(dev, match, compare_of, remote);
> of_node_put(remote);
> }
> }
> @@ -437,7 +438,8 @@ static int rockchip_drm_platform_probe(struct platform_device *pdev)
> }
>
> of_node_put(iommu);
> - component_match_add(dev, &match, compare_of, port->parent);
> + drm_of_component_match_add(dev, &match, compare_of,
> + port->parent);
> of_node_put(port);
> }
>
> diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
> index 2784919a7366..5e819876e642 100644
> --- a/drivers/gpu/drm/sti/sti_drv.c
> +++ b/drivers/gpu/drm/sti/sti_drv.c
> @@ -17,6 +17,7 @@
> #include <drm/drm_crtc_helper.h>
> #include <drm/drm_gem_cma_helper.h>
> #include <drm/drm_fb_cma_helper.h>
> +#include <drm/drm_of.h>
>
> #include "sti_crtc.h"
> #include "sti_drv.h"
> @@ -423,8 +424,8 @@ static int sti_platform_probe(struct platform_device *pdev)
> child_np = of_get_next_available_child(node, NULL);
>
> while (child_np) {
> - component_match_add(dev, &match, compare_of, child_np);
> - of_node_put(child_np);
> + drm_of_component_match_add(dev, &match, compare_of,
> + child_np);
> child_np = of_get_next_available_child(node, child_np);
> }
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
> index 0da9862ad8ed..b3c4ad605e81 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
> @@ -18,6 +18,7 @@
> #include <drm/drm_fb_cma_helper.h>
> #include <drm/drm_gem_cma_helper.h>
> #include <drm/drm_fb_helper.h>
> +#include <drm/drm_of.h>
>
> #include "sun4i_crtc.h"
> #include "sun4i_drv.h"
> @@ -239,7 +240,7 @@ static int sun4i_drv_add_endpoints(struct device *dev,
> /* Add current component */
> DRM_DEBUG_DRIVER("Adding component %s\n",
> of_node_full_name(node));
> - component_match_add(dev, match, compare_of, node);
> + drm_of_component_match_add(dev, match, compare_of, node);
> count++;
> }
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> index 68e895021005..06a4c584f3cb 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> @@ -10,6 +10,7 @@
>
> #include <linux/component.h>
> #include <linux/of_graph.h>
> +#include <drm/drm_of.h>
>
> #include "tilcdc_drv.h"
> #include "tilcdc_external.h"
> @@ -160,7 +161,8 @@ int tilcdc_get_external_components(struct device *dev,
>
> dev_dbg(dev, "Subdevice node '%s' found\n", node->name);
> if (match)
> - component_match_add(dev, match, dev_match_of, node);
> + drm_of_component_match_add(dev, match, dev_match_of,
> + node);
> of_node_put(node);
> count++;
> }
> diff --git a/include/drm/drm_of.h b/include/drm/drm_of.h
> index 3fd87b386ed7..d6b4c5587bbe 100644
> --- a/include/drm/drm_of.h
> +++ b/include/drm/drm_of.h
> @@ -4,6 +4,7 @@
> #include <linux/of_graph.h>
>
> struct component_master_ops;
> +struct component_match;
> struct device;
> struct drm_device;
> struct drm_encoder;
> @@ -12,6 +13,10 @@ struct device_node;
> #ifdef CONFIG_OF
> extern uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> struct device_node *port);
> +extern void drm_of_component_match_add(struct device *master,
> + struct component_match **matchptr,
> + int (*compare)(struct device *, void *),
> + struct device_node *node);
> extern int drm_of_component_probe(struct device *dev,
> int (*compare_of)(struct device *, void *),
> const struct component_master_ops *m_ops);
> @@ -25,6 +30,13 @@ static inline uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> return 0;
> }
>
> +static void drm_of_component_match_add(struct device *master,
> + struct component_match **matchptr,
> + int (*compare)(struct device *, void *),
> + struct device_node *node)
> +{
> +}
> +
> static inline int
> drm_of_component_probe(struct device *dev,
> int (*compare_of)(struct device *, void *),
> --
> 2.1.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH] ARM: dt: sun8i-h3: Add sunxi-sid to dts for sun8i-h3
From: Maxime Ripard @ 2016-10-20 20:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161019074016.GA31440@Red>
On Wed, Oct 19, 2016 at 09:40:16AM +0200, LABBE Corentin wrote:
> On Wed, Oct 05, 2016 at 12:21:30PM +0200, Jean-Francois Moine wrote:
> > On Wed, 5 Oct 2016 11:48:24 +0200
> > Corentin Labbe <clabbe.montjoie@gmail.com> wrote:
> >
> > > This patch add support for the sunxi-sid driver to the device tree for sun8i-h3.
> > >
> > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > > ---
> > > arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
> > > 1 file changed, 5 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> > > index 9f58bb4..abfd29c 100644
> > > --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> > > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> > > @@ -211,6 +211,11 @@
> > > #size-cells = <0>;
> > > };
> > >
> > > + sid: eeprom at 01c14200 {
> > > + compatible = "allwinner,sun7i-a20-sid";
> > > + reg = <0x01c14200 0x200>;
> >
> > The datasheet says 1Kb starting at 0x01c14000.
> > Is there any reason to reduce the area and to shift the offset?
> >
>
> According to http://linux-sunxi.org/SID_Register_Guide "For
> Allwinner A83T and H3 the SID address space starts at 0x01c14000,
> and the e-fuses are at offset 0x200".
>
> So I use this offset, since the sunxi_sid driver need the base
> address of e-fuses.
>
> The easiest solution is to use 0x01c14200 since the other part of
> sid is not used and not known (A83T/H3 user manual doesnt give any
> information on all sid space, worse for A64 which reference SID only
> in memory map).
>
> So probably for H3/A64/A83T, there will never any usage of the rest
> of the SID address space.
And since we can't know that, and we have to maintain the DT ABI,
using the whole address map and an offset, with a new compatible, is
definetely the safest thing to do.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH v5 11/23] usb: chipidea: Emulate OTGSC interrupt enable path
From: Stephen Boyd @ 2016-10-20 20:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020101017.GA32001@b29397-desktop>
Quoting Peter Chen (2016-10-20 03:10:18)
> On Wed, Oct 19, 2016 at 11:55:29PM -0700, Stephen Boyd wrote:
> > Quoting Peter Chen (2016-10-19 01:02:11)
> > > On Tue, Oct 18, 2016 at 06:53:07PM -0700, Stephen Boyd wrote:
> > > > If you're asking if I've made modifications to extcon-usb-gpio, then the
> > > > answer is no. The branch on linaro.org git server from the cover-letter
> > > > is the branch I've used to test this with. This patch is specifically to
> > > > fix issues with that design on the db410c board that has only one pin
> > > > for ID and vbus detection. It's the schematic that we've discussed in
> > > > another thread.
> > > >
> > > > extcon-usb-gpio sends two extcon events, EXTCON_USB_HOST (for the id
> > > > pin) and EXTCON_USB (for the vbus). So afaik it does support vbus
> > > > events.
> > > >
> > >
> > > Hmm, in fact, your ID event is the same with vbus event, you take
> > > external vbus event as ID event for extcon-usb-gpio handling. Yes,
> > > it can work due to it sends EXTCON_USB_HOST event first.
> > >
> > > Where you change the USB_SW_SEL_PM pin?
> >
> > Currently that is done with the mux driver I sent based on the extcon
> > event. We don't know if that's before or after the controller handles
> > the extcon event though, so the pin should probably be changed from the
> > chipidea driver instead to be more explicit. Why do you ask though?
>
> I was just curious how you handle it, now I am clear. From my point,
> the suitable way may be: mux driver + user app (echo role through
> debugfs). The extcon-usb-gpio is not necessary, since you have already
> known role at mux driver.
>
> The current kernel has no framework to handle dual-role switch at kernel
> space.
Ok. I'm planning that as future work after this set of patches is
merged.
> > > @@ -1963,6 +1963,8 @@ static int udc_id_switch_for_device(struct ci_hdrc *ci)
> > > /* Clear and enable BSV irq */
> > > hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
> > > OTGSC_BSVIS | OTGSC_BSVIE);
> > > + /* vbus change may has already been occurred */
> >
> > "vbus change may have already occurred"?
>
> Yes, will change.
>
Great. Should I wait to incorporate your change into my series, or will
you apply the usb patches and Kishon can apply the phy patches? This
patch #11 should be dropped, but otherwise I don't think there's
anything left to do for this series.
^ permalink raw reply
* [PATCH] Revert "clocksource/drivers/timer_sun5i: Replace code by clocksource_mmio_init"
From: Thomas Gleixner @ 2016-10-20 20:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018054918.26855-1-wens@csie.org>
On Tue, 18 Oct 2016, Chen-Yu Tsai wrote:
> Revert the commit for now. clocksource_mmio_init can be made to pass back
> a pointer, but the code churn and usage of an inner struct might not be
> worth it.
You can avoid the churn by making clocksurce_mmio_init() a wrapper around a
new function, which takes a pointer to a struct clocksource_mmio as
argument so you can hand in the structure you need: Something like the
patch below should do the trick.
Thanks,
tglx
8<--------------------------------
--- a/drivers/clocksource/mmio.c
+++ b/drivers/clocksource/mmio.c
@@ -10,11 +10,6 @@
#include <linux/init.h>
#include <linux/slab.h>
-struct clocksource_mmio {
- void __iomem *reg;
- struct clocksource clksrc;
-};
-
static inline struct clocksource_mmio *to_mmio_clksrc(struct clocksource *c)
{
return container_of(c, struct clocksource_mmio, clksrc);
@@ -41,6 +36,27 @@ cycle_t clocksource_mmio_readw_down(stru
}
/**
+ * FIXME: Add doc
+ */
+int __init clocksource_mmio_setup(struct clocksource_mmio *cs,
+ void __iomem *base , const char *name,
+ unsigned long hz , int rating, unsigned bits,
+ cycle_t (*read)(struct clocksource *))
+{
+ if (bits > 64 || bits < 16)
+ return -EINVAL;
+
+ cs->reg = base;
+ cs->clksrc.name = name;
+ cs->clksrc.rating = rating;
+ cs->clksrc.read = read;
+ cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
+ cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+ return clocksource_register_hz(&cs->clksrc, hz);
+}
+
+/**
* clocksource_mmio_init - Initialize a simple mmio based clocksource
* @base: Virtual address of the clock readout register
* @name: Name of the clocksource
@@ -62,12 +78,5 @@ int __init clocksource_mmio_init(void __
if (!cs)
return -ENOMEM;
- cs->reg = base;
- cs->clksrc.name = name;
- cs->clksrc.rating = rating;
- cs->clksrc.read = read;
- cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
- cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
-
- return clocksource_register_hz(&cs->clksrc, hz);
+ return clocksource_mmio_setup(cs, base, name, hz, rating, bits, read);
}
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -119,6 +119,14 @@ struct clocksource {
/* simplify initialization of mask field */
#define CLOCKSOURCE_MASK(bits) (cycle_t)((bits) < 64 ? ((1ULL<<(bits))-1) : -1)
+/**
+ * FIXME: Add doc
+ */
+struct clocksource_mmio {
+ void __iomem *reg;
+ struct clocksource clksrc;
+};
+
static inline u32 clocksource_freq2mult(u32 freq, u32 shift_constant, u64 from)
{
/* freq = cyc/from
@@ -241,6 +249,11 @@ extern cycle_t clocksource_mmio_readw_do
extern int clocksource_mmio_init(void __iomem *, const char *,
unsigned long, int, unsigned, cycle_t (*)(struct clocksource *));
+extern int clocksource_mmio_setup(struct clocksource_mmio *,
+ void __iomem *, const char *,
+ unsigned long, int, unsigned,
+ cycle_t (*)(struct clocksource *));
+
extern int clocksource_i8253_init(void);
#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
^ permalink raw reply
* [PATCH 4/4] arm64: dts: msm8996: Add SMP2P and APCS nodes
From: Bjorn Andersson @ 2016-10-20 20:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476989765-7524-4-git-send-email-spjoshi@codeaurora.org>
On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> Add SMP2P and APCS DT nodes required for Qualcomm ADSP
> Peripheral Image Loader.
>
Nice, two (very) small nits below. But other than that
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 0a810f5..3edb56b 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -169,6 +169,31 @@
> method = "smc";
> };
>
> + smp2p-adsp {
Sorry for bikeshedding, but on msm8916 I named these {subsystem}-smp2p,
so I would prefer this was naemd adsp-smp2p...
> + compatible = "qcom,smp2p";
> + qcom,smem = <443>, <429>;
> +
> + interrupt-parent = <&intc>;
I believe this node inherit intc as interrupt-parent from the root
already, is there are reason why you need to specify it.
> + interrupts = <0 158 IRQ_TYPE_EDGE_RISING>;
> +
> + qcom,ipc = <&apcs 16 10>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <2>;
> +
> + adsp_smp2p_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,state-cells = <1>;
> + };
> +
> + adsp_smp2p_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> smem {
> compatible = "qcom,smem";
>
> @@ -205,6 +230,11 @@
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + apcs: syscon at 9820000 {
> + compatible = "syscon";
> + reg = <0x9820000 0x1000>;
> + };
> +
> gcc: clock-controller at 300000 {
> compatible = "qcom,gcc-msm8996";
> #clock-cells = <1>;
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
^ permalink raw reply
* [PATCH V3 1/3] ACPI, PCI IRQ: add PCI_USING penalty for ISA interrupts
From: Sinan Kaya @ 2016-10-20 20:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161019224405.GA14915@localhost>
On 10/19/2016 3:44 PM, Bjorn Helgaas wrote:
[cut]
>>
>> Same problem here. This line will be broken after the sci_penalty change.
>>
>> acpi_isa_irq_penalty[irq] = acpi_irq_get_penalty(irq) +
>> (active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING);
>
> I think the fragility of this code is an indication that we have a
> design problem, so I want to step back from the nitty gritty details
> for a bit and look at the overall design.
This is all because we started with a very simple design where we replaced
the array with a get_penalty function. Set penalty function would dynamically
reallocate the link list so that we have a design that works no matter
what the number of IRQs are.
As we hit the first problem on existing platform, we realized that we can't
actually dynamically reallocate an interrupt because get_penalty function
gets called from early boot stages where heap is not initialized yet.
Then, we started restructuring the code so that we can discover the IRQs
by iterating the link list rather than using an array. While transitioning
into this new design, we forgot the fact that irq_get_penalty function
became a fixed array penalty + dynamically calculated penalty.
This line was trying to increment the static array but ended up gathering
the dynamic pieces together.
This obviously is a bug and was forgotten in the code.
>
> Let me restate the overall problem: We have a PCI device connected to
> an interrupt link. The interrupt link can be connected to one of
> several IRQs, and we want to choose one of those IRQs to minimize IRQ
> sharing.
>
> That means we need information about which IRQs are used.
> Historically we've started with a compiled-in table of common ISA IRQ
> usage, and we also collect information about which IRQs are used and
> which *might* be used. So we have the following inputs:
>
> - Compiled-in ISA IRQ usage: the static acpi_isa_irq_penalty[]
> values. ACPI is *supposed* to tell us about all these usages, so
> I don't know why we have the table. But it's been there as long
> as I can remember. The table is probably x86-specific, but we
> keep it in the supposedly generic pci_link.c.
>
I think it is because the ISA IRQ functions get called in early boot stages
and there is no heap allocator at that point of execution.
> - The "acpi_irq_isa=" and "acpi_irq_pci=" command-line overrides via
> acpi_irq_pci(). I suppose these are for cases where we can't
> figure things out automatically. I would resist adding parameters
> like this today (I would treat the need for them as a bug and look
> for a fix or a quirk), but we might be stuck with these.
>
> - SCI information from the ACPI FADT (acpi_penalize_sci_irq()).
>
> - PNPBIOS and PNPACPI device IRQ usage from _CRS and _PRS via
> acpi_penalize_isa_irq(). This is only for IRQs 0-15, and it does
> NOT include interrupt link (PNP0C0F) devices because we don't
> handle them as PNPACPI devices. I think this is related to the
> fact that PNP0C0F doesn't appear in acpi_pnp_device_ids[].
The original code supports the entire IRQ range (0..255). We limited it
to 16 during redesign.
>
> - For non-PNP0C0F, non-PNPACPI devices, we completely ignore IRQ
> information from _CRS and _PRS. This seems sub-optimal and
> possibly buggy.
>
> - Interrupt link (PNP0C0F) IRQ usage from _CRS and _PRS via
> acpi_irq_penalty_init(). This is only for IRQs 0-15, and we only
> call this on x86. If _PRS exists, we penalize each possible IRQ.
> If there's no _PRS but _CRS contains an active IRQ, we penalize
> it.
Correct.
>
> - Interrupt link (PNP0C0F) IRQ usage from _CRS and _PRS when
> enabling a new link. In acpi_irq_pci_sharing_penalty(), we
> penalize an IRQ if it appears in _CRS or _PRS of any link device
> in the system.
>
> For IRQs 0-15, this overlaps with the penalization done at
> boot-time by acpi_irq_penalty_init(): if a device has _PRS, we'll
> add the "possible" penalty twice (once in acpi_irq_penalty_init()
> and again in acpi_irq_pci_sharing_penalty()), and the "using"
> penalty once (in acpi_irq_pci_sharing_penalty()).
>
> If a device has no _PRS but has _CRS, the "using" penalty is
> applied twice (once in once in acpi_irq_penalty_init() and again
> in acpi_irq_pci_sharing_penalty())
>
> I think this whole thing is baroque and grotesque.
Regardless of these, we hit four different bugs because we didn't understand
the usage model.
1. You can't use kmalloc in IRQ get penalty
2. SCI IRQ type cannot be gathered from IRQ API
3. acpi_irq_penalty cannot be called from early stages since it is iterating
the link list. If there is a penalty assignment requirement from early stages,
this needs to be done on a statically allocated array.
4. acpi_irq_penalty_init is redundant.
>
> Here's a strawman idea:
>
> - Maintain a mapping of (IRQ, penalty). Initially all penalties are
> zero. This is for *all* IRQs, not just ISA ones. This could be a
> linked list, but the structure is not important as long as we can
> add things dynamically.
Dynamic allocation doesn't work due to early calls from x86 architecture.
This is the reason why we iterate the link objects.
>
> - Add a "acpi_penalize_irq()" function similar to
> acpi_penalize_isa_irq(), but not restricted to ISA, so we can
> increase the penalty for any IRQ, and maybe we can specify how
> much penalty to add.
This was my first patch. It didn't work due to heap requirements.
>
> - Make acpi_irq_get_penalty() a simple lookup in the mapping. No
> iterating through all link devices.
>
> - If we think the compiled-in penalties are really necessary, move
> the table to x86 code and add a boot-time loop to use
> acpi_penalize_irq() to penalize these IRQs. Same for the
> command-line options.
I agree, we can move all of the ISA interrupt stuff out of this file
if we want to.
I really don't like the fact that we have a acpi_penalize_isa_irq function.
The penalty information should have been contained in this file.
acpi_penalize_isa_irq gets called from arbitrary contexts.
I'm not sure adding a acpi_penalize_irq function is a good idea. All penalty
users should have been in this file.
>
> - Change acpi_penalize_sci_irq() to use acpi_penalize_irq().
> Probably the mapping needs to pay attention to trigger/polarity
> somehow, too.
>
> - Figure out how to make the ACPI core use acpi_penalize_irq() to
> based on the _CRS and _PRS of every ACPI device, including
> PNPACPI, PNP0C0F, etc. Then we can remove acpi_irq_penalty_init().
>
I think this is a new feature.
> - Change acpi_pci_link_set() to use acpi_penalize_irq() for the IRQ
> it is enabling. Conceptually maybe this should be done in the
> acpi_set_current_resources() path so it happens whenever we use
> _CRS to enable an IRQ on *any* ACPI device.
>
> I think the biggest issue is figuring out how to get the ACPI core to
> look at the _CRS for *all* devices. If we could do that, I think it
> could substantially simplify this code.
I think my V4 patch satisfies all of these requirements and also fixes
the existing regression. (I have test vectors captured from the machines
with issues.)
1. You can't use kmalloc in IRQ get penalty
2. SCI IRQ type cannot be gathered from IRQ API
3. acpi_irq_penalty cannot be called from early stages since it is iterating
the link list. If there is a penalty assignment requirement from early stages,
this needs to be done on a statically allocated array.
4. acpi_irq_penalty_init is redundant.
and your goal to have some common code that can be used with any IRQ we want.
If we want to move the ISA pieces out of this file, that can be done too.
We can also add support for PNPACPI. I'm not a very big fan of scratch
everything and start from beginning approach. This refactoring effort already
failed 3 times. I'd like to close the issue and move on.
>
> Bjorn
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 1/4] arm64: dts: msm8996: Add SMEM reserve-memory node
From: Bjorn Andersson @ 2016-10-20 19:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476989765-7524-1-git-send-email-spjoshi@codeaurora.org>
On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> Add DT node to carveout memory for shared memory region.
>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index d6da223..36216ae 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -31,6 +31,17 @@
> reg = <0 0 0 0>;
> };
>
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + smem_mem: smem-mem at 86000000 {
> + reg = <0x0 0x86000000 0x0 0x200000>;
> + no-map;
> + };
> + };
> +
> cpus {
> #address-cells = <2>;
> #size-cells = <0>;
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
^ permalink raw reply
* [PATCH 2/4] arm64: dts: msm8996: Add reserve-memory nodes
From: Bjorn Andersson @ 2016-10-20 19:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476989765-7524-2-git-send-email-spjoshi@codeaurora.org>
On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> Add reserve-memory nodes required for Qualcomm
> Peripheral Image Loaders
>
Awesome stuff,
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 36216ae..949b096 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -36,6 +36,31 @@
> #size-cells = <2>;
> ranges;
>
> + mba_region: mba at 91500000 {
> + reg = <0x0 0x91500000 0x0 0x200000>;
> + no-map;
> + };
> +
> + slpi_region: slpi at 90b00000 {
> + reg = <0x0 0x90b00000 0xa00000>;
> + no-map;
> + };
> +
> + venus_region: venus at 90400000 {
> + reg = <0x0 0x90400000 0x0 0x700000>;
> + no-map;
> + };
> +
> + adsp_region: adsp at 8ea00000 {
> + reg = <0x0 0x8ea00000 0x0 0x1a00000>;
> + no-map;
> + };
> +
> + mpss_region: mpss at 88800000 {
> + reg = <0x0 0x88800000 0x0 0x6200000>;
> + no-map;
> + };
> +
> smem_mem: smem-mem at 86000000 {
> reg = <0x0 0x86000000 0x0 0x200000>;
> no-map;
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
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